| blob | f5dbeb27b6f082553974d8b057f2916266ed92e9 |
1 /************************************************************************
2 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
3 * Copyright(c) 2002-2005 Neterion Inc.
5 * This software may be used and distributed according to the terms of
6 * the GNU General Public License (GPL), incorporated herein by reference.
7 * Drivers based on or derived from this code fall under the GPL and must
8 * retain the authorship, copyright and license notice. This file is not
9 * a complete program and may only be used when the entire operating
10 * system is licensed under the GPL.
11 * See the file COPYING in this distribution for more information.
12 *
13 * Credits:
14 * Jeff Garzik : For pointing out the improper error condition
15 * check in the s2io_xmit routine and also some
16 * issues in the Tx watch dog function. Also for
17 * patiently answering all those innumerable
18 * questions regaring the 2.6 porting issues.
19 * Stephen Hemminger : Providing proper 2.6 porting mechanism for some
20 * macros available only in 2.6 Kernel.
21 * Francois Romieu : For pointing out all code part that were
22 * deprecated and also styling related comments.
23 * Grant Grundler : For helping me get rid of some Architecture
24 * dependent code.
25 * Christopher Hellwig : Some more 2.6 specific issues in the driver.
26 *
27 * The module loadable parameters that are supported by the driver and a brief
28 * explaination of all the variables.
29 *
30 * rx_ring_num : This can be used to program the number of receive rings used
31 * in the driver.
32 * rx_ring_sz: This defines the number of receive blocks each ring can have.
33 * This is also an array of size 8.
34 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
35 * values are 1, 2 and 3.
36 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
37 * tx_fifo_len: This too is an array of 8. Each element defines the number of
38 * Tx descriptors that can be associated with each corresponding FIFO.
39 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
40 * 1(MSI), 2(MSI_X). Default value is '0(INTA)'
41 * lro: Specifies whether to enable Large Receive Offload (LRO) or not.
42 * Possible values '1' for enable '0' for disable. Default is '0'
43 * lro_max_pkts: This parameter defines maximum number of packets can be
44 * aggregated as a single large packet
45 ************************************************************************/
47 #include <linux/module.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/ioport.h>
51 #include <linux/pci.h>
52 #include <linux/dma-mapping.h>
53 #include <linux/kernel.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
57 #include <linux/init.h>
58 #include <linux/delay.h>
59 #include <linux/stddef.h>
60 #include <linux/ioctl.h>
61 #include <linux/timex.h>
62 #include <linux/sched.h>
63 #include <linux/ethtool.h>
64 #include <linux/workqueue.h>
65 #include <linux/if_vlan.h>
66 #include <linux/ip.h>
67 #include <linux/tcp.h>
68 #include <net/tcp.h>
70 #include <asm/system.h>
71 #include <asm/uaccess.h>
72 #include <asm/io.h>
73 #include <asm/div64.h>
74 #include <asm/irq.h>
76 /* local include */
82 /* S2io Driver name & version. */
90 {
97 }
99 /*
100 * Cards with following subsystem_id have a link state indication
101 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
102 * macro below identifies these cards given the subsystem_id.
103 */
104 #define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
105 (dev_type == XFRAME_I_DEVICE) ? \
106 ((((subid >= 0x600B) && (subid <= 0x600D)) || \
107 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
109 #define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
110 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
111 #define TASKLET_IN_USE test_and_set_bit(0, (&sp->tasklet_status))
112 #define PANIC 1
113 #define LOW 2
115 {
124 }
126 /* Ethtool related variables and Macros. */
133 };
271 };
273 #define S2IO_STAT_LEN sizeof(ethtool_stats_keys)/ ETH_GSTRING_LEN
274 #define S2IO_STAT_STRINGS_LEN S2IO_STAT_LEN * ETH_GSTRING_LEN
276 #define S2IO_TEST_LEN sizeof(s2io_gstrings) / ETH_GSTRING_LEN
277 #define S2IO_STRINGS_LEN S2IO_TEST_LEN * ETH_GSTRING_LEN
279 #define S2IO_TIMER_CONF(timer, handle, arg, exp) \
280 init_timer(&timer); \
281 timer.function = handle; \
282 timer.data = (unsigned long) arg; \
283 mod_timer(&timer, (jiffies + exp)) \
285 /* Add the vlan */
288 {
295 }
297 /* Unregister the vlan */
299 {
307 }
309 /*
310 * Constants to be programmed into the Xena's registers, to configure
311 * the XAUI.
312 */
314 #define END_SIGN 0x0
316 /* Set address */
318 /* Write data */
320 /* Set address */
322 /* Write data */
324 /* Set address */
326 /* Write data */
328 /* Set address */
330 /* Write data */
332 /* Done */
333 END_SIGN
334 };
337 /* Set address */
339 /* Write data */
341 /* Set address */
343 /* Write data */
345 /* Set address */
347 /* Write data */
349 END_SIGN
350 };
352 /*
353 * Constants for Fixing the MacAddress problem seen mostly on
354 * Alpha machines.
355 */
371 END_SIGN
372 };
379 /* Module Loadable parameters. */
394 /* Frequency of Rx desc syncs expressed as power of 2 */
396 /* Interrupt type. Values can be 0(INTA), 1(MSI), 2(MSI_X) */
398 /* Large receive offload feature */
400 /* Max pkts to be aggregated by LRO at one time. If not specified,
401 * aggregation happens until we hit max IP pkt size(64K)
402 */
404 #ifndef CONFIG_S2IO_NAPI
406 #endif
419 /*
420 * S2IO device table.
421 * This table lists all the devices that this driver supports.
422 */
433 };
442 };
444 /* A simplifier macro used both by init and free shared_mem Fns(). */
445 #define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
447 /**
448 * init_shared_mem - Allocation and Initialization of Memory
449 * @nic: Device private variable.
450 * Description: The function allocates all the memory areas shared
451 * between the NIC and the driver. This includes Tx descriptors,
452 * Rx descriptors and the statistics block.
453 */
456 {
457 u32 size;
474 /* Allocation and initialization of TXDLs in FIOFs */
478 }
483 }
493 GFP_KERNEL);
498 }
500 }
503 lst_per_page);
516 dma_addr_t tmp_p;
525 }
526 /* If we got a zero DMA address(can happen on
527 * certain platforms like PPC), reallocate.
528 * Store virtual address of page we don't want,
529 * to be freed later.
530 */
544 }
545 }
554 k++;
555 }
556 }
557 }
564 /* Allocation and initialization of RXDs in Rings */
571 i);
574 }
581 }
584 else
602 /* Allocating all the Rx blocks */
612 /*
613 * In case of failure, free_shared_mem()
614 * is called, which should free any
615 * memory that was alloced till the
616 * failure happened.
617 */
620 }
626 GFP_KERNEL);
634 }
635 }
636 /* Interlinking all Rx Blocks */
638 tmp_v_addr =
640 tmp_v_addr_next =
643 tmp_p_addr =
645 tmp_p_addr_next =
654 }
655 }
657 /*
658 * Allocation of Storages for buffer addresses in 2BUFF mode
659 * and the buffers as well.
660 */
666 GFP_KERNEL);
674 GFP_KERNEL);
697 k++;
698 }
699 }
700 }
701 }
703 /* Allocation and initialization of Statistics block */
709 /*
710 * In case of failure, free_shared_mem() is called, which
711 * should free any memory that was alloced till the
712 * failure happened.
713 */
715 }
725 }
727 /**
728 * free_shared_mem - Free the allocated Memory
729 * @nic: Device private variable.
730 * Description: This function is to free all memory locations allocated by
731 * the init_shared_mem() function and return it to the kernel.
732 */
735 {
738 dma_addr_t tmp_p_addr;
755 lst_per_page);
761 list_virt_addr)
766 list_virt_addr,
769 list_phy_addr);
770 }
771 /* If we got a zero DMA address during allocation,
772 * free the page now
773 */
783 }
785 }
792 block_virt_addr;
794 block_dma_addr;
800 }
801 }
804 /* Freeing buffer storage addresses in 2BUFF mode. */
817 k++;
818 }
820 }
822 }
823 }
830 }
833 }
835 /**
836 * s2io_verify_pci_mode -
837 */
840 {
851 }
853 #define NEC_VENID 0x1033
854 #define NEC_DEVID 0x0125
856 {
863 }
864 }
866 }
869 /**
870 * s2io_print_pci_mode -
871 */
873 {
891 }
897 }
926 }
929 }
931 /**
932 * init_nic - Initialization of hardware
933 * @nic: device peivate variable
934 * Description: The function sequentially configures every block
935 * of the H/W from their reset values.
936 * Return Value: SUCCESS on success and
937 * '-1' on failure (endian settings incorrect).
938 */
941 {
946 u32 time;
957 /* to set the swapper controle on the card */
961 }
963 /*
964 * Herc requires EOI to be removed from reset before XGXS, so..
965 */
971 }
973 /* Remove XGXS from reset state */
979 /* Enable Receiving broadcasts */
988 /* Read registers in all blocks */
993 /* Set MTU */
1003 dtx_cnt++;
1004 }
1010 dtx_cnt++;
1011 }
1012 }
1014 /* Tx DMA Initialization */
1023 val64 |=
1030 i++;
1031 }
1049 }
1050 }
1052 /*
1053 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
1054 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
1055 */
1064 /*
1065 * Initialization of Tx_PA_CONFIG register to ignore packet
1066 * integrity checking.
1067 */
1073 /* Rx DMA intialization. */
1076 val64 |=
1079 }
1082 /*
1083 * Allocating equal share of memory to all the
1084 * configured Rings.
1085 */
1089 else
1127 }
1128 }
1131 /*
1132 * Filling Tx round robin registers
1133 * as per the number of FIFOs
1134 */
1228 }
1230 /* Enable all configured Tx FIFO partitions */
1235 /* Filling the Rx round robin registers as per the
1236 * number of Rings and steering based on QoS.
1237 */
1348 }
1350 /* UDP Fix */
1355 /* Set the default rts frame length for the rings configured */
1360 /* Set the frame length for the configured rings
1361 * desired by the user
1362 */
1364 /* If rts_frm_len[i] == 0 then it is assumed that user not
1365 * specified frame length steering.
1366 * If the user provides the frame length then program
1367 * the rts_frm_len register for those values or else
1368 * leave it as it is.
1369 */
1373 }
1374 }
1376 /* Program statistics memory */
1382 }
1384 /*
1385 * Initializing the sampling rate for the device to calculate the
1386 * bandwidth utilization.
1387 */
1393 /*
1394 * Initializing the Transmit and Receive Traffic Interrupt
1395 * Scheme.
1396 */
1397 /*
1398 * TTI Initialization. Default Tx timer gets us about
1399 * 250 interrupts per sec. Continuous interrupts are enabled
1400 * by default.
1401 */
1408 }
1424 /*
1425 * Once the operation completes, the Strobe bit of the command
1426 * register will be reset. We poll for this particular condition
1427 * We wait for a maximum of 500ms for the operation to complete,
1428 * if it's not complete by then we return error.
1429 */
1435 }
1440 }
1442 time++;
1443 }
1452 /*
1453 * Once the operation completes, the Strobe bit of the command
1454 * register will be reset. We poll for this particular condition
1455 * We wait for a maximum of 500ms for the operation to complete,
1456 * if it's not complete by then we return error.
1457 */
1463 }
1469 }
1470 time++;
1472 }
1473 }
1476 /* RTI Initialization */
1478 /*
1479 * Programmed to generate Apprx 500 Intrs per
1480 * second
1481 */
1486 }
1498 else
1508 /*
1509 * Once the operation completes, the Strobe bit of the
1510 * command register will be reset. We poll for this
1511 * particular condition. We wait for a maximum of 500ms
1512 * for the operation to complete, if it's not complete
1513 * by then we return error.
1514 */
1520 }
1525 }
1526 time++;
1528 }
1529 }
1530 }
1532 /*
1533 * Initializing proper values as Pause threshold into all
1534 * the 8 Queues on Rx side.
1535 */
1539 /* Disable RMAC PAD STRIPPING */
1549 /* Enable FCS stripping by adapter */
1560 }
1562 /*
1563 * Set the time value to be inserted in the pause frame
1564 * generated by xena.
1565 */
1571 /*
1572 * Set the Threshold Limit for Generating the pause frame
1573 * If the amount of data in any Queue exceeds ratio of
1574 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
1575 * pause frame is generated
1576 */
1579 val64 |=
1581 mc_pause_threshold_q0q3)
1583 }
1588 val64 |=
1590 mc_pause_threshold_q4q7)
1592 }
1595 /*
1596 * TxDMA will stop Read request if the number of read split has
1597 * exceeded the limit pointed by shared_splits
1598 */
1607 }
1609 /*
1610 * Programming the Herc to split every write transaction
1611 * that does not start on an ADB to reduce disconnects.
1612 */
1619 }
1623 }
1626 }
1627 #define LINK_UP_DOWN_INTERRUPT 1
1628 #define MAC_RMAC_ERR_TIMER 2
1631 {
1636 else
1638 }
1640 /**
1641 * en_dis_able_nic_intrs - Enable or Disable the interrupts
1642 * @nic: device private variable,
1643 * @mask: A mask indicating which Intr block must be modified and,
1644 * @flag: A flag indicating whether to enable or disable the Intrs.
1645 * Description: This function will either disable or enable the interrupts
1646 * depending on the flag argument. The mask argument can be used to
1647 * enable/disable any Intr block.
1648 * Return Value: NONE.
1649 */
1652 {
1656 /* Top level interrupt classification */
1657 /* PIC Interrupts */
1659 /* Enable PIC Intrs in the general intr mask register */
1665 /*
1666 * If Hercules adapter enable GPIO otherwise
1667 * disable all PCIX, Flash, MDIO, IIC and GPIO
1668 * interrupts for now.
1669 * TODO
1670 */
1672 LINK_UP_DOWN_INTERRUPT ) {
1681 }
1682 /*
1683 * No MSI Support is available presently, so TTI and
1684 * RTI interrupts are also disabled.
1685 */
1687 /*
1688 * Disable PIC Intrs in the general
1689 * intr mask register
1690 */
1695 }
1696 }
1698 /* DMA Interrupts */
1699 /* Enabling/Disabling Tx DMA interrupts */
1701 /* Enable TxDMA Intrs in the general intr mask register */
1707 /*
1708 * Keep all interrupts other than PFC interrupt
1709 * and PCC interrupt disabled in DMA level.
1710 */
1712 TXDMA_PCC_INT_M);
1714 /*
1715 * Enable only the MISC error 1 interrupt in PFC block
1716 */
1719 /*
1720 * Enable only the FB_ECC error interrupt in PCC block
1721 */
1725 /*
1726 * Disable TxDMA Intrs in the general intr mask
1727 * register
1728 */
1734 }
1735 }
1737 /* Enabling/Disabling Rx DMA interrupts */
1739 /* Enable RxDMA Intrs in the general intr mask register */
1745 /*
1746 * All RxDMA block interrupts are disabled for now
1747 * TODO
1748 */
1751 /*
1752 * Disable RxDMA Intrs in the general intr mask
1753 * register
1754 */
1759 }
1760 }
1762 /* MAC Interrupts */
1763 /* Enabling/Disabling MAC interrupts */
1770 /*
1771 * All MAC block error interrupts are disabled for now
1772 * TODO
1773 */
1775 /*
1776 * Disable MAC Intrs in the general intr mask register
1777 */
1785 }
1786 }
1788 /* XGXS Interrupts */
1795 /*
1796 * All XGXS block error interrupts are disabled for now
1797 * TODO
1798 */
1801 /*
1802 * Disable MC Intrs in the general intr mask register
1803 */
1808 }
1809 }
1811 /* Memory Controller(MC) interrupts */
1818 /*
1819 * Enable all MC Intrs.
1820 */
1824 /*
1825 * Disable MC Intrs in the general intr mask register
1826 */
1831 }
1832 }
1835 /* Tx traffic interrupts */
1842 /*
1843 * Enable all the Tx side interrupts
1844 * writing 0 Enables all 64 TX interrupt levels
1845 */
1848 /*
1849 * Disable Tx Traffic Intrs in the general intr mask
1850 * register.
1851 */
1856 }
1857 }
1859 /* Rx traffic interrupts */
1866 /* writing 0 Enables all 8 RX interrupt levels */
1869 /*
1870 * Disable Rx Traffic Intrs in the general intr mask
1871 * register.
1872 */
1877 }
1878 }
1879 }
1882 {
1889 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
1891 }
1895 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
1897 }
1898 }
1902 ADAPTER_STATUS_RMAC_PCC_IDLE) &&
1905 ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
1907 }
1910 ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) &&
1913 ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
1915 }
1916 }
1917 }
1920 }
1921 /**
1922 * verify_xena_quiescence - Checks whether the H/W is ready
1923 * @val64 : Value read from adapter status register.
1924 * @flag : indicates if the adapter enable bit was ever written once
1925 * before.
1926 * Description: Returns whether the H/W is ready to go or not. Depending
1927 * on whether adapter enable bit was written or not the comparison
1928 * differs and the calling function passes the input argument flag to
1929 * indicate this.
1930 * Return: 1 If xena is quiescence
1931 * 0 If Xena is not quiescence
1932 */
1935 {
1947 ADAPTER_STATUS_P_PLL_LOCK))) {
1949 }
1952 }
1954 /**
1955 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
1956 * @sp: Pointer to device specifc structure
1957 * Description :
1958 * New procedure to clear mac address reading problems on Alpha platforms
1959 *
1960 */
1963 {
1965 u64 val64;
1972 }
1973 }
1975 /**
1976 * start_nic - Turns the device on
1977 * @nic : device private variable.
1978 * Description:
1979 * This function actually turns the device on. Before this function is
1980 * called,all Registers are configured from their reset states
1981 * and shared memory is allocated but the NIC is still quiescent. On
1982 * calling this function, the device interrupts are cleared and the NIC is
1983 * literally switched on by writing into the adapter control register.
1984 * Return Value:
1985 * SUCCESS on success and -1 on failure.
1986 */
1989 {
2000 /* PRC Initialization and configuration */
2010 else
2017 }
2020 /* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
2024 }
2026 /*
2027 * Enabling MC-RLDRAM. After enabling the device, we timeout
2028 * for around 100ms, which is approximately the time required
2029 * for the device to be ready for operation.
2030 */
2038 /* Enabling ECC Protection. */
2043 /*
2044 * Clearing any possible Link state change interrupts that
2045 * could have popped up just before Enabling the card.
2046 */
2051 /*
2052 * Verify if the device is ready to be enabled, if so enable
2053 * it.
2054 */
2061 }
2063 /*
2064 * With some switches, link might be already up at this point.
2065 * Because of this weird behavior, when we enable laser,
2066 * we may not get link. We need to handle this. We cannot
2067 * figure out which switch is misbehaving. So we are forced to
2068 * make a global change.
2069 */
2071 /* Enabling Laser. */
2077 /*
2078 * Dont see link state interrupts initally on some switches,
2079 * so directly scheduling the link state task here.
2080 */
2082 }
2083 /* SXE-002: Initialize link and activity LED */
2092 }
2095 }
2096 /**
2097 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2098 */
2100 {
2110 PCI_DMA_TODEVICE);
2111 txds++;
2112 }
2119 }
2123 PCI_DMA_TODEVICE);
2126 txds++;
2134 }
2135 }
2138 }
2140 /**
2141 * free_tx_buffers - Free all queued Tx buffers
2142 * @nic : device private variable.
2143 * Description:
2144 * Free all queued Tx buffers.
2145 * Return Value: void
2146 */
2149 {
2164 list_virt_addr;
2168 cnt++;
2169 }
2170 }
2176 }
2177 }
2179 /**
2180 * stop_nic - To stop the nic
2181 * @nic ; device private variable.
2182 * Description:
2183 * This function does exactly the opposite of what the start_nic()
2184 * function does. This function is called to stop the device.
2185 * Return Value:
2186 * void.
2187 */
2190 {
2193 u16 interruptible;
2200 /* Disable all interrupts */
2206 /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
2210 }
2213 {
2218 /* Buffer-1 receives L3/L4 headers */
2221 PCI_DMA_FROMDEVICE);
2223 /* skb_shinfo(skb)->frag_list will have L4 data payload */
2228 }
2235 /* Buffer-2 receives L4 data payload */
2238 PCI_DMA_FROMDEVICE);
2243 }
2245 /**
2246 * fill_rx_buffers - Allocates the Rx side skbs
2247 * @nic: device private variable
2248 * @ring_no: ring number
2249 * Description:
2250 * The function allocates Rx side skbs and puts the physical
2251 * address of these buffers into the RxD buffer pointers, so that the NIC
2252 * can DMA the received frame into these locations.
2253 * The NIC supports 3 receive modes, viz
2254 * 1. single buffer,
2255 * 2. three buffer and
2256 * 3. Five buffer modes.
2257 * Each mode defines how many fragments the received frame will be split
2258 * up into by the NIC. The frame is split into L3 header, L4 Header,
2259 * L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
2260 * is split into 3 fragments. As of now only single buffer mode is
2261 * supported.
2262 * Return Value:
2263 * SUCCESS on success or an appropriate -ve value on failure.
2264 */
2267 {
2273 u32 alloc_cnt;
2276 u64 tmp;
2278 #ifndef CONFIG_S2IO_NAPI
2280 #endif
2292 block_index;
2304 }
2307 block_index++;
2310 block_count)
2323 }
2324 #ifndef CONFIG_S2IO_NAPI
2329 #endif
2336 }
2337 /* calculate size of skb based on ring mode */
2344 else
2347 /* allocate skb */
2355 }
2357 }
2359 /* 1 buffer mode - normal operation mode */
2364 PCI_DMA_FROMDEVICE);
2368 /*
2369 * 2 or 3 buffer mode -
2370 * Both 2 buffer mode and 3 buffer mode provides 128
2371 * byte aligned receive buffers.
2372 *
2373 * 3 buffer mode provides header separation where in
2374 * skb->data will have L3/L4 headers where as
2375 * skb_shinfo(skb)->frag_list will have the L4 data
2376 * payload
2377 */
2391 PCI_DMA_FROMDEVICE);
2392 else
2398 /* Two buffer mode */
2400 /*
2401 * Buffer2 will have L3/L4 header plus
2402 * L4 payload
2403 */
2406 PCI_DMA_FROMDEVICE);
2408 /* Buffer-1 will be dummy buffer. Not used */
2413 PCI_DMA_FROMDEVICE);
2414 }
2419 /* 3 buffer mode */
2425 RXD_OWN_XENA;
2426 }
2428 }
2429 }
2431 }
2435 off++;
2445 }
2447 }
2449 alloc_tab++;
2450 }
2452 end:
2453 /* Transfer ownership of first descriptor to adapter just before
2454 * exiting. Before that, use memory barrier so that ownership
2455 * and other fields are seen by adapter correctly.
2456 */
2460 }
2463 }
2466 {
2482 }
2487 HEADER_ETHERNET_II_802_3_SIZE
2489 HEADER_SNAP_SIZE,
2490 PCI_DMA_FROMDEVICE);
2497 BUF0_LEN,
2498 PCI_DMA_FROMDEVICE);
2501 BUF1_LEN,
2502 PCI_DMA_FROMDEVICE);
2506 PCI_DMA_FROMDEVICE);
2511 PCI_DMA_FROMDEVICE);
2515 PCI_DMA_FROMDEVICE);
2518 PCI_DMA_FROMDEVICE);
2520 }
2523 }
2524 }
2526 /**
2527 * free_rx_buffers - Frees all Rx buffers
2528 * @sp: device private variable.
2529 * Description:
2530 * This function will free all Rx buffers allocated by host.
2531 * Return Value:
2532 * NONE.
2533 */
2536 {
2556 }
2557 }
2559 /**
2560 * s2io_poll - Rx interrupt handler for NAPI support
2561 * @dev : pointer to the device structure.
2562 * @budget : The number of packets that were budgeted to be processed
2563 * during one pass through the 'Poll" function.
2564 * Description:
2565 * Comes into picture only if NAPI support has been incorporated. It does
2566 * the same thing that rx_intr_handler does, but not in a interrupt context
2567 * also It will process only a given number of packets.
2568 * Return value:
2569 * 0 on success and 1 if there are No Rx packets to be processed.
2570 */
2572 #if defined(CONFIG_S2IO_NAPI)
2574 {
2599 /* Quota for the current iteration has been met */
2601 }
2602 }
2615 }
2616 }
2617 /* Re enable the Rx interrupts. */
2623 no_rx:
2632 }
2633 }
2636 }
2637 #endif
2639 #ifdef CONFIG_NET_POLL_CONTROLLER
2640 /**
2641 * s2io_netpoll - netpoll event handler entry point
2642 * @dev : pointer to the device structure.
2643 * Description:
2644 * This function will be called by upper layer to check for events on the
2645 * interface in situations where interrupts are disabled. It is used for
2646 * specific in-kernel networking tasks, such as remote consoles and kernel
2647 * debugging over the network (example netdump in RedHat).
2648 */
2650 {
2667 /* we need to free up the transmitted skbufs or else netpoll will
2668 * run out of skbs and will fail and eventually netpoll application such
2669 * as netdump will fail.
2670 */
2674 /* check for received packet and indicate up to network */
2683 }
2684 }
2688 }
2689 #endif
2691 /**
2692 * rx_intr_handler - Rx interrupt handler
2693 * @nic: device private variable.
2694 * Description:
2695 * If the interrupt is because of a received frame or if the
2696 * receive ring contains fresh as yet un-processed frames,this function is
2697 * called. It picks out the RxD at which place the last Rx processing had
2698 * stopped and sends the skb to the OSM's Rx handler and then increments
2699 * the offset.
2700 * Return Value:
2701 * NONE.
2702 */
2704 {
2711 #ifndef CONFIG_S2IO_NAPI
2713 #endif
2722 }
2729 #ifndef CONFIG_S2IO_NAPI
2733 #else
2736 #endif
2738 /* If your are next to put index then it's FIFO full condition */
2743 }
2751 }
2756 HEADER_ETHERNET_II_802_3_SIZE +
2757 HEADER_802_2_SIZE +
2758 HEADER_SNAP_SIZE,
2759 PCI_DMA_FROMDEVICE);
2767 PCI_DMA_FROMDEVICE);
2771 PCI_DMA_FROMDEVICE);
2775 PCI_DMA_FROMDEVICE);
2779 }
2789 get_block++;
2794 }
2796 #ifdef CONFIG_S2IO_NAPI
2800 #else
2801 pkt_cnt++;
2804 #endif
2805 }
2807 /* Clear all LRO sessions before exiting */
2814 }
2815 }
2816 }
2819 }
2821 /**
2822 * tx_intr_handler - Transmit interrupt handler
2823 * @nic : device private variable
2824 * Description:
2825 * If an interrupt was raised to indicate DMA complete of the
2826 * Tx packet, this function is called. It identifies the last TxD
2827 * whose buffer was freed and frees all skbs whose data have already
2828 * DMA'ed into the NICs internal memory.
2829 * Return Value:
2830 * NONE
2831 */
2834 {
2844 list_virt_addr;
2848 /* Check for TxD errors */
2854 parity_err_cnt++;
2855 }
2859 }
2863 }
2864 }
2869 __FUNCTION__);
2872 }
2874 /* Updating the statistics block */
2885 }
2891 }
2893 /**
2894 * s2io_mdio_write - Function to write in to MDIO registers
2895 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
2896 * @addr : address value
2897 * @value : data value
2898 * @dev : pointer to net_device structure
2899 * Description:
2900 * This function is used to write values to the MDIO registers
2901 * NONE
2902 */
2904 {
2909 //address transaction
2918 //Data transaction
2940 }
2942 /**
2943 * s2io_mdio_read - Function to write in to MDIO registers
2944 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
2945 * @addr : address value
2946 * @dev : pointer to net_device structure
2947 * Description:
2948 * This function is used to read values to the MDIO registers
2949 * NONE
2950 */
2952 {
2958 /* address transaction */
2967 /* Data transaction */
2978 /* Read the value from regs */
2983 }
2984 /**
2985 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
2986 * @counter : couter value to be updated
2987 * @flag : flag to indicate the status
2988 * @type : counter type
2989 * Description:
2990 * This function is to check the status of the xpak counters value
2991 * NONE
2992 */
2994 static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
2995 {
2997 u64 val64;
3003 {
3009 {
3011 {
3014 "service. Excessive temperatures may "
3015 "result in premature transceiver "
3020 "service Excessive bias currents may "
3021 "indicate imminent laser diode "
3026 "service Excessive laser output "
3027 "power may saturate far-end "
3033 }
3035 }
3041 }
3042 }
3044 /**
3045 * s2io_updt_xpak_counter - Function to update the xpak counters
3046 * @dev : pointer to net_device struct
3047 * Description:
3048 * This function is to upate the status of the xpak counters value
3049 * NONE
3050 */
3052 {
3062 /* Check the communication with the MDIO slave */
3067 {
3071 }
3073 /* Check for the expecte value of 2040 at PMA address 0x0000 */
3075 {
3080 }
3082 /* Loading the DOM register to MDIO register */
3087 /* Reading the Alarm flags */
3119 /* Reading the Warning flags */
3141 }
3143 /**
3144 * alarm_intr_handler - Alarm Interrrupt handler
3145 * @nic: device private variable
3146 * Description: If the interrupt was neither because of Rx packet or Tx
3147 * complete, this function is called. If the interrupt was to indicate
3148 * a loss of link, the OSM link status handler is invoked for any other
3149 * alarm interrupt the block that raised the interrupt is displayed
3150 * and a H/W reset is issued.
3151 * Return Value:
3152 * NONE
3153 */
3156 {
3160 u64 cnt;
3163 /* Handling the XPAK counters update */
3165 /* waiting for an hour */
3169 /* reset the count to zero */
3171 }
3173 /* Handling link status change error Intr */
3179 }
3180 }
3182 /* Handling Ecc errors */
3188 double_ecc_errs++;
3193 /* Reset XframeI only if critical error */
3195 MC_ERR_REG_MIRI_ECC_DB_ERR_1)) {
3199 soft_reset_cnt++;
3200 }
3201 }
3204 single_ecc_errs++;
3205 }
3206 }
3208 /* In case of a serious error, the device will be Reset. */
3218 }
3220 /*
3221 * Also as mentioned in the latest Errata sheets if the PCC_FB_ECC
3222 * Error occurs, the adapter will be recycled by disabling the
3223 * adapter enable bit and enabling it again after the device
3224 * becomes Quiescent.
3225 */
3234 }
3235 /* Check for data parity error */
3243 }
3244 }
3246 /* Check for ring full counter */
3254 }
3262 }
3263 }
3265 /* Other type of interrupts are not being handled now, TODO */
3266 }
3268 /**
3269 * wait_for_cmd_complete - waits for a command to complete.
3270 * @sp : private member of the device structure, which is a pointer to the
3271 * s2io_nic structure.
3272 * Description: Function that waits for a command to Write into RMAC
3273 * ADDR DATA registers to be completed and returns either success or
3274 * error depending on whether the command was complete or not.
3275 * Return value:
3276 * SUCCESS on success and FAILURE on failure.
3277 */
3280 {
3282 u64 val64;
3289 }
3293 else
3298 }
3300 }
3302 /**
3303 * s2io_reset - Resets the card.
3304 * @sp : private member of the device structure.
3305 * Description: Function to Reset the card. This function then also
3306 * restores the previously saved PCI configuration space registers as
3307 * the card reset also resets the configuration space.
3308 * Return value:
3309 * void.
3310 */
3313 {
3315 u64 val64;
3318 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3324 /*
3325 * At this stage, if the PCI write is indeed completed, the
3326 * card is reset and so is the PCI Config space of the device.
3327 * So a read cannot be issued at this stage on any of the
3328 * registers to ensure the write into "sw_reset" register
3329 * has gone through.
3330 * Question: Is there any system call that will explicitly force
3331 * all the write commands still pending on the bus to be pushed
3332 * through?
3333 * As of now I'am just giving a 250ms delay and hoping that the
3334 * PCI write to sw_reset register is done by this time.
3335 */
3339 }
3341 /* Restore the PCI state saved during initialization. */
3344 pci_cmd);
3349 /* Set swapper to enable I/O register access */
3352 /* Restore the MSIX table entries from local variables */
3355 /* Clear certain PCI/PCI-X fields after reset */
3357 /* Clear "detected parity error" bit */
3360 /* Clearing PCIX Ecc status register */
3363 /* Clearing PCI_STATUS error reflected here */
3365 }
3367 /* Reset device statistics maintained by OS */
3370 /* SXE-002: Configure link and activity LED to turn it off */
3379 }
3381 /*
3382 * Clear spurious ECC interrupts that would have occured on
3383 * XFRAME II cards after reset.
3384 */
3388 }
3391 }
3393 /**
3394 * s2io_set_swapper - to set the swapper controle on the card
3395 * @sp : private member of the device structure,
3396 * pointer to the s2io_nic structure.
3397 * Description: Function to set the swapper control on the card
3398 * correctly depending on the 'endianness' of the system.
3399 * Return value:
3400 * SUCCESS on success and FAILURE on failure.
3401 */
3404 {
3409 /*
3410 * Set proper endian settings and verify the same by reading
3411 * the PIF Feed-back register.
3412 */
3427 i++;
3428 }
3435 }
3439 }
3458 i++;
3459 }
3465 }
3466 }
3470 #ifdef __BIG_ENDIAN
3471 /*
3472 * The device by default set to a big endian format, so a
3473 * big endian driver need not set anything.
3474 */
3476 SWAPPER_CTRL_TXP_SE |
3477 SWAPPER_CTRL_TXD_R_FE |
3478 SWAPPER_CTRL_TXD_W_FE |
3479 SWAPPER_CTRL_TXF_R_FE |
3480 SWAPPER_CTRL_RXD_R_FE |
3481 SWAPPER_CTRL_RXD_W_FE |
3482 SWAPPER_CTRL_RXF_W_FE |
3483 SWAPPER_CTRL_XMSI_FE |
3488 #else
3489 /*
3490 * Initially we enable all bits to make it accessible by the
3491 * driver, then we selectively enable only those bits that
3492 * we want to set.
3493 */
3495 SWAPPER_CTRL_TXP_SE |
3496 SWAPPER_CTRL_TXD_R_FE |
3497 SWAPPER_CTRL_TXD_R_SE |
3498 SWAPPER_CTRL_TXD_W_FE |
3499 SWAPPER_CTRL_TXD_W_SE |
3500 SWAPPER_CTRL_TXF_R_FE |
3501 SWAPPER_CTRL_RXD_R_FE |
3502 SWAPPER_CTRL_RXD_R_SE |
3503 SWAPPER_CTRL_RXD_W_FE |
3504 SWAPPER_CTRL_RXD_W_SE |
3505 SWAPPER_CTRL_RXF_W_FE |
3506 SWAPPER_CTRL_XMSI_FE |
3511 #endif
3514 /*
3515 * Verifying if endian settings are accurate by reading a
3516 * feedback register.
3517 */
3520 /* Endian settings are incorrect, calls for another dekko. */
3526 }
3529 }
3532 {
3534 u64 val64;
3542 cnt++;
3547 }
3550 }
3553 {
3555 u64 val64;
3566 }
3567 }
3568 }
3571 {
3576 /* Store and display */
3583 }
3589 }
3590 }
3591 }
3594 {
3611 }
3613 /*
3614 * Enable MSI and use MSI-1 in stead of the standard MSI-0
3615 * for interrupt handling.
3616 */
3626 /* program MSI-1 into all usable Tx_Mat and Rx_Mat fields */
3630 }
3636 }
3641 }
3644 {
3651 GFP_KERNEL);
3655 }
3660 GFP_KERNEL);
3665 }
3674 }
3682 }
3692 }
3701 }
3703 }
3707 /* We fail init if error or we get less vectors than min required */
3711 }
3720 }
3724 /*
3725 * To enable MSI-X, MSI also needs to be enabled, due to a bug
3726 * in the herc NIC. (Temp change, needs to be removed later)
3727 */
3733 }
3735 /* ********************************************************* *
3736 * Functions defined below concern the OS part of the driver *
3737 * ********************************************************* */
3739 /**
3740 * s2io_open - open entry point of the driver
3741 * @dev : pointer to the device structure.
3742 * Description:
3743 * This function is the open entry point of the driver. It mainly calls a
3744 * function to allocate Rx buffers and inserts them into the buffer
3745 * descriptors and then enables the Rx part of the NIC.
3746 * Return value:
3747 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3748 * file on failure.
3749 */
3752 {
3756 /*
3757 * Make sure you have link off by default every time
3758 * Nic is initialized
3759 */
3763 /* Initialize H/W and enable interrupts */
3769 }
3776 }
3781 hw_init_failed:
3787 }
3789 }
3791 /**
3792 * s2io_close -close entry point of the driver
3793 * @dev : device pointer.
3794 * Description:
3795 * This is the stop entry point of the driver. It needs to undo exactly
3796 * whatever was done by the open entry point,thus it's usually referred to
3797 * as the close function.Among other things this function mainly stops the
3798 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3799 * Return value:
3800 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3801 * file on failure.
3802 */
3805 {
3810 /* Reset card, kill tasklet and free Tx and Rx buffers. */
3815 }
3817 /**
3818 * s2io_xmit - Tx entry point of te driver
3819 * @skb : the socket buffer containing the Tx data.
3820 * @dev : device pointer.
3821 * Description :
3822 * This function is the Tx entry point of the driver. S2IO NIC supports
3823 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
3824 * NOTE: when device cant queue the pkt,just the trans_start variable will
3825 * not be upadted.
3826 * Return value:
3827 * 0 on success & 1 on failure.
3828 */
3831 {
3855 }
3859 /* Get Fifo number to Transmit based on vlan priority */
3864 }
3869 list_virt_addr;
3872 /* Avoid "put" pointer going beyond "get" pointer */
3880 }
3882 /* A buffer with no data will be dropped */
3888 }
3891 #ifdef NETIF_F_TSO
3895 }
3896 #endif
3900 TXD_TX_CKO_UDP_EN);
3901 }
3909 }
3920 #ifdef __BIG_ENDIAN
3923 #else
3926 #endif
3931 txdp++;
3932 }
3942 /* For fragmented SKB. */
3945 /* A '0' length fragment will be ignored */
3948 txdp++;
3955 }
3966 TX_FIFO_LAST_LIST);
3974 put_off++;
3979 /* Avoid "put" pointer going beyond "get" pointer */
3986 }
3992 }
3994 static void
3996 {
4001 }
4004 {
4017 __FUNCTION__);
4020 }
4028 }
4030 }
4032 static irqreturn_t
4034 {
4046 /* If Intr is because of Rx Traffic */
4050 /* If Intr is because of Tx Traffic */
4054 /*
4055 * If the Rx buffer count is below the panic threshold then
4056 * reallocate the buffers from the interrupt handler itself,
4057 * else schedule a tasklet to reallocate the buffers.
4058 */
4064 }
4066 static irqreturn_t
4068 {
4079 }
4081 static irqreturn_t
4083 {
4091 }
4093 {
4095 u64 val64;
4102 /*
4103 * This is unstable state so clear both up/down
4104 * interrupt and adapter to re-evaluate the link state.
4105 */
4111 GPIO_INT_MASK_LINK_DOWN);
4113 }
4118 /* Enable Adapter */
4128 /*
4129 * unmask link down interrupt and mask link-up
4130 * intr
4131 */
4137 }
4143 /* Link is down so unmaks link up interrupt */
4148 }
4149 }
4150 }
4152 }
4154 /**
4155 * s2io_isr - ISR handler of the device .
4156 * @irq: the irq of the device.
4157 * @dev_id: a void pointer to the dev structure of the NIC.
4158 * @pt_regs: pointer to the registers pushed on the stack.
4159 * Description: This function is the ISR handler of the device. It
4160 * identifies the reason for the interrupt and calls the relevant
4161 * service routines. As a contongency measure, this ISR allocates the
4162 * recv buffers, if their numbers are below the panic value which is
4163 * presently set to 25% of the original number of rcv buffers allocated.
4164 * Return value:
4165 * IRQ_HANDLED: will be returned if IRQ was handled by this routine
4166 * IRQ_NONE: will be returned if interrupt is not from our device
4167 */
4169 {
4182 /*
4183 * Identify the cause for interrupt and call the appropriate
4184 * interrupt handler. Causes for the interrupt could be;
4185 * 1. Rx of packet.
4186 * 2. Tx complete.
4187 * 3. Link down.
4188 * 4. Error in any functional blocks of the NIC.
4189 */
4193 /* The interrupt was not raised by Xena. */
4196 }
4199 /* Store current mask before masking all interrupts */
4203 #ifdef CONFIG_S2IO_NAPI
4208 }
4209 }
4210 #else
4211 /*
4212 * Rx handler is called by default, without checking for the
4213 * cause of interrupt.
4214 * rx_traffic_int reg is an R1 register, writing all 1's
4215 * will ensure that the actual interrupt causing bit get's
4216 * cleared and hence a read can be avoided.
4217 */
4221 }
4222 #endif
4224 /*
4225 * tx_traffic_int reg is an R1 register, writing all 1's
4226 * will ensure that the actual interrupt causing bit get's
4227 * cleared and hence a read can be avoided.
4228 */
4236 /*
4237 * If the Rx buffer count is below the panic threshold then
4238 * reallocate the buffers from the interrupt handler itself,
4239 * else schedule a tasklet to reallocate the buffers.
4240 */
4241 #ifndef CONFIG_S2IO_NAPI
4244 #endif
4248 }
4250 /**
4251 * s2io_updt_stats -
4252 */
4254 {
4256 u64 val64;
4260 /* Apprx 30us on a 133 MHz bus */
4269 cnt++;
4275 }
4276 }
4278 /**
4279 * s2io_get_stats - Updates the device statistics structure.
4280 * @dev : pointer to the device structure.
4281 * Description:
4282 * This function updates the device statistics structure in the s2io_nic
4283 * structure and returns a pointer to the same.
4284 * Return value:
4285 * pointer to the updated net_device_stats structure.
4286 */
4289 {
4298 /* Configure Stats for immediate updt */
4313 }
4315 /**
4316 * s2io_set_multicast - entry point for multicast address enable/disable.
4317 * @dev : pointer to the device structure
4318 * Description:
4319 * This function is a driver entry point which gets called by the kernel
4320 * whenever multicast addresses must be enabled/disabled. This also gets
4321 * called to set/reset promiscuous mode. Depending on the deivce flag, we
4322 * determine, if multicast address must be enabled or if promiscuous mode
4323 * is to be disabled etc.
4324 * Return value:
4325 * void.
4326 */
4329 {
4340 /* Enable all Multicast addresses */
4346 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4349 /* Wait till command completes */
4351 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
4356 /* Disable all Multicast addresses */
4362 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4365 /* Wait till command completes */
4367 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
4371 }
4374 /* Put the NIC into promiscuous mode */
4389 /* Remove the NIC from promiscuous mode */
4403 }
4405 /* Update individual M_CAST address list */
4414 }
4419 /* Clear out the previous list of Mc in the H/W. */
4426 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4427 RMAC_ADDR_CMD_MEM_OFFSET
4431 /* Wait for command completes */
4433 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4438 }
4439 }
4441 /* Create the new Rx filter list and update the same in H/W. */
4445 ETH_ALEN);
4450 }
4457 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4458 RMAC_ADDR_CMD_MEM_OFFSET
4462 /* Wait for command completes */
4464 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4469 }
4470 }
4471 }
4472 }
4474 /**
4475 * s2io_set_mac_addr - Programs the Xframe mac address
4476 * @dev : pointer to the device structure.
4477 * @addr: a uchar pointer to the new mac address which is to be set.
4478 * Description : This procedure will program the Xframe to receive
4479 * frames with new Mac Address
4480 * Return value: SUCCESS on success and an appropriate (-)ve integer
4481 * as defined in errno.h file on failure.
4482 */
4485 {
4491 /*
4492 * Set the new MAC address as the new unicast filter and reflect this
4493 * change on the device address registered with the OS. It will be
4494 * at offset 0.
4495 */
4499 }
4504 val64 =
4508 /* Wait till command completes */
4510 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4513 }
4516 }
4518 /**
4519 * s2io_ethtool_sset - Sets different link parameters.
4520 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
4521 * @info: pointer to the structure with parameters given by ethtool to set
4522 * link information.
4523 * Description:
4524 * The function sets different link parameters provided by the user onto
4525 * the NIC.
4526 * Return value:
4527 * 0 on success.
4528 */
4532 {
4540 }
4543 }
4545 /**
4546 * s2io_ethtol_gset - Return link specific information.
4547 * @sp : private member of the device structure, pointer to the
4548 * s2io_nic structure.
4549 * @info : pointer to the structure with parameters given by ethtool
4550 * to return link information.
4551 * Description:
4552 * Returns link specific information like speed, duplex etc.. to ethtool.
4553 * Return value :
4554 * return 0 on success.
4555 */
4558 {
4563 /* info->transceiver?? TODO */
4571 }
4575 }
4577 /**
4578 * s2io_ethtool_gdrvinfo - Returns driver specific information.
4579 * @sp : private member of the device structure, which is a pointer to the
4580 * s2io_nic structure.
4581 * @info : pointer to the structure with parameters given by ethtool to
4582 * return driver information.
4583 * Description:
4584 * Returns driver specefic information like name, version etc.. to ethtool.
4585 * Return value:
4586 * void
4587 */
4591 {
4602 }
4604 /**
4605 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
4606 * @sp: private member of the device structure, which is a pointer to the
4607 * s2io_nic structure.
4608 * @regs : pointer to the structure with parameters given by ethtool for
4609 * dumping the registers.
4610 * @reg_space: The input argumnet into which all the registers are dumped.
4611 * Description:
4612 * Dumps the entire register space of xFrame NIC into the user given
4613 * buffer area.
4614 * Return value :
4615 * void .
4616 */
4620 {
4622 u64 reg;
4632 }
4633 }
4635 /**
4636 * s2io_phy_id - timer function that alternates adapter LED.
4637 * @data : address of the private member of the device structure, which
4638 * is a pointer to the s2io_nic structure, provided as an u32.
4639 * Description: This is actually the timer function that alternates the
4640 * adapter LED bit of the adapter control bit to set/reset every time on
4641 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
4642 * once every second.
4643 */
4645 {
4649 u16 subid;
4661 }
4664 }
4666 /**
4667 * s2io_ethtool_idnic - To physically identify the nic on the system.
4668 * @sp : private member of the device structure, which is a pointer to the
4669 * s2io_nic structure.
4670 * @id : pointer to the structure with identification parameters given by
4671 * ethtool.
4672 * Description: Used to physically identify the NIC on the system.
4673 * The Link LED will blink for a time specified by the user for
4674 * identification.
4675 * NOTE: The Link has to be Up to be able to blink the LED. Hence
4676 * identification is possible only if it's link is up.
4677 * Return value:
4678 * int , returns 0 on success
4679 */
4682 {
4686 u16 subid;
4697 }
4698 }
4703 }
4707 else
4714 }
4717 }
4719 /**
4720 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
4721 * @sp : private member of the device structure, which is a pointer to the
4722 * s2io_nic structure.
4723 * @ep : pointer to the structure with pause parameters given by ethtool.
4724 * Description:
4725 * Returns the Pause frame generation and reception capability of the NIC.
4726 * Return value:
4727 * void
4728 */
4731 {
4732 u64 val64;
4742 }
4744 /**
4745 * s2io_ethtool_setpause_data - set/reset pause frame generation.
4746 * @sp : private member of the device structure, which is a pointer to the
4747 * s2io_nic structure.
4748 * @ep : pointer to the structure with pause parameters given by ethtool.
4749 * Description:
4750 * It can be used to set or reset Pause frame generation or reception
4751 * support of the NIC.
4752 * Return value:
4753 * int, returns 0 on Success
4754 */
4758 {
4759 u64 val64;
4766 else
4770 else
4774 }
4776 /**
4777 * read_eeprom - reads 4 bytes of data from user given offset.
4778 * @sp : private member of the device structure, which is a pointer to the
4779 * s2io_nic structure.
4780 * @off : offset at which the data must be written
4781 * @data : Its an output parameter where the data read at the given
4782 * offset is stored.
4783 * Description:
4784 * Will read 4 bytes of data from the user given offset and return the
4785 * read data.
4786 * NOTE: Will allow to read only part of the EEPROM visible through the
4787 * I2C bus.
4788 * Return value:
4789 * -1 on failure and 0 on success.
4790 */
4792 #define S2IO_DEV_ID 5
4794 {
4797 u64 val64;
4803 I2C_CONTROL_CNTL_START;
4812 }
4814 exit_cnt++;
4815 }
4816 }
4835 }
4837 exit_cnt++;
4838 }
4839 }
4841 }
4843 /**
4844 * write_eeprom - actually writes the relevant part of the data value.
4845 * @sp : private member of the device structure, which is a pointer to the
4846 * s2io_nic structure.
4847 * @off : offset at which the data must be written
4848 * @data : The data that is to be written
4849 * @cnt : Number of bytes of the data that are actually to be written into
4850 * the Eeprom. (max of 3)
4851 * Description:
4852 * Actually writes the relevant part of the data value into the Eeprom
4853 * through the I2C bus.
4854 * Return value:
4855 * 0 on success, -1 on failure.
4856 */
4859 {
4861 u64 val64;
4867 I2C_CONTROL_CNTL_START;
4876 }
4878 exit_cnt++;
4879 }
4880 }
4900 }
4902 exit_cnt++;
4903 }
4904 }
4906 }
4908 {
4910 u8 data;
4917 }
4921 }
4936 }
4941 }
4944 }
4948 }
4950 }
4952 /**
4953 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
4954 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
4955 * @eeprom : pointer to the user level structure provided by ethtool,
4956 * containing all relevant information.
4957 * @data_buf : user defined value to be written into Eeprom.
4958 * Description: Reads the values stored in the Eeprom at given offset
4959 * for a given length. Stores these values int the input argument data
4960 * buffer 'data_buf' and returns these to the caller (ethtool.)
4961 * Return value:
4962 * int 0 on success
4963 */
4967 {
4969 u64 data;
4981 }
4984 }
4986 }
4988 /**
4989 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
4990 * @sp : private member of the device structure, which is a pointer to the
4991 * s2io_nic structure.
4992 * @eeprom : pointer to the user level structure provided by ethtool,
4993 * containing all relevant information.
4994 * @data_buf ; user defined value to be written into Eeprom.
4995 * Description:
4996 * Tries to write the user provided value in the Eeprom, at the offset
4997 * given by the user.
4998 * Return value:
4999 * 0 on success, -EFAULT on failure.
5000 */
5005 {
5016 }
5031 }
5032 cnt++;
5033 len--;
5034 }
5037 }
5039 /**
5040 * s2io_register_test - reads and writes into all clock domains.
5041 * @sp : private member of the device structure, which is a pointer to the
5042 * s2io_nic structure.
5043 * @data : variable that returns the result of each of the test conducted b
5044 * by the driver.
5045 * Description:
5046 * Read and write into all clock domains. The NIC has 3 clock domains,
5047 * see that registers in all the three regions are accessible.
5048 * Return value:
5049 * 0 on success.
5050 */
5053 {
5062 }
5068 }
5073 else
5078 }
5084 }
5092 }
5100 }
5104 }
5106 /**
5107 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
5108 * @sp : private member of the device structure, which is a pointer to the
5109 * s2io_nic structure.
5110 * @data:variable that returns the result of each of the test conducted by
5111 * the driver.
5112 * Description:
5113 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
5114 * register.
5115 * Return value:
5116 * 0 on success.
5117 */
5120 {
5126 /* Test Write Error at offset 0 */
5127 /* Note that SPI interface allows write access to all areas
5128 * of EEPROM. Hence doing all negative testing only for Xframe I.
5129 */
5134 /* Save current values at offsets 0x4F0 and 0x7F0 */
5140 /* Test Write at offset 4f0 */
5152 }
5154 /* Reset the EEPROM data go FFFF */
5157 /* Test Write Request Error at offset 0x7c */
5162 /* Test Write Request at offset 0x7f0 */
5174 }
5176 /* Reset the EEPROM data go FFFF */
5180 /* Test Write Error at offset 0x80 */
5184 /* Test Write Error at offset 0xfc */
5188 /* Test Write Error at offset 0x100 */
5192 /* Test Write Error at offset 4ec */
5195 }
5197 /* Restore values at offsets 0x4F0 and 0x7F0 */
5205 }
5207 /**
5208 * s2io_bist_test - invokes the MemBist test of the card .
5209 * @sp : private member of the device structure, which is a pointer to the
5210 * s2io_nic structure.
5211 * @data:variable that returns the result of each of the test conducted by
5212 * the driver.
5213 * Description:
5214 * This invokes the MemBist test of the card. We give around
5215 * 2 secs time for the Test to complete. If it's still not complete
5216 * within this peiod, we consider that the test failed.
5217 * Return value:
5218 * 0 on success and -1 on failure.
5219 */
5222 {
5236 }
5238 cnt++;
5239 }
5242 }
5244 /**
5245 * s2io-link_test - verifies the link state of the nic
5246 * @sp ; private member of the device structure, which is a pointer to the
5247 * s2io_nic structure.
5248 * @data: variable that returns the result of each of the test conducted by
5249 * the driver.
5250 * Description:
5251 * The function verifies the link state of the NIC and updates the input
5252 * argument 'data' appropriately.
5253 * Return value:
5254 * 0 on success.
5255 */
5258 {
5260 u64 val64;
5265 else
5269 }
5271 /**
5272 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
5273 * @sp - private member of the device structure, which is a pointer to the
5274 * s2io_nic structure.
5275 * @data - variable that returns the result of each of the test
5276 * conducted by the driver.
5277 * Description:
5278 * This is one of the offline test that tests the read and write
5279 * access to the RldRam chip on the NIC.
5280 * Return value:
5281 * 0 on success.
5282 */
5285 {
5287 u64 val64;
5309 }
5315 }
5321 }
5328 MC_RLDRAM_TEST_GO;
5336 }
5349 }
5358 iteration++;
5359 }
5363 /* Bring the adapter out of test mode */
5367 }
5369 /**
5370 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
5371 * @sp : private member of the device structure, which is a pointer to the
5372 * s2io_nic structure.
5373 * @ethtest : pointer to a ethtool command specific structure that will be
5374 * returned to the user.
5375 * @data : variable that returns the result of each of the test
5376 * conducted by the driver.
5377 * Description:
5378 * This function conducts 6 tests ( 4 offline and 2 online) to determine
5379 * the health of the card.
5380 * Return value:
5381 * void
5382 */
5387 {
5392 /* Offline Tests. */
5417 /* Online Tests. */
5427 }
5436 }
5437 }
5442 {
5650 /*
5651 * Since 64-bit divide does not work on all platforms,
5652 * do repeated subtraction.
5653 */
5656 count++;
5657 }
5659 }
5660 else
5662 }
5665 {
5667 }
5671 {
5675 }
5678 {
5683 else
5687 }
5690 {
5692 }
5695 {
5697 }
5701 {
5709 }
5710 }
5712 {
5714 }
5717 {
5720 else
5724 }
5727 {
5729 }
5731 {
5734 else
5738 }
5758 #ifdef NETIF_F_TSO
5761 #endif
5770 };
5772 /**
5773 * s2io_ioctl - Entry point for the Ioctl
5774 * @dev : Device pointer.
5775 * @ifr : An IOCTL specefic structure, that can contain a pointer to
5776 * a proprietary structure used to pass information to the driver.
5777 * @cmd : This is used to distinguish between the different commands that
5778 * can be passed to the IOCTL functions.
5779 * Description:
5780 * Currently there are no special functionality supported in IOCTL, hence
5781 * function always return EOPNOTSUPPORTED
5782 */
5785 {
5787 }
5789 /**
5790 * s2io_change_mtu - entry point to change MTU size for the device.
5791 * @dev : device pointer.
5792 * @new_mtu : the new MTU size for the device.
5793 * Description: A driver entry point to change MTU size for the device.
5794 * Before changing the MTU the device must be stopped.
5795 * Return value:
5796 * 0 on success and an appropriate (-)ve integer as defined in errno.h
5797 * file on failure.
5798 */
5801 {
5808 }
5816 __FUNCTION__);
5817 }
5825 }
5828 }
5830 /**
5831 * s2io_tasklet - Bottom half of the ISR.
5832 * @dev_adr : address of the device structure in dma_addr_t format.
5833 * Description:
5834 * This is the tasklet or the bottom half of the ISR. This is
5835 * an extension of the ISR which is scheduled by the scheduler to be run
5836 * when the load on the CPU is low. All low priority tasks of the ISR can
5837 * be pushed into the tasklet. For now the tasklet is used only to
5838 * replenish the Rx buffers in the Rx buffer descriptors.
5839 * Return value:
5840 * void.
5841 */
5844 {
5867 }
5868 }
5870 }
5871 }
5873 /**
5874 * s2io_set_link - Set the LInk status
5875 * @data: long pointer to device private structue
5876 * Description: Sets the link status for the adapter
5877 */
5880 {
5885 u16 subid;
5888 /* The card is being reset, no point doing anything */
5890 }
5894 /*
5895 * Allow a small delay for the NICs self initiated
5896 * cleanup to complete.
5897 */
5899 }
5908 subid)) {
5916 }
5918 MAC_RMAC_ERR_TIMER) {
5926 }
5927 }
5930 }
5934 subid)) {
5939 }
5941 }
5946 }
5948 }
5953 {
5958 /* allocate skb */
5961 /*
5962 * As Rx frame are not going to be processed,
5963 * using same mapped address for the Rxd
5964 * buffer pointer
5965 */
5973 }
5974 /* storing the mapped addr in a temp variable
5975 * such it will be used for next rxd whose
5976 * Host Control is NULL
5977 */
5981 PCI_DMA_FROMDEVICE);
5983 }
5985 /* Two buffer Mode */
5995 PCI_DMA_FROMDEVICE);
5998 PCI_DMA_FROMDEVICE);
6001 /* Buffer-1 will be dummy buffer not used */
6004 PCI_DMA_FROMDEVICE);
6005 }
6007 /* Three buffer mode */
6017 PCI_DMA_FROMDEVICE);
6018 /* Buffer-1 receives L3/L4 headers */
6022 PCI_DMA_FROMDEVICE);
6023 /*
6024 * skb_shinfo(skb)->frag_list will have L4
6025 * data payload
6026 */
6028 ALIGN_SIZE);
6033 }
6036 /*
6037 * Buffer-2 receives L4 data payload
6038 */
6042 }
6043 }
6045 }
6047 {
6059 }
6060 }
6063 {
6073 /* Calculate the size based on ring mode */
6080 else
6100 /* flip the Ownership bit to Hardware */
6102 }
6103 }
6104 }
6107 }
6110 {
6122 }
6124 /* Store the values of the MSIX table in the nic_t structure */
6127 /* After proper initialization of H/W, register ISR */
6136 }
6137 }
6158 }
6164 }
6166 }
6167 }
6175 }
6176 }
6178 }
6180 {
6186 u16 msi_control;
6194 }
6203 u16 val;
6209 }
6210 }
6211 /* Waiting till all Interrupt handlers are complete */
6217 cnt++;
6219 }
6222 {
6229 /* If s2io_set_link task is executing, wait till it completes. */
6232 }
6235 /* disable Tx and Rx traffic on the NIC */
6240 /* Kill tasklet. */
6243 /* Check if the device is Quiescent and then Reset the NIC */
6245 /* As per the HW requirement we need to replenish the
6246 * receive buffer to avoid the ring bump. Since there is
6247 * no intention of processing the Rx frame at this pointwe are
6248 * just settting the ownership bit of rxd in Each Rx
6249 * ring to HW and set the appropriate buffer size
6250 * based on the ring mode
6251 */
6257 }
6260 cnt++;
6267 }
6272 /* Free all Tx buffers */
6276 /* Free all Rx buffers */
6282 }
6285 {
6290 u16 interruptible;
6292 /* Initialize the H/W I/O registers */
6298 }
6300 /*
6301 * Initializing the Rx buffers. For now we are considering only 1
6302 * Rx ring and initializing buffers into 30 Rx blocks
6303 */
6314 }
6317 }
6319 /* Setting its receive mode */
6323 /* Initialize max aggregatable pkts per session based on MTU */
6325 /* Check if we can use(if specified) user provided value */
6328 }
6330 /* Enable Rx Traffic and interrupts on the NIC */
6336 }
6338 /* Add interrupt service routine */
6345 }
6349 /* Enable tasklet for the device */
6352 /* Enable select interrupts */
6360 }
6365 }
6367 /**
6368 * s2io_restart_nic - Resets the NIC.
6369 * @data : long pointer to the device private structure
6370 * Description:
6371 * This function is scheduled to be run by the s2io_tx_watchdog
6372 * function after 0.5 secs to reset the NIC. The idea is to reduce
6373 * the run time of the watch dog routine which is run holding a
6374 * spin lock.
6375 */
6378 {
6386 }
6391 }
6393 /**
6394 * s2io_tx_watchdog - Watchdog for transmit side.
6395 * @dev : Pointer to net device structure
6396 * Description:
6397 * This function is triggered if the Tx Queue is stopped
6398 * for a pre-defined amount of time when the Interface is still up.
6399 * If the Interface is jammed in such a situation, the hardware is
6400 * reset (by s2io_close) and restarted again (by s2io_open) to
6401 * overcome any problem that might have been caused in the hardware.
6402 * Return value:
6403 * void
6404 */
6407 {
6413 }
6414 }
6416 /**
6417 * rx_osm_handler - To perform some OS related operations on SKB.
6418 * @sp: private member of the device structure,pointer to s2io_nic structure.
6419 * @skb : the socket buffer pointer.
6420 * @len : length of the packet
6421 * @cksum : FCS checksum of the frame.
6422 * @ring_no : the ring from which this RxD was extracted.
6423 * Description:
6424 * This function is called by the Rx interrupt serivce routine to perform
6425 * some OS related operations on the SKB before passing it to the upper
6426 * layers. It mainly checks if the checksum is OK, if so adds it to the
6427 * SKBs cksum variable, increments the Rx packet count and passes the SKB
6428 * to the upper layer. If the checksum is wrong, it increments the Rx
6429 * packet error count, frees the SKB and returns error.
6430 * Return value:
6431 * SUCCESS on success and -1 on failure.
6432 */
6434 {
6447 /* Check for parity error */
6450 }
6452 /*
6453 * Drop the packet if bad transfer code. Exception being
6454 * 0x5, which could be due to unsupported IPv6 extension header.
6455 * In this case, we let stack handle the packet.
6456 * Note that in this case, since checksum will be incorrect,
6457 * stack will validate the same.
6458 */
6467 }
6468 }
6470 /* Updating statistics */
6503 }
6511 /*
6512 * NIC verifies if the Checksum of the received
6513 * frame is Ok or not and accordingly returns
6514 * a flag in the RxD.
6515 */
6518 u32 tcp_len;
6529 {
6533 }
6535 {
6543 }
6554 * L2 aggregatable
6555 */
6557 * First pkt in session not
6558 * L3/L4 aggregatable
6559 */
6564 __FUNCTION__);
6566 }
6567 }
6569 /*
6570 * Packet with erroneous checksum, let the
6571 * upper layers deal with it.
6572 */
6574 }
6577 }
6581 #ifdef CONFIG_S2IO_NAPI
6583 /* Queueing the vlan frame to the upper layer */
6588 }
6589 #else
6591 /* Queueing the vlan frame to the upper layer */
6596 }
6597 #endif
6599 send_up:
6601 }
6603 aggregate:
6606 }
6608 /**
6609 * s2io_link - stops/starts the Tx queue.
6610 * @sp : private member of the device structure, which is a pointer to the
6611 * s2io_nic structure.
6612 * @link : inidicates whether link is UP/DOWN.
6613 * Description:
6614 * This function stops/starts the Tx queue depending on whether the link
6615 * status of the NIC is is down or up. This is called by the Alarm
6616 * interrupt handler whenever a link change interrupt comes up.
6617 * Return value:
6618 * void.
6619 */
6622 {
6632 }
6633 }
6635 }
6637 /**
6638 * get_xena_rev_id - to identify revision ID of xena.
6639 * @pdev : PCI Dev structure
6640 * Description:
6641 * Function to identify the Revision ID of xena.
6642 * Return value:
6643 * returns the revision ID of the device.
6644 */
6647 {
6652 }
6654 /**
6655 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
6656 * @sp : private member of the device structure, which is a pointer to the
6657 * s2io_nic structure.
6658 * Description:
6659 * This function initializes a few of the PCI and PCI-X configuration registers
6660 * with recommended values.
6661 * Return value:
6662 * void
6663 */
6666 {
6669 /* Enable Data Parity Error Recovery in PCI-X command register. */
6677 /* Set the PErr Response bit in PCI command register. */
6682 }
6685 {
6691 }
6697 }
6698 #ifdef CONFIG_S2IO_NAPI
6703 }
6704 #endif
6705 #ifndef CONFIG_PCI_MSI
6710 }
6711 #else
6716 }
6717 #endif
6724 }
6729 }
6731 }
6733 /**
6734 * s2io_init_nic - Initialization of the adapter .
6735 * @pdev : structure containing the PCI related information of the device.
6736 * @pre: List of PCI devices supported by the driver listed in s2io_tbl.
6737 * Description:
6738 * The function initializes an adapter identified by the pci_dec structure.
6739 * All OS related initialization including memory and device structure and
6740 * initlaization of the device private variable is done. Also the swapper
6741 * control register is initialized to enable read and write into the I/O
6742 * registers of the device.
6743 * Return value:
6744 * returns 0 on success and negative on failure.
6745 */
6747 static int __devinit
6749 {
6757 u16 subid;
6770 }
6778 "Unable to obtain 64bit DMA for \
6782 }
6788 }
6794 }
6795 }
6802 }
6810 }
6811 }
6819 }
6826 /* Private member variable initialized to s2io NIC structure */
6845 else
6850 /* Initialize some PCI/PCI-X fields of the NIC. */
6853 /*
6854 * Setting the device configuration parameters.
6855 * Most of these parameters can be specified by the user during
6856 * module insertion as they are module loadable parameters. If
6857 * these parameters are not not specified during load time, they
6858 * are initialized with default values.
6859 */
6863 /* Tx side parameters. */
6868 }
6870 /* mapping the QoS priority to the configured fifos */
6881 }
6882 }
6883 /* + 2 because one Txd for skb->data and one Txd for UFO */
6886 /* Rx side parameters. */
6892 }
6898 }
6900 /* Setting Mac Control parameters */
6906 /* Initialize Ring buffer parameters. */
6910 /* Initialize the number of ISRs currently running */
6913 /* initialize the shared memory used by the NIC and the host */
6919 }
6928 }
6937 }
6942 /* Initializing the BAR1 address as the start of the FIFO pointer. */
6946 }
6948 /* Driver entry points */
6961 /*
6962 * will use eth_mac_addr() for dev->set_mac_address
6963 * mac address will be set every time dev->open() is called
6964 */
6965 #if defined(CONFIG_S2IO_NAPI)
6968 #endif
6970 #ifdef CONFIG_NET_POLL_CONTROLLER
6972 #endif
6977 #ifdef NETIF_F_TSO
6979 #endif
6980 #ifdef NETIF_F_TSO6
6982 #endif
6986 }
6997 /* Setting swapper control on the NIC, for proper reset operation */
7003 }
7005 /* Verify if the Herc works on the slot its placed into */
7013 }
7014 }
7016 /* Not needed for Herc */
7018 /*
7019 * Fix for all "FFs" MAC address problems observed on
7020 * Alpha platforms
7021 */
7024 }
7026 /*
7027 * MAC address initialization.
7028 * For now only one mac address will be read and used.
7029 */
7035 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
7049 /* Set the factory defined MAC address initially */
7053 /* reset Nic and bring it to known state */
7056 /*
7057 * Initialize the tasklet status and link state flags
7058 * and the card state parameter
7059 */
7064 /* Initialize spinlocks */
7066 #ifndef CONFIG_S2IO_NAPI
7068 #endif
7071 /*
7072 * SXE-002: Configure link and activity LED to init state
7073 * on driver load.
7074 */
7083 }
7091 }
7097 s2io_driver_version);
7113 }
7114 }
7128 }
7129 #ifdef CONFIG_S2IO_NAPI
7131 #endif
7142 }
7147 /* Initialize device name */
7150 /* Initialize bimodal Interrupts */
7156 }
7158 /*
7159 * Make Link state as off at this point, when the Link change
7160 * interrupt comes the state will be automatically changed to
7161 * the right state.
7162 */
7167 register_failed:
7168 set_swap_failed:
7170 bar1_remap_failed:
7172 bar0_remap_failed:
7173 mem_alloc_failed:
7183 }
7188 }
7190 /**
7191 * s2io_rem_nic - Free the PCI device
7192 * @pdev: structure containing the PCI related information of the device.
7193 * Description: This function is called by the Pci subsystem to release a
7194 * PCI device and free up all resource held up by the device. This could
7195 * be in response to a Hot plug event or when the driver is to be removed
7196 * from memory.
7197 */
7200 {
7208 }
7224 }
7227 }
7229 /**
7230 * s2io_starter - Entry point for the driver
7231 * Description: This function is the entry point for the driver. It verifies
7232 * the module loadable parameters and initializes PCI configuration space.
7233 */
7236 {
7238 }
7240 /**
7241 * s2io_closer - Cleanup routine for the driver
7242 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
7243 */
7246 {
7249 }
7256 {
7262 __FUNCTION__);
7264 }
7266 /* TODO:
7267 * By default the VLAN field in the MAC is stripped by the card, if this
7268 * feature is turned off in rx_pa_cfg register, then the ip_off field
7269 * has to be shifted by a further 2 bytes
7270 */
7276 /* LLC, SNAP etc are considered non-mergeable */
7279 }
7287 }
7291 {
7297 }
7300 {
7302 }
7306 {
7316 /*
7317 * check if we saw TCP timestamp. Other consistency checks have
7318 * already been done.
7319 */
7326 }
7328 }
7331 {
7334 u16 nchk;
7338 /* Update L3 header */
7344 /* Update L4 header */
7348 /* Update tsecr field if this session has timestamps enabled */
7352 }
7354 /* Update counters required for calculation of
7355 * average no. of packets aggregated.
7356 */
7359 }
7363 {
7370 /* Update ack seq no. and window ad(from this pkt) in LRO object */
7376 /* Update tsecr and tsval from this packet */
7380 }
7381 }
7385 {
7391 /* Runt frame or a pure ack */
7393 }
7398 /* If we see CE codepoint in IP header, packet is not mergeable */
7402 /* If we see ECE or CWR flags in TCP header, packet is not mergeable */
7405 /*
7406 * Currently recognize only the ack control word and
7407 * any other control field being set would result in
7408 * flushing the LRO session
7409 */
7411 }
7413 /*
7414 * Allow only one TCP timestamp option. Don't aggregate if
7415 * any other options are detected.
7416 */
7423 ptr++;
7427 /* Ensure timestamp value increases monotonically */
7432 /* timestamp echo reply should be non-zero */
7435 }
7438 }
7440 static int
7443 {
7449 rxdp))) {
7454 }
7463 /* Sock pair matched */
7476 }
7480 else
7483 }
7484 }
7487 /* Before searching for available LRO objects,
7488 * check if the pkt is L3/L4 aggregatable. If not
7489 * don't create new LRO session. Just send this
7490 * packet up.
7491 */
7494 }
7502 }
7503 }
7504 }
7508 __FUNCTION__);
7511 }
7525 }
7529 __FUNCTION__);
7531 }
7534 }
7537 {
7541 }
7544 {
7548 #ifdef CONFIG_S2IO_NAPI
7550 #else
7552 #endif
7553 }
7556 u32 tcp_len)
7557 {
7565 else
7570 }