arch/arm/mach-imx/devices.c

   1 /*
   2  * Author: MontaVista Software, Inc.
   3  *       <source@mvista.com>
   4  *
   5  * Based on the OMAP devices.c
   6  *
   7  * 2005 (c) MontaVista Software, Inc. This file is licensed under the
   8  * terms of the GNU General Public License version 2. This program is
   9  * licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  *
  12  * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  13  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  14  * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
  15  * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  16  * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License
  20  * as published by the Free Software Foundation; either version 2
  21  * of the License, or (at your option) any later version.
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  30  * MA 02110-1301, USA.
  31  */
  32 #include <linux/module.h>
  33 #include <linux/kernel.h>
  34 #include <linux/init.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/gpio.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/serial.h>
  39
  40 #include <mach/irqs.h>
  41 #include <mach/hardware.h>
  42 #include <mach/common.h>
  43 #include <mach/mmc.h>
  44
  45 #include "devices.h"
  46
  47 #if defined(CONFIG_ARCH_MX1)
  48 static struct resource imx1_camera_resources[] = {
  49         {
  50                 .start  = 0x00224000,
  51                 .end    = 0x00224010,
  52                 .flags  = IORESOURCE_MEM,
  53         }, {
  54                 .start  = MX1_CSI_INT,
  55                 .end    = MX1_CSI_INT,
  56                 .flags  = IORESOURCE_IRQ,
  57         },
  58 };
  59
  60 static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
  61
  62 struct platform_device imx1_camera_device = {
  63         .name           = "mx1-camera",
  64         .id             = 0, /* This is used to put cameras on this interface */
  65         .dev            = {
  66                 .dma_mask = &imx1_camera_dmamask,
  67                 .coherent_dma_mask = DMA_BIT_MASK(32),
  68         },
  69         .resource       = imx1_camera_resources,
  70         .num_resources  = ARRAY_SIZE(imx1_camera_resources),
  71 };
  72
  73 static struct resource imx_rtc_resources[] = {
  74         {
  75                 .start  = 0x00204000,
  76                 .end    = 0x00204024,
  77                 .flags  = IORESOURCE_MEM,
  78         }, {
  79                 .start  = MX1_RTC_INT,
  80                 .end    = MX1_RTC_INT,
  81                 .flags  = IORESOURCE_IRQ,
  82         }, {
  83                 .start  = MX1_RTC_SAMINT,
  84                 .end    = MX1_RTC_SAMINT,
  85                 .flags  = IORESOURCE_IRQ,
  86         },
  87 };
  88
  89 struct platform_device imx_rtc_device = {
  90         .name           = "rtc-imx",
  91         .id             = 0,
  92         .resource       = imx_rtc_resources,
  93         .num_resources  = ARRAY_SIZE(imx_rtc_resources),
  94 };
  95
  96 static struct resource imx_wdt_resources[] = {
  97         {
  98                 .start  = 0x00201000,
  99                 .end    = 0x00201008,
 100                 .flags  = IORESOURCE_MEM,
 101         }, {
 102                 .start  = MX1_WDT_INT,
 103                 .end    = MX1_WDT_INT,
 104                 .flags  = IORESOURCE_IRQ,
 105         },
 106 };
 107
 108 struct platform_device imx_wdt_device = {
 109         .name           = "imx-wdt",
 110         .id             = 0,
 111         .resource       = imx_wdt_resources,
 112         .num_resources  = ARRAY_SIZE(imx_wdt_resources),
 113 };
 114
 115 static struct resource imx_usb_resources[] = {
 116         {
 117                 .start  = 0x00212000,
 118                 .end    = 0x00212148,
 119                 .flags  = IORESOURCE_MEM,
 120         }, {
 121                 .start  = MX1_USBD_INT0,
 122                 .end    = MX1_USBD_INT0,
 123                 .flags  = IORESOURCE_IRQ,
 124         }, {
 125                 .start  = MX1_USBD_INT1,
 126                 .end    = MX1_USBD_INT1,
 127                 .flags  = IORESOURCE_IRQ,
 128         }, {
 129                 .start  = MX1_USBD_INT2,
 130                 .end    = MX1_USBD_INT2,
 131                 .flags  = IORESOURCE_IRQ,
 132         }, {
 133                 .start  = MX1_USBD_INT3,
 134                 .end    = MX1_USBD_INT3,
 135                 .flags  = IORESOURCE_IRQ,
 136         }, {
 137                 .start  = MX1_USBD_INT4,
 138                 .end    = MX1_USBD_INT4,
 139                 .flags  = IORESOURCE_IRQ,
 140         }, {
 141                 .start  = MX1_USBD_INT5,
 142                 .end    = MX1_USBD_INT5,
 143                 .flags  = IORESOURCE_IRQ,
 144         }, {
 145                 .start  = MX1_USBD_INT6,
 146                 .end    = MX1_USBD_INT6,
 147                 .flags  = IORESOURCE_IRQ,
 148         },
 149 };
 150
 151 struct platform_device imx_usb_device = {
 152         .name           = "imx_udc",
 153         .id             = 0,
 154         .num_resources  = ARRAY_SIZE(imx_usb_resources),
 155         .resource       = imx_usb_resources,
 156 };
 157
 158 /* GPIO port description */
 159 static struct mxc_gpio_port imx_gpio_ports[] = {
 160         {
 161                 .chip.label = "gpio-0",
 162                 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
 163                 .irq = MX1_GPIO_INT_PORTA,
 164                 .virtual_irq_start = MXC_GPIO_IRQ_START,
 165         }, {
 166                 .chip.label = "gpio-1",
 167                 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
 168                 .irq = MX1_GPIO_INT_PORTB,
 169                 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 170         }, {
 171                 .chip.label = "gpio-2",
 172                 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
 173                 .irq = MX1_GPIO_INT_PORTC,
 174                 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 175         }, {
 176                 .chip.label = "gpio-3",
 177                 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
 178                 .irq = MX1_GPIO_INT_PORTD,
 179                 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
 180         }
 181 };
 182
 183 int __init imx1_register_gpios(void)
 184 {
 185         return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 186 }
 187 #endif
 188
 189 #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
 190
 191 #ifdef CONFIG_MACH_MX27
 192 static struct resource mx27_camera_resources[] = {
 193         {
 194                .start = MX27_CSI_BASE_ADDR,
 195                .end = MX27_CSI_BASE_ADDR + 0x1f,
 196                .flags = IORESOURCE_MEM,
 197         }, {
 198                .start = MX27_EMMA_PRP_BASE_ADDR,
 199                .end = MX27_EMMA_PRP_BASE_ADDR + 0x1f,
 200                .flags = IORESOURCE_MEM,
 201         }, {
 202                .start = MX27_INT_CSI,
 203                .end = MX27_INT_CSI,
 204                .flags = IORESOURCE_IRQ,
 205         },{
 206                .start = MX27_INT_EMMAPRP,
 207                .end = MX27_INT_EMMAPRP,
 208                .flags = IORESOURCE_IRQ,
 209         },
 210 };
 211 struct platform_device mx27_camera_device = {
 212         .name = "mx2-camera",
 213         .id = 0,
 214         .num_resources = ARRAY_SIZE(mx27_camera_resources),
 215         .resource = mx27_camera_resources,
 216         .dev = {
 217                 .coherent_dma_mask = 0xffffffff,
 218         },
 219 };
 220 #endif
 221
 222 /*
 223  * General Purpose Timer
 224  * - i.MX21: 3 timers
 225  * - i.MX27: 6 timers
 226  */
 227 #define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq)                         \
 228         static struct resource timer ## n ##_resources[] = {            \
 229                 {                                                       \
 230                         .start = baseaddr,                              \
 231                         .end = baseaddr + SZ_4K - 1,                    \
 232                         .flags = IORESOURCE_MEM,                        \
 233                 }, {                                                    \
 234                         .start = irq,                                   \
 235                         .end = irq,                                     \
 236                         .flags = IORESOURCE_IRQ,                        \
 237                 }                                                       \
 238         };                                                              \
 239                                                                         \
 240         struct platform_device mxc_gpt ## n = {                         \
 241                 .name = "imx_gpt",                                      \
 242                 .id = n,                                                \
 243                 .num_resources = ARRAY_SIZE(timer ## n ## _resources),  \
 244                 .resource = timer ## n ## _resources,                   \
 245         }
 246
 247 /* We use gpt1 as system timer, so do not add a device for this one */
 248 DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
 249 DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
 250
 251 #ifdef CONFIG_MACH_MX27
 252 DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
 253 DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
 254 DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
 255 #endif
 256
 257 /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */
 258 static struct resource mxc_wdt_resources[] = {
 259         {
 260                 .start = MX2x_WDOG_BASE_ADDR,
 261                 .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
 262                 .flags = IORESOURCE_MEM,
 263         },
 264 };
 265
 266 struct platform_device mxc_wdt = {
 267         .name = "imx2-wdt",
 268         .id = 0,
 269         .num_resources = ARRAY_SIZE(mxc_wdt_resources),
 270         .resource = mxc_wdt_resources,
 271 };
 272
 273 static struct resource mxc_w1_master_resources[] = {
 274         {
 275                 .start = MX2x_OWIRE_BASE_ADDR,
 276                 .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
 277                 .flags = IORESOURCE_MEM,
 278         },
 279 };
 280
 281 struct platform_device mxc_w1_master_device = {
 282         .name = "mxc_w1",
 283         .id = 0,
 284         .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
 285         .resource = mxc_w1_master_resources,
 286 };
 287
 288 /*
 289  * lcdc:
 290  * - i.MX1: the basic controller
 291  * - i.MX21: to be checked
 292  * - i.MX27: like i.MX1, with slightly variations
 293  */
 294 static struct resource mxc_fb[] = {
 295         {
 296                 .start = MX2x_LCDC_BASE_ADDR,
 297                 .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
 298                 .flags = IORESOURCE_MEM,
 299         }, {
 300                 .start = MX2x_INT_LCDC,
 301                 .end = MX2x_INT_LCDC,
 302                 .flags = IORESOURCE_IRQ,
 303         }
 304 };
 305
 306 /* mxc lcd driver */
 307 struct platform_device mxc_fb_device = {
 308         .name = "imx-fb",
 309         .id = 0,
 310         .num_resources = ARRAY_SIZE(mxc_fb),
 311         .resource = mxc_fb,
 312         .dev = {
 313                 .coherent_dma_mask = DMA_BIT_MASK(32),
 314         },
 315 };
 316
 317 static struct resource mxc_pwm_resources[] = {
 318         {
 319                 .start = MX2x_PWM_BASE_ADDR,
 320                 .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
 321                 .flags = IORESOURCE_MEM,
 322         }, {
 323                 .start = MX2x_INT_PWM,
 324                 .end = MX2x_INT_PWM,
 325                 .flags = IORESOURCE_IRQ,
 326         }
 327 };
 328
 329 struct platform_device mxc_pwm_device = {
 330         .name = "mxc_pwm",
 331         .id = 0,
 332         .num_resources = ARRAY_SIZE(mxc_pwm_resources),
 333         .resource = mxc_pwm_resources,
 334 };
 335
 336 #define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq)                 \
 337         static struct resource mxc_sdhc_resources ## n[] = {            \
 338                 {                                                       \
 339                         .start = baseaddr,                              \
 340                         .end = baseaddr + SZ_4K - 1,                    \
 341                         .flags = IORESOURCE_MEM,                        \
 342                 }, {                                                    \
 343                         .start = irq,                                   \
 344                         .end = irq,                                     \
 345                         .flags = IORESOURCE_IRQ,                        \
 346                 }, {                                                    \
 347                         .start = dmareq,                                \
 348                         .end = dmareq,                                  \
 349                         .flags = IORESOURCE_DMA,                        \
 350                 },                                                      \
 351         };                                                              \
 352                                                                         \
 353         static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32);        \
 354                                                                         \
 355         struct platform_device mxc_sdhc_device ## n = {                 \
 356                 .name = "mxc-mmc",                                      \
 357                 .id = n,                                                \
 358                 .dev = {                                                \
 359                         .dma_mask = &mxc_sdhc ## n ## _dmamask,         \
 360                         .coherent_dma_mask = DMA_BIT_MASK(32),          \
 361                 },                                                      \
 362                 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n),   \
 363                 .resource = mxc_sdhc_resources ## n,            \
 364         }
 365
 366 DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
 367 DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
 368
 369 #ifdef CONFIG_MACH_MX27
 370 static struct resource otg_resources[] = {
 371         {
 372                 .start = MX27_USBOTG_BASE_ADDR,
 373                 .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
 374                 .flags = IORESOURCE_MEM,
 375         }, {
 376                 .start = MX27_INT_USB3,
 377                 .end = MX27_INT_USB3,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380 };
 381
 382 static u64 otg_dmamask = DMA_BIT_MASK(32);
 383
 384 /* OTG gadget device */
 385 struct platform_device mxc_otg_udc_device = {
 386         .name           = "fsl-usb2-udc",
 387         .id             = -1,
 388         .dev            = {
 389                 .dma_mask               = &otg_dmamask,
 390                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 391         },
 392         .resource       = otg_resources,
 393         .num_resources  = ARRAY_SIZE(otg_resources),
 394 };
 395
 396 /* OTG host */
 397 struct platform_device mxc_otg_host = {
 398         .name = "mxc-ehci",
 399         .id = 0,
 400         .dev = {
 401                 .coherent_dma_mask = DMA_BIT_MASK(32),
 402                 .dma_mask = &otg_dmamask,
 403         },
 404         .resource = otg_resources,
 405         .num_resources = ARRAY_SIZE(otg_resources),
 406 };
 407
 408 /* USB host 1 */
 409
 410 static u64 usbh1_dmamask = DMA_BIT_MASK(32);
 411
 412 static struct resource mxc_usbh1_resources[] = {
 413         {
 414                 .start = MX27_USBOTG_BASE_ADDR + 0x200,
 415                 .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
 416                 .flags = IORESOURCE_MEM,
 417         }, {
 418                 .start = MX27_INT_USB1,
 419                 .end = MX27_INT_USB1,
 420                 .flags = IORESOURCE_IRQ,
 421         },
 422 };
 423
 424 struct platform_device mxc_usbh1 = {
 425         .name = "mxc-ehci",
 426         .id = 1,
 427         .dev = {
 428                 .coherent_dma_mask = DMA_BIT_MASK(32),
 429                 .dma_mask = &usbh1_dmamask,
 430         },
 431         .resource = mxc_usbh1_resources,
 432         .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
 433 };
 434
 435 /* USB host 2 */
 436 static u64 usbh2_dmamask = DMA_BIT_MASK(32);
 437
 438 static struct resource mxc_usbh2_resources[] = {
 439         {
 440                 .start = MX27_USBOTG_BASE_ADDR + 0x400,
 441                 .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
 442                 .flags = IORESOURCE_MEM,
 443         }, {
 444                 .start = MX27_INT_USB2,
 445                 .end = MX27_INT_USB2,
 446                 .flags = IORESOURCE_IRQ,
 447         },
 448 };
 449
 450 struct platform_device mxc_usbh2 = {
 451         .name = "mxc-ehci",
 452         .id = 2,
 453         .dev = {
 454                 .coherent_dma_mask = DMA_BIT_MASK(32),
 455                 .dma_mask = &usbh2_dmamask,
 456         },
 457         .resource = mxc_usbh2_resources,
 458         .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
 459 };
 460 #endif
 461
 462 /* GPIO port description */
 463 #define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq)                          \
 464         {                                                               \
 465                 .chip.label = "gpio-" #n,                               \
 466                 .irq = _irq,                                            \
 467                 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
 468                                 n * 0x100),                             \
 469                 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
 470         }
 471
 472 #define DEFINE_MXC_GPIO_PORT(SOC, n)                                    \
 473         {                                                               \
 474                 .chip.label = "gpio-" #n,                               \
 475                 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
 476                                 n * 0x100),                             \
 477                 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
 478         }
 479
 480 #define DEFINE_MXC_GPIO_PORTS(SOC, pfx)                                 \
 481         static struct mxc_gpio_port pfx ## _gpio_ports[] = {            \
 482                 DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO),     \
 483                 DEFINE_MXC_GPIO_PORT(SOC, 1),                           \
 484                 DEFINE_MXC_GPIO_PORT(SOC, 2),                           \
 485                 DEFINE_MXC_GPIO_PORT(SOC, 3),                           \
 486                 DEFINE_MXC_GPIO_PORT(SOC, 4),                           \
 487                 DEFINE_MXC_GPIO_PORT(SOC, 5),                           \
 488         }
 489
 490 #ifdef CONFIG_MACH_MX21
 491 DEFINE_MXC_GPIO_PORTS(MX21, imx21);
 492
 493 int __init imx21_register_gpios(void)
 494 {
 495         return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
 496 }
 497 #endif
 498
 499 #ifdef CONFIG_MACH_MX27
 500 DEFINE_MXC_GPIO_PORTS(MX27, imx27);
 501
 502 int __init imx27_register_gpios(void)
 503 {
 504         return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
 505 }
 506 #endif
 507
 508 #ifdef CONFIG_MACH_MX21
 509 static struct resource mx21_usbhc_resources[] = {
 510         {
 511                 .start  = MX21_USBOTG_BASE_ADDR,
 512                 .end    = MX21_USBOTG_BASE_ADDR + SZ_8K - 1,
 513                 .flags  = IORESOURCE_MEM,
 514         },
 515         {
 516                 .start          = MX21_INT_USBHOST,
 517                 .end            = MX21_INT_USBHOST,
 518                 .flags          = IORESOURCE_IRQ,
 519         },
 520 };
 521
 522 struct platform_device mx21_usbhc_device = {
 523         .name           = "imx21-hcd",
 524         .id             = 0,
 525         .dev            = {
 526                 .dma_mask = &mx21_usbhc_device.dev.coherent_dma_mask,
 527                 .coherent_dma_mask = DMA_BIT_MASK(32),
 528         },
 529         .num_resources  = ARRAY_SIZE(mx21_usbhc_resources),
 530         .resource       = mx21_usbhc_resources,
 531 };
 532 #endif
 533
 534 static struct resource imx_kpp_resources[] = {
 535         {
 536                 .start  = MX2x_KPP_BASE_ADDR,
 537                 .end    = MX2x_KPP_BASE_ADDR + 0xf,
 538                 .flags  = IORESOURCE_MEM
 539         }, {
 540                 .start  = MX2x_INT_KPP,
 541                 .end    = MX2x_INT_KPP,
 542                 .flags  = IORESOURCE_IRQ,
 543         },
 544 };
 545
 546 struct platform_device imx_kpp_device = {
 547         .name = "imx-keypad",
 548         .id = -1,
 549         .num_resources = ARRAY_SIZE(imx_kpp_resources),
 550         .resource = imx_kpp_resources,
 551 };
 552
 553 #endif