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mac80211/drivers: rewrite the rate control API
[linux-2.6/kvm.git] / drivers / net / netxen / netxen_nic_niu.c
blobc3b9c83b32fe5205925a4686e0874c2f4aa7e96b
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Provides access to the Network Interface Unit h/w block.
31 *
32 */
33
34 #include "netxen_nic.h"
35
36 #define NETXEN_GB_MAC_SOFT_RESET 0x80000000
37 #define NETXEN_GB_MAC_RESET_PROT_BLK 0x000F0000
38 #define NETXEN_GB_MAC_ENABLE_TX_RX 0x00000005
39 #define NETXEN_GB_MAC_PAUSED_FRMS 0x00000020
40
41 static long phy_lock_timeout = 100000000;
42
43 static int phy_lock(struct netxen_adapter *adapter)
44 {
45 int i;
46 int done = 0, timeout = 0;
47
48 while (!done) {
49 done = netxen_nic_reg_read(adapter,
50 NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
51 if (done == 1)
52 break;
53 if (timeout >= phy_lock_timeout) {
54 return -1;
55 }
56 timeout++;
57 if (!in_atomic())
58 schedule();
59 else {
60 for (i = 0; i < 20; i++)
61 cpu_relax();
62 }
63 }
64
65 netxen_crb_writelit_adapter(adapter,
66 NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
67 return 0;
68 }
69
70 static int phy_unlock(struct netxen_adapter *adapter)
71 {
72 adapter->pci_read_immediate(adapter, NETXEN_PCIE_REG(PCIE_SEM3_UNLOCK));
73
74 return 0;
75 }
76
77 /*
78 * netxen_niu_gbe_phy_read - read a register from the GbE PHY via
79 * mii management interface.
80 *
81 * Note: The MII management interface goes through port 0.
82 * Individual phys are addressed as follows:
83 * @param phy [15:8] phy id
84 * @param reg [7:0] register number
85 *
86 * @returns 0 on success
87 * -1 on error
88 *
89 */
90 int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
91 __u32 * readval)
92 {
93 long timeout = 0;
94 long result = 0;
95 long restore = 0;
96 long phy = adapter->physical_port;
97 __u32 address;
98 __u32 command;
99 __u32 status;
100 __u32 mac_cfg0;
101
102 if (phy_lock(adapter) != 0) {
103 return -1;
104 }
105
106 /*
107 * MII mgmt all goes through port 0 MAC interface,
108 * so it cannot be in reset
109 */
110
111 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
112 &mac_cfg0, 4))
113 return -EIO;
114 if (netxen_gb_get_soft_reset(mac_cfg0)) {
115 __u32 temp;
116 temp = 0;
117 netxen_gb_tx_reset_pb(temp);
118 netxen_gb_rx_reset_pb(temp);
119 netxen_gb_tx_reset_mac(temp);
120 netxen_gb_rx_reset_mac(temp);
121 if (adapter->hw_write_wx(adapter,
122 NETXEN_NIU_GB_MAC_CONFIG_0(0),
123 &temp, 4))
124 return -EIO;
125 restore = 1;
126 }
127
128 address = 0;
129 netxen_gb_mii_mgmt_reg_addr(address, reg);
130 netxen_gb_mii_mgmt_phy_addr(address, phy);
131 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
132 &address, 4))
133 return -EIO;
134 command = 0; /* turn off any prior activity */
135 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
136 &command, 4))
137 return -EIO;
138 /* send read command */
139 netxen_gb_mii_mgmt_set_read_cycle(command);
140 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
141 &command, 4))
142 return -EIO;
143
144 status = 0;
145 do {
146 if (adapter->hw_read_wx(adapter,
147 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
148 &status, 4))
149 return -EIO;
150 timeout++;
151 } while ((netxen_get_gb_mii_mgmt_busy(status)
152 || netxen_get_gb_mii_mgmt_notvalid(status))
153 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
154
155 if (timeout < NETXEN_NIU_PHY_WAITMAX) {
156 if (adapter->hw_read_wx(adapter,
157 NETXEN_NIU_GB_MII_MGMT_STATUS(0),
158 readval, 4))
159 return -EIO;
160 result = 0;
161 } else
162 result = -1;
163
164 if (restore)
165 if (adapter->hw_write_wx(adapter,
166 NETXEN_NIU_GB_MAC_CONFIG_0(0),
167 &mac_cfg0, 4))
168 return -EIO;
169 phy_unlock(adapter);
170 return result;
171 }
172
173 /*
174 * netxen_niu_gbe_phy_write - write a register to the GbE PHY via
175 * mii management interface.
176 *
177 * Note: The MII management interface goes through port 0.
178 * Individual phys are addressed as follows:
179 * @param phy [15:8] phy id
180 * @param reg [7:0] register number
181 *
182 * @returns 0 on success
183 * -1 on error
184 *
185 */
186 int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
187 __u32 val)
188 {
189 long timeout = 0;
190 long result = 0;
191 long restore = 0;
192 long phy = adapter->physical_port;
193 __u32 address;
194 __u32 command;
195 __u32 status;
196 __u32 mac_cfg0;
197
198 /*
199 * MII mgmt all goes through port 0 MAC interface, so it
200 * cannot be in reset
201 */
202
203 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
204 &mac_cfg0, 4))
205 return -EIO;
206 if (netxen_gb_get_soft_reset(mac_cfg0)) {
207 __u32 temp;
208 temp = 0;
209 netxen_gb_tx_reset_pb(temp);
210 netxen_gb_rx_reset_pb(temp);
211 netxen_gb_tx_reset_mac(temp);
212 netxen_gb_rx_reset_mac(temp);
213
214 if (adapter->hw_write_wx(adapter,
215 NETXEN_NIU_GB_MAC_CONFIG_0(0),
216 &temp, 4))
217 return -EIO;
218 restore = 1;
219 }
220
221 command = 0; /* turn off any prior activity */
222 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
223 &command, 4))
224 return -EIO;
225
226 address = 0;
227 netxen_gb_mii_mgmt_reg_addr(address, reg);
228 netxen_gb_mii_mgmt_phy_addr(address, phy);
229 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
230 &address, 4))
231 return -EIO;
232
233 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0),
234 &val, 4))
235 return -EIO;
236
237 status = 0;
238 do {
239 if (adapter->hw_read_wx(adapter,
240 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
241 &status, 4))
242 return -EIO;
243 timeout++;
244 } while ((netxen_get_gb_mii_mgmt_busy(status))
245 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
246
247 if (timeout < NETXEN_NIU_PHY_WAITMAX)
248 result = 0;
249 else
250 result = -EIO;
251
252 /* restore the state of port 0 MAC in case we tampered with it */
253 if (restore)
254 if (adapter->hw_write_wx(adapter,
255 NETXEN_NIU_GB_MAC_CONFIG_0(0),
256 &mac_cfg0, 4))
257 return -EIO;
258
259 return result;
260 }
261
262 int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter)
263 {
264 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f);
265 return 0;
266 }
267
268 int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter)
269 {
270 int result = 0;
271 __u32 enable = 0;
272 netxen_set_phy_int_link_status_changed(enable);
273 netxen_set_phy_int_autoneg_completed(enable);
274 netxen_set_phy_int_speed_changed(enable);
275
276 if (0 !=
277 netxen_niu_gbe_phy_write(adapter,
278 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE,
279 enable))
280 result = -EIO;
281
282 return result;
283 }
284
285 int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter)
286 {
287 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f);
288 return 0;
289 }
290
291 int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter)
292 {
293 int result = 0;
294 if (0 !=
295 netxen_niu_gbe_phy_write(adapter,
296 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE, 0))
297 result = -EIO;
298
299 return result;
300 }
301
302 #if 0
303 int netxen_niu_xgbe_clear_phy_interrupts(struct netxen_adapter *adapter)
304 {
305 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_ACTIVE_INT, -1);
306 return 0;
307 }
308 #endif /* 0 */
309
310 static int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter)
311 {
312 int result = 0;
313 if (0 !=
314 netxen_niu_gbe_phy_write(adapter,
315 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
316 -EIO))
317 result = -EIO;
318
319 return result;
320 }
321
322 /*
323 * netxen_niu_gbe_set_mii_mode- Set 10/100 Mbit Mode for GbE MAC
324 *
325 */
326 static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
327 int port, long enable)
328 {
329 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
330 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
331 0x80000000);
332 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
333 0x0000f0025);
334 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
335 0xf1ff);
336 netxen_crb_writelit_adapter(adapter,
337 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
338 netxen_crb_writelit_adapter(adapter,
339 NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
340 netxen_crb_writelit_adapter(adapter,
341 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
342 netxen_crb_writelit_adapter(adapter,
343 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
344
345 if (enable) {
346 /*
347 * Do NOT enable flow control until a suitable solution for
348 * shutting down pause frames is found.
349 */
350 netxen_crb_writelit_adapter(adapter,
351 NETXEN_NIU_GB_MAC_CONFIG_0(port),
352 0x5);
353 }
354
355 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
356 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
357 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
358 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
359 }
360
361 /*
362 * netxen_niu_gbe_set_gmii_mode- Set GbE Mode for GbE MAC
363 */
364 static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
365 int port, long enable)
366 {
367 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
368 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
369 0x80000000);
370 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
371 0x0000f0025);
372 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
373 0xf2ff);
374 netxen_crb_writelit_adapter(adapter,
375 NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
376 netxen_crb_writelit_adapter(adapter,
377 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
378 netxen_crb_writelit_adapter(adapter,
379 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
380 netxen_crb_writelit_adapter(adapter,
381 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
382
383 if (enable) {
384 /*
385 * Do NOT enable flow control until a suitable solution for
386 * shutting down pause frames is found.
387 */
388 netxen_crb_writelit_adapter(adapter,
389 NETXEN_NIU_GB_MAC_CONFIG_0(port),
390 0x5);
391 }
392
393 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
394 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
395 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
396 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
397 }
398
399 int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
400 {
401 int result = 0;
402 __u32 status;
403
404 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
405 return 0;
406
407 if (adapter->disable_phy_interrupts)
408 adapter->disable_phy_interrupts(adapter);
409 mdelay(2);
410
411 if (0 == netxen_niu_gbe_phy_read(adapter,
412 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS, &status)) {
413 if (netxen_get_phy_link(status)) {
414 if (netxen_get_phy_speed(status) == 2) {
415 netxen_niu_gbe_set_gmii_mode(adapter, port, 1);
416 } else if ((netxen_get_phy_speed(status) == 1)
417 || (netxen_get_phy_speed(status) == 0)) {
418 netxen_niu_gbe_set_mii_mode(adapter, port, 1);
419 } else {
420 result = -1;
421 }
422
423 } else {
424 /*
425 * We don't have link. Cable must be unconnected.
426 * Enable phy interrupts so we take action when
427 * plugged in.
428 */
429
430 netxen_crb_writelit_adapter(adapter,
431 NETXEN_NIU_GB_MAC_CONFIG_0
432 (port),
433 NETXEN_GB_MAC_SOFT_RESET);
434 netxen_crb_writelit_adapter(adapter,
435 NETXEN_NIU_GB_MAC_CONFIG_0
436 (port),
437 NETXEN_GB_MAC_RESET_PROT_BLK
438 | NETXEN_GB_MAC_ENABLE_TX_RX
439 |
440 NETXEN_GB_MAC_PAUSED_FRMS);
441 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
442 printk(KERN_ERR PFX
443 "ERROR clearing PHY interrupts\n");
444 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
445 printk(KERN_ERR PFX
446 "ERROR enabling PHY interrupts\n");
447 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
448 printk(KERN_ERR PFX
449 "ERROR clearing PHY interrupts\n");
450 result = -1;
451 }
452 } else {
453 result = -EIO;
454 }
455 return result;
456 }
457
458 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
459 {
460 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
461 netxen_crb_writelit_adapter(adapter,
462 NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
463 netxen_crb_writelit_adapter(adapter,
464 NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
465 }
466
467 return 0;
468 }
469
470 #if 0
471 /*
472 * netxen_niu_gbe_handle_phy_interrupt - Handles GbE PHY interrupts
473 * @param enable 0 means don't enable the port
474 * 1 means enable (or re-enable) the port
475 */
476 int netxen_niu_gbe_handle_phy_interrupt(struct netxen_adapter *adapter,
477 int port, long enable)
478 {
479 int result = 0;
480 __u32 int_src;
481
482 printk(KERN_INFO PFX "NETXEN: Handling PHY interrupt on port %d"
483 " (device enable = %d)\n", (int)port, (int)enable);
484
485 /*
486 * The read of the PHY INT status will clear the pending
487 * interrupt status
488 */
489 if (netxen_niu_gbe_phy_read(adapter,
490 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
491 &int_src) != 0)
492 result = -EINVAL;
493 else {
494 printk(KERN_INFO PFX "PHY Interrupt source = 0x%x \n", int_src);
495 if (netxen_get_phy_int_jabber(int_src))
496 printk(KERN_INFO PFX "jabber Interrupt ");
497 if (netxen_get_phy_int_polarity_changed(int_src))
498 printk(KERN_INFO PFX "polarity changed ");
499 if (netxen_get_phy_int_energy_detect(int_src))
500 printk(KERN_INFO PFX "energy detect \n");
501 if (netxen_get_phy_int_downshift(int_src))
502 printk(KERN_INFO PFX "downshift \n");
503 if (netxen_get_phy_int_mdi_xover_changed(int_src))
504 printk(KERN_INFO PFX "mdi_xover_changed ");
505 if (netxen_get_phy_int_fifo_over_underflow(int_src))
506 printk(KERN_INFO PFX "fifo_over_underflow ");
507 if (netxen_get_phy_int_false_carrier(int_src))
508 printk(KERN_INFO PFX "false_carrier ");
509 if (netxen_get_phy_int_symbol_error(int_src))
510 printk(KERN_INFO PFX "symbol_error ");
511 if (netxen_get_phy_int_autoneg_completed(int_src))
512 printk(KERN_INFO PFX "autoneg_completed ");
513 if (netxen_get_phy_int_page_received(int_src))
514 printk(KERN_INFO PFX "page_received ");
515 if (netxen_get_phy_int_duplex_changed(int_src))
516 printk(KERN_INFO PFX "duplex_changed ");
517 if (netxen_get_phy_int_autoneg_error(int_src))
518 printk(KERN_INFO PFX "autoneg_error ");
519 if ((netxen_get_phy_int_speed_changed(int_src))
520 || (netxen_get_phy_int_link_status_changed(int_src))) {
521 __u32 status;
522
523 printk(KERN_INFO PFX
524 "speed_changed or link status changed");
525 if (netxen_niu_gbe_phy_read
526 (adapter,
527 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
528 &status) == 0) {
529 if (netxen_get_phy_speed(status) == 2) {
530 printk
531 (KERN_INFO PFX "Link speed changed"
532 " to 1000 Mbps\n");
533 netxen_niu_gbe_set_gmii_mode(adapter,
534 port,
535 enable);
536 } else if (netxen_get_phy_speed(status) == 1) {
537 printk
538 (KERN_INFO PFX "Link speed changed"
539 " to 100 Mbps\n");
540 netxen_niu_gbe_set_mii_mode(adapter,
541 port,
542 enable);
543 } else if (netxen_get_phy_speed(status) == 0) {
544 printk
545 (KERN_INFO PFX "Link speed changed"
546 " to 10 Mbps\n");
547 netxen_niu_gbe_set_mii_mode(adapter,
548 port,
549 enable);
550 } else {
551 printk(KERN_ERR PFX "ERROR reading "
552 "PHY status. Invalid speed.\n");
553 result = -1;
554 }
555 } else {
556 printk(KERN_ERR PFX
557 "ERROR reading PHY status.\n");
558 result = -1;
559 }
560
561 }
562 printk(KERN_INFO "\n");
563 }
564 return result;
565 }
566 #endif /* 0 */
567
568 /*
569 * Return the current station MAC address.
570 * Note that the passed-in value must already be in network byte order.
571 */
572 static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
573 netxen_ethernet_macaddr_t * addr)
574 {
575 u32 stationhigh;
576 u32 stationlow;
577 int phy = adapter->physical_port;
578 u8 val[8];
579
580 if (addr == NULL)
581 return -EINVAL;
582 if ((phy < 0) || (phy > 3))
583 return -EINVAL;
584
585 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
586 &stationhigh, 4))
587 return -EIO;
588 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
589 &stationlow, 4))
590 return -EIO;
591 ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
592 ((__le32 *)val)[0] = cpu_to_le32(stationlow);
593
594 memcpy(addr, val + 2, 6);
595
596 return 0;
597 }
598
599 /*
600 * Set the station MAC address.
601 * Note that the passed-in value must already be in network byte order.
602 */
603 int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
604 netxen_ethernet_macaddr_t addr)
605 {
606 u8 temp[4];
607 u32 val;
608 int phy = adapter->physical_port;
609 unsigned char mac_addr[6];
610 int i;
611
612 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
613 return 0;
614
615 for (i = 0; i < 10; i++) {
616 temp[0] = temp[1] = 0;
617 memcpy(temp + 2, addr, 2);
618 val = le32_to_cpu(*(__le32 *)temp);
619 if (adapter->hw_write_wx(adapter,
620 NETXEN_NIU_GB_STATION_ADDR_1(phy), &val, 4))
621 return -EIO;
622
623 memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32));
624 val = le32_to_cpu(*(__le32 *)temp);
625 if (adapter->hw_write_wx(adapter,
626 NETXEN_NIU_GB_STATION_ADDR_0(phy), &val, 4))
627 return -2;
628
629 netxen_niu_macaddr_get(adapter,
630 (netxen_ethernet_macaddr_t *) mac_addr);
631 if (memcmp(mac_addr, addr, 6) == 0)
632 break;
633 }
634
635 if (i == 10) {
636 printk(KERN_ERR "%s: cannot set Mac addr for %s\n",
637 netxen_nic_driver_name, adapter->netdev->name);
638 printk(KERN_ERR "MAC address set: %pM.\n", addr);
639 printk(KERN_ERR "MAC address get: %pM.\n", mac_addr);
640 }
641 return 0;
642 }
643
644 #if 0
645 /* Enable a GbE interface */
646 int netxen_niu_enable_gbe_port(struct netxen_adapter *adapter,
647 int port, netxen_niu_gbe_ifmode_t mode)
648 {
649 __u32 mac_cfg0;
650 __u32 mac_cfg1;
651 __u32 mii_cfg;
652
653 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
654 return -EINVAL;
655
656 mac_cfg0 = 0;
657 netxen_gb_soft_reset(mac_cfg0);
658 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
659 &mac_cfg0, 4))
660 return -EIO;
661 mac_cfg0 = 0;
662 netxen_gb_enable_tx(mac_cfg0);
663 netxen_gb_enable_rx(mac_cfg0);
664 netxen_gb_unset_rx_flowctl(mac_cfg0);
665 netxen_gb_tx_reset_pb(mac_cfg0);
666 netxen_gb_rx_reset_pb(mac_cfg0);
667 netxen_gb_tx_reset_mac(mac_cfg0);
668 netxen_gb_rx_reset_mac(mac_cfg0);
669
670 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
671 &mac_cfg0, 4))
672 return -EIO;
673 mac_cfg1 = 0;
674 netxen_gb_set_preamblelen(mac_cfg1, 0xf);
675 netxen_gb_set_duplex(mac_cfg1);
676 netxen_gb_set_crc_enable(mac_cfg1);
677 netxen_gb_set_padshort(mac_cfg1);
678 netxen_gb_set_checklength(mac_cfg1);
679 netxen_gb_set_hugeframes(mac_cfg1);
680
681 if (mode == NETXEN_NIU_10_100_MB) {
682 netxen_gb_set_intfmode(mac_cfg1, 1);
683 if (adapter->hw_write_wx(adapter,
684 NETXEN_NIU_GB_MAC_CONFIG_1(port),
685 &mac_cfg1, 4))
686 return -EIO;
687
688 /* set mii mode */
689 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_GMII_MODE +
690 (port << 3), 0);
691 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_MII_MODE +
692 (port << 3), 1);
693
694 } else if (mode == NETXEN_NIU_1000_MB) {
695 netxen_gb_set_intfmode(mac_cfg1, 2);
696 if (adapter->hw_write_wx(adapter,
697 NETXEN_NIU_GB_MAC_CONFIG_1(port),
698 &mac_cfg1, 4))
699 return -EIO;
700 /* set gmii mode */
701 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_MII_MODE +
702 (port << 3), 0);
703 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_GMII_MODE +
704 (port << 3), 1);
705 }
706 mii_cfg = 0;
707 netxen_gb_set_mii_mgmt_clockselect(mii_cfg, 7);
708 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port),
709 &mii_cfg, 4))
710 return -EIO;
711 mac_cfg0 = 0;
712 netxen_gb_enable_tx(mac_cfg0);
713 netxen_gb_enable_rx(mac_cfg0);
714 netxen_gb_unset_rx_flowctl(mac_cfg0);
715 netxen_gb_unset_tx_flowctl(mac_cfg0);
716
717 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
718 &mac_cfg0, 4))
719 return -EIO;
720 return 0;
721 }
722 #endif /* 0 */
723
724 /* Disable a GbE interface */
725 int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
726 {
727 __u32 mac_cfg0;
728 u32 port = adapter->physical_port;
729
730 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
731 return 0;
732
733 if (port > NETXEN_NIU_MAX_GBE_PORTS)
734 return -EINVAL;
735 mac_cfg0 = 0;
736 netxen_gb_soft_reset(mac_cfg0);
737 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
738 &mac_cfg0, 4))
739 return -EIO;
740 return 0;
741 }
742
743 /* Disable an XG interface */
744 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
745 {
746 __u32 mac_cfg;
747 u32 port = adapter->physical_port;
748
749 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
750 return 0;
751
752 if (port > NETXEN_NIU_MAX_XG_PORTS)
753 return -EINVAL;
754
755 mac_cfg = 0;
756 if (adapter->hw_write_wx(adapter,
757 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), &mac_cfg, 4))
758 return -EIO;
759 return 0;
760 }
761
762 /* Set promiscuous mode for a GbE interface */
763 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
764 u32 mode)
765 {
766 __u32 reg;
767 u32 port = adapter->physical_port;
768
769 if (port > NETXEN_NIU_MAX_GBE_PORTS)
770 return -EINVAL;
771
772 /* save previous contents */
773 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
774 &reg, 4))
775 return -EIO;
776 if (mode == NETXEN_NIU_PROMISC_MODE) {
777 switch (port) {
778 case 0:
779 netxen_clear_gb_drop_gb0(reg);
780 break;
781 case 1:
782 netxen_clear_gb_drop_gb1(reg);
783 break;
784 case 2:
785 netxen_clear_gb_drop_gb2(reg);
786 break;
787 case 3:
788 netxen_clear_gb_drop_gb3(reg);
789 break;
790 default:
791 return -EIO;
792 }
793 } else {
794 switch (port) {
795 case 0:
796 netxen_set_gb_drop_gb0(reg);
797 break;
798 case 1:
799 netxen_set_gb_drop_gb1(reg);
800 break;
801 case 2:
802 netxen_set_gb_drop_gb2(reg);
803 break;
804 case 3:
805 netxen_set_gb_drop_gb3(reg);
806 break;
807 default:
808 return -EIO;
809 }
810 }
811 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
812 &reg, 4))
813 return -EIO;
814 return 0;
815 }
816
817 /*
818 * Set the MAC address for an XG port
819 * Note that the passed-in value must already be in network byte order.
820 */
821 int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
822 netxen_ethernet_macaddr_t addr)
823 {
824 int phy = adapter->physical_port;
825 u8 temp[4];
826 u32 val;
827
828 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
829 return 0;
830
831 if ((phy < 0) || (phy > NETXEN_NIU_MAX_XG_PORTS))
832 return -EIO;
833
834 temp[0] = temp[1] = 0;
835 switch (phy) {
836 case 0:
837 memcpy(temp + 2, addr, 2);
838 val = le32_to_cpu(*(__le32 *)temp);
839 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
840 &val, 4))
841 return -EIO;
842
843 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
844 val = le32_to_cpu(*(__le32 *)temp);
845 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
846 &val, 4))
847 return -EIO;
848 break;
849
850 case 1:
851 memcpy(temp + 2, addr, 2);
852 val = le32_to_cpu(*(__le32 *)temp);
853 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_1,
854 &val, 4))
855 return -EIO;
856
857 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
858 val = le32_to_cpu(*(__le32 *)temp);
859 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_HI,
860 &val, 4))
861 return -EIO;
862 break;
863
864 default:
865 printk(KERN_ERR "Unknown port %d\n", phy);
866 break;
867 }
868
869 return 0;
870 }
871
872 #if 0
873 /*
874 * Return the current station MAC address.
875 * Note that the passed-in value must already be in network byte order.
876 */
877 int netxen_niu_xg_macaddr_get(struct netxen_adapter *adapter,
878 netxen_ethernet_macaddr_t * addr)
879 {
880 int phy = adapter->physical_port;
881 u32 stationhigh;
882 u32 stationlow;
883 u8 val[8];
884
885 if (addr == NULL)
886 return -EINVAL;
887 if (phy != 0)
888 return -EINVAL;
889
890 if (adapter->hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
891 &stationhigh, 4))
892 return -EIO;
893 if (adapter->hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
894 &stationlow, 4))
895 return -EIO;
896 ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
897 ((__le32 *)val)[0] = cpu_to_le32(stationlow);
898
899 memcpy(addr, val + 2, 6);
900
901 return 0;
902 }
903 #endif /* 0 */
904
905 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
906 u32 mode)
907 {
908 __u32 reg;
909 u32 port = adapter->physical_port;
910
911 if (port > NETXEN_NIU_MAX_XG_PORTS)
912 return -EINVAL;
913
914 if (adapter->hw_read_wx(adapter,
915 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), &reg, 4))
916 return -EIO;
917 if (mode == NETXEN_NIU_PROMISC_MODE)
918 reg = (reg | 0x2000UL);
919 else
920 reg = (reg & ~0x2000UL);
921
922 if (mode == NETXEN_NIU_ALLMULTI_MODE)
923 reg = (reg | 0x1000UL);
924 else
925 reg = (reg & ~0x1000UL);
926
927 netxen_crb_writelit_adapter(adapter,
928 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
929
930 return 0;
931 }
kernel-based virtual machine