2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
63 * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db)
64 * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
65 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
66 * <sojkam@centrum.cz>, updates by DB).
68 * 2002-11-29 Correct handling for hw async_next register.
69 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
70 * only scheduling is different, no arbitrary limitations.
71 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
72 * clean up HC run state handshaking.
73 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
74 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
75 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
76 * 2002-05-07 Some error path cleanups to report better errors; wmb();
77 * use non-CVS version id; better iso bandwidth claim.
78 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
79 * errors in submit path. Bugfixes to interrupt scheduling/processing.
80 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
81 * more checking to generic hcd framework (db). Make it work with
82 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
83 * 2002-01-14 Minor cleanup; version synch.
84 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
85 * 2002-01-04 Control/Bulk queuing behaves.
87 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
88 * 2001-June Works with usb-storage and NEC EHCI on 2.4
91 #define DRIVER_VERSION "10 Dec 2004"
92 #define DRIVER_AUTHOR "David Brownell"
93 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
95 static const char hcd_name
[] = "ehci_hcd";
98 #undef EHCI_VERBOSE_DEBUG
105 /* magic numbers that can affect system performance */
106 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
107 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
108 #define EHCI_TUNE_RL_TT 0
109 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
110 #define EHCI_TUNE_MULT_TT 1
111 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
113 #define EHCI_IAA_MSECS 10 /* arbitrary */
114 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
115 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
116 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
118 /* Initial IRQ latency: faster than hw default */
119 static int log2_irq_thresh
= 0; // 0 to 6
120 module_param (log2_irq_thresh
, int, S_IRUGO
);
121 MODULE_PARM_DESC (log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
123 /* initial park setting: slower than hw default */
124 static unsigned park
= 0;
125 module_param (park
, uint
, S_IRUGO
);
126 MODULE_PARM_DESC (park
, "park setting; 1-3 back-to-back async packets");
128 /* for flakey hardware, ignore overcurrent indicators */
129 static int ignore_oc
= 0;
130 module_param (ignore_oc
, bool, S_IRUGO
);
131 MODULE_PARM_DESC (ignore_oc
, "ignore bogus hardware overcurrent indications");
133 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
135 /*-------------------------------------------------------------------------*/
138 #include "ehci-dbg.c"
140 /*-------------------------------------------------------------------------*/
143 * handshake - spin reading hc until handshake completes or fails
144 * @ptr: address of hc register to be read
145 * @mask: bits to look at in result of read
146 * @done: value of those bits when handshake succeeds
147 * @usec: timeout in microseconds
149 * Returns negative errno, or zero on success
151 * Success happens when the "mask" bits have the specified value (hardware
152 * handshake done). There are two failure modes: "usec" have passed (major
153 * hardware flakeout), or the register reads as all-ones (hardware removed).
155 * That last failure should_only happen in cases like physical cardbus eject
156 * before driver shutdown. But it also seems to be caused by bugs in cardbus
157 * bridge shutdown: shutting down the bridge before the devices using it.
159 static int handshake (struct ehci_hcd
*ehci
, void __iomem
*ptr
,
160 u32 mask
, u32 done
, int usec
)
165 result
= ehci_readl(ehci
, ptr
);
166 if (result
== ~(u32
)0) /* card removed */
177 /* force HC to halt state from unknown (EHCI spec section 2.3) */
178 static int ehci_halt (struct ehci_hcd
*ehci
)
180 u32 temp
= ehci_readl(ehci
, &ehci
->regs
->status
);
182 /* disable any irqs left enabled by previous code */
183 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
185 if ((temp
& STS_HALT
) != 0)
188 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
190 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
191 return handshake (ehci
, &ehci
->regs
->status
,
192 STS_HALT
, STS_HALT
, 16 * 125);
195 /* put TDI/ARC silicon into EHCI mode */
196 static void tdi_reset (struct ehci_hcd
*ehci
)
198 u32 __iomem
*reg_ptr
;
201 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)ehci
->regs
) + USBMODE
);
202 tmp
= ehci_readl(ehci
, reg_ptr
);
203 tmp
|= USBMODE_CM_HC
;
204 /* The default byte access to MMR space is LE after
205 * controller reset. Set the required endian mode
206 * for transfer buffers to match the host microprocessor
208 if (ehci_big_endian_mmio(ehci
))
210 ehci_writel(ehci
, tmp
, reg_ptr
);
213 /* reset a non-running (STS_HALT == 1) controller */
214 static int ehci_reset (struct ehci_hcd
*ehci
)
217 u32 command
= ehci_readl(ehci
, &ehci
->regs
->command
);
219 command
|= CMD_RESET
;
220 dbg_cmd (ehci
, "reset", command
);
221 ehci_writel(ehci
, command
, &ehci
->regs
->command
);
222 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
223 ehci
->next_statechange
= jiffies
;
224 retval
= handshake (ehci
, &ehci
->regs
->command
,
225 CMD_RESET
, 0, 250 * 1000);
230 if (ehci_is_TDI(ehci
))
236 /* idle the controller (from running) */
237 static void ehci_quiesce (struct ehci_hcd
*ehci
)
242 if (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
246 /* wait for any schedule enables/disables to take effect */
247 temp
= ehci_readl(ehci
, &ehci
->regs
->command
) << 10;
248 temp
&= STS_ASS
| STS_PSS
;
249 if (handshake (ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
,
250 temp
, 16 * 125) != 0) {
251 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
255 /* then disable anything that's still active */
256 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
257 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
258 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
260 /* hardware can take 16 microframes to turn off ... */
261 if (handshake (ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
,
263 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
268 /*-------------------------------------------------------------------------*/
270 static void end_unlink_async(struct ehci_hcd
*ehci
);
271 static void ehci_work(struct ehci_hcd
*ehci
);
273 #include "ehci-hub.c"
274 #include "ehci-mem.c"
276 #include "ehci-sched.c"
278 /*-------------------------------------------------------------------------*/
280 static void ehci_iaa_watchdog(unsigned long param
)
282 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
286 spin_lock_irqsave (&ehci
->lock
, flags
);
287 WARN_ON(!ehci
->reclaim
);
289 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
290 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
291 ehci_dbg(ehci
, "IAA watchdog: status %x cmd %x\n", status
, cmd
);
293 /* lost IAA irqs wedge things badly; seen first with a vt8235 */
295 if (status
& STS_IAA
) {
296 ehci_vdbg (ehci
, "lost IAA\n");
297 COUNT (ehci
->stats
.lost_iaa
);
298 ehci_writel(ehci
, STS_IAA
, &ehci
->regs
->status
);
300 ehci_writel(ehci
, cmd
& ~CMD_IAAD
, &ehci
->regs
->command
);
301 end_unlink_async(ehci
);
304 spin_unlock_irqrestore(&ehci
->lock
, flags
);
307 static void ehci_watchdog(unsigned long param
)
309 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
312 spin_lock_irqsave(&ehci
->lock
, flags
);
314 /* stop async processing after it's idled a bit */
315 if (test_bit (TIMER_ASYNC_OFF
, &ehci
->actions
))
316 start_unlink_async (ehci
, ehci
->async
);
318 /* ehci could run by timer, without IRQs ... */
321 spin_unlock_irqrestore (&ehci
->lock
, flags
);
324 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
325 * The firmware seems to think that powering off is a wakeup event!
326 * This routine turns off remote wakeup and everything else, on all ports.
328 static void ehci_turn_off_all_ports(struct ehci_hcd
*ehci
)
330 int port
= HCS_N_PORTS(ehci
->hcs_params
);
333 ehci_writel(ehci
, PORT_RWC_BITS
,
334 &ehci
->regs
->port_status
[port
]);
337 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
338 * This forcibly disables dma and IRQs, helping kexec and other cases
339 * where the next system software may expect clean state.
342 ehci_shutdown (struct usb_hcd
*hcd
)
344 struct ehci_hcd
*ehci
;
346 ehci
= hcd_to_ehci (hcd
);
347 (void) ehci_halt (ehci
);
348 ehci_turn_off_all_ports(ehci
);
350 /* make BIOS/etc use companion controller during reboot */
351 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
353 /* unblock posted writes */
354 ehci_readl(ehci
, &ehci
->regs
->configured_flag
);
357 static void ehci_port_power (struct ehci_hcd
*ehci
, int is_on
)
361 if (!HCS_PPC (ehci
->hcs_params
))
364 ehci_dbg (ehci
, "...power%s ports...\n", is_on
? "up" : "down");
365 for (port
= HCS_N_PORTS (ehci
->hcs_params
); port
> 0; )
366 (void) ehci_hub_control(ehci_to_hcd(ehci
),
367 is_on
? SetPortFeature
: ClearPortFeature
,
370 /* Flush those writes */
371 ehci_readl(ehci
, &ehci
->regs
->command
);
375 /*-------------------------------------------------------------------------*/
378 * ehci_work is called from some interrupts, timers, and so on.
379 * it calls driver completion functions, after dropping ehci->lock.
381 static void ehci_work (struct ehci_hcd
*ehci
)
383 timer_action_done (ehci
, TIMER_IO_WATCHDOG
);
385 /* another CPU may drop ehci->lock during a schedule scan while
386 * it reports urb completions. this flag guards against bogus
387 * attempts at re-entrant schedule scanning.
393 if (ehci
->next_uframe
!= -1)
394 scan_periodic (ehci
);
397 /* the IO watchdog guards against hardware or driver bugs that
398 * misplace IRQs, and should let us run completely without IRQs.
399 * such lossage has been observed on both VT6202 and VT8235.
401 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
) &&
402 (ehci
->async
->qh_next
.ptr
!= NULL
||
403 ehci
->periodic_sched
!= 0))
404 timer_action (ehci
, TIMER_IO_WATCHDOG
);
407 static void ehci_stop (struct usb_hcd
*hcd
)
409 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
411 ehci_dbg (ehci
, "stop\n");
413 /* Turn off port power on all root hub ports. */
414 ehci_port_power (ehci
, 0);
416 /* no more interrupts ... */
417 del_timer_sync (&ehci
->watchdog
);
418 del_timer_sync(&ehci
->iaa_watchdog
);
420 spin_lock_irq(&ehci
->lock
);
421 if (HC_IS_RUNNING (hcd
->state
))
425 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
426 spin_unlock_irq(&ehci
->lock
);
428 /* let companion controllers work when we aren't */
429 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
431 remove_companion_file(ehci
);
432 remove_debug_files (ehci
);
434 /* root hub is shut down separately (first, when possible) */
435 spin_lock_irq (&ehci
->lock
);
438 spin_unlock_irq (&ehci
->lock
);
439 ehci_mem_cleanup (ehci
);
442 ehci_dbg (ehci
, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
443 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.reclaim
,
444 ehci
->stats
.lost_iaa
);
445 ehci_dbg (ehci
, "complete %ld unlink %ld\n",
446 ehci
->stats
.complete
, ehci
->stats
.unlink
);
449 dbg_status (ehci
, "ehci_stop completed",
450 ehci_readl(ehci
, &ehci
->regs
->status
));
453 /* one-time init, only for memory state */
454 static int ehci_init(struct usb_hcd
*hcd
)
456 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
461 spin_lock_init(&ehci
->lock
);
463 init_timer(&ehci
->watchdog
);
464 ehci
->watchdog
.function
= ehci_watchdog
;
465 ehci
->watchdog
.data
= (unsigned long) ehci
;
467 init_timer(&ehci
->iaa_watchdog
);
468 ehci
->iaa_watchdog
.function
= ehci_iaa_watchdog
;
469 ehci
->iaa_watchdog
.data
= (unsigned long) ehci
;
472 * hw default: 1K periodic list heads, one per frame.
473 * periodic_size can shrink by USBCMD update if hcc_params allows.
475 ehci
->periodic_size
= DEFAULT_I_TDPS
;
476 if ((retval
= ehci_mem_init(ehci
, GFP_KERNEL
)) < 0)
479 /* controllers may cache some of the periodic schedule ... */
480 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
481 if (HCC_ISOC_CACHE(hcc_params
)) // full frame cache
483 else // N microframes cached
484 ehci
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
486 ehci
->reclaim
= NULL
;
487 ehci
->next_uframe
= -1;
490 * dedicate a qh for the async ring head, since we couldn't unlink
491 * a 'real' qh without stopping the async schedule [4.8]. use it
492 * as the 'reclamation list head' too.
493 * its dummy is used in hw_alt_next of many tds, to prevent the qh
494 * from automatically advancing to the next td after short reads.
496 ehci
->async
->qh_next
.qh
= NULL
;
497 ehci
->async
->hw_next
= QH_NEXT(ehci
, ehci
->async
->qh_dma
);
498 ehci
->async
->hw_info1
= cpu_to_hc32(ehci
, QH_HEAD
);
499 ehci
->async
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
500 ehci
->async
->hw_qtd_next
= EHCI_LIST_END(ehci
);
501 ehci
->async
->qh_state
= QH_STATE_LINKED
;
502 ehci
->async
->hw_alt_next
= QTD_NEXT(ehci
, ehci
->async
->dummy
->qtd_dma
);
504 /* clear interrupt enables, set irq latency */
505 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
507 temp
= 1 << (16 + log2_irq_thresh
);
508 if (HCC_CANPARK(hcc_params
)) {
509 /* HW default park == 3, on hardware that supports it (like
510 * NVidia and ALI silicon), maximizes throughput on the async
511 * schedule by avoiding QH fetches between transfers.
513 * With fast usb storage devices and NForce2, "park" seems to
514 * make problems: throughput reduction (!), data errors...
517 park
= min(park
, (unsigned) 3);
521 ehci_dbg(ehci
, "park %d\n", park
);
523 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
524 /* periodic schedule size can be smaller than default */
526 temp
|= (EHCI_TUNE_FLS
<< 2);
527 switch (EHCI_TUNE_FLS
) {
528 case 0: ehci
->periodic_size
= 1024; break;
529 case 1: ehci
->periodic_size
= 512; break;
530 case 2: ehci
->periodic_size
= 256; break;
534 ehci
->command
= temp
;
539 /* start HC running; it's halted, ehci_init() has been run (once) */
540 static int ehci_run (struct usb_hcd
*hcd
)
542 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
547 hcd
->uses_new_polling
= 1;
550 /* EHCI spec section 4.1 */
551 if ((retval
= ehci_reset(ehci
)) != 0) {
552 ehci_mem_cleanup(ehci
);
555 ehci_writel(ehci
, ehci
->periodic_dma
, &ehci
->regs
->frame_list
);
556 ehci_writel(ehci
, (u32
)ehci
->async
->qh_dma
, &ehci
->regs
->async_next
);
559 * hcc_params controls whether ehci->regs->segment must (!!!)
560 * be used; it constrains QH/ITD/SITD and QTD locations.
561 * pci_pool consistent memory always uses segment zero.
562 * streaming mappings for I/O buffers, like pci_map_single(),
563 * can return segments above 4GB, if the device allows.
565 * NOTE: the dma mask is visible through dma_supported(), so
566 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
567 * Scsi_Host.highmem_io, and so forth. It's readonly to all
568 * host side drivers though.
570 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
571 if (HCC_64BIT_ADDR(hcc_params
)) {
572 ehci_writel(ehci
, 0, &ehci
->regs
->segment
);
574 // this is deeply broken on almost all architectures
575 if (!dma_set_mask(hcd
->self
.controller
, DMA_64BIT_MASK
))
576 ehci_info(ehci
, "enabled 64bit DMA\n");
581 // Philips, Intel, and maybe others need CMD_RUN before the
582 // root hub will detect new devices (why?); NEC doesn't
583 ehci
->command
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
584 ehci
->command
|= CMD_RUN
;
585 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
586 dbg_cmd (ehci
, "init", ehci
->command
);
589 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
590 * are explicitly handed to companion controller(s), so no TT is
591 * involved with the root hub. (Except where one is integrated,
592 * and there's no companion controller unless maybe for USB OTG.)
594 * Turning on the CF flag will transfer ownership of all ports
595 * from the companions to the EHCI controller. If any of the
596 * companions are in the middle of a port reset at the time, it
597 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
598 * guarantees that no resets are in progress. After we set CF,
599 * a short delay lets the hardware catch up; new resets shouldn't
600 * be started before the port switching actions could complete.
602 down_write(&ehci_cf_port_reset_rwsem
);
603 hcd
->state
= HC_STATE_RUNNING
;
604 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
605 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
607 up_write(&ehci_cf_port_reset_rwsem
);
609 temp
= HC_VERSION(ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
611 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
612 ((ehci
->sbrn
& 0xf0)>>4), (ehci
->sbrn
& 0x0f),
613 temp
>> 8, temp
& 0xff, DRIVER_VERSION
,
614 ignore_oc
? ", overcurrent ignored" : "");
616 ehci_writel(ehci
, INTR_MASK
,
617 &ehci
->regs
->intr_enable
); /* Turn On Interrupts */
619 /* GRR this is run-once init(), being done every time the HC starts.
620 * So long as they're part of class devices, we can't do it init()
621 * since the class device isn't created that early.
623 create_debug_files(ehci
);
624 create_companion_file(ehci
);
629 /*-------------------------------------------------------------------------*/
631 static irqreturn_t
ehci_irq (struct usb_hcd
*hcd
)
633 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
634 u32 status
, pcd_status
= 0;
637 spin_lock (&ehci
->lock
);
639 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
641 /* e.g. cardbus physical eject */
642 if (status
== ~(u32
) 0) {
643 ehci_dbg (ehci
, "device removed\n");
648 if (!status
) { /* irq sharing? */
649 spin_unlock(&ehci
->lock
);
653 /* clear (just) interrupts */
654 ehci_writel(ehci
, status
, &ehci
->regs
->status
);
655 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted write */
658 #ifdef EHCI_VERBOSE_DEBUG
659 /* unrequested/ignored: Frame List Rollover */
660 dbg_status (ehci
, "irq", status
);
663 /* INT, ERR, and IAA interrupt rates can be throttled */
665 /* normal [4.15.1.2] or error [4.15.1.1] completion */
666 if (likely ((status
& (STS_INT
|STS_ERR
)) != 0)) {
667 if (likely ((status
& STS_ERR
) == 0))
668 COUNT (ehci
->stats
.normal
);
670 COUNT (ehci
->stats
.error
);
674 /* complete the unlinking of some qh [4.15.2.3] */
675 if (status
& STS_IAA
) {
676 COUNT (ehci
->stats
.reclaim
);
677 end_unlink_async(ehci
);
680 /* remote wakeup [4.3.1] */
681 if (status
& STS_PCD
) {
682 unsigned i
= HCS_N_PORTS (ehci
->hcs_params
);
685 /* resume root hub? */
686 if (!(ehci_readl(ehci
, &ehci
->regs
->command
) & CMD_RUN
))
687 usb_hcd_resume_root_hub(hcd
);
690 int pstatus
= ehci_readl(ehci
,
691 &ehci
->regs
->port_status
[i
]);
693 if (pstatus
& PORT_OWNER
)
695 if (!(pstatus
& PORT_RESUME
)
696 || ehci
->reset_done
[i
] != 0)
699 /* start 20 msec resume signaling from this port,
700 * and make khubd collect PORT_STAT_C_SUSPEND to
701 * stop that signaling.
703 ehci
->reset_done
[i
] = jiffies
+ msecs_to_jiffies (20);
704 ehci_dbg (ehci
, "port %d remote wakeup\n", i
+ 1);
705 mod_timer(&hcd
->rh_timer
, ehci
->reset_done
[i
]);
709 /* PCI errors [4.15.2.4] */
710 if (unlikely ((status
& STS_FATAL
) != 0)) {
711 /* bogus "fatal" IRQs appear on some chips... why? */
712 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
713 dbg_cmd (ehci
, "fatal", ehci_readl(ehci
,
714 &ehci
->regs
->command
));
715 dbg_status (ehci
, "fatal", status
);
716 if (status
& STS_HALT
) {
717 ehci_err (ehci
, "fatal error\n");
720 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
721 /* generic layer kills/unlinks all urbs, then
722 * uses ehci_stop to clean up the rest
730 spin_unlock (&ehci
->lock
);
731 if (pcd_status
& STS_PCD
)
732 usb_hcd_poll_rh_status(hcd
);
736 /*-------------------------------------------------------------------------*/
739 * non-error returns are a promise to giveback() the urb later
740 * we drop ownership so next owner (or urb unlink) can get it
742 * urb + dev is in hcd.self.controller.urb_list
743 * we're queueing TDs onto software and hardware lists
745 * hcd-specific init for hcpriv hasn't been done yet
747 * NOTE: control, bulk, and interrupt share the same code to append TDs
748 * to a (possibly active) QH, and the same QH scanning code.
750 static int ehci_urb_enqueue (
755 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
756 struct list_head qtd_list
;
758 INIT_LIST_HEAD (&qtd_list
);
760 switch (usb_pipetype (urb
->pipe
)) {
761 // case PIPE_CONTROL:
764 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
766 return submit_async(ehci
, urb
, &qtd_list
, mem_flags
);
769 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
771 return intr_submit(ehci
, urb
, &qtd_list
, mem_flags
);
773 case PIPE_ISOCHRONOUS
:
774 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
775 return itd_submit (ehci
, urb
, mem_flags
);
777 return sitd_submit (ehci
, urb
, mem_flags
);
781 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
784 if (!HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
))
785 end_unlink_async(ehci
);
787 /* if it's not linked then there's nothing to do */
788 if (qh
->qh_state
!= QH_STATE_LINKED
)
791 /* defer till later if busy */
792 else if (ehci
->reclaim
) {
793 struct ehci_qh
*last
;
795 for (last
= ehci
->reclaim
;
797 last
= last
->reclaim
)
799 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
802 /* start IAA cycle */
804 start_unlink_async (ehci
, qh
);
807 /* remove from hardware lists
808 * completions normally happen asynchronously
811 static int ehci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
813 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
818 spin_lock_irqsave (&ehci
->lock
, flags
);
819 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
823 switch (usb_pipetype (urb
->pipe
)) {
824 // case PIPE_CONTROL:
827 qh
= (struct ehci_qh
*) urb
->hcpriv
;
830 switch (qh
->qh_state
) {
831 case QH_STATE_LINKED
:
832 case QH_STATE_COMPLETING
:
833 unlink_async(ehci
, qh
);
835 case QH_STATE_UNLINK
:
836 case QH_STATE_UNLINK_WAIT
:
837 /* already started */
846 qh
= (struct ehci_qh
*) urb
->hcpriv
;
849 switch (qh
->qh_state
) {
850 case QH_STATE_LINKED
:
851 intr_deschedule (ehci
, qh
);
854 qh_completions (ehci
, qh
);
857 ehci_dbg (ehci
, "bogus qh %p state %d\n",
862 /* reschedule QH iff another request is queued */
863 if (!list_empty (&qh
->qtd_list
)
864 && HC_IS_RUNNING (hcd
->state
)) {
867 schedule_status
= qh_schedule (ehci
, qh
);
868 spin_unlock_irqrestore (&ehci
->lock
, flags
);
870 if (schedule_status
!= 0) {
871 // shouldn't happen often, but ...
872 // FIXME kill those tds' urbs
873 err ("can't reschedule qh %p, err %d",
874 qh
, schedule_status
);
880 case PIPE_ISOCHRONOUS
:
883 // wait till next completion, do it then.
884 // completion irqs can wait up to 1024 msec,
888 spin_unlock_irqrestore (&ehci
->lock
, flags
);
892 /*-------------------------------------------------------------------------*/
894 // bulk qh holds the data toggle
897 ehci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
899 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
901 struct ehci_qh
*qh
, *tmp
;
903 /* ASSERT: any requests/urbs are being unlinked */
904 /* ASSERT: nobody can be submitting urbs for this any more */
907 spin_lock_irqsave (&ehci
->lock
, flags
);
912 /* endpoints can be iso streams. for now, we don't
913 * accelerate iso completions ... so spin a while.
915 if (qh
->hw_info1
== 0) {
916 ehci_vdbg (ehci
, "iso delay\n");
920 if (!HC_IS_RUNNING (hcd
->state
))
921 qh
->qh_state
= QH_STATE_IDLE
;
922 switch (qh
->qh_state
) {
923 case QH_STATE_LINKED
:
924 for (tmp
= ehci
->async
->qh_next
.qh
;
926 tmp
= tmp
->qh_next
.qh
)
928 /* periodic qh self-unlinks on empty */
931 unlink_async (ehci
, qh
);
933 case QH_STATE_UNLINK
: /* wait for hw to finish? */
934 case QH_STATE_UNLINK_WAIT
:
936 spin_unlock_irqrestore (&ehci
->lock
, flags
);
937 schedule_timeout_uninterruptible(1);
939 case QH_STATE_IDLE
: /* fully unlinked */
940 if (list_empty (&qh
->qtd_list
)) {
944 /* else FALL THROUGH */
947 /* caller was supposed to have unlinked any requests;
948 * that's not our job. just leak this memory.
950 ehci_err (ehci
, "qh %p (#%02x) state %d%s\n",
951 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
952 list_empty (&qh
->qtd_list
) ? "" : "(has tds)");
957 spin_unlock_irqrestore (&ehci
->lock
, flags
);
961 static int ehci_get_frame (struct usb_hcd
*hcd
)
963 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
964 return (ehci_readl(ehci
, &ehci
->regs
->frame_index
) >> 3) %
968 /*-------------------------------------------------------------------------*/
970 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
972 MODULE_DESCRIPTION (DRIVER_INFO
);
973 MODULE_AUTHOR (DRIVER_AUTHOR
);
974 MODULE_LICENSE ("GPL");
977 #include "ehci-pci.c"
978 #define PCI_DRIVER ehci_pci_driver
981 #ifdef CONFIG_USB_EHCI_FSL
982 #include "ehci-fsl.c"
983 #define PLATFORM_DRIVER ehci_fsl_driver
986 #ifdef CONFIG_SOC_AU1200
987 #include "ehci-au1xxx.c"
988 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
991 #ifdef CONFIG_PPC_PS3
992 #include "ehci-ps3.c"
993 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
996 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
997 #include "ehci-ppc-soc.c"
998 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1001 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1002 #include "ehci-ppc-of.c"
1003 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1006 #ifdef CONFIG_ARCH_ORION
1007 #include "ehci-orion.c"
1008 #define PLATFORM_DRIVER ehci_orion_driver
1011 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1012 !defined(PS3_SYSTEM_BUS_DRIVER)
1013 #error "missing bus glue for ehci-hcd"
1016 static int __init
ehci_hcd_init(void)
1020 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1022 sizeof(struct ehci_qh
), sizeof(struct ehci_qtd
),
1023 sizeof(struct ehci_itd
), sizeof(struct ehci_sitd
));
1026 ehci_debug_root
= debugfs_create_dir("ehci", NULL
);
1027 if (!ehci_debug_root
)
1031 #ifdef PLATFORM_DRIVER
1032 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1038 retval
= pci_register_driver(&PCI_DRIVER
);
1043 #ifdef PS3_SYSTEM_BUS_DRIVER
1044 retval
= ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1049 #ifdef OF_PLATFORM_DRIVER
1050 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1056 #ifdef OF_PLATFORM_DRIVER
1057 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1060 #ifdef PS3_SYSTEM_BUS_DRIVER
1061 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1065 pci_unregister_driver(&PCI_DRIVER
);
1068 #ifdef PLATFORM_DRIVER
1069 platform_driver_unregister(&PLATFORM_DRIVER
);
1073 debugfs_remove(ehci_debug_root
);
1074 ehci_debug_root
= NULL
;
1078 module_init(ehci_hcd_init
);
1080 static void __exit
ehci_hcd_cleanup(void)
1082 #ifdef OF_PLATFORM_DRIVER
1083 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1085 #ifdef PLATFORM_DRIVER
1086 platform_driver_unregister(&PLATFORM_DRIVER
);
1089 pci_unregister_driver(&PCI_DRIVER
);
1091 #ifdef PS3_SYSTEM_BUS_DRIVER
1092 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1095 debugfs_remove(ehci_debug_root
);
1098 module_exit(ehci_hcd_cleanup
);