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KVM: Cosmetics
[linux-2.6/kvm.git] / drivers / kvm / vmx.c
blobff3bfc5c390adf15056ec36cfa92061c6ff207b4
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 *
9 * Authors:
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
15 *
16 */
17
18 #include "kvm.h"
19 #include "vmx.h"
20 #include "kvm_vmx.h"
21 #include <linux/module.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <asm/io.h>
26 #include <asm/desc.h>
27
28 #include "segment_descriptor.h"
29
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
32
33 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
34 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
35
36 #ifdef CONFIG_X86_64
37 #define HOST_IS_64 1
38 #else
39 #define HOST_IS_64 0
40 #endif
41
42 static struct vmcs_descriptor {
43 int size;
44 int order;
45 u32 revision_id;
46 } vmcs_descriptor;
47
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
54 }
55
56 static struct kvm_vmx_segment_field {
57 unsigned selector;
58 unsigned base;
59 unsigned limit;
60 unsigned ar_bytes;
61 } kvm_vmx_segment_fields[] = {
62 VMX_SEGMENT_FIELD(CS),
63 VMX_SEGMENT_FIELD(DS),
64 VMX_SEGMENT_FIELD(ES),
65 VMX_SEGMENT_FIELD(FS),
66 VMX_SEGMENT_FIELD(GS),
67 VMX_SEGMENT_FIELD(SS),
68 VMX_SEGMENT_FIELD(TR),
69 VMX_SEGMENT_FIELD(LDTR),
70 };
71
72 static const u32 vmx_msr_index[] = {
73 #ifdef CONFIG_X86_64
74 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
75 #endif
76 MSR_EFER, MSR_K6_STAR,
77 };
78 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
79
80 static inline int is_page_fault(u32 intr_info)
81 {
82 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
83 INTR_INFO_VALID_MASK)) ==
84 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
85 }
86
87 static inline int is_external_interrupt(u32 intr_info)
88 {
89 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
90 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
91 }
92
93 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
94 {
95 int i;
96
97 for (i = 0; i < vcpu->nmsrs; ++i)
98 if (vcpu->guest_msrs[i].index == msr)
99 return &vcpu->guest_msrs[i];
100 return NULL;
101 }
102
103 static void vmcs_clear(struct vmcs *vmcs)
104 {
105 u64 phys_addr = __pa(vmcs);
106 u8 error;
107
108 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
109 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
110 : "cc", "memory");
111 if (error)
112 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
113 vmcs, phys_addr);
114 }
115
116 static void __vcpu_clear(void *arg)
117 {
118 struct kvm_vcpu *vcpu = arg;
119 int cpu = raw_smp_processor_id();
120
121 if (vcpu->cpu == cpu)
122 vmcs_clear(vcpu->vmcs);
123 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
124 per_cpu(current_vmcs, cpu) = NULL;
125 }
126
127 static void vcpu_clear(struct kvm_vcpu *vcpu)
128 {
129 if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
130 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
131 else
132 __vcpu_clear(vcpu);
133 vcpu->launched = 0;
134 }
135
136 static unsigned long vmcs_readl(unsigned long field)
137 {
138 unsigned long value;
139
140 asm volatile (ASM_VMX_VMREAD_RDX_RAX
141 : "=a"(value) : "d"(field) : "cc");
142 return value;
143 }
144
145 static u16 vmcs_read16(unsigned long field)
146 {
147 return vmcs_readl(field);
148 }
149
150 static u32 vmcs_read32(unsigned long field)
151 {
152 return vmcs_readl(field);
153 }
154
155 static u64 vmcs_read64(unsigned long field)
156 {
157 #ifdef CONFIG_X86_64
158 return vmcs_readl(field);
159 #else
160 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
161 #endif
162 }
163
164 static noinline void vmwrite_error(unsigned long field, unsigned long value)
165 {
166 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
167 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
168 dump_stack();
169 }
170
171 static void vmcs_writel(unsigned long field, unsigned long value)
172 {
173 u8 error;
174
175 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
176 : "=q"(error) : "a"(value), "d"(field) : "cc" );
177 if (unlikely(error))
178 vmwrite_error(field, value);
179 }
180
181 static void vmcs_write16(unsigned long field, u16 value)
182 {
183 vmcs_writel(field, value);
184 }
185
186 static void vmcs_write32(unsigned long field, u32 value)
187 {
188 vmcs_writel(field, value);
189 }
190
191 static void vmcs_write64(unsigned long field, u64 value)
192 {
193 #ifdef CONFIG_X86_64
194 vmcs_writel(field, value);
195 #else
196 vmcs_writel(field, value);
197 asm volatile ("");
198 vmcs_writel(field+1, value >> 32);
199 #endif
200 }
201
202 /*
203 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
204 * vcpu mutex is already taken.
205 */
206 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
207 {
208 u64 phys_addr = __pa(vcpu->vmcs);
209 int cpu;
210
211 cpu = get_cpu();
212
213 if (vcpu->cpu != cpu)
214 vcpu_clear(vcpu);
215
216 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
217 u8 error;
218
219 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
220 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
221 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
222 : "cc");
223 if (error)
224 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
225 vcpu->vmcs, phys_addr);
226 }
227
228 if (vcpu->cpu != cpu) {
229 struct descriptor_table dt;
230 unsigned long sysenter_esp;
231
232 vcpu->cpu = cpu;
233 /*
234 * Linux uses per-cpu TSS and GDT, so set these when switching
235 * processors.
236 */
237 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
238 get_gdt(&dt);
239 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
240
241 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
242 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
243 }
244 return vcpu;
245 }
246
247 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
248 {
249 put_cpu();
250 }
251
252 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
253 {
254 vcpu_clear(vcpu);
255 }
256
257 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
258 {
259 return vmcs_readl(GUEST_RFLAGS);
260 }
261
262 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
263 {
264 vmcs_writel(GUEST_RFLAGS, rflags);
265 }
266
267 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
268 {
269 unsigned long rip;
270 u32 interruptibility;
271
272 rip = vmcs_readl(GUEST_RIP);
273 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
274 vmcs_writel(GUEST_RIP, rip);
275
276 /*
277 * We emulated an instruction, so temporary interrupt blocking
278 * should be removed, if set.
279 */
280 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
281 if (interruptibility & 3)
282 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
283 interruptibility & ~3);
284 vcpu->interrupt_window_open = 1;
285 }
286
287 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
288 {
289 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
290 vmcs_readl(GUEST_RIP));
291 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
292 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
293 GP_VECTOR |
294 INTR_TYPE_EXCEPTION |
295 INTR_INFO_DELIEVER_CODE_MASK |
296 INTR_INFO_VALID_MASK);
297 }
298
299 /*
300 * reads and returns guest's timestamp counter "register"
301 * guest_tsc = host_tsc + tsc_offset -- 21.3
302 */
303 static u64 guest_read_tsc(void)
304 {
305 u64 host_tsc, tsc_offset;
306
307 rdtscll(host_tsc);
308 tsc_offset = vmcs_read64(TSC_OFFSET);
309 return host_tsc + tsc_offset;
310 }
311
312 /*
313 * writes 'guest_tsc' into guest's timestamp counter "register"
314 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
315 */
316 static void guest_write_tsc(u64 guest_tsc)
317 {
318 u64 host_tsc;
319
320 rdtscll(host_tsc);
321 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
322 }
323
324 static void reload_tss(void)
325 {
326 #ifndef CONFIG_X86_64
327
328 /*
329 * VT restores TR but not its size. Useless.
330 */
331 struct descriptor_table gdt;
332 struct segment_descriptor *descs;
333
334 get_gdt(&gdt);
335 descs = (void *)gdt.base;
336 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
337 load_TR_desc();
338 #endif
339 }
340
341 /*
342 * Reads an msr value (of 'msr_index') into 'pdata'.
343 * Returns 0 on success, non-0 otherwise.
344 * Assumes vcpu_load() was already called.
345 */
346 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
347 {
348 u64 data;
349 struct vmx_msr_entry *msr;
350
351 if (!pdata) {
352 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
353 return -EINVAL;
354 }
355
356 switch (msr_index) {
357 #ifdef CONFIG_X86_64
358 case MSR_FS_BASE:
359 data = vmcs_readl(GUEST_FS_BASE);
360 break;
361 case MSR_GS_BASE:
362 data = vmcs_readl(GUEST_GS_BASE);
363 break;
364 case MSR_EFER:
365 return kvm_get_msr_common(vcpu, msr_index, pdata);
366 #endif
367 case MSR_IA32_TIME_STAMP_COUNTER:
368 data = guest_read_tsc();
369 break;
370 case MSR_IA32_SYSENTER_CS:
371 data = vmcs_read32(GUEST_SYSENTER_CS);
372 break;
373 case MSR_IA32_SYSENTER_EIP:
374 data = vmcs_read32(GUEST_SYSENTER_EIP);
375 break;
376 case MSR_IA32_SYSENTER_ESP:
377 data = vmcs_read32(GUEST_SYSENTER_ESP);
378 break;
379 default:
380 msr = find_msr_entry(vcpu, msr_index);
381 if (msr) {
382 data = msr->data;
383 break;
384 }
385 return kvm_get_msr_common(vcpu, msr_index, pdata);
386 }
387
388 *pdata = data;
389 return 0;
390 }
391
392 /*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398 {
399 struct vmx_msr_entry *msr;
400 switch (msr_index) {
401 #ifdef CONFIG_X86_64
402 case MSR_EFER:
403 return kvm_set_msr_common(vcpu, msr_index, data);
404 case MSR_FS_BASE:
405 vmcs_writel(GUEST_FS_BASE, data);
406 break;
407 case MSR_GS_BASE:
408 vmcs_writel(GUEST_GS_BASE, data);
409 break;
410 #endif
411 case MSR_IA32_SYSENTER_CS:
412 vmcs_write32(GUEST_SYSENTER_CS, data);
413 break;
414 case MSR_IA32_SYSENTER_EIP:
415 vmcs_write32(GUEST_SYSENTER_EIP, data);
416 break;
417 case MSR_IA32_SYSENTER_ESP:
418 vmcs_write32(GUEST_SYSENTER_ESP, data);
419 break;
420 case MSR_IA32_TIME_STAMP_COUNTER:
421 guest_write_tsc(data);
422 break;
423 default:
424 msr = find_msr_entry(vcpu, msr_index);
425 if (msr) {
426 msr->data = data;
427 break;
428 }
429 return kvm_set_msr_common(vcpu, msr_index, data);
430 msr->data = data;
431 break;
432 }
433
434 return 0;
435 }
436
437 /*
438 * Sync the rsp and rip registers into the vcpu structure. This allows
439 * registers to be accessed by indexing vcpu->regs.
440 */
441 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
442 {
443 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
444 vcpu->rip = vmcs_readl(GUEST_RIP);
445 }
446
447 /*
448 * Syncs rsp and rip back into the vmcs. Should be called after possible
449 * modification.
450 */
451 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
452 {
453 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
454 vmcs_writel(GUEST_RIP, vcpu->rip);
455 }
456
457 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
458 {
459 unsigned long dr7 = 0x400;
460 u32 exception_bitmap;
461 int old_singlestep;
462
463 exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
464 old_singlestep = vcpu->guest_debug.singlestep;
465
466 vcpu->guest_debug.enabled = dbg->enabled;
467 if (vcpu->guest_debug.enabled) {
468 int i;
469
470 dr7 |= 0x200; /* exact */
471 for (i = 0; i < 4; ++i) {
472 if (!dbg->breakpoints[i].enabled)
473 continue;
474 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
475 dr7 |= 2 << (i*2); /* global enable */
476 dr7 |= 0 << (i*4+16); /* execution breakpoint */
477 }
478
479 exception_bitmap |= (1u << 1); /* Trap debug exceptions */
480
481 vcpu->guest_debug.singlestep = dbg->singlestep;
482 } else {
483 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
484 vcpu->guest_debug.singlestep = 0;
485 }
486
487 if (old_singlestep && !vcpu->guest_debug.singlestep) {
488 unsigned long flags;
489
490 flags = vmcs_readl(GUEST_RFLAGS);
491 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
492 vmcs_writel(GUEST_RFLAGS, flags);
493 }
494
495 vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
496 vmcs_writel(GUEST_DR7, dr7);
497
498 return 0;
499 }
500
501 static __init int cpu_has_kvm_support(void)
502 {
503 unsigned long ecx = cpuid_ecx(1);
504 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
505 }
506
507 static __init int vmx_disabled_by_bios(void)
508 {
509 u64 msr;
510
511 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
512 return (msr & 5) == 1; /* locked but not enabled */
513 }
514
515 static void hardware_enable(void *garbage)
516 {
517 int cpu = raw_smp_processor_id();
518 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
519 u64 old;
520
521 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
522 if ((old & 5) != 5)
523 /* enable and lock */
524 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
525 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
526 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
527 : "memory", "cc");
528 }
529
530 static void hardware_disable(void *garbage)
531 {
532 asm volatile (ASM_VMX_VMXOFF : : : "cc");
533 }
534
535 static __init void setup_vmcs_descriptor(void)
536 {
537 u32 vmx_msr_low, vmx_msr_high;
538
539 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
540 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
541 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
542 vmcs_descriptor.revision_id = vmx_msr_low;
543 }
544
545 static struct vmcs *alloc_vmcs_cpu(int cpu)
546 {
547 int node = cpu_to_node(cpu);
548 struct page *pages;
549 struct vmcs *vmcs;
550
551 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
552 if (!pages)
553 return NULL;
554 vmcs = page_address(pages);
555 memset(vmcs, 0, vmcs_descriptor.size);
556 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
557 return vmcs;
558 }
559
560 static struct vmcs *alloc_vmcs(void)
561 {
562 return alloc_vmcs_cpu(raw_smp_processor_id());
563 }
564
565 static void free_vmcs(struct vmcs *vmcs)
566 {
567 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
568 }
569
570 static __exit void free_kvm_area(void)
571 {
572 int cpu;
573
574 for_each_online_cpu(cpu)
575 free_vmcs(per_cpu(vmxarea, cpu));
576 }
577
578 extern struct vmcs *alloc_vmcs_cpu(int cpu);
579
580 static __init int alloc_kvm_area(void)
581 {
582 int cpu;
583
584 for_each_online_cpu(cpu) {
585 struct vmcs *vmcs;
586
587 vmcs = alloc_vmcs_cpu(cpu);
588 if (!vmcs) {
589 free_kvm_area();
590 return -ENOMEM;
591 }
592
593 per_cpu(vmxarea, cpu) = vmcs;
594 }
595 return 0;
596 }
597
598 static __init int hardware_setup(void)
599 {
600 setup_vmcs_descriptor();
601 return alloc_kvm_area();
602 }
603
604 static __exit void hardware_unsetup(void)
605 {
606 free_kvm_area();
607 }
608
609 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
610 {
611 if (vcpu->rmode.active)
612 vmcs_write32(EXCEPTION_BITMAP, ~0);
613 else
614 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
615 }
616
617 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
618 {
619 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
620
621 if (vmcs_readl(sf->base) == save->base) {
622 vmcs_write16(sf->selector, save->selector);
623 vmcs_writel(sf->base, save->base);
624 vmcs_write32(sf->limit, save->limit);
625 vmcs_write32(sf->ar_bytes, save->ar);
626 } else {
627 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
628 << AR_DPL_SHIFT;
629 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
630 }
631 }
632
633 static void enter_pmode(struct kvm_vcpu *vcpu)
634 {
635 unsigned long flags;
636
637 vcpu->rmode.active = 0;
638
639 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
640 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
641 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
642
643 flags = vmcs_readl(GUEST_RFLAGS);
644 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
645 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
646 vmcs_writel(GUEST_RFLAGS, flags);
647
648 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
649 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
650
651 update_exception_bitmap(vcpu);
652
653 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
654 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
655 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
656 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
657
658 vmcs_write16(GUEST_SS_SELECTOR, 0);
659 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
660
661 vmcs_write16(GUEST_CS_SELECTOR,
662 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
663 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
664 }
665
666 static int rmode_tss_base(struct kvm* kvm)
667 {
668 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
669 return base_gfn << PAGE_SHIFT;
670 }
671
672 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
673 {
674 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
675
676 save->selector = vmcs_read16(sf->selector);
677 save->base = vmcs_readl(sf->base);
678 save->limit = vmcs_read32(sf->limit);
679 save->ar = vmcs_read32(sf->ar_bytes);
680 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
681 vmcs_write32(sf->limit, 0xffff);
682 vmcs_write32(sf->ar_bytes, 0xf3);
683 }
684
685 static void enter_rmode(struct kvm_vcpu *vcpu)
686 {
687 unsigned long flags;
688
689 vcpu->rmode.active = 1;
690
691 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
692 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
693
694 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
695 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
696
697 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
698 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
699
700 flags = vmcs_readl(GUEST_RFLAGS);
701 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
702
703 flags |= IOPL_MASK | X86_EFLAGS_VM;
704
705 vmcs_writel(GUEST_RFLAGS, flags);
706 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
707 update_exception_bitmap(vcpu);
708
709 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
710 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
711 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
712
713 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
714 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
715 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
716
717 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
718 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
719 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
720 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
721 }
722
723 #ifdef CONFIG_X86_64
724
725 static void enter_lmode(struct kvm_vcpu *vcpu)
726 {
727 u32 guest_tr_ar;
728
729 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
730 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
731 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
732 __FUNCTION__);
733 vmcs_write32(GUEST_TR_AR_BYTES,
734 (guest_tr_ar & ~AR_TYPE_MASK)
735 | AR_TYPE_BUSY_64_TSS);
736 }
737
738 vcpu->shadow_efer |= EFER_LMA;
739
740 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
741 vmcs_write32(VM_ENTRY_CONTROLS,
742 vmcs_read32(VM_ENTRY_CONTROLS)
743 | VM_ENTRY_CONTROLS_IA32E_MASK);
744 }
745
746 static void exit_lmode(struct kvm_vcpu *vcpu)
747 {
748 vcpu->shadow_efer &= ~EFER_LMA;
749
750 vmcs_write32(VM_ENTRY_CONTROLS,
751 vmcs_read32(VM_ENTRY_CONTROLS)
752 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
753 }
754
755 #endif
756
757 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
758 {
759 vcpu->cr0 &= KVM_GUEST_CR0_MASK;
760 vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
761
762 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
763 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
764 }
765
766 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
767 {
768 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
769 enter_pmode(vcpu);
770
771 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
772 enter_rmode(vcpu);
773
774 #ifdef CONFIG_X86_64
775 if (vcpu->shadow_efer & EFER_LME) {
776 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
777 enter_lmode(vcpu);
778 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
779 exit_lmode(vcpu);
780 }
781 #endif
782
783 vmcs_writel(CR0_READ_SHADOW, cr0);
784 vmcs_writel(GUEST_CR0,
785 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
786 vcpu->cr0 = cr0;
787 }
788
789 /*
790 * Used when restoring the VM to avoid corrupting segment registers
791 */
792 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
793 {
794 vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
795 update_exception_bitmap(vcpu);
796 vmcs_writel(CR0_READ_SHADOW, cr0);
797 vmcs_writel(GUEST_CR0,
798 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
799 vcpu->cr0 = cr0;
800 }
801
802 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
803 {
804 vmcs_writel(GUEST_CR3, cr3);
805 }
806
807 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
808 {
809 vmcs_writel(CR4_READ_SHADOW, cr4);
810 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
811 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
812 vcpu->cr4 = cr4;
813 }
814
815 #ifdef CONFIG_X86_64
816
817 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
818 {
819 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
820
821 vcpu->shadow_efer = efer;
822 if (efer & EFER_LMA) {
823 vmcs_write32(VM_ENTRY_CONTROLS,
824 vmcs_read32(VM_ENTRY_CONTROLS) |
825 VM_ENTRY_CONTROLS_IA32E_MASK);
826 msr->data = efer;
827
828 } else {
829 vmcs_write32(VM_ENTRY_CONTROLS,
830 vmcs_read32(VM_ENTRY_CONTROLS) &
831 ~VM_ENTRY_CONTROLS_IA32E_MASK);
832
833 msr->data = efer & ~EFER_LME;
834 }
835 }
836
837 #endif
838
839 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
840 {
841 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
842
843 return vmcs_readl(sf->base);
844 }
845
846 static void vmx_get_segment(struct kvm_vcpu *vcpu,
847 struct kvm_segment *var, int seg)
848 {
849 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
850 u32 ar;
851
852 var->base = vmcs_readl(sf->base);
853 var->limit = vmcs_read32(sf->limit);
854 var->selector = vmcs_read16(sf->selector);
855 ar = vmcs_read32(sf->ar_bytes);
856 if (ar & AR_UNUSABLE_MASK)
857 ar = 0;
858 var->type = ar & 15;
859 var->s = (ar >> 4) & 1;
860 var->dpl = (ar >> 5) & 3;
861 var->present = (ar >> 7) & 1;
862 var->avl = (ar >> 12) & 1;
863 var->l = (ar >> 13) & 1;
864 var->db = (ar >> 14) & 1;
865 var->g = (ar >> 15) & 1;
866 var->unusable = (ar >> 16) & 1;
867 }
868
869 static void vmx_set_segment(struct kvm_vcpu *vcpu,
870 struct kvm_segment *var, int seg)
871 {
872 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
873 u32 ar;
874
875 vmcs_writel(sf->base, var->base);
876 vmcs_write32(sf->limit, var->limit);
877 vmcs_write16(sf->selector, var->selector);
878 if (var->unusable)
879 ar = 1 << 16;
880 else {
881 ar = var->type & 15;
882 ar |= (var->s & 1) << 4;
883 ar |= (var->dpl & 3) << 5;
884 ar |= (var->present & 1) << 7;
885 ar |= (var->avl & 1) << 12;
886 ar |= (var->l & 1) << 13;
887 ar |= (var->db & 1) << 14;
888 ar |= (var->g & 1) << 15;
889 }
890 if (ar == 0) /* a 0 value means unusable */
891 ar = AR_UNUSABLE_MASK;
892 vmcs_write32(sf->ar_bytes, ar);
893 }
894
895 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
896 {
897 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
898
899 *db = (ar >> 14) & 1;
900 *l = (ar >> 13) & 1;
901 }
902
903 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
904 {
905 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
906 dt->base = vmcs_readl(GUEST_IDTR_BASE);
907 }
908
909 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
910 {
911 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
912 vmcs_writel(GUEST_IDTR_BASE, dt->base);
913 }
914
915 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
916 {
917 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
918 dt->base = vmcs_readl(GUEST_GDTR_BASE);
919 }
920
921 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
922 {
923 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
924 vmcs_writel(GUEST_GDTR_BASE, dt->base);
925 }
926
927 static int init_rmode_tss(struct kvm* kvm)
928 {
929 struct page *p1, *p2, *p3;
930 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
931 char *page;
932
933 p1 = _gfn_to_page(kvm, fn++);
934 p2 = _gfn_to_page(kvm, fn++);
935 p3 = _gfn_to_page(kvm, fn);
936
937 if (!p1 || !p2 || !p3) {
938 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
939 return 0;
940 }
941
942 page = kmap_atomic(p1, KM_USER0);
943 memset(page, 0, PAGE_SIZE);
944 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
945 kunmap_atomic(page, KM_USER0);
946
947 page = kmap_atomic(p2, KM_USER0);
948 memset(page, 0, PAGE_SIZE);
949 kunmap_atomic(page, KM_USER0);
950
951 page = kmap_atomic(p3, KM_USER0);
952 memset(page, 0, PAGE_SIZE);
953 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
954 kunmap_atomic(page, KM_USER0);
955
956 return 1;
957 }
958
959 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
960 {
961 u32 msr_high, msr_low;
962
963 rdmsr(msr, msr_low, msr_high);
964
965 val &= msr_high;
966 val |= msr_low;
967 vmcs_write32(vmcs_field, val);
968 }
969
970 static void seg_setup(int seg)
971 {
972 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
973
974 vmcs_write16(sf->selector, 0);
975 vmcs_writel(sf->base, 0);
976 vmcs_write32(sf->limit, 0xffff);
977 vmcs_write32(sf->ar_bytes, 0x93);
978 }
979
980 /*
981 * Sets up the vmcs for emulated real mode.
982 */
983 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
984 {
985 u32 host_sysenter_cs;
986 u32 junk;
987 unsigned long a;
988 struct descriptor_table dt;
989 int i;
990 int ret = 0;
991 int nr_good_msrs;
992 extern asmlinkage void kvm_vmx_return(void);
993
994 if (!init_rmode_tss(vcpu->kvm)) {
995 ret = -ENOMEM;
996 goto out;
997 }
998
999 memset(vcpu->regs, 0, sizeof(vcpu->regs));
1000 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1001 vcpu->cr8 = 0;
1002 vcpu->apic_base = 0xfee00000 |
1003 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1004 MSR_IA32_APICBASE_ENABLE;
1005
1006 fx_init(vcpu);
1007
1008 /*
1009 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1010 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1011 */
1012 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1013 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1014 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1015 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1016
1017 seg_setup(VCPU_SREG_DS);
1018 seg_setup(VCPU_SREG_ES);
1019 seg_setup(VCPU_SREG_FS);
1020 seg_setup(VCPU_SREG_GS);
1021 seg_setup(VCPU_SREG_SS);
1022
1023 vmcs_write16(GUEST_TR_SELECTOR, 0);
1024 vmcs_writel(GUEST_TR_BASE, 0);
1025 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1026 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1027
1028 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1029 vmcs_writel(GUEST_LDTR_BASE, 0);
1030 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1031 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1032
1033 vmcs_write32(GUEST_SYSENTER_CS, 0);
1034 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1035 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1036
1037 vmcs_writel(GUEST_RFLAGS, 0x02);
1038 vmcs_writel(GUEST_RIP, 0xfff0);
1039 vmcs_writel(GUEST_RSP, 0);
1040
1041 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1042 vmcs_writel(GUEST_DR7, 0x400);
1043
1044 vmcs_writel(GUEST_GDTR_BASE, 0);
1045 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1046
1047 vmcs_writel(GUEST_IDTR_BASE, 0);
1048 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1049
1050 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1051 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1052 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1053
1054 /* I/O */
1055 vmcs_write64(IO_BITMAP_A, 0);
1056 vmcs_write64(IO_BITMAP_B, 0);
1057
1058 guest_write_tsc(0);
1059
1060 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1061
1062 /* Special registers */
1063 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1064
1065 /* Control */
1066 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1067 PIN_BASED_VM_EXEC_CONTROL,
1068 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1069 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1070 );
1071 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1072 CPU_BASED_VM_EXEC_CONTROL,
1073 CPU_BASED_HLT_EXITING /* 20.6.2 */
1074 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1075 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1076 | CPU_BASED_UNCOND_IO_EXITING /* 20.6.2 */
1077 | CPU_BASED_MOV_DR_EXITING
1078 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1079 );
1080
1081 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1082 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1083 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1084 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1085
1086 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1087 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1088 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1089
1090 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1091 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1092 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1093 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1094 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1095 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1096 #ifdef CONFIG_X86_64
1097 rdmsrl(MSR_FS_BASE, a);
1098 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1099 rdmsrl(MSR_GS_BASE, a);
1100 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1101 #else
1102 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1103 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1104 #endif
1105
1106 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1107
1108 get_idt(&dt);
1109 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1110
1111
1112 vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1113
1114 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1115 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1116 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1117 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1118 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1119 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1120
1121 for (i = 0; i < NR_VMX_MSR; ++i) {
1122 u32 index = vmx_msr_index[i];
1123 u32 data_low, data_high;
1124 u64 data;
1125 int j = vcpu->nmsrs;
1126
1127 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1128 continue;
1129 if (wrmsr_safe(index, data_low, data_high) < 0)
1130 continue;
1131 data = data_low | ((u64)data_high << 32);
1132 vcpu->host_msrs[j].index = index;
1133 vcpu->host_msrs[j].reserved = 0;
1134 vcpu->host_msrs[j].data = data;
1135 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1136 ++vcpu->nmsrs;
1137 }
1138 printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1139
1140 nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1141 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1142 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1143 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1144 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1145 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1146 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1147 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1148 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1149 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1150 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1151 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1152
1153
1154 /* 22.2.1, 20.8.1 */
1155 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1156 VM_ENTRY_CONTROLS, 0);
1157 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1158
1159 #ifdef CONFIG_X86_64
1160 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1161 vmcs_writel(TPR_THRESHOLD, 0);
1162 #endif
1163
1164 vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1165 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1166
1167 vcpu->cr0 = 0x60000010;
1168 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1169 vmx_set_cr4(vcpu, 0);
1170 #ifdef CONFIG_X86_64
1171 vmx_set_efer(vcpu, 0);
1172 #endif
1173
1174 return 0;
1175
1176 out:
1177 return ret;
1178 }
1179
1180 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1181 {
1182 u16 ent[2];
1183 u16 cs;
1184 u16 ip;
1185 unsigned long flags;
1186 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1187 u16 sp = vmcs_readl(GUEST_RSP);
1188 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1189
1190 if (sp > ss_limit || sp - 6 > sp) {
1191 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1192 __FUNCTION__,
1193 vmcs_readl(GUEST_RSP),
1194 vmcs_readl(GUEST_SS_BASE),
1195 vmcs_read32(GUEST_SS_LIMIT));
1196 return;
1197 }
1198
1199 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1200 sizeof(ent)) {
1201 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1202 return;
1203 }
1204
1205 flags = vmcs_readl(GUEST_RFLAGS);
1206 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1207 ip = vmcs_readl(GUEST_RIP);
1208
1209
1210 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1211 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1212 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1213 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1214 return;
1215 }
1216
1217 vmcs_writel(GUEST_RFLAGS, flags &
1218 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1219 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1220 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1221 vmcs_writel(GUEST_RIP, ent[0]);
1222 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1223 }
1224
1225 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1226 {
1227 int word_index = __ffs(vcpu->irq_summary);
1228 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1229 int irq = word_index * BITS_PER_LONG + bit_index;
1230
1231 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1232 if (!vcpu->irq_pending[word_index])
1233 clear_bit(word_index, &vcpu->irq_summary);
1234
1235 if (vcpu->rmode.active) {
1236 inject_rmode_irq(vcpu, irq);
1237 return;
1238 }
1239 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1240 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1241 }
1242
1243
1244 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1245 struct kvm_run *kvm_run)
1246 {
1247 u32 cpu_based_vm_exec_control;
1248
1249 vcpu->interrupt_window_open =
1250 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1251 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1252
1253 if (vcpu->interrupt_window_open &&
1254 vcpu->irq_summary &&
1255 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1256 /*
1257 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1258 */
1259 kvm_do_inject_irq(vcpu);
1260
1261 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1262 if (!vcpu->interrupt_window_open &&
1263 (vcpu->irq_summary || kvm_run->request_interrupt_window))
1264 /*
1265 * Interrupts blocked. Wait for unblock.
1266 */
1267 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1268 else
1269 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1270 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1271 }
1272
1273 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1274 {
1275 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1276
1277 set_debugreg(dbg->bp[0], 0);
1278 set_debugreg(dbg->bp[1], 1);
1279 set_debugreg(dbg->bp[2], 2);
1280 set_debugreg(dbg->bp[3], 3);
1281
1282 if (dbg->singlestep) {
1283 unsigned long flags;
1284
1285 flags = vmcs_readl(GUEST_RFLAGS);
1286 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1287 vmcs_writel(GUEST_RFLAGS, flags);
1288 }
1289 }
1290
1291 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1292 int vec, u32 err_code)
1293 {
1294 if (!vcpu->rmode.active)
1295 return 0;
1296
1297 if (vec == GP_VECTOR && err_code == 0)
1298 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1299 return 1;
1300 return 0;
1301 }
1302
1303 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1304 {
1305 u32 intr_info, error_code;
1306 unsigned long cr2, rip;
1307 u32 vect_info;
1308 enum emulation_result er;
1309 int r;
1310
1311 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1312 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1313
1314 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1315 !is_page_fault(intr_info)) {
1316 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1317 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1318 }
1319
1320 if (is_external_interrupt(vect_info)) {
1321 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1322 set_bit(irq, vcpu->irq_pending);
1323 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1324 }
1325
1326 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1327 asm ("int $2");
1328 return 1;
1329 }
1330 error_code = 0;
1331 rip = vmcs_readl(GUEST_RIP);
1332 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1333 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1334 if (is_page_fault(intr_info)) {
1335 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1336
1337 spin_lock(&vcpu->kvm->lock);
1338 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1339 if (r < 0) {
1340 spin_unlock(&vcpu->kvm->lock);
1341 return r;
1342 }
1343 if (!r) {
1344 spin_unlock(&vcpu->kvm->lock);
1345 return 1;
1346 }
1347
1348 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1349 spin_unlock(&vcpu->kvm->lock);
1350
1351 switch (er) {
1352 case EMULATE_DONE:
1353 return 1;
1354 case EMULATE_DO_MMIO:
1355 ++kvm_stat.mmio_exits;
1356 kvm_run->exit_reason = KVM_EXIT_MMIO;
1357 return 0;
1358 case EMULATE_FAIL:
1359 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1360 break;
1361 default:
1362 BUG();
1363 }
1364 }
1365
1366 if (vcpu->rmode.active &&
1367 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1368 error_code))
1369 return 1;
1370
1371 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1372 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1373 return 0;
1374 }
1375 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1376 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1377 kvm_run->ex.error_code = error_code;
1378 return 0;
1379 }
1380
1381 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1382 struct kvm_run *kvm_run)
1383 {
1384 ++kvm_stat.irq_exits;
1385 return 1;
1386 }
1387
1388 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1389 {
1390 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1391 return 0;
1392 }
1393
1394 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1395 {
1396 u64 inst;
1397 gva_t rip;
1398 int countr_size;
1399 int i, n;
1400
1401 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1402 countr_size = 2;
1403 } else {
1404 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1405
1406 countr_size = (cs_ar & AR_L_MASK) ? 8:
1407 (cs_ar & AR_DB_MASK) ? 4: 2;
1408 }
1409
1410 rip = vmcs_readl(GUEST_RIP);
1411 if (countr_size != 8)
1412 rip += vmcs_readl(GUEST_CS_BASE);
1413
1414 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1415
1416 for (i = 0; i < n; i++) {
1417 switch (((u8*)&inst)[i]) {
1418 case 0xf0:
1419 case 0xf2:
1420 case 0xf3:
1421 case 0x2e:
1422 case 0x36:
1423 case 0x3e:
1424 case 0x26:
1425 case 0x64:
1426 case 0x65:
1427 case 0x66:
1428 break;
1429 case 0x67:
1430 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1431 default:
1432 goto done;
1433 }
1434 }
1435 return 0;
1436 done:
1437 countr_size *= 8;
1438 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1439 return 1;
1440 }
1441
1442 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1443 {
1444 u64 exit_qualification;
1445
1446 ++kvm_stat.io_exits;
1447 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1448 kvm_run->exit_reason = KVM_EXIT_IO;
1449 if (exit_qualification & 8)
1450 kvm_run->io.direction = KVM_EXIT_IO_IN;
1451 else
1452 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1453 kvm_run->io.size = (exit_qualification & 7) + 1;
1454 kvm_run->io.string = (exit_qualification & 16) != 0;
1455 kvm_run->io.string_down
1456 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1457 kvm_run->io.rep = (exit_qualification & 32) != 0;
1458 kvm_run->io.port = exit_qualification >> 16;
1459 if (kvm_run->io.string) {
1460 if (!get_io_count(vcpu, &kvm_run->io.count))
1461 return 1;
1462 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1463 } else
1464 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1465 return 0;
1466 }
1467
1468 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1469 {
1470 u64 exit_qualification;
1471 int cr;
1472 int reg;
1473
1474 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1475 cr = exit_qualification & 15;
1476 reg = (exit_qualification >> 8) & 15;
1477 switch ((exit_qualification >> 4) & 3) {
1478 case 0: /* mov to cr */
1479 switch (cr) {
1480 case 0:
1481 vcpu_load_rsp_rip(vcpu);
1482 set_cr0(vcpu, vcpu->regs[reg]);
1483 skip_emulated_instruction(vcpu);
1484 return 1;
1485 case 3:
1486 vcpu_load_rsp_rip(vcpu);
1487 set_cr3(vcpu, vcpu->regs[reg]);
1488 skip_emulated_instruction(vcpu);
1489 return 1;
1490 case 4:
1491 vcpu_load_rsp_rip(vcpu);
1492 set_cr4(vcpu, vcpu->regs[reg]);
1493 skip_emulated_instruction(vcpu);
1494 return 1;
1495 case 8:
1496 vcpu_load_rsp_rip(vcpu);
1497 set_cr8(vcpu, vcpu->regs[reg]);
1498 skip_emulated_instruction(vcpu);
1499 return 1;
1500 };
1501 break;
1502 case 1: /*mov from cr*/
1503 switch (cr) {
1504 case 3:
1505 vcpu_load_rsp_rip(vcpu);
1506 vcpu->regs[reg] = vcpu->cr3;
1507 vcpu_put_rsp_rip(vcpu);
1508 skip_emulated_instruction(vcpu);
1509 return 1;
1510 case 8:
1511 printk(KERN_DEBUG "handle_cr: read CR8 "
1512 "cpu erratum AA15\n");
1513 vcpu_load_rsp_rip(vcpu);
1514 vcpu->regs[reg] = vcpu->cr8;
1515 vcpu_put_rsp_rip(vcpu);
1516 skip_emulated_instruction(vcpu);
1517 return 1;
1518 }
1519 break;
1520 case 3: /* lmsw */
1521 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1522
1523 skip_emulated_instruction(vcpu);
1524 return 1;
1525 default:
1526 break;
1527 }
1528 kvm_run->exit_reason = 0;
1529 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1530 (int)(exit_qualification >> 4) & 3, cr);
1531 return 0;
1532 }
1533
1534 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1535 {
1536 u64 exit_qualification;
1537 unsigned long val;
1538 int dr, reg;
1539
1540 /*
1541 * FIXME: this code assumes the host is debugging the guest.
1542 * need to deal with guest debugging itself too.
1543 */
1544 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1545 dr = exit_qualification & 7;
1546 reg = (exit_qualification >> 8) & 15;
1547 vcpu_load_rsp_rip(vcpu);
1548 if (exit_qualification & 16) {
1549 /* mov from dr */
1550 switch (dr) {
1551 case 6:
1552 val = 0xffff0ff0;
1553 break;
1554 case 7:
1555 val = 0x400;
1556 break;
1557 default:
1558 val = 0;
1559 }
1560 vcpu->regs[reg] = val;
1561 } else {
1562 /* mov to dr */
1563 }
1564 vcpu_put_rsp_rip(vcpu);
1565 skip_emulated_instruction(vcpu);
1566 return 1;
1567 }
1568
1569 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1570 {
1571 kvm_run->exit_reason = KVM_EXIT_CPUID;
1572 return 0;
1573 }
1574
1575 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1576 {
1577 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1578 u64 data;
1579
1580 if (vmx_get_msr(vcpu, ecx, &data)) {
1581 vmx_inject_gp(vcpu, 0);
1582 return 1;
1583 }
1584
1585 /* FIXME: handling of bits 32:63 of rax, rdx */
1586 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1587 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1588 skip_emulated_instruction(vcpu);
1589 return 1;
1590 }
1591
1592 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1593 {
1594 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1595 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1596 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1597
1598 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1599 vmx_inject_gp(vcpu, 0);
1600 return 1;
1601 }
1602
1603 skip_emulated_instruction(vcpu);
1604 return 1;
1605 }
1606
1607 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1608 struct kvm_run *kvm_run)
1609 {
1610 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1611 kvm_run->cr8 = vcpu->cr8;
1612 kvm_run->apic_base = vcpu->apic_base;
1613 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1614 vcpu->irq_summary == 0);
1615 }
1616
1617 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1618 struct kvm_run *kvm_run)
1619 {
1620 /*
1621 * If the user space waits to inject interrupts, exit as soon as
1622 * possible
1623 */
1624 if (kvm_run->request_interrupt_window &&
1625 !vcpu->irq_summary) {
1626 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1627 ++kvm_stat.irq_window_exits;
1628 return 0;
1629 }
1630 return 1;
1631 }
1632
1633 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1634 {
1635 skip_emulated_instruction(vcpu);
1636 if (vcpu->irq_summary)
1637 return 1;
1638
1639 kvm_run->exit_reason = KVM_EXIT_HLT;
1640 ++kvm_stat.halt_exits;
1641 return 0;
1642 }
1643
1644 /*
1645 * The exit handlers return 1 if the exit was handled fully and guest execution
1646 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1647 * to be done to userspace and return 0.
1648 */
1649 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1650 struct kvm_run *kvm_run) = {
1651 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1652 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
1653 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
1654 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
1655 [EXIT_REASON_CR_ACCESS] = handle_cr,
1656 [EXIT_REASON_DR_ACCESS] = handle_dr,
1657 [EXIT_REASON_CPUID] = handle_cpuid,
1658 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1659 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1660 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1661 [EXIT_REASON_HLT] = handle_halt,
1662 };
1663
1664 static const int kvm_vmx_max_exit_handlers =
1665 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1666
1667 /*
1668 * The guest has exited. See if we can fix it or if we need userspace
1669 * assistance.
1670 */
1671 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1672 {
1673 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1674 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1675
1676 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1677 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1678 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1679 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1680 kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1681 if (exit_reason < kvm_vmx_max_exit_handlers
1682 && kvm_vmx_exit_handlers[exit_reason])
1683 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1684 else {
1685 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1686 kvm_run->hw.hardware_exit_reason = exit_reason;
1687 }
1688 return 0;
1689 }
1690
1691 /*
1692 * Check if userspace requested an interrupt window, and that the
1693 * interrupt window is open.
1694 *
1695 * No need to exit to userspace if we already have an interrupt queued.
1696 */
1697 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1698 struct kvm_run *kvm_run)
1699 {
1700 return (!vcpu->irq_summary &&
1701 kvm_run->request_interrupt_window &&
1702 vcpu->interrupt_window_open &&
1703 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1704 }
1705
1706 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1707 {
1708 u8 fail;
1709 u16 fs_sel, gs_sel, ldt_sel;
1710 int fs_gs_ldt_reload_needed;
1711 int r;
1712
1713 again:
1714 /*
1715 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1716 * allow segment selectors with cpl > 0 or ti == 1.
1717 */
1718 fs_sel = read_fs();
1719 gs_sel = read_gs();
1720 ldt_sel = read_ldt();
1721 fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1722 if (!fs_gs_ldt_reload_needed) {
1723 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1724 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1725 } else {
1726 vmcs_write16(HOST_FS_SELECTOR, 0);
1727 vmcs_write16(HOST_GS_SELECTOR, 0);
1728 }
1729
1730 #ifdef CONFIG_X86_64
1731 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1732 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1733 #else
1734 vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1735 vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1736 #endif
1737
1738 if (!vcpu->mmio_read_completed)
1739 do_interrupt_requests(vcpu, kvm_run);
1740
1741 if (vcpu->guest_debug.enabled)
1742 kvm_guest_debug_pre(vcpu);
1743
1744 fx_save(vcpu->host_fx_image);
1745 fx_restore(vcpu->guest_fx_image);
1746
1747 save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1748 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1749
1750 asm (
1751 /* Store host registers */
1752 "pushf \n\t"
1753 #ifdef CONFIG_X86_64
1754 "push %%rax; push %%rbx; push %%rdx;"
1755 "push %%rsi; push %%rdi; push %%rbp;"
1756 "push %%r8; push %%r9; push %%r10; push %%r11;"
1757 "push %%r12; push %%r13; push %%r14; push %%r15;"
1758 "push %%rcx \n\t"
1759 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1760 #else
1761 "pusha; push %%ecx \n\t"
1762 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1763 #endif
1764 /* Check if vmlaunch of vmresume is needed */
1765 "cmp $0, %1 \n\t"
1766 /* Load guest registers. Don't clobber flags. */
1767 #ifdef CONFIG_X86_64
1768 "mov %c[cr2](%3), %%rax \n\t"
1769 "mov %%rax, %%cr2 \n\t"
1770 "mov %c[rax](%3), %%rax \n\t"
1771 "mov %c[rbx](%3), %%rbx \n\t"
1772 "mov %c[rdx](%3), %%rdx \n\t"
1773 "mov %c[rsi](%3), %%rsi \n\t"
1774 "mov %c[rdi](%3), %%rdi \n\t"
1775 "mov %c[rbp](%3), %%rbp \n\t"
1776 "mov %c[r8](%3), %%r8 \n\t"
1777 "mov %c[r9](%3), %%r9 \n\t"
1778 "mov %c[r10](%3), %%r10 \n\t"
1779 "mov %c[r11](%3), %%r11 \n\t"
1780 "mov %c[r12](%3), %%r12 \n\t"
1781 "mov %c[r13](%3), %%r13 \n\t"
1782 "mov %c[r14](%3), %%r14 \n\t"
1783 "mov %c[r15](%3), %%r15 \n\t"
1784 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1785 #else
1786 "mov %c[cr2](%3), %%eax \n\t"
1787 "mov %%eax, %%cr2 \n\t"
1788 "mov %c[rax](%3), %%eax \n\t"
1789 "mov %c[rbx](%3), %%ebx \n\t"
1790 "mov %c[rdx](%3), %%edx \n\t"
1791 "mov %c[rsi](%3), %%esi \n\t"
1792 "mov %c[rdi](%3), %%edi \n\t"
1793 "mov %c[rbp](%3), %%ebp \n\t"
1794 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1795 #endif
1796 /* Enter guest mode */
1797 "jne launched \n\t"
1798 ASM_VMX_VMLAUNCH "\n\t"
1799 "jmp kvm_vmx_return \n\t"
1800 "launched: " ASM_VMX_VMRESUME "\n\t"
1801 ".globl kvm_vmx_return \n\t"
1802 "kvm_vmx_return: "
1803 /* Save guest registers, load host registers, keep flags */
1804 #ifdef CONFIG_X86_64
1805 "xchg %3, (%%rsp) \n\t"
1806 "mov %%rax, %c[rax](%3) \n\t"
1807 "mov %%rbx, %c[rbx](%3) \n\t"
1808 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1809 "mov %%rdx, %c[rdx](%3) \n\t"
1810 "mov %%rsi, %c[rsi](%3) \n\t"
1811 "mov %%rdi, %c[rdi](%3) \n\t"
1812 "mov %%rbp, %c[rbp](%3) \n\t"
1813 "mov %%r8, %c[r8](%3) \n\t"
1814 "mov %%r9, %c[r9](%3) \n\t"
1815 "mov %%r10, %c[r10](%3) \n\t"
1816 "mov %%r11, %c[r11](%3) \n\t"
1817 "mov %%r12, %c[r12](%3) \n\t"
1818 "mov %%r13, %c[r13](%3) \n\t"
1819 "mov %%r14, %c[r14](%3) \n\t"
1820 "mov %%r15, %c[r15](%3) \n\t"
1821 "mov %%cr2, %%rax \n\t"
1822 "mov %%rax, %c[cr2](%3) \n\t"
1823 "mov (%%rsp), %3 \n\t"
1824
1825 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1826 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1827 "pop %%rbp; pop %%rdi; pop %%rsi;"
1828 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1829 #else
1830 "xchg %3, (%%esp) \n\t"
1831 "mov %%eax, %c[rax](%3) \n\t"
1832 "mov %%ebx, %c[rbx](%3) \n\t"
1833 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1834 "mov %%edx, %c[rdx](%3) \n\t"
1835 "mov %%esi, %c[rsi](%3) \n\t"
1836 "mov %%edi, %c[rdi](%3) \n\t"
1837 "mov %%ebp, %c[rbp](%3) \n\t"
1838 "mov %%cr2, %%eax \n\t"
1839 "mov %%eax, %c[cr2](%3) \n\t"
1840 "mov (%%esp), %3 \n\t"
1841
1842 "pop %%ecx; popa \n\t"
1843 #endif
1844 "setbe %0 \n\t"
1845 "popf \n\t"
1846 : "=q" (fail)
1847 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1848 "c"(vcpu),
1849 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1850 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1851 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1852 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1853 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1854 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1855 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1856 #ifdef CONFIG_X86_64
1857 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1858 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1859 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1860 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1861 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1862 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1863 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1864 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1865 #endif
1866 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1867 : "cc", "memory" );
1868
1869 ++kvm_stat.exits;
1870
1871 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1872 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1873
1874 fx_save(vcpu->guest_fx_image);
1875 fx_restore(vcpu->host_fx_image);
1876 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1877
1878 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1879
1880 kvm_run->exit_type = 0;
1881 if (fail) {
1882 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1883 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1884 r = 0;
1885 } else {
1886 if (fs_gs_ldt_reload_needed) {
1887 load_ldt(ldt_sel);
1888 load_fs(fs_sel);
1889 /*
1890 * If we have to reload gs, we must take care to
1891 * preserve our gs base.
1892 */
1893 local_irq_disable();
1894 load_gs(gs_sel);
1895 #ifdef CONFIG_X86_64
1896 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1897 #endif
1898 local_irq_enable();
1899
1900 reload_tss();
1901 }
1902 /*
1903 * Profile KVM exit RIPs:
1904 */
1905 if (unlikely(prof_on == KVM_PROFILING))
1906 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1907
1908 vcpu->launched = 1;
1909 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1910 r = kvm_handle_exit(kvm_run, vcpu);
1911 if (r > 0) {
1912 /* Give scheduler a change to reschedule. */
1913 if (signal_pending(current)) {
1914 ++kvm_stat.signal_exits;
1915 post_kvm_run_save(vcpu, kvm_run);
1916 return -EINTR;
1917 }
1918
1919 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1920 ++kvm_stat.request_irq_exits;
1921 post_kvm_run_save(vcpu, kvm_run);
1922 return -EINTR;
1923 }
1924
1925 kvm_resched(vcpu);
1926 goto again;
1927 }
1928 }
1929
1930 post_kvm_run_save(vcpu, kvm_run);
1931 return r;
1932 }
1933
1934 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1935 {
1936 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1937 }
1938
1939 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1940 unsigned long addr,
1941 u32 err_code)
1942 {
1943 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1944
1945 ++kvm_stat.pf_guest;
1946
1947 if (is_page_fault(vect_info)) {
1948 printk(KERN_DEBUG "inject_page_fault: "
1949 "double fault 0x%lx @ 0x%lx\n",
1950 addr, vmcs_readl(GUEST_RIP));
1951 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1952 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1953 DF_VECTOR |
1954 INTR_TYPE_EXCEPTION |
1955 INTR_INFO_DELIEVER_CODE_MASK |
1956 INTR_INFO_VALID_MASK);
1957 return;
1958 }
1959 vcpu->cr2 = addr;
1960 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1961 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1962 PF_VECTOR |
1963 INTR_TYPE_EXCEPTION |
1964 INTR_INFO_DELIEVER_CODE_MASK |
1965 INTR_INFO_VALID_MASK);
1966
1967 }
1968
1969 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1970 {
1971 if (vcpu->vmcs) {
1972 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1973 free_vmcs(vcpu->vmcs);
1974 vcpu->vmcs = NULL;
1975 }
1976 }
1977
1978 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1979 {
1980 vmx_free_vmcs(vcpu);
1981 }
1982
1983 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1984 {
1985 struct vmcs *vmcs;
1986
1987 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1988 if (!vcpu->guest_msrs)
1989 return -ENOMEM;
1990
1991 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1992 if (!vcpu->host_msrs)
1993 goto out_free_guest_msrs;
1994
1995 vmcs = alloc_vmcs();
1996 if (!vmcs)
1997 goto out_free_msrs;
1998
1999 vmcs_clear(vmcs);
2000 vcpu->vmcs = vmcs;
2001 vcpu->launched = 0;
2002
2003 return 0;
2004
2005 out_free_msrs:
2006 kfree(vcpu->host_msrs);
2007 vcpu->host_msrs = NULL;
2008
2009 out_free_guest_msrs:
2010 kfree(vcpu->guest_msrs);
2011 vcpu->guest_msrs = NULL;
2012
2013 return -ENOMEM;
2014 }
2015
2016 static struct kvm_arch_ops vmx_arch_ops = {
2017 .cpu_has_kvm_support = cpu_has_kvm_support,
2018 .disabled_by_bios = vmx_disabled_by_bios,
2019 .hardware_setup = hardware_setup,
2020 .hardware_unsetup = hardware_unsetup,
2021 .hardware_enable = hardware_enable,
2022 .hardware_disable = hardware_disable,
2023
2024 .vcpu_create = vmx_create_vcpu,
2025 .vcpu_free = vmx_free_vcpu,
2026
2027 .vcpu_load = vmx_vcpu_load,
2028 .vcpu_put = vmx_vcpu_put,
2029 .vcpu_decache = vmx_vcpu_decache,
2030
2031 .set_guest_debug = set_guest_debug,
2032 .get_msr = vmx_get_msr,
2033 .set_msr = vmx_set_msr,
2034 .get_segment_base = vmx_get_segment_base,
2035 .get_segment = vmx_get_segment,
2036 .set_segment = vmx_set_segment,
2037 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2038 .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2039 .set_cr0 = vmx_set_cr0,
2040 .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2041 .set_cr3 = vmx_set_cr3,
2042 .set_cr4 = vmx_set_cr4,
2043 #ifdef CONFIG_X86_64
2044 .set_efer = vmx_set_efer,
2045 #endif
2046 .get_idt = vmx_get_idt,
2047 .set_idt = vmx_set_idt,
2048 .get_gdt = vmx_get_gdt,
2049 .set_gdt = vmx_set_gdt,
2050 .cache_regs = vcpu_load_rsp_rip,
2051 .decache_regs = vcpu_put_rsp_rip,
2052 .get_rflags = vmx_get_rflags,
2053 .set_rflags = vmx_set_rflags,
2054
2055 .tlb_flush = vmx_flush_tlb,
2056 .inject_page_fault = vmx_inject_page_fault,
2057
2058 .inject_gp = vmx_inject_gp,
2059
2060 .run = vmx_vcpu_run,
2061 .skip_emulated_instruction = skip_emulated_instruction,
2062 .vcpu_setup = vmx_vcpu_setup,
2063 };
2064
2065 static int __init vmx_init(void)
2066 {
2067 return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2068 }
2069
2070 static void __exit vmx_exit(void)
2071 {
2072 kvm_exit_arch();
2073 }
2074
2075 module_init(vmx_init)
2076 module_exit(vmx_exit)
kernel-based virtual machine