ARM: mxc: Fix i2c_board_info definitions
[linux-2.6/kvm.git] / arch / arm / mach-mx2 / pcm038.c
blob9a3483c8f58c17983ed8b34c0449b1598a79c370
1 /*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
20 #include <linux/i2c.h>
21 #include <linux/i2c/at24.h>
22 #include <linux/io.h>
23 #include <linux/mtd/plat-ram.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/platform_device.h>
27 #include <asm/mach-types.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/time.h>
31 #include <mach/board-pcm038.h>
32 #include <mach/common.h>
33 #include <mach/hardware.h>
34 #include <mach/i2c.h>
35 #include <mach/iomux.h>
36 #include <mach/imx-uart.h>
37 #include <mach/mxc_nand.h>
39 #include "devices.h"
41 static int pcm038_pins[] = {
42 /* UART1 */
43 PE12_PF_UART1_TXD,
44 PE13_PF_UART1_RXD,
45 PE14_PF_UART1_CTS,
46 PE15_PF_UART1_RTS,
47 /* UART2 */
48 PE3_PF_UART2_CTS,
49 PE4_PF_UART2_RTS,
50 PE6_PF_UART2_TXD,
51 PE7_PF_UART2_RXD,
52 /* UART3 */
53 PE8_PF_UART3_TXD,
54 PE9_PF_UART3_RXD,
55 PE10_PF_UART3_CTS,
56 PE11_PF_UART3_RTS,
57 /* FEC */
58 PD0_AIN_FEC_TXD0,
59 PD1_AIN_FEC_TXD1,
60 PD2_AIN_FEC_TXD2,
61 PD3_AIN_FEC_TXD3,
62 PD4_AOUT_FEC_RX_ER,
63 PD5_AOUT_FEC_RXD1,
64 PD6_AOUT_FEC_RXD2,
65 PD7_AOUT_FEC_RXD3,
66 PD8_AF_FEC_MDIO,
67 PD9_AIN_FEC_MDC,
68 PD10_AOUT_FEC_CRS,
69 PD11_AOUT_FEC_TX_CLK,
70 PD12_AOUT_FEC_RXD0,
71 PD13_AOUT_FEC_RX_DV,
72 PD14_AOUT_FEC_RX_CLK,
73 PD15_AOUT_FEC_COL,
74 PD16_AIN_FEC_TX_ER,
75 PF23_AIN_FEC_TX_EN,
76 /* I2C2 */
77 PC5_PF_I2C2_SDA,
78 PC6_PF_I2C2_SCL,
79 /* SPI1 */
80 PD25_PF_CSPI1_RDY,
81 PD27_PF_CSPI1_SS1,
82 PD28_PF_CSPI1_SS0,
83 PD29_PF_CSPI1_SCLK,
84 PD30_PF_CSPI1_MISO,
85 PD31_PF_CSPI1_MOSI,
86 /* SSI1 */
87 PC20_PF_SSI1_FS,
88 PC21_PF_SSI1_RXD,
89 PC22_PF_SSI1_TXD,
90 PC23_PF_SSI1_CLK,
91 /* SSI4 */
92 PC16_PF_SSI4_FS,
93 PC17_PF_SSI4_RXD,
94 PC18_PF_SSI4_TXD,
95 PC19_PF_SSI4_CLK,
99 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
100 * 16 bit width
103 static struct platdata_mtd_ram pcm038_sram_data = {
104 .bankwidth = 2,
107 static struct resource pcm038_sram_resource = {
108 .start = CS1_BASE_ADDR,
109 .end = CS1_BASE_ADDR + 512 * 1024 - 1,
110 .flags = IORESOURCE_MEM,
113 static struct platform_device pcm038_sram_mtd_device = {
114 .name = "mtd-ram",
115 .id = 0,
116 .dev = {
117 .platform_data = &pcm038_sram_data,
119 .num_resources = 1,
120 .resource = &pcm038_sram_resource,
124 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
125 * 16 bit width
127 static struct physmap_flash_data pcm038_flash_data = {
128 .width = 2,
131 static struct resource pcm038_flash_resource = {
132 .start = 0xc0000000,
133 .end = 0xc1ffffff,
134 .flags = IORESOURCE_MEM,
137 static struct platform_device pcm038_nor_mtd_device = {
138 .name = "physmap-flash",
139 .id = 0,
140 .dev = {
141 .platform_data = &pcm038_flash_data,
143 .num_resources = 1,
144 .resource = &pcm038_flash_resource,
147 static struct imxuart_platform_data uart_pdata[] = {
149 .flags = IMXUART_HAVE_RTSCTS,
150 }, {
151 .flags = IMXUART_HAVE_RTSCTS,
152 }, {
153 .flags = IMXUART_HAVE_RTSCTS,
157 static struct mxc_nand_platform_data pcm038_nand_board_info = {
158 .width = 1,
159 .hw_ecc = 1,
162 static struct platform_device *platform_devices[] __initdata = {
163 &pcm038_nor_mtd_device,
164 &mxc_w1_master_device,
165 &mxc_fec_device,
166 &pcm038_sram_mtd_device,
169 /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
170 * setup other stuffs to access the sram. */
171 static void __init pcm038_init_sram(void)
173 __raw_writel(0x0000d843, CSCR_U(1));
174 __raw_writel(0x22252521, CSCR_L(1));
175 __raw_writel(0x22220a00, CSCR_A(1));
178 static struct imxi2c_platform_data pcm038_i2c_1_data = {
179 .bitrate = 100000,
182 static struct at24_platform_data board_eeprom = {
183 .byte_len = 4096,
184 .page_size = 32,
185 .flags = AT24_FLAG_ADDR16,
188 static struct i2c_board_info pcm038_i2c_devices[] = {
190 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
191 .platform_data = &board_eeprom,
192 }, {
193 I2C_BOARD_INFO("pcf8563", 0x51),
194 }, {
195 I2C_BOARD_INFO("lm75", 0x4a),
199 static void __init pcm038_init(void)
201 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
202 "PCM038");
204 pcm038_init_sram();
206 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
207 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
208 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
210 mxc_gpio_mode(PE16_AF_OWIRE);
211 mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
213 /* only the i2c master 1 is used on this CPU card */
214 i2c_register_board_info(1, pcm038_i2c_devices,
215 ARRAY_SIZE(pcm038_i2c_devices));
217 mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
219 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
221 #ifdef CONFIG_MACH_PCM970_BASEBOARD
222 pcm970_baseboard_init();
223 #endif
226 static void __init pcm038_timer_init(void)
228 mx27_clocks_init(26000000);
231 static struct sys_timer pcm038_timer = {
232 .init = pcm038_timer_init,
235 MACHINE_START(PCM038, "phyCORE-i.MX27")
236 .phys_io = AIPI_BASE_ADDR,
237 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
238 .boot_params = PHYS_OFFSET + 0x100,
239 .map_io = mx27_map_io,
240 .init_irq = mx27_init_irq,
241 .init_machine = pcm038_init,
242 .timer = &pcm038_timer,
243 MACHINE_END