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cciss: change printks to dev_warn, etc.
[linux-2.6/kvm.git] / drivers / block / cciss.c
blob35a9f08cf74fc6c3bb8c63d5feaab8931905fe9d
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/smp_lock.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <asm/uaccess.h>
45 #include <asm/io.h>
46
47 #include <linux/dma-mapping.h>
48 #include <linux/blkdev.h>
49 #include <linux/genhd.h>
50 #include <linux/completion.h>
51 #include <scsi/scsi.h>
52 #include <scsi/sg.h>
53 #include <scsi/scsi_ioctl.h>
54 #include <linux/cdrom.h>
55 #include <linux/scatterlist.h>
56 #include <linux/kthread.h>
57
58 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
59 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
61
62 /* Embedded module documentation macros - see modules.h */
63 MODULE_AUTHOR("Hewlett-Packard Company");
64 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
65 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66 MODULE_VERSION("3.6.26");
67 MODULE_LICENSE("GPL");
68
69 static int cciss_allow_hpsa;
70 module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71 MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
75 #include "cciss_cmd.h"
76 #include "cciss.h"
77 #include <linux/cciss_ioctl.h>
78
79 /* define the PCI info for the cards we can control */
80 static const struct pci_device_id cciss_pci_device_id[] = {
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
113 {0,}
114 };
115
116 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
118 /* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122 static struct board_type products[] = {
123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
140 /* controllers below this line are also supported by the hpsa driver. */
141 #define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
157 };
158
159 /* How long to wait (in milliseconds) for board to go into simple mode */
160 #define MAX_CONFIG_WAIT 30000
161 #define MAX_IOCTL_CONFIG_WAIT 1000
162
163 /*define how many times we will try a command because of bus resets */
164 #define MAX_CMD_RETRIES 3
165
166 #define MAX_CTLR 32
167
168 /* Originally cciss driver only supports 8 major numbers */
169 #define MAX_CTLR_ORIG 8
170
171 static ctlr_info_t *hba[MAX_CTLR];
172
173 static struct task_struct *cciss_scan_thread;
174 static DEFINE_MUTEX(scan_mutex);
175 static LIST_HEAD(scan_q);
176
177 static void do_cciss_request(struct request_queue *q);
178 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
180 static int cciss_open(struct block_device *bdev, fmode_t mode);
181 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
182 static int cciss_release(struct gendisk *disk, fmode_t mode);
183 static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
185 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
186 unsigned int cmd, unsigned long arg);
187 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
188
189 static int cciss_revalidate(struct gendisk *disk);
190 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
191 static int deregister_disk(ctlr_info_t *h, int drv_index,
192 int clear_all, int via_ioctl);
193
194 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
195 sector_t *total_size, unsigned int *block_size);
196 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
197 sector_t *total_size, unsigned int *block_size);
198 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
199 sector_t total_size,
200 unsigned int block_size, InquiryData_struct *inq_buff,
201 drive_info_struct *drv);
202 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
203 static void start_io(ctlr_info_t *h);
204 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
207 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
210
211 static int add_to_scan_list(struct ctlr_info *h);
212 static int scan_thread(void *data);
213 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
214 static void cciss_hba_release(struct device *dev);
215 static void cciss_device_release(struct device *dev);
216 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
217 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
218 static inline u32 next_command(ctlr_info_t *h);
219 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
225
226 /* performant mode helper functions */
227 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
230
231 #ifdef CONFIG_PROC_FS
232 static void cciss_procinit(ctlr_info_t *h);
233 #else
234 static void cciss_procinit(ctlr_info_t *h)
235 {
236 }
237 #endif /* CONFIG_PROC_FS */
238
239 #ifdef CONFIG_COMPAT
240 static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
242 #endif
243
244 static const struct block_device_operations cciss_fops = {
245 .owner = THIS_MODULE,
246 .open = cciss_unlocked_open,
247 .release = cciss_release,
248 .ioctl = do_ioctl,
249 .getgeo = cciss_getgeo,
250 #ifdef CONFIG_COMPAT
251 .compat_ioctl = cciss_compat_ioctl,
252 #endif
253 .revalidate_disk = cciss_revalidate,
254 };
255
256 /* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261 {
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264 }
265
266 /*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
269 static inline void addQ(struct hlist_head *list, CommandList_struct *c)
270 {
271 hlist_add_head(&c->list, list);
272 }
273
274 static inline void removeQ(CommandList_struct *c)
275 {
276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
286 return;
287 }
288
289 hlist_del_init(&c->list);
290 }
291
292 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294 {
295 unsigned long flags;
296 set_performant_mode(h, c);
297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 start_io(h);
301 spin_unlock_irqrestore(&h->lock, flags);
302 }
303
304 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
305 int nr_cmds)
306 {
307 int i;
308
309 if (!cmd_sg_list)
310 return;
311 for (i = 0; i < nr_cmds; i++) {
312 kfree(cmd_sg_list[i]);
313 cmd_sg_list[i] = NULL;
314 }
315 kfree(cmd_sg_list);
316 }
317
318 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
319 ctlr_info_t *h, int chainsize, int nr_cmds)
320 {
321 int j;
322 SGDescriptor_struct **cmd_sg_list;
323
324 if (chainsize <= 0)
325 return NULL;
326
327 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
328 if (!cmd_sg_list)
329 return NULL;
330
331 /* Build up chain blocks for each command */
332 for (j = 0; j < nr_cmds; j++) {
333 /* Need a block of chainsized s/g elements. */
334 cmd_sg_list[j] = kmalloc((chainsize *
335 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
336 if (!cmd_sg_list[j]) {
337 dev_err(&h->pdev->dev, "Cannot get memory "
338 "for s/g chains.\n");
339 goto clean;
340 }
341 }
342 return cmd_sg_list;
343 clean:
344 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
345 return NULL;
346 }
347
348 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
349 {
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 if (c->Header.SGTotal <= h->max_cmd_sgentries)
354 return;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 temp64.val32.lower = chain_sg->Addr.lower;
358 temp64.val32.upper = chain_sg->Addr.upper;
359 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
360 }
361
362 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
363 SGDescriptor_struct *chain_block, int len)
364 {
365 SGDescriptor_struct *chain_sg;
366 u64bit temp64;
367
368 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
369 chain_sg->Ext = CCISS_SG_CHAIN;
370 chain_sg->Len = len;
371 temp64.val = pci_map_single(h->pdev, chain_block, len,
372 PCI_DMA_TODEVICE);
373 chain_sg->Addr.lower = temp64.val32.lower;
374 chain_sg->Addr.upper = temp64.val32.upper;
375 }
376
377 #include "cciss_scsi.c" /* For SCSI tape support */
378
379 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381 };
382 #define RAID_UNKNOWN (sizeof(raid_label) / sizeof(raid_label[0])-1)
383
384 #ifdef CONFIG_PROC_FS
385
386 /*
387 * Report information about this controller.
388 */
389 #define ENG_GIG 1000000000
390 #define ENG_GIG_FACTOR (ENG_GIG/512)
391 #define ENGAGE_SCSI "engage scsi"
392
393 static struct proc_dir_entry *proc_cciss;
394
395 static void cciss_seq_show_header(struct seq_file *seq)
396 {
397 ctlr_info_t *h = seq->private;
398
399 seq_printf(seq, "%s: HP %s Controller\n"
400 "Board ID: 0x%08lx\n"
401 "Firmware Version: %c%c%c%c\n"
402 "IRQ: %d\n"
403 "Logical drives: %d\n"
404 "Current Q depth: %d\n"
405 "Current # commands on controller: %d\n"
406 "Max Q depth since init: %d\n"
407 "Max # commands on controller since init: %d\n"
408 "Max SG entries since init: %d\n",
409 h->devname,
410 h->product_name,
411 (unsigned long)h->board_id,
412 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
413 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
414 h->num_luns,
415 h->Qdepth, h->commands_outstanding,
416 h->maxQsinceinit, h->max_outstanding, h->maxSG);
417
418 #ifdef CONFIG_CISS_SCSI_TAPE
419 cciss_seq_tape_report(seq, h);
420 #endif /* CONFIG_CISS_SCSI_TAPE */
421 }
422
423 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
424 {
425 ctlr_info_t *h = seq->private;
426 unsigned long flags;
427
428 /* prevent displaying bogus info during configuration
429 * or deconfiguration of a logical volume
430 */
431 spin_lock_irqsave(&h->lock, flags);
432 if (h->busy_configuring) {
433 spin_unlock_irqrestore(&h->lock, flags);
434 return ERR_PTR(-EBUSY);
435 }
436 h->busy_configuring = 1;
437 spin_unlock_irqrestore(&h->lock, flags);
438
439 if (*pos == 0)
440 cciss_seq_show_header(seq);
441
442 return pos;
443 }
444
445 static int cciss_seq_show(struct seq_file *seq, void *v)
446 {
447 sector_t vol_sz, vol_sz_frac;
448 ctlr_info_t *h = seq->private;
449 unsigned ctlr = h->ctlr;
450 loff_t *pos = v;
451 drive_info_struct *drv = h->drv[*pos];
452
453 if (*pos > h->highest_lun)
454 return 0;
455
456 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
457 return 0;
458
459 if (drv->heads == 0)
460 return 0;
461
462 vol_sz = drv->nr_blocks;
463 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
464 vol_sz_frac *= 100;
465 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
466
467 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
468 drv->raid_level = RAID_UNKNOWN;
469 seq_printf(seq, "cciss/c%dd%d:"
470 "\t%4u.%02uGB\tRAID %s\n",
471 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
472 raid_label[drv->raid_level]);
473 return 0;
474 }
475
476 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
477 {
478 ctlr_info_t *h = seq->private;
479
480 if (*pos > h->highest_lun)
481 return NULL;
482 *pos += 1;
483
484 return pos;
485 }
486
487 static void cciss_seq_stop(struct seq_file *seq, void *v)
488 {
489 ctlr_info_t *h = seq->private;
490
491 /* Only reset h->busy_configuring if we succeeded in setting
492 * it during cciss_seq_start. */
493 if (v == ERR_PTR(-EBUSY))
494 return;
495
496 h->busy_configuring = 0;
497 }
498
499 static const struct seq_operations cciss_seq_ops = {
500 .start = cciss_seq_start,
501 .show = cciss_seq_show,
502 .next = cciss_seq_next,
503 .stop = cciss_seq_stop,
504 };
505
506 static int cciss_seq_open(struct inode *inode, struct file *file)
507 {
508 int ret = seq_open(file, &cciss_seq_ops);
509 struct seq_file *seq = file->private_data;
510
511 if (!ret)
512 seq->private = PDE(inode)->data;
513
514 return ret;
515 }
516
517 static ssize_t
518 cciss_proc_write(struct file *file, const char __user *buf,
519 size_t length, loff_t *ppos)
520 {
521 int err;
522 char *buffer;
523
524 #ifndef CONFIG_CISS_SCSI_TAPE
525 return -EINVAL;
526 #endif
527
528 if (!buf || length > PAGE_SIZE - 1)
529 return -EINVAL;
530
531 buffer = (char *)__get_free_page(GFP_KERNEL);
532 if (!buffer)
533 return -ENOMEM;
534
535 err = -EFAULT;
536 if (copy_from_user(buffer, buf, length))
537 goto out;
538 buffer[length] = '\0';
539
540 #ifdef CONFIG_CISS_SCSI_TAPE
541 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
542 struct seq_file *seq = file->private_data;
543 ctlr_info_t *h = seq->private;
544
545 err = cciss_engage_scsi(h);
546 if (err == 0)
547 err = length;
548 } else
549 #endif /* CONFIG_CISS_SCSI_TAPE */
550 err = -EINVAL;
551 /* might be nice to have "disengage" too, but it's not
552 safely possible. (only 1 module use count, lock issues.) */
553
554 out:
555 free_page((unsigned long)buffer);
556 return err;
557 }
558
559 static const struct file_operations cciss_proc_fops = {
560 .owner = THIS_MODULE,
561 .open = cciss_seq_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = seq_release,
565 .write = cciss_proc_write,
566 };
567
568 static void __devinit cciss_procinit(ctlr_info_t *h)
569 {
570 struct proc_dir_entry *pde;
571
572 if (proc_cciss == NULL)
573 proc_cciss = proc_mkdir("driver/cciss", NULL);
574 if (!proc_cciss)
575 return;
576 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
577 S_IROTH, proc_cciss,
578 &cciss_proc_fops, h);
579 }
580 #endif /* CONFIG_PROC_FS */
581
582 #define MAX_PRODUCT_NAME_LEN 19
583
584 #define to_hba(n) container_of(n, struct ctlr_info, dev)
585 #define to_drv(n) container_of(n, drive_info_struct, dev)
586
587 static ssize_t host_store_rescan(struct device *dev,
588 struct device_attribute *attr,
589 const char *buf, size_t count)
590 {
591 struct ctlr_info *h = to_hba(dev);
592
593 add_to_scan_list(h);
594 wake_up_process(cciss_scan_thread);
595 wait_for_completion_interruptible(&h->scan_wait);
596
597 return count;
598 }
599 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
600
601 static ssize_t dev_show_unique_id(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604 {
605 drive_info_struct *drv = to_drv(dev);
606 struct ctlr_info *h = to_hba(drv->dev.parent);
607 __u8 sn[16];
608 unsigned long flags;
609 int ret = 0;
610
611 spin_lock_irqsave(&h->lock, flags);
612 if (h->busy_configuring)
613 ret = -EBUSY;
614 else
615 memcpy(sn, drv->serial_no, sizeof(sn));
616 spin_unlock_irqrestore(&h->lock, flags);
617
618 if (ret)
619 return ret;
620 else
621 return snprintf(buf, 16 * 2 + 2,
622 "%02X%02X%02X%02X%02X%02X%02X%02X"
623 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
624 sn[0], sn[1], sn[2], sn[3],
625 sn[4], sn[5], sn[6], sn[7],
626 sn[8], sn[9], sn[10], sn[11],
627 sn[12], sn[13], sn[14], sn[15]);
628 }
629 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
630
631 static ssize_t dev_show_vendor(struct device *dev,
632 struct device_attribute *attr,
633 char *buf)
634 {
635 drive_info_struct *drv = to_drv(dev);
636 struct ctlr_info *h = to_hba(drv->dev.parent);
637 char vendor[VENDOR_LEN + 1];
638 unsigned long flags;
639 int ret = 0;
640
641 spin_lock_irqsave(&h->lock, flags);
642 if (h->busy_configuring)
643 ret = -EBUSY;
644 else
645 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
646 spin_unlock_irqrestore(&h->lock, flags);
647
648 if (ret)
649 return ret;
650 else
651 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
652 }
653 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
654
655 static ssize_t dev_show_model(struct device *dev,
656 struct device_attribute *attr,
657 char *buf)
658 {
659 drive_info_struct *drv = to_drv(dev);
660 struct ctlr_info *h = to_hba(drv->dev.parent);
661 char model[MODEL_LEN + 1];
662 unsigned long flags;
663 int ret = 0;
664
665 spin_lock_irqsave(&h->lock, flags);
666 if (h->busy_configuring)
667 ret = -EBUSY;
668 else
669 memcpy(model, drv->model, MODEL_LEN + 1);
670 spin_unlock_irqrestore(&h->lock, flags);
671
672 if (ret)
673 return ret;
674 else
675 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
676 }
677 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
678
679 static ssize_t dev_show_rev(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682 {
683 drive_info_struct *drv = to_drv(dev);
684 struct ctlr_info *h = to_hba(drv->dev.parent);
685 char rev[REV_LEN + 1];
686 unsigned long flags;
687 int ret = 0;
688
689 spin_lock_irqsave(&h->lock, flags);
690 if (h->busy_configuring)
691 ret = -EBUSY;
692 else
693 memcpy(rev, drv->rev, REV_LEN + 1);
694 spin_unlock_irqrestore(&h->lock, flags);
695
696 if (ret)
697 return ret;
698 else
699 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
700 }
701 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
702
703 static ssize_t cciss_show_lunid(struct device *dev,
704 struct device_attribute *attr, char *buf)
705 {
706 drive_info_struct *drv = to_drv(dev);
707 struct ctlr_info *h = to_hba(drv->dev.parent);
708 unsigned long flags;
709 unsigned char lunid[8];
710
711 spin_lock_irqsave(&h->lock, flags);
712 if (h->busy_configuring) {
713 spin_unlock_irqrestore(&h->lock, flags);
714 return -EBUSY;
715 }
716 if (!drv->heads) {
717 spin_unlock_irqrestore(&h->lock, flags);
718 return -ENOTTY;
719 }
720 memcpy(lunid, drv->LunID, sizeof(lunid));
721 spin_unlock_irqrestore(&h->lock, flags);
722 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
723 lunid[0], lunid[1], lunid[2], lunid[3],
724 lunid[4], lunid[5], lunid[6], lunid[7]);
725 }
726 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
727
728 static ssize_t cciss_show_raid_level(struct device *dev,
729 struct device_attribute *attr, char *buf)
730 {
731 drive_info_struct *drv = to_drv(dev);
732 struct ctlr_info *h = to_hba(drv->dev.parent);
733 int raid;
734 unsigned long flags;
735
736 spin_lock_irqsave(&h->lock, flags);
737 if (h->busy_configuring) {
738 spin_unlock_irqrestore(&h->lock, flags);
739 return -EBUSY;
740 }
741 raid = drv->raid_level;
742 spin_unlock_irqrestore(&h->lock, flags);
743 if (raid < 0 || raid > RAID_UNKNOWN)
744 raid = RAID_UNKNOWN;
745
746 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
747 raid_label[raid]);
748 }
749 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
750
751 static ssize_t cciss_show_usage_count(struct device *dev,
752 struct device_attribute *attr, char *buf)
753 {
754 drive_info_struct *drv = to_drv(dev);
755 struct ctlr_info *h = to_hba(drv->dev.parent);
756 unsigned long flags;
757 int count;
758
759 spin_lock_irqsave(&h->lock, flags);
760 if (h->busy_configuring) {
761 spin_unlock_irqrestore(&h->lock, flags);
762 return -EBUSY;
763 }
764 count = drv->usage_count;
765 spin_unlock_irqrestore(&h->lock, flags);
766 return snprintf(buf, 20, "%d\n", count);
767 }
768 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
769
770 static struct attribute *cciss_host_attrs[] = {
771 &dev_attr_rescan.attr,
772 NULL
773 };
774
775 static struct attribute_group cciss_host_attr_group = {
776 .attrs = cciss_host_attrs,
777 };
778
779 static const struct attribute_group *cciss_host_attr_groups[] = {
780 &cciss_host_attr_group,
781 NULL
782 };
783
784 static struct device_type cciss_host_type = {
785 .name = "cciss_host",
786 .groups = cciss_host_attr_groups,
787 .release = cciss_hba_release,
788 };
789
790 static struct attribute *cciss_dev_attrs[] = {
791 &dev_attr_unique_id.attr,
792 &dev_attr_model.attr,
793 &dev_attr_vendor.attr,
794 &dev_attr_rev.attr,
795 &dev_attr_lunid.attr,
796 &dev_attr_raid_level.attr,
797 &dev_attr_usage_count.attr,
798 NULL
799 };
800
801 static struct attribute_group cciss_dev_attr_group = {
802 .attrs = cciss_dev_attrs,
803 };
804
805 static const struct attribute_group *cciss_dev_attr_groups[] = {
806 &cciss_dev_attr_group,
807 NULL
808 };
809
810 static struct device_type cciss_dev_type = {
811 .name = "cciss_device",
812 .groups = cciss_dev_attr_groups,
813 .release = cciss_device_release,
814 };
815
816 static struct bus_type cciss_bus_type = {
817 .name = "cciss",
818 };
819
820 /*
821 * cciss_hba_release is called when the reference count
822 * of h->dev goes to zero.
823 */
824 static void cciss_hba_release(struct device *dev)
825 {
826 /*
827 * nothing to do, but need this to avoid a warning
828 * about not having a release handler from lib/kref.c.
829 */
830 }
831
832 /*
833 * Initialize sysfs entry for each controller. This sets up and registers
834 * the 'cciss#' directory for each individual controller under
835 * /sys/bus/pci/devices/<dev>/.
836 */
837 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
838 {
839 device_initialize(&h->dev);
840 h->dev.type = &cciss_host_type;
841 h->dev.bus = &cciss_bus_type;
842 dev_set_name(&h->dev, "%s", h->devname);
843 h->dev.parent = &h->pdev->dev;
844
845 return device_add(&h->dev);
846 }
847
848 /*
849 * Remove sysfs entries for an hba.
850 */
851 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
852 {
853 device_del(&h->dev);
854 put_device(&h->dev); /* final put. */
855 }
856
857 /* cciss_device_release is called when the reference count
858 * of h->drv[x]dev goes to zero.
859 */
860 static void cciss_device_release(struct device *dev)
861 {
862 drive_info_struct *drv = to_drv(dev);
863 kfree(drv);
864 }
865
866 /*
867 * Initialize sysfs for each logical drive. This sets up and registers
868 * the 'c#d#' directory for each individual logical drive under
869 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
870 * /sys/block/cciss!c#d# to this entry.
871 */
872 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
873 int drv_index)
874 {
875 struct device *dev;
876
877 if (h->drv[drv_index]->device_initialized)
878 return 0;
879
880 dev = &h->drv[drv_index]->dev;
881 device_initialize(dev);
882 dev->type = &cciss_dev_type;
883 dev->bus = &cciss_bus_type;
884 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
885 dev->parent = &h->dev;
886 h->drv[drv_index]->device_initialized = 1;
887 return device_add(dev);
888 }
889
890 /*
891 * Remove sysfs entries for a logical drive.
892 */
893 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
894 int ctlr_exiting)
895 {
896 struct device *dev = &h->drv[drv_index]->dev;
897
898 /* special case for c*d0, we only destroy it on controller exit */
899 if (drv_index == 0 && !ctlr_exiting)
900 return;
901
902 device_del(dev);
903 put_device(dev); /* the "final" put. */
904 h->drv[drv_index] = NULL;
905 }
906
907 /*
908 * For operations that cannot sleep, a command block is allocated at init,
909 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
910 * which ones are free or in use.
911 */
912 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
913 {
914 CommandList_struct *c;
915 int i;
916 u64bit temp64;
917 dma_addr_t cmd_dma_handle, err_dma_handle;
918
919 do {
920 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
921 if (i == h->nr_cmds)
922 return NULL;
923 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
924 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
925 c = h->cmd_pool + i;
926 memset(c, 0, sizeof(CommandList_struct));
927 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
928 c->err_info = h->errinfo_pool + i;
929 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
930 err_dma_handle = h->errinfo_pool_dhandle
931 + i * sizeof(ErrorInfo_struct);
932 h->nr_allocs++;
933
934 c->cmdindex = i;
935
936 INIT_HLIST_NODE(&c->list);
937 c->busaddr = (__u32) cmd_dma_handle;
938 temp64.val = (__u64) err_dma_handle;
939 c->ErrDesc.Addr.lower = temp64.val32.lower;
940 c->ErrDesc.Addr.upper = temp64.val32.upper;
941 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
942
943 c->ctlr = h->ctlr;
944 return c;
945 }
946
947 /* allocate a command using pci_alloc_consistent, used for ioctls,
948 * etc., not for the main i/o path.
949 */
950 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
951 {
952 CommandList_struct *c;
953 u64bit temp64;
954 dma_addr_t cmd_dma_handle, err_dma_handle;
955
956 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
957 sizeof(CommandList_struct), &cmd_dma_handle);
958 if (c == NULL)
959 return NULL;
960 memset(c, 0, sizeof(CommandList_struct));
961
962 c->cmdindex = -1;
963
964 c->err_info = (ErrorInfo_struct *)
965 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
966 &err_dma_handle);
967
968 if (c->err_info == NULL) {
969 pci_free_consistent(h->pdev,
970 sizeof(CommandList_struct), c, cmd_dma_handle);
971 return NULL;
972 }
973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
974
975 INIT_HLIST_NODE(&c->list);
976 c->busaddr = (__u32) cmd_dma_handle;
977 temp64.val = (__u64) err_dma_handle;
978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
981
982 c->ctlr = h->ctlr;
983 return c;
984 }
985
986 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
987 {
988 int i;
989
990 i = c - h->cmd_pool;
991 clear_bit(i & (BITS_PER_LONG - 1),
992 h->cmd_pool_bits + (i / BITS_PER_LONG));
993 h->nr_frees++;
994 }
995
996 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
997 {
998 u64bit temp64;
999
1000 temp64.val32.lower = c->ErrDesc.Addr.lower;
1001 temp64.val32.upper = c->ErrDesc.Addr.upper;
1002 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1003 c->err_info, (dma_addr_t) temp64.val);
1004 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1005 c, (dma_addr_t) c->busaddr);
1006 }
1007
1008 static inline ctlr_info_t *get_host(struct gendisk *disk)
1009 {
1010 return disk->queue->queuedata;
1011 }
1012
1013 static inline drive_info_struct *get_drv(struct gendisk *disk)
1014 {
1015 return disk->private_data;
1016 }
1017
1018 /*
1019 * Open. Make sure the device is really there.
1020 */
1021 static int cciss_open(struct block_device *bdev, fmode_t mode)
1022 {
1023 ctlr_info_t *h = get_host(bdev->bd_disk);
1024 drive_info_struct *drv = get_drv(bdev->bd_disk);
1025
1026 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1027 if (drv->busy_configuring)
1028 return -EBUSY;
1029 /*
1030 * Root is allowed to open raw volume zero even if it's not configured
1031 * so array config can still work. Root is also allowed to open any
1032 * volume that has a LUN ID, so it can issue IOCTL to reread the
1033 * disk information. I don't think I really like this
1034 * but I'm already using way to many device nodes to claim another one
1035 * for "raw controller".
1036 */
1037 if (drv->heads == 0) {
1038 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1039 /* if not node 0 make sure it is a partition = 0 */
1040 if (MINOR(bdev->bd_dev) & 0x0f) {
1041 return -ENXIO;
1042 /* if it is, make sure we have a LUN ID */
1043 } else if (memcmp(drv->LunID, CTLR_LUNID,
1044 sizeof(drv->LunID))) {
1045 return -ENXIO;
1046 }
1047 }
1048 if (!capable(CAP_SYS_ADMIN))
1049 return -EPERM;
1050 }
1051 drv->usage_count++;
1052 h->usage_count++;
1053 return 0;
1054 }
1055
1056 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1057 {
1058 int ret;
1059
1060 lock_kernel();
1061 ret = cciss_open(bdev, mode);
1062 unlock_kernel();
1063
1064 return ret;
1065 }
1066
1067 /*
1068 * Close. Sync first.
1069 */
1070 static int cciss_release(struct gendisk *disk, fmode_t mode)
1071 {
1072 ctlr_info_t *h;
1073 drive_info_struct *drv;
1074
1075 lock_kernel();
1076 h = get_host(disk);
1077 drv = get_drv(disk);
1078 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1079 drv->usage_count--;
1080 h->usage_count--;
1081 unlock_kernel();
1082 return 0;
1083 }
1084
1085 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1086 unsigned cmd, unsigned long arg)
1087 {
1088 int ret;
1089 lock_kernel();
1090 ret = cciss_ioctl(bdev, mode, cmd, arg);
1091 unlock_kernel();
1092 return ret;
1093 }
1094
1095 #ifdef CONFIG_COMPAT
1096
1097 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1098 unsigned cmd, unsigned long arg);
1099 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1101
1102 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1103 unsigned cmd, unsigned long arg)
1104 {
1105 switch (cmd) {
1106 case CCISS_GETPCIINFO:
1107 case CCISS_GETINTINFO:
1108 case CCISS_SETINTINFO:
1109 case CCISS_GETNODENAME:
1110 case CCISS_SETNODENAME:
1111 case CCISS_GETHEARTBEAT:
1112 case CCISS_GETBUSTYPES:
1113 case CCISS_GETFIRMVER:
1114 case CCISS_GETDRIVVER:
1115 case CCISS_REVALIDVOLS:
1116 case CCISS_DEREGDISK:
1117 case CCISS_REGNEWDISK:
1118 case CCISS_REGNEWD:
1119 case CCISS_RESCANDISK:
1120 case CCISS_GETLUNINFO:
1121 return do_ioctl(bdev, mode, cmd, arg);
1122
1123 case CCISS_PASSTHRU32:
1124 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1125 case CCISS_BIG_PASSTHRU32:
1126 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1127
1128 default:
1129 return -ENOIOCTLCMD;
1130 }
1131 }
1132
1133 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1134 unsigned cmd, unsigned long arg)
1135 {
1136 IOCTL32_Command_struct __user *arg32 =
1137 (IOCTL32_Command_struct __user *) arg;
1138 IOCTL_Command_struct arg64;
1139 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1140 int err;
1141 u32 cp;
1142
1143 err = 0;
1144 err |=
1145 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1146 sizeof(arg64.LUN_info));
1147 err |=
1148 copy_from_user(&arg64.Request, &arg32->Request,
1149 sizeof(arg64.Request));
1150 err |=
1151 copy_from_user(&arg64.error_info, &arg32->error_info,
1152 sizeof(arg64.error_info));
1153 err |= get_user(arg64.buf_size, &arg32->buf_size);
1154 err |= get_user(cp, &arg32->buf);
1155 arg64.buf = compat_ptr(cp);
1156 err |= copy_to_user(p, &arg64, sizeof(arg64));
1157
1158 if (err)
1159 return -EFAULT;
1160
1161 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1162 if (err)
1163 return err;
1164 err |=
1165 copy_in_user(&arg32->error_info, &p->error_info,
1166 sizeof(arg32->error_info));
1167 if (err)
1168 return -EFAULT;
1169 return err;
1170 }
1171
1172 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1174 {
1175 BIG_IOCTL32_Command_struct __user *arg32 =
1176 (BIG_IOCTL32_Command_struct __user *) arg;
1177 BIG_IOCTL_Command_struct arg64;
1178 BIG_IOCTL_Command_struct __user *p =
1179 compat_alloc_user_space(sizeof(arg64));
1180 int err;
1181 u32 cp;
1182
1183 err = 0;
1184 err |=
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1187 err |=
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1190 err |=
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1195 err |= get_user(cp, &arg32->buf);
1196 arg64.buf = compat_ptr(cp);
1197 err |= copy_to_user(p, &arg64, sizeof(arg64));
1198
1199 if (err)
1200 return -EFAULT;
1201
1202 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1203 if (err)
1204 return err;
1205 err |=
1206 copy_in_user(&arg32->error_info, &p->error_info,
1207 sizeof(arg32->error_info));
1208 if (err)
1209 return -EFAULT;
1210 return err;
1211 }
1212 #endif
1213
1214 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1215 {
1216 drive_info_struct *drv = get_drv(bdev->bd_disk);
1217
1218 if (!drv->cylinders)
1219 return -ENXIO;
1220
1221 geo->heads = drv->heads;
1222 geo->sectors = drv->sectors;
1223 geo->cylinders = drv->cylinders;
1224 return 0;
1225 }
1226
1227 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1228 {
1229 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1230 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1231 (void)check_for_unit_attention(h, c);
1232 }
1233 /*
1234 * ioctl
1235 */
1236 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1237 unsigned int cmd, unsigned long arg)
1238 {
1239 struct gendisk *disk = bdev->bd_disk;
1240 ctlr_info_t *h = get_host(disk);
1241 drive_info_struct *drv = get_drv(disk);
1242 void __user *argp = (void __user *)arg;
1243
1244 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1245 cmd, arg);
1246 switch (cmd) {
1247 case CCISS_GETPCIINFO:
1248 {
1249 cciss_pci_info_struct pciinfo;
1250
1251 if (!arg)
1252 return -EINVAL;
1253 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1254 pciinfo.bus = h->pdev->bus->number;
1255 pciinfo.dev_fn = h->pdev->devfn;
1256 pciinfo.board_id = h->board_id;
1257 if (copy_to_user
1258 (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1259 return -EFAULT;
1260 return 0;
1261 }
1262 case CCISS_GETINTINFO:
1263 {
1264 cciss_coalint_struct intinfo;
1265 if (!arg)
1266 return -EINVAL;
1267 intinfo.delay =
1268 readl(&h->cfgtable->HostWrite.CoalIntDelay);
1269 intinfo.count =
1270 readl(&h->cfgtable->HostWrite.CoalIntCount);
1271 if (copy_to_user
1272 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1273 return -EFAULT;
1274 return 0;
1275 }
1276 case CCISS_SETINTINFO:
1277 {
1278 cciss_coalint_struct intinfo;
1279 unsigned long flags;
1280 int i;
1281
1282 if (!arg)
1283 return -EINVAL;
1284 if (!capable(CAP_SYS_ADMIN))
1285 return -EPERM;
1286 if (copy_from_user
1287 (&intinfo, argp, sizeof(cciss_coalint_struct)))
1288 return -EFAULT;
1289 if ((intinfo.delay == 0) && (intinfo.count == 0))
1290 return -EINVAL;
1291 spin_lock_irqsave(&h->lock, flags);
1292 /* Update the field, and then ring the doorbell */
1293 writel(intinfo.delay,
1294 &(h->cfgtable->HostWrite.CoalIntDelay));
1295 writel(intinfo.count,
1296 &(h->cfgtable->HostWrite.CoalIntCount));
1297 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1298
1299 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1300 if (!(readl(h->vaddr + SA5_DOORBELL)
1301 & CFGTBL_ChangeReq))
1302 break;
1303 /* delay and try again */
1304 udelay(1000);
1305 }
1306 spin_unlock_irqrestore(&h->lock, flags);
1307 if (i >= MAX_IOCTL_CONFIG_WAIT)
1308 return -EAGAIN;
1309 return 0;
1310 }
1311 case CCISS_GETNODENAME:
1312 {
1313 NodeName_type NodeName;
1314 int i;
1315
1316 if (!arg)
1317 return -EINVAL;
1318 for (i = 0; i < 16; i++)
1319 NodeName[i] =
1320 readb(&h->cfgtable->ServerName[i]);
1321 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1322 return -EFAULT;
1323 return 0;
1324 }
1325 case CCISS_SETNODENAME:
1326 {
1327 NodeName_type NodeName;
1328 unsigned long flags;
1329 int i;
1330
1331 if (!arg)
1332 return -EINVAL;
1333 if (!capable(CAP_SYS_ADMIN))
1334 return -EPERM;
1335
1336 if (copy_from_user
1337 (NodeName, argp, sizeof(NodeName_type)))
1338 return -EFAULT;
1339
1340 spin_lock_irqsave(&h->lock, flags);
1341
1342 /* Update the field, and then ring the doorbell */
1343 for (i = 0; i < 16; i++)
1344 writeb(NodeName[i],
1345 &h->cfgtable->ServerName[i]);
1346
1347 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1348
1349 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1350 if (!(readl(h->vaddr + SA5_DOORBELL)
1351 & CFGTBL_ChangeReq))
1352 break;
1353 /* delay and try again */
1354 udelay(1000);
1355 }
1356 spin_unlock_irqrestore(&h->lock, flags);
1357 if (i >= MAX_IOCTL_CONFIG_WAIT)
1358 return -EAGAIN;
1359 return 0;
1360 }
1361
1362 case CCISS_GETHEARTBEAT:
1363 {
1364 Heartbeat_type heartbeat;
1365
1366 if (!arg)
1367 return -EINVAL;
1368 heartbeat = readl(&h->cfgtable->HeartBeat);
1369 if (copy_to_user
1370 (argp, &heartbeat, sizeof(Heartbeat_type)))
1371 return -EFAULT;
1372 return 0;
1373 }
1374 case CCISS_GETBUSTYPES:
1375 {
1376 BusTypes_type BusTypes;
1377
1378 if (!arg)
1379 return -EINVAL;
1380 BusTypes = readl(&h->cfgtable->BusTypes);
1381 if (copy_to_user
1382 (argp, &BusTypes, sizeof(BusTypes_type)))
1383 return -EFAULT;
1384 return 0;
1385 }
1386 case CCISS_GETFIRMVER:
1387 {
1388 FirmwareVer_type firmware;
1389
1390 if (!arg)
1391 return -EINVAL;
1392 memcpy(firmware, h->firm_ver, 4);
1393
1394 if (copy_to_user
1395 (argp, firmware, sizeof(FirmwareVer_type)))
1396 return -EFAULT;
1397 return 0;
1398 }
1399 case CCISS_GETDRIVVER:
1400 {
1401 DriverVer_type DriverVer = DRIVER_VERSION;
1402
1403 if (!arg)
1404 return -EINVAL;
1405
1406 if (copy_to_user
1407 (argp, &DriverVer, sizeof(DriverVer_type)))
1408 return -EFAULT;
1409 return 0;
1410 }
1411
1412 case CCISS_DEREGDISK:
1413 case CCISS_REGNEWD:
1414 case CCISS_REVALIDVOLS:
1415 return rebuild_lun_table(h, 0, 1);
1416
1417 case CCISS_GETLUNINFO:{
1418 LogvolInfo_struct luninfo;
1419
1420 memcpy(&luninfo.LunID, drv->LunID,
1421 sizeof(luninfo.LunID));
1422 luninfo.num_opens = drv->usage_count;
1423 luninfo.num_parts = 0;
1424 if (copy_to_user(argp, &luninfo,
1425 sizeof(LogvolInfo_struct)))
1426 return -EFAULT;
1427 return 0;
1428 }
1429 case CCISS_PASSTHRU:
1430 {
1431 IOCTL_Command_struct iocommand;
1432 CommandList_struct *c;
1433 char *buff = NULL;
1434 u64bit temp64;
1435 DECLARE_COMPLETION_ONSTACK(wait);
1436
1437 if (!arg)
1438 return -EINVAL;
1439
1440 if (!capable(CAP_SYS_RAWIO))
1441 return -EPERM;
1442
1443 if (copy_from_user
1444 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1445 return -EFAULT;
1446 if ((iocommand.buf_size < 1) &&
1447 (iocommand.Request.Type.Direction != XFER_NONE)) {
1448 return -EINVAL;
1449 }
1450 #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
1451 /* Check kmalloc limits */
1452 if (iocommand.buf_size > 128000)
1453 return -EINVAL;
1454 #endif
1455 if (iocommand.buf_size > 0) {
1456 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1457 if (buff == NULL)
1458 return -EFAULT;
1459 }
1460 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1461 /* Copy the data into the buffer we created */
1462 if (copy_from_user
1463 (buff, iocommand.buf, iocommand.buf_size)) {
1464 kfree(buff);
1465 return -EFAULT;
1466 }
1467 } else {
1468 memset(buff, 0, iocommand.buf_size);
1469 }
1470 c = cmd_special_alloc(h);
1471 if (!c) {
1472 kfree(buff);
1473 return -ENOMEM;
1474 }
1475 /* Fill in the command type */
1476 c->cmd_type = CMD_IOCTL_PEND;
1477 /* Fill in Command Header */
1478 c->Header.ReplyQueue = 0; /* unused in simple mode */
1479 if (iocommand.buf_size > 0) /* buffer to fill */
1480 {
1481 c->Header.SGList = 1;
1482 c->Header.SGTotal = 1;
1483 } else /* no buffers to fill */
1484 {
1485 c->Header.SGList = 0;
1486 c->Header.SGTotal = 0;
1487 }
1488 c->Header.LUN = iocommand.LUN_info;
1489 /* use the kernel address the cmd block for tag */
1490 c->Header.Tag.lower = c->busaddr;
1491
1492 /* Fill in Request block */
1493 c->Request = iocommand.Request;
1494
1495 /* Fill in the scatter gather information */
1496 if (iocommand.buf_size > 0) {
1497 temp64.val = pci_map_single(h->pdev, buff,
1498 iocommand.buf_size,
1499 PCI_DMA_BIDIRECTIONAL);
1500 c->SG[0].Addr.lower = temp64.val32.lower;
1501 c->SG[0].Addr.upper = temp64.val32.upper;
1502 c->SG[0].Len = iocommand.buf_size;
1503 c->SG[0].Ext = 0; /* we are not chaining */
1504 }
1505 c->waiting = &wait;
1506
1507 enqueue_cmd_and_start_io(h, c);
1508 wait_for_completion(&wait);
1509
1510 /* unlock the buffers from DMA */
1511 temp64.val32.lower = c->SG[0].Addr.lower;
1512 temp64.val32.upper = c->SG[0].Addr.upper;
1513 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
1514 iocommand.buf_size,
1515 PCI_DMA_BIDIRECTIONAL);
1516
1517 check_ioctl_unit_attention(h, c);
1518
1519 /* Copy the error information out */
1520 iocommand.error_info = *(c->err_info);
1521 if (copy_to_user
1522 (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1523 kfree(buff);
1524 cmd_special_free(h, c);
1525 return -EFAULT;
1526 }
1527
1528 if (iocommand.Request.Type.Direction == XFER_READ) {
1529 /* Copy the data out of the buffer we created */
1530 if (copy_to_user
1531 (iocommand.buf, buff, iocommand.buf_size)) {
1532 kfree(buff);
1533 cmd_special_free(h, c);
1534 return -EFAULT;
1535 }
1536 }
1537 kfree(buff);
1538 cmd_special_free(h, c);
1539 return 0;
1540 }
1541 case CCISS_BIG_PASSTHRU:{
1542 BIG_IOCTL_Command_struct *ioc;
1543 CommandList_struct *c;
1544 unsigned char **buff = NULL;
1545 int *buff_size = NULL;
1546 u64bit temp64;
1547 BYTE sg_used = 0;
1548 int status = 0;
1549 int i;
1550 DECLARE_COMPLETION_ONSTACK(wait);
1551 __u32 left;
1552 __u32 sz;
1553 BYTE __user *data_ptr;
1554
1555 if (!arg)
1556 return -EINVAL;
1557 if (!capable(CAP_SYS_RAWIO))
1558 return -EPERM;
1559 ioc = (BIG_IOCTL_Command_struct *)
1560 kmalloc(sizeof(*ioc), GFP_KERNEL);
1561 if (!ioc) {
1562 status = -ENOMEM;
1563 goto cleanup1;
1564 }
1565 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1566 status = -EFAULT;
1567 goto cleanup1;
1568 }
1569 if ((ioc->buf_size < 1) &&
1570 (ioc->Request.Type.Direction != XFER_NONE)) {
1571 status = -EINVAL;
1572 goto cleanup1;
1573 }
1574 /* Check kmalloc limits using all SGs */
1575 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1576 status = -EINVAL;
1577 goto cleanup1;
1578 }
1579 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1580 status = -EINVAL;
1581 goto cleanup1;
1582 }
1583 buff =
1584 kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1585 if (!buff) {
1586 status = -ENOMEM;
1587 goto cleanup1;
1588 }
1589 buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
1590 GFP_KERNEL);
1591 if (!buff_size) {
1592 status = -ENOMEM;
1593 goto cleanup1;
1594 }
1595 left = ioc->buf_size;
1596 data_ptr = ioc->buf;
1597 while (left) {
1598 sz = (left >
1599 ioc->malloc_size) ? ioc->
1600 malloc_size : left;
1601 buff_size[sg_used] = sz;
1602 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1603 if (buff[sg_used] == NULL) {
1604 status = -ENOMEM;
1605 goto cleanup1;
1606 }
1607 if (ioc->Request.Type.Direction == XFER_WRITE) {
1608 if (copy_from_user
1609 (buff[sg_used], data_ptr, sz)) {
1610 status = -EFAULT;
1611 goto cleanup1;
1612 }
1613 } else {
1614 memset(buff[sg_used], 0, sz);
1615 }
1616 left -= sz;
1617 data_ptr += sz;
1618 sg_used++;
1619 }
1620 c = cmd_special_alloc(h);
1621 if (!c) {
1622 status = -ENOMEM;
1623 goto cleanup1;
1624 }
1625 c->cmd_type = CMD_IOCTL_PEND;
1626 c->Header.ReplyQueue = 0;
1627
1628 if (ioc->buf_size > 0) {
1629 c->Header.SGList = sg_used;
1630 c->Header.SGTotal = sg_used;
1631 } else {
1632 c->Header.SGList = 0;
1633 c->Header.SGTotal = 0;
1634 }
1635 c->Header.LUN = ioc->LUN_info;
1636 c->Header.Tag.lower = c->busaddr;
1637
1638 c->Request = ioc->Request;
1639 if (ioc->buf_size > 0) {
1640 for (i = 0; i < sg_used; i++) {
1641 temp64.val =
1642 pci_map_single(h->pdev, buff[i],
1643 buff_size[i],
1644 PCI_DMA_BIDIRECTIONAL);
1645 c->SG[i].Addr.lower =
1646 temp64.val32.lower;
1647 c->SG[i].Addr.upper =
1648 temp64.val32.upper;
1649 c->SG[i].Len = buff_size[i];
1650 c->SG[i].Ext = 0; /* we are not chaining */
1651 }
1652 }
1653 c->waiting = &wait;
1654 enqueue_cmd_and_start_io(h, c);
1655 wait_for_completion(&wait);
1656 /* unlock the buffers from DMA */
1657 for (i = 0; i < sg_used; i++) {
1658 temp64.val32.lower = c->SG[i].Addr.lower;
1659 temp64.val32.upper = c->SG[i].Addr.upper;
1660 pci_unmap_single(h->pdev,
1661 (dma_addr_t) temp64.val, buff_size[i],
1662 PCI_DMA_BIDIRECTIONAL);
1663 }
1664 check_ioctl_unit_attention(h, c);
1665 /* Copy the error information out */
1666 ioc->error_info = *(c->err_info);
1667 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1668 cmd_special_free(h, c);
1669 status = -EFAULT;
1670 goto cleanup1;
1671 }
1672 if (ioc->Request.Type.Direction == XFER_READ) {
1673 /* Copy the data out of the buffer we created */
1674 BYTE __user *ptr = ioc->buf;
1675 for (i = 0; i < sg_used; i++) {
1676 if (copy_to_user
1677 (ptr, buff[i], buff_size[i])) {
1678 cmd_special_free(h, c);
1679 status = -EFAULT;
1680 goto cleanup1;
1681 }
1682 ptr += buff_size[i];
1683 }
1684 }
1685 cmd_special_free(h, c);
1686 status = 0;
1687 cleanup1:
1688 if (buff) {
1689 for (i = 0; i < sg_used; i++)
1690 kfree(buff[i]);
1691 kfree(buff);
1692 }
1693 kfree(buff_size);
1694 kfree(ioc);
1695 return status;
1696 }
1697
1698 /* scsi_cmd_ioctl handles these, below, though some are not */
1699 /* very meaningful for cciss. SG_IO is the main one people want. */
1700
1701 case SG_GET_VERSION_NUM:
1702 case SG_SET_TIMEOUT:
1703 case SG_GET_TIMEOUT:
1704 case SG_GET_RESERVED_SIZE:
1705 case SG_SET_RESERVED_SIZE:
1706 case SG_EMULATED_HOST:
1707 case SG_IO:
1708 case SCSI_IOCTL_SEND_COMMAND:
1709 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
1710
1711 /* scsi_cmd_ioctl would normally handle these, below, but */
1712 /* they aren't a good fit for cciss, as CD-ROMs are */
1713 /* not supported, and we don't have any bus/target/lun */
1714 /* which we present to the kernel. */
1715
1716 case CDROM_SEND_PACKET:
1717 case CDROMCLOSETRAY:
1718 case CDROMEJECT:
1719 case SCSI_IOCTL_GET_IDLUN:
1720 case SCSI_IOCTL_GET_BUS_NUMBER:
1721 default:
1722 return -ENOTTY;
1723 }
1724 }
1725
1726 static void cciss_check_queues(ctlr_info_t *h)
1727 {
1728 int start_queue = h->next_to_run;
1729 int i;
1730
1731 /* check to see if we have maxed out the number of commands that can
1732 * be placed on the queue. If so then exit. We do this check here
1733 * in case the interrupt we serviced was from an ioctl and did not
1734 * free any new commands.
1735 */
1736 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1737 return;
1738
1739 /* We have room on the queue for more commands. Now we need to queue
1740 * them up. We will also keep track of the next queue to run so
1741 * that every queue gets a chance to be started first.
1742 */
1743 for (i = 0; i < h->highest_lun + 1; i++) {
1744 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1745 /* make sure the disk has been added and the drive is real
1746 * because this can be called from the middle of init_one.
1747 */
1748 if (!h->drv[curr_queue])
1749 continue;
1750 if (!(h->drv[curr_queue]->queue) ||
1751 !(h->drv[curr_queue]->heads))
1752 continue;
1753 blk_start_queue(h->gendisk[curr_queue]->queue);
1754
1755 /* check to see if we have maxed out the number of commands
1756 * that can be placed on the queue.
1757 */
1758 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1759 if (curr_queue == start_queue) {
1760 h->next_to_run =
1761 (start_queue + 1) % (h->highest_lun + 1);
1762 break;
1763 } else {
1764 h->next_to_run = curr_queue;
1765 break;
1766 }
1767 }
1768 }
1769 }
1770
1771 static void cciss_softirq_done(struct request *rq)
1772 {
1773 CommandList_struct *c = rq->completion_data;
1774 ctlr_info_t *h = hba[c->ctlr];
1775 SGDescriptor_struct *curr_sg = c->SG;
1776 u64bit temp64;
1777 unsigned long flags;
1778 int i, ddir;
1779 int sg_index = 0;
1780
1781 if (c->Request.Type.Direction == XFER_READ)
1782 ddir = PCI_DMA_FROMDEVICE;
1783 else
1784 ddir = PCI_DMA_TODEVICE;
1785
1786 /* command did not need to be retried */
1787 /* unmap the DMA mapping for all the scatter gather elements */
1788 for (i = 0; i < c->Header.SGList; i++) {
1789 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1790 cciss_unmap_sg_chain_block(h, c);
1791 /* Point to the next block */
1792 curr_sg = h->cmd_sg_list[c->cmdindex];
1793 sg_index = 0;
1794 }
1795 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1796 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1797 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1798 ddir);
1799 ++sg_index;
1800 }
1801
1802 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1803
1804 /* set the residual count for pc requests */
1805 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1806 rq->resid_len = c->err_info->ResidualCnt;
1807
1808 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1809
1810 spin_lock_irqsave(&h->lock, flags);
1811 cmd_free(h, c);
1812 cciss_check_queues(h);
1813 spin_unlock_irqrestore(&h->lock, flags);
1814 }
1815
1816 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1817 unsigned char scsi3addr[], uint32_t log_unit)
1818 {
1819 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1820 sizeof(h->drv[log_unit]->LunID));
1821 }
1822
1823 /* This function gets the SCSI vendor, model, and revision of a logical drive
1824 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1825 * they cannot be read.
1826 */
1827 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1828 char *vendor, char *model, char *rev)
1829 {
1830 int rc;
1831 InquiryData_struct *inq_buf;
1832 unsigned char scsi3addr[8];
1833
1834 *vendor = '\0';
1835 *model = '\0';
1836 *rev = '\0';
1837
1838 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1839 if (!inq_buf)
1840 return;
1841
1842 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1843 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1844 scsi3addr, TYPE_CMD);
1845 if (rc == IO_OK) {
1846 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1847 vendor[VENDOR_LEN] = '\0';
1848 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1849 model[MODEL_LEN] = '\0';
1850 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1851 rev[REV_LEN] = '\0';
1852 }
1853
1854 kfree(inq_buf);
1855 return;
1856 }
1857
1858 /* This function gets the serial number of a logical drive via
1859 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1860 * number cannot be had, for whatever reason, 16 bytes of 0xff
1861 * are returned instead.
1862 */
1863 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1864 unsigned char *serial_no, int buflen)
1865 {
1866 #define PAGE_83_INQ_BYTES 64
1867 int rc;
1868 unsigned char *buf;
1869 unsigned char scsi3addr[8];
1870
1871 if (buflen > 16)
1872 buflen = 16;
1873 memset(serial_no, 0xff, buflen);
1874 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1875 if (!buf)
1876 return;
1877 memset(serial_no, 0, buflen);
1878 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1879 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1880 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1881 if (rc == IO_OK)
1882 memcpy(serial_no, &buf[8], buflen);
1883 kfree(buf);
1884 return;
1885 }
1886
1887 /*
1888 * cciss_add_disk sets up the block device queue for a logical drive
1889 */
1890 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1891 int drv_index)
1892 {
1893 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1894 if (!disk->queue)
1895 goto init_queue_failure;
1896 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1897 disk->major = h->major;
1898 disk->first_minor = drv_index << NWD_SHIFT;
1899 disk->fops = &cciss_fops;
1900 if (cciss_create_ld_sysfs_entry(h, drv_index))
1901 goto cleanup_queue;
1902 disk->private_data = h->drv[drv_index];
1903 disk->driverfs_dev = &h->drv[drv_index]->dev;
1904
1905 /* Set up queue information */
1906 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1907
1908 /* This is a hardware imposed limit. */
1909 blk_queue_max_segments(disk->queue, h->maxsgentries);
1910
1911 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1912
1913 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1914
1915 disk->queue->queuedata = h;
1916
1917 blk_queue_logical_block_size(disk->queue,
1918 h->drv[drv_index]->block_size);
1919
1920 /* Make sure all queue data is written out before */
1921 /* setting h->drv[drv_index]->queue, as setting this */
1922 /* allows the interrupt handler to start the queue */
1923 wmb();
1924 h->drv[drv_index]->queue = disk->queue;
1925 add_disk(disk);
1926 return 0;
1927
1928 cleanup_queue:
1929 blk_cleanup_queue(disk->queue);
1930 disk->queue = NULL;
1931 init_queue_failure:
1932 return -1;
1933 }
1934
1935 /* This function will check the usage_count of the drive to be updated/added.
1936 * If the usage_count is zero and it is a heretofore unknown drive, or,
1937 * the drive's capacity, geometry, or serial number has changed,
1938 * then the drive information will be updated and the disk will be
1939 * re-registered with the kernel. If these conditions don't hold,
1940 * then it will be left alone for the next reboot. The exception to this
1941 * is disk 0 which will always be left registered with the kernel since it
1942 * is also the controller node. Any changes to disk 0 will show up on
1943 * the next reboot.
1944 */
1945 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1946 int first_time, int via_ioctl)
1947 {
1948 struct gendisk *disk;
1949 InquiryData_struct *inq_buff = NULL;
1950 unsigned int block_size;
1951 sector_t total_size;
1952 unsigned long flags = 0;
1953 int ret = 0;
1954 drive_info_struct *drvinfo;
1955
1956 /* Get information about the disk and modify the driver structure */
1957 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1958 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1959 if (inq_buff == NULL || drvinfo == NULL)
1960 goto mem_msg;
1961
1962 /* testing to see if 16-byte CDBs are already being used */
1963 if (h->cciss_read == CCISS_READ_16) {
1964 cciss_read_capacity_16(h, drv_index,
1965 &total_size, &block_size);
1966
1967 } else {
1968 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1969 /* if read_capacity returns all F's this volume is >2TB */
1970 /* in size so we switch to 16-byte CDB's for all */
1971 /* read/write ops */
1972 if (total_size == 0xFFFFFFFFULL) {
1973 cciss_read_capacity_16(h, drv_index,
1974 &total_size, &block_size);
1975 h->cciss_read = CCISS_READ_16;
1976 h->cciss_write = CCISS_WRITE_16;
1977 } else {
1978 h->cciss_read = CCISS_READ_10;
1979 h->cciss_write = CCISS_WRITE_10;
1980 }
1981 }
1982
1983 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
1984 inq_buff, drvinfo);
1985 drvinfo->block_size = block_size;
1986 drvinfo->nr_blocks = total_size + 1;
1987
1988 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
1989 drvinfo->model, drvinfo->rev);
1990 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
1991 sizeof(drvinfo->serial_no));
1992 /* Save the lunid in case we deregister the disk, below. */
1993 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1994 sizeof(drvinfo->LunID));
1995
1996 /* Is it the same disk we already know, and nothing's changed? */
1997 if (h->drv[drv_index]->raid_level != -1 &&
1998 ((memcmp(drvinfo->serial_no,
1999 h->drv[drv_index]->serial_no, 16) == 0) &&
2000 drvinfo->block_size == h->drv[drv_index]->block_size &&
2001 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2002 drvinfo->heads == h->drv[drv_index]->heads &&
2003 drvinfo->sectors == h->drv[drv_index]->sectors &&
2004 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2005 /* The disk is unchanged, nothing to update */
2006 goto freeret;
2007
2008 /* If we get here it's not the same disk, or something's changed,
2009 * so we need to * deregister it, and re-register it, if it's not
2010 * in use.
2011 * If the disk already exists then deregister it before proceeding
2012 * (unless it's the first disk (for the controller node).
2013 */
2014 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2015 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2016 spin_lock_irqsave(&h->lock, flags);
2017 h->drv[drv_index]->busy_configuring = 1;
2018 spin_unlock_irqrestore(&h->lock, flags);
2019
2020 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2021 * which keeps the interrupt handler from starting
2022 * the queue.
2023 */
2024 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2025 }
2026
2027 /* If the disk is in use return */
2028 if (ret)
2029 goto freeret;
2030
2031 /* Save the new information from cciss_geometry_inquiry
2032 * and serial number inquiry. If the disk was deregistered
2033 * above, then h->drv[drv_index] will be NULL.
2034 */
2035 if (h->drv[drv_index] == NULL) {
2036 drvinfo->device_initialized = 0;
2037 h->drv[drv_index] = drvinfo;
2038 drvinfo = NULL; /* so it won't be freed below. */
2039 } else {
2040 /* special case for cxd0 */
2041 h->drv[drv_index]->block_size = drvinfo->block_size;
2042 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2043 h->drv[drv_index]->heads = drvinfo->heads;
2044 h->drv[drv_index]->sectors = drvinfo->sectors;
2045 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2046 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2047 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2048 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2049 VENDOR_LEN + 1);
2050 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2051 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2052 }
2053
2054 ++h->num_luns;
2055 disk = h->gendisk[drv_index];
2056 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2057
2058 /* If it's not disk 0 (drv_index != 0)
2059 * or if it was disk 0, but there was previously
2060 * no actual corresponding configured logical drive
2061 * (raid_leve == -1) then we want to update the
2062 * logical drive's information.
2063 */
2064 if (drv_index || first_time) {
2065 if (cciss_add_disk(h, disk, drv_index) != 0) {
2066 cciss_free_gendisk(h, drv_index);
2067 cciss_free_drive_info(h, drv_index);
2068 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2069 drv_index);
2070 --h->num_luns;
2071 }
2072 }
2073
2074 freeret:
2075 kfree(inq_buff);
2076 kfree(drvinfo);
2077 return;
2078 mem_msg:
2079 dev_err(&h->pdev->dev, "out of memory\n");
2080 goto freeret;
2081 }
2082
2083 /* This function will find the first index of the controllers drive array
2084 * that has a null drv pointer and allocate the drive info struct and
2085 * will return that index This is where new drives will be added.
2086 * If the index to be returned is greater than the highest_lun index for
2087 * the controller then highest_lun is set * to this new index.
2088 * If there are no available indexes or if tha allocation fails, then -1
2089 * is returned. * "controller_node" is used to know if this is a real
2090 * logical drive, or just the controller node, which determines if this
2091 * counts towards highest_lun.
2092 */
2093 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2094 {
2095 int i;
2096 drive_info_struct *drv;
2097
2098 /* Search for an empty slot for our drive info */
2099 for (i = 0; i < CISS_MAX_LUN; i++) {
2100
2101 /* if not cxd0 case, and it's occupied, skip it. */
2102 if (h->drv[i] && i != 0)
2103 continue;
2104 /*
2105 * If it's cxd0 case, and drv is alloc'ed already, and a
2106 * disk is configured there, skip it.
2107 */
2108 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2109 continue;
2110
2111 /*
2112 * We've found an empty slot. Update highest_lun
2113 * provided this isn't just the fake cxd0 controller node.
2114 */
2115 if (i > h->highest_lun && !controller_node)
2116 h->highest_lun = i;
2117
2118 /* If adding a real disk at cxd0, and it's already alloc'ed */
2119 if (i == 0 && h->drv[i] != NULL)
2120 return i;
2121
2122 /*
2123 * Found an empty slot, not already alloc'ed. Allocate it.
2124 * Mark it with raid_level == -1, so we know it's new later on.
2125 */
2126 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2127 if (!drv)
2128 return -1;
2129 drv->raid_level = -1; /* so we know it's new */
2130 h->drv[i] = drv;
2131 return i;
2132 }
2133 return -1;
2134 }
2135
2136 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2137 {
2138 kfree(h->drv[drv_index]);
2139 h->drv[drv_index] = NULL;
2140 }
2141
2142 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2143 {
2144 put_disk(h->gendisk[drv_index]);
2145 h->gendisk[drv_index] = NULL;
2146 }
2147
2148 /* cciss_add_gendisk finds a free hba[]->drv structure
2149 * and allocates a gendisk if needed, and sets the lunid
2150 * in the drvinfo structure. It returns the index into
2151 * the ->drv[] array, or -1 if none are free.
2152 * is_controller_node indicates whether highest_lun should
2153 * count this disk, or if it's only being added to provide
2154 * a means to talk to the controller in case no logical
2155 * drives have yet been configured.
2156 */
2157 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2158 int controller_node)
2159 {
2160 int drv_index;
2161
2162 drv_index = cciss_alloc_drive_info(h, controller_node);
2163 if (drv_index == -1)
2164 return -1;
2165
2166 /*Check if the gendisk needs to be allocated */
2167 if (!h->gendisk[drv_index]) {
2168 h->gendisk[drv_index] =
2169 alloc_disk(1 << NWD_SHIFT);
2170 if (!h->gendisk[drv_index]) {
2171 dev_err(&h->pdev->dev,
2172 "could not allocate a new disk %d\n",
2173 drv_index);
2174 goto err_free_drive_info;
2175 }
2176 }
2177 memcpy(h->drv[drv_index]->LunID, lunid,
2178 sizeof(h->drv[drv_index]->LunID));
2179 if (cciss_create_ld_sysfs_entry(h, drv_index))
2180 goto err_free_disk;
2181 /* Don't need to mark this busy because nobody */
2182 /* else knows about this disk yet to contend */
2183 /* for access to it. */
2184 h->drv[drv_index]->busy_configuring = 0;
2185 wmb();
2186 return drv_index;
2187
2188 err_free_disk:
2189 cciss_free_gendisk(h, drv_index);
2190 err_free_drive_info:
2191 cciss_free_drive_info(h, drv_index);
2192 return -1;
2193 }
2194
2195 /* This is for the special case of a controller which
2196 * has no logical drives. In this case, we still need
2197 * to register a disk so the controller can be accessed
2198 * by the Array Config Utility.
2199 */
2200 static void cciss_add_controller_node(ctlr_info_t *h)
2201 {
2202 struct gendisk *disk;
2203 int drv_index;
2204
2205 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2206 return;
2207
2208 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2209 if (drv_index == -1)
2210 goto error;
2211 h->drv[drv_index]->block_size = 512;
2212 h->drv[drv_index]->nr_blocks = 0;
2213 h->drv[drv_index]->heads = 0;
2214 h->drv[drv_index]->sectors = 0;
2215 h->drv[drv_index]->cylinders = 0;
2216 h->drv[drv_index]->raid_level = -1;
2217 memset(h->drv[drv_index]->serial_no, 0, 16);
2218 disk = h->gendisk[drv_index];
2219 if (cciss_add_disk(h, disk, drv_index) == 0)
2220 return;
2221 cciss_free_gendisk(h, drv_index);
2222 cciss_free_drive_info(h, drv_index);
2223 error:
2224 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2225 return;
2226 }
2227
2228 /* This function will add and remove logical drives from the Logical
2229 * drive array of the controller and maintain persistency of ordering
2230 * so that mount points are preserved until the next reboot. This allows
2231 * for the removal of logical drives in the middle of the drive array
2232 * without a re-ordering of those drives.
2233 * INPUT
2234 * h = The controller to perform the operations on
2235 */
2236 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2237 int via_ioctl)
2238 {
2239 int num_luns;
2240 ReportLunData_struct *ld_buff = NULL;
2241 int return_code;
2242 int listlength = 0;
2243 int i;
2244 int drv_found;
2245 int drv_index = 0;
2246 unsigned char lunid[8] = CTLR_LUNID;
2247 unsigned long flags;
2248
2249 if (!capable(CAP_SYS_RAWIO))
2250 return -EPERM;
2251
2252 /* Set busy_configuring flag for this operation */
2253 spin_lock_irqsave(&h->lock, flags);
2254 if (h->busy_configuring) {
2255 spin_unlock_irqrestore(&h->lock, flags);
2256 return -EBUSY;
2257 }
2258 h->busy_configuring = 1;
2259 spin_unlock_irqrestore(&h->lock, flags);
2260
2261 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2262 if (ld_buff == NULL)
2263 goto mem_msg;
2264
2265 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2266 sizeof(ReportLunData_struct),
2267 0, CTLR_LUNID, TYPE_CMD);
2268
2269 if (return_code == IO_OK)
2270 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2271 else { /* reading number of logical volumes failed */
2272 dev_warn(&h->pdev->dev,
2273 "report logical volume command failed\n");
2274 listlength = 0;
2275 goto freeret;
2276 }
2277
2278 num_luns = listlength / 8; /* 8 bytes per entry */
2279 if (num_luns > CISS_MAX_LUN) {
2280 num_luns = CISS_MAX_LUN;
2281 dev_warn(&h->pdev->dev, "more luns configured"
2282 " on controller than can be handled by"
2283 " this driver.\n");
2284 }
2285
2286 if (num_luns == 0)
2287 cciss_add_controller_node(h);
2288
2289 /* Compare controller drive array to driver's drive array
2290 * to see if any drives are missing on the controller due
2291 * to action of Array Config Utility (user deletes drive)
2292 * and deregister logical drives which have disappeared.
2293 */
2294 for (i = 0; i <= h->highest_lun; i++) {
2295 int j;
2296 drv_found = 0;
2297
2298 /* skip holes in the array from already deleted drives */
2299 if (h->drv[i] == NULL)
2300 continue;
2301
2302 for (j = 0; j < num_luns; j++) {
2303 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2304 if (memcmp(h->drv[i]->LunID, lunid,
2305 sizeof(lunid)) == 0) {
2306 drv_found = 1;
2307 break;
2308 }
2309 }
2310 if (!drv_found) {
2311 /* Deregister it from the OS, it's gone. */
2312 spin_lock_irqsave(&h->lock, flags);
2313 h->drv[i]->busy_configuring = 1;
2314 spin_unlock_irqrestore(&h->lock, flags);
2315 return_code = deregister_disk(h, i, 1, via_ioctl);
2316 if (h->drv[i] != NULL)
2317 h->drv[i]->busy_configuring = 0;
2318 }
2319 }
2320
2321 /* Compare controller drive array to driver's drive array.
2322 * Check for updates in the drive information and any new drives
2323 * on the controller due to ACU adding logical drives, or changing
2324 * a logical drive's size, etc. Reregister any new/changed drives
2325 */
2326 for (i = 0; i < num_luns; i++) {
2327 int j;
2328
2329 drv_found = 0;
2330
2331 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2332 /* Find if the LUN is already in the drive array
2333 * of the driver. If so then update its info
2334 * if not in use. If it does not exist then find
2335 * the first free index and add it.
2336 */
2337 for (j = 0; j <= h->highest_lun; j++) {
2338 if (h->drv[j] != NULL &&
2339 memcmp(h->drv[j]->LunID, lunid,
2340 sizeof(h->drv[j]->LunID)) == 0) {
2341 drv_index = j;
2342 drv_found = 1;
2343 break;
2344 }
2345 }
2346
2347 /* check if the drive was found already in the array */
2348 if (!drv_found) {
2349 drv_index = cciss_add_gendisk(h, lunid, 0);
2350 if (drv_index == -1)
2351 goto freeret;
2352 }
2353 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2354 } /* end for */
2355
2356 freeret:
2357 kfree(ld_buff);
2358 h->busy_configuring = 0;
2359 /* We return -1 here to tell the ACU that we have registered/updated
2360 * all of the drives that we can and to keep it from calling us
2361 * additional times.
2362 */
2363 return -1;
2364 mem_msg:
2365 dev_err(&h->pdev->dev, "out of memory\n");
2366 h->busy_configuring = 0;
2367 goto freeret;
2368 }
2369
2370 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2371 {
2372 /* zero out the disk size info */
2373 drive_info->nr_blocks = 0;
2374 drive_info->block_size = 0;
2375 drive_info->heads = 0;
2376 drive_info->sectors = 0;
2377 drive_info->cylinders = 0;
2378 drive_info->raid_level = -1;
2379 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2380 memset(drive_info->model, 0, sizeof(drive_info->model));
2381 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2382 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2383 /*
2384 * don't clear the LUNID though, we need to remember which
2385 * one this one is.
2386 */
2387 }
2388
2389 /* This function will deregister the disk and it's queue from the
2390 * kernel. It must be called with the controller lock held and the
2391 * drv structures busy_configuring flag set. It's parameters are:
2392 *
2393 * disk = This is the disk to be deregistered
2394 * drv = This is the drive_info_struct associated with the disk to be
2395 * deregistered. It contains information about the disk used
2396 * by the driver.
2397 * clear_all = This flag determines whether or not the disk information
2398 * is going to be completely cleared out and the highest_lun
2399 * reset. Sometimes we want to clear out information about
2400 * the disk in preparation for re-adding it. In this case
2401 * the highest_lun should be left unchanged and the LunID
2402 * should not be cleared.
2403 * via_ioctl
2404 * This indicates whether we've reached this path via ioctl.
2405 * This affects the maximum usage count allowed for c0d0 to be messed with.
2406 * If this path is reached via ioctl(), then the max_usage_count will
2407 * be 1, as the process calling ioctl() has got to have the device open.
2408 * If we get here via sysfs, then the max usage count will be zero.
2409 */
2410 static int deregister_disk(ctlr_info_t *h, int drv_index,
2411 int clear_all, int via_ioctl)
2412 {
2413 int i;
2414 struct gendisk *disk;
2415 drive_info_struct *drv;
2416 int recalculate_highest_lun;
2417
2418 if (!capable(CAP_SYS_RAWIO))
2419 return -EPERM;
2420
2421 drv = h->drv[drv_index];
2422 disk = h->gendisk[drv_index];
2423
2424 /* make sure logical volume is NOT is use */
2425 if (clear_all || (h->gendisk[0] == disk)) {
2426 if (drv->usage_count > via_ioctl)
2427 return -EBUSY;
2428 } else if (drv->usage_count > 0)
2429 return -EBUSY;
2430
2431 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2432
2433 /* invalidate the devices and deregister the disk. If it is disk
2434 * zero do not deregister it but just zero out it's values. This
2435 * allows us to delete disk zero but keep the controller registered.
2436 */
2437 if (h->gendisk[0] != disk) {
2438 struct request_queue *q = disk->queue;
2439 if (disk->flags & GENHD_FL_UP) {
2440 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2441 del_gendisk(disk);
2442 }
2443 if (q)
2444 blk_cleanup_queue(q);
2445 /* If clear_all is set then we are deleting the logical
2446 * drive, not just refreshing its info. For drives
2447 * other than disk 0 we will call put_disk. We do not
2448 * do this for disk 0 as we need it to be able to
2449 * configure the controller.
2450 */
2451 if (clear_all){
2452 /* This isn't pretty, but we need to find the
2453 * disk in our array and NULL our the pointer.
2454 * This is so that we will call alloc_disk if
2455 * this index is used again later.
2456 */
2457 for (i=0; i < CISS_MAX_LUN; i++){
2458 if (h->gendisk[i] == disk) {
2459 h->gendisk[i] = NULL;
2460 break;
2461 }
2462 }
2463 put_disk(disk);
2464 }
2465 } else {
2466 set_capacity(disk, 0);
2467 cciss_clear_drive_info(drv);
2468 }
2469
2470 --h->num_luns;
2471
2472 /* if it was the last disk, find the new hightest lun */
2473 if (clear_all && recalculate_highest_lun) {
2474 int newhighest = -1;
2475 for (i = 0; i <= h->highest_lun; i++) {
2476 /* if the disk has size > 0, it is available */
2477 if (h->drv[i] && h->drv[i]->heads)
2478 newhighest = i;
2479 }
2480 h->highest_lun = newhighest;
2481 }
2482 return 0;
2483 }
2484
2485 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2486 size_t size, __u8 page_code, unsigned char *scsi3addr,
2487 int cmd_type)
2488 {
2489 u64bit buff_dma_handle;
2490 int status = IO_OK;
2491
2492 c->cmd_type = CMD_IOCTL_PEND;
2493 c->Header.ReplyQueue = 0;
2494 if (buff != NULL) {
2495 c->Header.SGList = 1;
2496 c->Header.SGTotal = 1;
2497 } else {
2498 c->Header.SGList = 0;
2499 c->Header.SGTotal = 0;
2500 }
2501 c->Header.Tag.lower = c->busaddr;
2502 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2503
2504 c->Request.Type.Type = cmd_type;
2505 if (cmd_type == TYPE_CMD) {
2506 switch (cmd) {
2507 case CISS_INQUIRY:
2508 /* are we trying to read a vital product page */
2509 if (page_code != 0) {
2510 c->Request.CDB[1] = 0x01;
2511 c->Request.CDB[2] = page_code;
2512 }
2513 c->Request.CDBLen = 6;
2514 c->Request.Type.Attribute = ATTR_SIMPLE;
2515 c->Request.Type.Direction = XFER_READ;
2516 c->Request.Timeout = 0;
2517 c->Request.CDB[0] = CISS_INQUIRY;
2518 c->Request.CDB[4] = size & 0xFF;
2519 break;
2520 case CISS_REPORT_LOG:
2521 case CISS_REPORT_PHYS:
2522 /* Talking to controller so It's a physical command
2523 mode = 00 target = 0. Nothing to write.
2524 */
2525 c->Request.CDBLen = 12;
2526 c->Request.Type.Attribute = ATTR_SIMPLE;
2527 c->Request.Type.Direction = XFER_READ;
2528 c->Request.Timeout = 0;
2529 c->Request.CDB[0] = cmd;
2530 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2531 c->Request.CDB[7] = (size >> 16) & 0xFF;
2532 c->Request.CDB[8] = (size >> 8) & 0xFF;
2533 c->Request.CDB[9] = size & 0xFF;
2534 break;
2535
2536 case CCISS_READ_CAPACITY:
2537 c->Request.CDBLen = 10;
2538 c->Request.Type.Attribute = ATTR_SIMPLE;
2539 c->Request.Type.Direction = XFER_READ;
2540 c->Request.Timeout = 0;
2541 c->Request.CDB[0] = cmd;
2542 break;
2543 case CCISS_READ_CAPACITY_16:
2544 c->Request.CDBLen = 16;
2545 c->Request.Type.Attribute = ATTR_SIMPLE;
2546 c->Request.Type.Direction = XFER_READ;
2547 c->Request.Timeout = 0;
2548 c->Request.CDB[0] = cmd;
2549 c->Request.CDB[1] = 0x10;
2550 c->Request.CDB[10] = (size >> 24) & 0xFF;
2551 c->Request.CDB[11] = (size >> 16) & 0xFF;
2552 c->Request.CDB[12] = (size >> 8) & 0xFF;
2553 c->Request.CDB[13] = size & 0xFF;
2554 c->Request.Timeout = 0;
2555 c->Request.CDB[0] = cmd;
2556 break;
2557 case CCISS_CACHE_FLUSH:
2558 c->Request.CDBLen = 12;
2559 c->Request.Type.Attribute = ATTR_SIMPLE;
2560 c->Request.Type.Direction = XFER_WRITE;
2561 c->Request.Timeout = 0;
2562 c->Request.CDB[0] = BMIC_WRITE;
2563 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2564 break;
2565 case TEST_UNIT_READY:
2566 c->Request.CDBLen = 6;
2567 c->Request.Type.Attribute = ATTR_SIMPLE;
2568 c->Request.Type.Direction = XFER_NONE;
2569 c->Request.Timeout = 0;
2570 break;
2571 default:
2572 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2573 return IO_ERROR;
2574 }
2575 } else if (cmd_type == TYPE_MSG) {
2576 switch (cmd) {
2577 case 0: /* ABORT message */
2578 c->Request.CDBLen = 12;
2579 c->Request.Type.Attribute = ATTR_SIMPLE;
2580 c->Request.Type.Direction = XFER_WRITE;
2581 c->Request.Timeout = 0;
2582 c->Request.CDB[0] = cmd; /* abort */
2583 c->Request.CDB[1] = 0; /* abort a command */
2584 /* buff contains the tag of the command to abort */
2585 memcpy(&c->Request.CDB[4], buff, 8);
2586 break;
2587 case 1: /* RESET message */
2588 c->Request.CDBLen = 16;
2589 c->Request.Type.Attribute = ATTR_SIMPLE;
2590 c->Request.Type.Direction = XFER_NONE;
2591 c->Request.Timeout = 0;
2592 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2593 c->Request.CDB[0] = cmd; /* reset */
2594 c->Request.CDB[1] = 0x03; /* reset a target */
2595 break;
2596 case 3: /* No-Op message */
2597 c->Request.CDBLen = 1;
2598 c->Request.Type.Attribute = ATTR_SIMPLE;
2599 c->Request.Type.Direction = XFER_WRITE;
2600 c->Request.Timeout = 0;
2601 c->Request.CDB[0] = cmd;
2602 break;
2603 default:
2604 dev_warn(&h->pdev->dev,
2605 "unknown message type %d\n", cmd);
2606 return IO_ERROR;
2607 }
2608 } else {
2609 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2610 return IO_ERROR;
2611 }
2612 /* Fill in the scatter gather information */
2613 if (size > 0) {
2614 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2615 buff, size,
2616 PCI_DMA_BIDIRECTIONAL);
2617 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2618 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2619 c->SG[0].Len = size;
2620 c->SG[0].Ext = 0; /* we are not chaining */
2621 }
2622 return status;
2623 }
2624
2625 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2626 {
2627 switch (c->err_info->ScsiStatus) {
2628 case SAM_STAT_GOOD:
2629 return IO_OK;
2630 case SAM_STAT_CHECK_CONDITION:
2631 switch (0xf & c->err_info->SenseInfo[2]) {
2632 case 0: return IO_OK; /* no sense */
2633 case 1: return IO_OK; /* recovered error */
2634 default:
2635 if (check_for_unit_attention(h, c))
2636 return IO_NEEDS_RETRY;
2637 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2638 "check condition, sense key = 0x%02x\n",
2639 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2640 }
2641 break;
2642 default:
2643 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2644 "scsi status = 0x%02x\n",
2645 c->Request.CDB[0], c->err_info->ScsiStatus);
2646 break;
2647 }
2648 return IO_ERROR;
2649 }
2650
2651 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2652 {
2653 int return_status = IO_OK;
2654
2655 if (c->err_info->CommandStatus == CMD_SUCCESS)
2656 return IO_OK;
2657
2658 switch (c->err_info->CommandStatus) {
2659 case CMD_TARGET_STATUS:
2660 return_status = check_target_status(h, c);
2661 break;
2662 case CMD_DATA_UNDERRUN:
2663 case CMD_DATA_OVERRUN:
2664 /* expected for inquiry and report lun commands */
2665 break;
2666 case CMD_INVALID:
2667 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2668 "reported invalid\n", c->Request.CDB[0]);
2669 return_status = IO_ERROR;
2670 break;
2671 case CMD_PROTOCOL_ERR:
2672 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2673 "protocol error\n", c->Request.CDB[0]);
2674 return_status = IO_ERROR;
2675 break;
2676 case CMD_HARDWARE_ERR:
2677 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2678 " hardware error\n", c->Request.CDB[0]);
2679 return_status = IO_ERROR;
2680 break;
2681 case CMD_CONNECTION_LOST:
2682 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2683 "connection lost\n", c->Request.CDB[0]);
2684 return_status = IO_ERROR;
2685 break;
2686 case CMD_ABORTED:
2687 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2688 "aborted\n", c->Request.CDB[0]);
2689 return_status = IO_ERROR;
2690 break;
2691 case CMD_ABORT_FAILED:
2692 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2693 "abort failed\n", c->Request.CDB[0]);
2694 return_status = IO_ERROR;
2695 break;
2696 case CMD_UNSOLICITED_ABORT:
2697 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2698 c->Request.CDB[0]);
2699 return_status = IO_NEEDS_RETRY;
2700 break;
2701 default:
2702 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2703 "unknown status %x\n", c->Request.CDB[0],
2704 c->err_info->CommandStatus);
2705 return_status = IO_ERROR;
2706 }
2707 return return_status;
2708 }
2709
2710 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2711 int attempt_retry)
2712 {
2713 DECLARE_COMPLETION_ONSTACK(wait);
2714 u64bit buff_dma_handle;
2715 int return_status = IO_OK;
2716
2717 resend_cmd2:
2718 c->waiting = &wait;
2719 enqueue_cmd_and_start_io(h, c);
2720
2721 wait_for_completion(&wait);
2722
2723 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2724 goto command_done;
2725
2726 return_status = process_sendcmd_error(h, c);
2727
2728 if (return_status == IO_NEEDS_RETRY &&
2729 c->retry_count < MAX_CMD_RETRIES) {
2730 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2731 c->Request.CDB[0]);
2732 c->retry_count++;
2733 /* erase the old error information */
2734 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2735 return_status = IO_OK;
2736 INIT_COMPLETION(wait);
2737 goto resend_cmd2;
2738 }
2739
2740 command_done:
2741 /* unlock the buffers from DMA */
2742 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2743 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2744 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2745 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2746 return return_status;
2747 }
2748
2749 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2750 __u8 page_code, unsigned char scsi3addr[],
2751 int cmd_type)
2752 {
2753 CommandList_struct *c;
2754 int return_status;
2755
2756 c = cmd_special_alloc(h);
2757 if (!c)
2758 return -ENOMEM;
2759 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2760 scsi3addr, cmd_type);
2761 if (return_status == IO_OK)
2762 return_status = sendcmd_withirq_core(h, c, 1);
2763
2764 cmd_special_free(h, c);
2765 return return_status;
2766 }
2767
2768 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2769 sector_t total_size,
2770 unsigned int block_size,
2771 InquiryData_struct *inq_buff,
2772 drive_info_struct *drv)
2773 {
2774 int return_code;
2775 unsigned long t;
2776 unsigned char scsi3addr[8];
2777
2778 memset(inq_buff, 0, sizeof(InquiryData_struct));
2779 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2780 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2781 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2782 if (return_code == IO_OK) {
2783 if (inq_buff->data_byte[8] == 0xFF) {
2784 dev_warn(&h->pdev->dev,
2785 "reading geometry failed, volume "
2786 "does not support reading geometry\n");
2787 drv->heads = 255;
2788 drv->sectors = 32; /* Sectors per track */
2789 drv->cylinders = total_size + 1;
2790 drv->raid_level = RAID_UNKNOWN;
2791 } else {
2792 drv->heads = inq_buff->data_byte[6];
2793 drv->sectors = inq_buff->data_byte[7];
2794 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2795 drv->cylinders += inq_buff->data_byte[5];
2796 drv->raid_level = inq_buff->data_byte[8];
2797 }
2798 drv->block_size = block_size;
2799 drv->nr_blocks = total_size + 1;
2800 t = drv->heads * drv->sectors;
2801 if (t > 1) {
2802 sector_t real_size = total_size + 1;
2803 unsigned long rem = sector_div(real_size, t);
2804 if (rem)
2805 real_size++;
2806 drv->cylinders = real_size;
2807 }
2808 } else { /* Get geometry failed */
2809 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2810 }
2811 }
2812
2813 static void
2814 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2815 unsigned int *block_size)
2816 {
2817 ReadCapdata_struct *buf;
2818 int return_code;
2819 unsigned char scsi3addr[8];
2820
2821 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2822 if (!buf) {
2823 dev_warn(&h->pdev->dev, "out of memory\n");
2824 return;
2825 }
2826
2827 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2828 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2829 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2830 if (return_code == IO_OK) {
2831 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2832 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2833 } else { /* read capacity command failed */
2834 dev_warn(&h->pdev->dev, "read capacity failed\n");
2835 *total_size = 0;
2836 *block_size = BLOCK_SIZE;
2837 }
2838 kfree(buf);
2839 }
2840
2841 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2842 sector_t *total_size, unsigned int *block_size)
2843 {
2844 ReadCapdata_struct_16 *buf;
2845 int return_code;
2846 unsigned char scsi3addr[8];
2847
2848 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2849 if (!buf) {
2850 dev_warn(&h->pdev->dev, "out of memory\n");
2851 return;
2852 }
2853
2854 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2855 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2856 buf, sizeof(ReadCapdata_struct_16),
2857 0, scsi3addr, TYPE_CMD);
2858 if (return_code == IO_OK) {
2859 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2860 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2861 } else { /* read capacity command failed */
2862 dev_warn(&h->pdev->dev, "read capacity failed\n");
2863 *total_size = 0;
2864 *block_size = BLOCK_SIZE;
2865 }
2866 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2867 (unsigned long long)*total_size+1, *block_size);
2868 kfree(buf);
2869 }
2870
2871 static int cciss_revalidate(struct gendisk *disk)
2872 {
2873 ctlr_info_t *h = get_host(disk);
2874 drive_info_struct *drv = get_drv(disk);
2875 int logvol;
2876 int FOUND = 0;
2877 unsigned int block_size;
2878 sector_t total_size;
2879 InquiryData_struct *inq_buff = NULL;
2880
2881 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
2882 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2883 sizeof(drv->LunID)) == 0) {
2884 FOUND = 1;
2885 break;
2886 }
2887 }
2888
2889 if (!FOUND)
2890 return 1;
2891
2892 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2893 if (inq_buff == NULL) {
2894 dev_warn(&h->pdev->dev, "out of memory\n");
2895 return 1;
2896 }
2897 if (h->cciss_read == CCISS_READ_10) {
2898 cciss_read_capacity(h, logvol,
2899 &total_size, &block_size);
2900 } else {
2901 cciss_read_capacity_16(h, logvol,
2902 &total_size, &block_size);
2903 }
2904 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2905 inq_buff, drv);
2906
2907 blk_queue_logical_block_size(drv->queue, drv->block_size);
2908 set_capacity(disk, drv->nr_blocks);
2909
2910 kfree(inq_buff);
2911 return 0;
2912 }
2913
2914 /*
2915 * Map (physical) PCI mem into (virtual) kernel space
2916 */
2917 static void __iomem *remap_pci_mem(ulong base, ulong size)
2918 {
2919 ulong page_base = ((ulong) base) & PAGE_MASK;
2920 ulong page_offs = ((ulong) base) - page_base;
2921 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2922
2923 return page_remapped ? (page_remapped + page_offs) : NULL;
2924 }
2925
2926 /*
2927 * Takes jobs of the Q and sends them to the hardware, then puts it on
2928 * the Q to wait for completion.
2929 */
2930 static void start_io(ctlr_info_t *h)
2931 {
2932 CommandList_struct *c;
2933
2934 while (!hlist_empty(&h->reqQ)) {
2935 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
2936 /* can't do anything if fifo is full */
2937 if ((h->access.fifo_full(h))) {
2938 dev_warn(&h->pdev->dev, "fifo full\n");
2939 break;
2940 }
2941
2942 /* Get the first entry from the Request Q */
2943 removeQ(c);
2944 h->Qdepth--;
2945
2946 /* Tell the controller execute command */
2947 h->access.submit_command(h, c);
2948
2949 /* Put job onto the completed Q */
2950 addQ(&h->cmpQ, c);
2951 }
2952 }
2953
2954 /* Assumes that h->lock is held. */
2955 /* Zeros out the error record and then resends the command back */
2956 /* to the controller */
2957 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
2958 {
2959 /* erase the old error information */
2960 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2961
2962 /* add it to software queue and then send it to the controller */
2963 addQ(&h->reqQ, c);
2964 h->Qdepth++;
2965 if (h->Qdepth > h->maxQsinceinit)
2966 h->maxQsinceinit = h->Qdepth;
2967
2968 start_io(h);
2969 }
2970
2971 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2972 unsigned int msg_byte, unsigned int host_byte,
2973 unsigned int driver_byte)
2974 {
2975 /* inverse of macros in scsi.h */
2976 return (scsi_status_byte & 0xff) |
2977 ((msg_byte & 0xff) << 8) |
2978 ((host_byte & 0xff) << 16) |
2979 ((driver_byte & 0xff) << 24);
2980 }
2981
2982 static inline int evaluate_target_status(ctlr_info_t *h,
2983 CommandList_struct *cmd, int *retry_cmd)
2984 {
2985 unsigned char sense_key;
2986 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2987 int error_value;
2988
2989 *retry_cmd = 0;
2990 /* If we get in here, it means we got "target status", that is, scsi status */
2991 status_byte = cmd->err_info->ScsiStatus;
2992 driver_byte = DRIVER_OK;
2993 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2994
2995 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
2996 host_byte = DID_PASSTHROUGH;
2997 else
2998 host_byte = DID_OK;
2999
3000 error_value = make_status_bytes(status_byte, msg_byte,
3001 host_byte, driver_byte);
3002
3003 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3004 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3005 dev_warn(&h->pdev->dev, "cmd %p "
3006 "has SCSI Status 0x%x\n",
3007 cmd, cmd->err_info->ScsiStatus);
3008 return error_value;
3009 }
3010
3011 /* check the sense key */
3012 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3013 /* no status or recovered error */
3014 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3015 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3016 error_value = 0;
3017
3018 if (check_for_unit_attention(h, cmd)) {
3019 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3020 return 0;
3021 }
3022
3023 /* Not SG_IO or similar? */
3024 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3025 if (error_value != 0)
3026 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3027 " sense key = 0x%x\n", cmd, sense_key);
3028 return error_value;
3029 }
3030
3031 /* SG_IO or similar, copy sense data back */
3032 if (cmd->rq->sense) {
3033 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3034 cmd->rq->sense_len = cmd->err_info->SenseLen;
3035 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3036 cmd->rq->sense_len);
3037 } else
3038 cmd->rq->sense_len = 0;
3039
3040 return error_value;
3041 }
3042
3043 /* checks the status of the job and calls complete buffers to mark all
3044 * buffers for the completed job. Note that this function does not need
3045 * to hold the hba/queue lock.
3046 */
3047 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3048 int timeout)
3049 {
3050 int retry_cmd = 0;
3051 struct request *rq = cmd->rq;
3052
3053 rq->errors = 0;
3054
3055 if (timeout)
3056 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3057
3058 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3059 goto after_error_processing;
3060
3061 switch (cmd->err_info->CommandStatus) {
3062 case CMD_TARGET_STATUS:
3063 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3064 break;
3065 case CMD_DATA_UNDERRUN:
3066 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3067 dev_warn(&h->pdev->dev, "cmd %p has"
3068 " completed with data underrun "
3069 "reported\n", cmd);
3070 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3071 }
3072 break;
3073 case CMD_DATA_OVERRUN:
3074 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3075 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3076 " completed with data overrun "
3077 "reported\n", cmd);
3078 break;
3079 case CMD_INVALID:
3080 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3081 "reported invalid\n", cmd);
3082 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3083 cmd->err_info->CommandStatus, DRIVER_OK,
3084 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3085 DID_PASSTHROUGH : DID_ERROR);
3086 break;
3087 case CMD_PROTOCOL_ERR:
3088 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3089 "protocol error\n", cmd);
3090 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3091 cmd->err_info->CommandStatus, DRIVER_OK,
3092 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3093 DID_PASSTHROUGH : DID_ERROR);
3094 break;
3095 case CMD_HARDWARE_ERR:
3096 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3097 " hardware error\n", cmd);
3098 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3099 cmd->err_info->CommandStatus, DRIVER_OK,
3100 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3101 DID_PASSTHROUGH : DID_ERROR);
3102 break;
3103 case CMD_CONNECTION_LOST:
3104 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3105 "connection lost\n", cmd);
3106 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3107 cmd->err_info->CommandStatus, DRIVER_OK,
3108 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3109 DID_PASSTHROUGH : DID_ERROR);
3110 break;
3111 case CMD_ABORTED:
3112 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3113 "aborted\n", cmd);
3114 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3115 cmd->err_info->CommandStatus, DRIVER_OK,
3116 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3117 DID_PASSTHROUGH : DID_ABORT);
3118 break;
3119 case CMD_ABORT_FAILED:
3120 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3121 "abort failed\n", cmd);
3122 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3123 cmd->err_info->CommandStatus, DRIVER_OK,
3124 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3125 DID_PASSTHROUGH : DID_ERROR);
3126 break;
3127 case CMD_UNSOLICITED_ABORT:
3128 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3129 "abort %p\n", h->ctlr, cmd);
3130 if (cmd->retry_count < MAX_CMD_RETRIES) {
3131 retry_cmd = 1;
3132 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3133 cmd->retry_count++;
3134 } else
3135 dev_warn(&h->pdev->dev,
3136 "%p retried too many times\n", cmd);
3137 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3138 cmd->err_info->CommandStatus, DRIVER_OK,
3139 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3140 DID_PASSTHROUGH : DID_ABORT);
3141 break;
3142 case CMD_TIMEOUT:
3143 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3144 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3145 cmd->err_info->CommandStatus, DRIVER_OK,
3146 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3147 DID_PASSTHROUGH : DID_ERROR);
3148 break;
3149 default:
3150 dev_warn(&h->pdev->dev, "cmd %p returned "
3151 "unknown status %x\n", cmd,
3152 cmd->err_info->CommandStatus);
3153 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3154 cmd->err_info->CommandStatus, DRIVER_OK,
3155 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3156 DID_PASSTHROUGH : DID_ERROR);
3157 }
3158
3159 after_error_processing:
3160
3161 /* We need to return this command */
3162 if (retry_cmd) {
3163 resend_cciss_cmd(h, cmd);
3164 return;
3165 }
3166 cmd->rq->completion_data = cmd;
3167 blk_complete_request(cmd->rq);
3168 }
3169
3170 static inline u32 cciss_tag_contains_index(u32 tag)
3171 {
3172 #define DIRECT_LOOKUP_BIT 0x10
3173 return tag & DIRECT_LOOKUP_BIT;
3174 }
3175
3176 static inline u32 cciss_tag_to_index(u32 tag)
3177 {
3178 #define DIRECT_LOOKUP_SHIFT 5
3179 return tag >> DIRECT_LOOKUP_SHIFT;
3180 }
3181
3182 static inline u32 cciss_tag_discard_error_bits(u32 tag)
3183 {
3184 #define CCISS_ERROR_BITS 0x03
3185 return tag & ~CCISS_ERROR_BITS;
3186 }
3187
3188 static inline void cciss_mark_tag_indexed(u32 *tag)
3189 {
3190 *tag |= DIRECT_LOOKUP_BIT;
3191 }
3192
3193 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3194 {
3195 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3196 }
3197
3198 /*
3199 * Get a request and submit it to the controller.
3200 */
3201 static void do_cciss_request(struct request_queue *q)
3202 {
3203 ctlr_info_t *h = q->queuedata;
3204 CommandList_struct *c;
3205 sector_t start_blk;
3206 int seg;
3207 struct request *creq;
3208 u64bit temp64;
3209 struct scatterlist *tmp_sg;
3210 SGDescriptor_struct *curr_sg;
3211 drive_info_struct *drv;
3212 int i, dir;
3213 int sg_index = 0;
3214 int chained = 0;
3215
3216 /* We call start_io here in case there is a command waiting on the
3217 * queue that has not been sent.
3218 */
3219 if (blk_queue_plugged(q))
3220 goto startio;
3221
3222 queue:
3223 creq = blk_peek_request(q);
3224 if (!creq)
3225 goto startio;
3226
3227 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3228
3229 c = cmd_alloc(h);
3230 if (!c)
3231 goto full;
3232
3233 blk_start_request(creq);
3234
3235 tmp_sg = h->scatter_list[c->cmdindex];
3236 spin_unlock_irq(q->queue_lock);
3237
3238 c->cmd_type = CMD_RWREQ;
3239 c->rq = creq;
3240
3241 /* fill in the request */
3242 drv = creq->rq_disk->private_data;
3243 c->Header.ReplyQueue = 0; /* unused in simple mode */
3244 /* got command from pool, so use the command block index instead */
3245 /* for direct lookups. */
3246 /* The first 2 bits are reserved for controller error reporting. */
3247 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3248 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3249 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3250 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3251 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3252 c->Request.Type.Attribute = ATTR_SIMPLE;
3253 c->Request.Type.Direction =
3254 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3255 c->Request.Timeout = 0; /* Don't time out */
3256 c->Request.CDB[0] =
3257 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3258 start_blk = blk_rq_pos(creq);
3259 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3260 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3261 sg_init_table(tmp_sg, h->maxsgentries);
3262 seg = blk_rq_map_sg(q, creq, tmp_sg);
3263
3264 /* get the DMA records for the setup */
3265 if (c->Request.Type.Direction == XFER_READ)
3266 dir = PCI_DMA_FROMDEVICE;
3267 else
3268 dir = PCI_DMA_TODEVICE;
3269
3270 curr_sg = c->SG;
3271 sg_index = 0;
3272 chained = 0;
3273
3274 for (i = 0; i < seg; i++) {
3275 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3276 !chained && ((seg - i) > 1)) {
3277 /* Point to next chain block. */
3278 curr_sg = h->cmd_sg_list[c->cmdindex];
3279 sg_index = 0;
3280 chained = 1;
3281 }
3282 curr_sg[sg_index].Len = tmp_sg[i].length;
3283 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3284 tmp_sg[i].offset,
3285 tmp_sg[i].length, dir);
3286 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3287 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3288 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3289 ++sg_index;
3290 }
3291 if (chained)
3292 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3293 (seg - (h->max_cmd_sgentries - 1)) *
3294 sizeof(SGDescriptor_struct));
3295
3296 /* track how many SG entries we are using */
3297 if (seg > h->maxSG)
3298 h->maxSG = seg;
3299
3300 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3301 "chained[%d]\n",
3302 blk_rq_sectors(creq), seg, chained);
3303
3304 c->Header.SGTotal = seg + chained;
3305 if (seg <= h->max_cmd_sgentries)
3306 c->Header.SGList = c->Header.SGTotal;
3307 else
3308 c->Header.SGList = h->max_cmd_sgentries;
3309 set_performant_mode(h, c);
3310
3311 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3312 if(h->cciss_read == CCISS_READ_10) {
3313 c->Request.CDB[1] = 0;
3314 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3315 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3316 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3317 c->Request.CDB[5] = start_blk & 0xff;
3318 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3319 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3320 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3321 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3322 } else {
3323 u32 upper32 = upper_32_bits(start_blk);
3324
3325 c->Request.CDBLen = 16;
3326 c->Request.CDB[1]= 0;
3327 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3328 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3329 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3330 c->Request.CDB[5]= upper32 & 0xff;
3331 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3332 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3333 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3334 c->Request.CDB[9]= start_blk & 0xff;
3335 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3336 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3337 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3338 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3339 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3340 }
3341 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3342 c->Request.CDBLen = creq->cmd_len;
3343 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3344 } else {
3345 dev_warn(&h->pdev->dev, "bad request type %d\n",
3346 creq->cmd_type);
3347 BUG();
3348 }
3349
3350 spin_lock_irq(q->queue_lock);
3351
3352 addQ(&h->reqQ, c);
3353 h->Qdepth++;
3354 if (h->Qdepth > h->maxQsinceinit)
3355 h->maxQsinceinit = h->Qdepth;
3356
3357 goto queue;
3358 full:
3359 blk_stop_queue(q);
3360 startio:
3361 /* We will already have the driver lock here so not need
3362 * to lock it.
3363 */
3364 start_io(h);
3365 }
3366
3367 static inline unsigned long get_next_completion(ctlr_info_t *h)
3368 {
3369 return h->access.command_completed(h);
3370 }
3371
3372 static inline int interrupt_pending(ctlr_info_t *h)
3373 {
3374 return h->access.intr_pending(h);
3375 }
3376
3377 static inline long interrupt_not_for_us(ctlr_info_t *h)
3378 {
3379 return !(h->msi_vector || h->msix_vector) &&
3380 ((h->access.intr_pending(h) == 0) ||
3381 (h->interrupts_enabled == 0));
3382 }
3383
3384 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3385 u32 raw_tag)
3386 {
3387 if (unlikely(tag_index >= h->nr_cmds)) {
3388 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3389 return 1;
3390 }
3391 return 0;
3392 }
3393
3394 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3395 u32 raw_tag)
3396 {
3397 removeQ(c);
3398 if (likely(c->cmd_type == CMD_RWREQ))
3399 complete_command(h, c, 0);
3400 else if (c->cmd_type == CMD_IOCTL_PEND)
3401 complete(c->waiting);
3402 #ifdef CONFIG_CISS_SCSI_TAPE
3403 else if (c->cmd_type == CMD_SCSI)
3404 complete_scsi_command(c, 0, raw_tag);
3405 #endif
3406 }
3407
3408 static inline u32 next_command(ctlr_info_t *h)
3409 {
3410 u32 a;
3411
3412 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3413 return h->access.command_completed(h);
3414
3415 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3416 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3417 (h->reply_pool_head)++;
3418 h->commands_outstanding--;
3419 } else {
3420 a = FIFO_EMPTY;
3421 }
3422 /* Check for wraparound */
3423 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3424 h->reply_pool_head = h->reply_pool;
3425 h->reply_pool_wraparound ^= 1;
3426 }
3427 return a;
3428 }
3429
3430 /* process completion of an indexed ("direct lookup") command */
3431 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3432 {
3433 u32 tag_index;
3434 CommandList_struct *c;
3435
3436 tag_index = cciss_tag_to_index(raw_tag);
3437 if (bad_tag(h, tag_index, raw_tag))
3438 return next_command(h);
3439 c = h->cmd_pool + tag_index;
3440 finish_cmd(h, c, raw_tag);
3441 return next_command(h);
3442 }
3443
3444 /* process completion of a non-indexed command */
3445 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3446 {
3447 u32 tag;
3448 CommandList_struct *c = NULL;
3449 struct hlist_node *tmp;
3450 __u32 busaddr_masked, tag_masked;
3451
3452 tag = cciss_tag_discard_error_bits(raw_tag);
3453 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3454 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3455 tag_masked = cciss_tag_discard_error_bits(tag);
3456 if (busaddr_masked == tag_masked) {
3457 finish_cmd(h, c, raw_tag);
3458 return next_command(h);
3459 }
3460 }
3461 bad_tag(h, h->nr_cmds + 1, raw_tag);
3462 return next_command(h);
3463 }
3464
3465 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3466 {
3467 ctlr_info_t *h = dev_id;
3468 unsigned long flags;
3469 u32 raw_tag;
3470
3471 if (interrupt_not_for_us(h))
3472 return IRQ_NONE;
3473 /*
3474 * If there are completed commands in the completion queue,
3475 * we had better do something about it.
3476 */
3477 spin_lock_irqsave(&h->lock, flags);
3478 while (interrupt_pending(h)) {
3479 raw_tag = get_next_completion(h);
3480 while (raw_tag != FIFO_EMPTY) {
3481 if (cciss_tag_contains_index(raw_tag))
3482 raw_tag = process_indexed_cmd(h, raw_tag);
3483 else
3484 raw_tag = process_nonindexed_cmd(h, raw_tag);
3485 }
3486 }
3487
3488 spin_unlock_irqrestore(&h->lock, flags);
3489 return IRQ_HANDLED;
3490 }
3491
3492 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3493 * check the interrupt pending register because it is not set.
3494 */
3495 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3496 {
3497 ctlr_info_t *h = dev_id;
3498 unsigned long flags;
3499 u32 raw_tag;
3500
3501 if (interrupt_not_for_us(h))
3502 return IRQ_NONE;
3503 /*
3504 * If there are completed commands in the completion queue,
3505 * we had better do something about it.
3506 */
3507 spin_lock_irqsave(&h->lock, flags);
3508 raw_tag = get_next_completion(h);
3509 while (raw_tag != FIFO_EMPTY) {
3510 if (cciss_tag_contains_index(raw_tag))
3511 raw_tag = process_indexed_cmd(h, raw_tag);
3512 else
3513 raw_tag = process_nonindexed_cmd(h, raw_tag);
3514 }
3515
3516 spin_unlock_irqrestore(&h->lock, flags);
3517 return IRQ_HANDLED;
3518 }
3519
3520 /**
3521 * add_to_scan_list() - add controller to rescan queue
3522 * @h: Pointer to the controller.
3523 *
3524 * Adds the controller to the rescan queue if not already on the queue.
3525 *
3526 * returns 1 if added to the queue, 0 if skipped (could be on the
3527 * queue already, or the controller could be initializing or shutting
3528 * down).
3529 **/
3530 static int add_to_scan_list(struct ctlr_info *h)
3531 {
3532 struct ctlr_info *test_h;
3533 int found = 0;
3534 int ret = 0;
3535
3536 if (h->busy_initializing)
3537 return 0;
3538
3539 if (!mutex_trylock(&h->busy_shutting_down))
3540 return 0;
3541
3542 mutex_lock(&scan_mutex);
3543 list_for_each_entry(test_h, &scan_q, scan_list) {
3544 if (test_h == h) {
3545 found = 1;
3546 break;
3547 }
3548 }
3549 if (!found && !h->busy_scanning) {
3550 INIT_COMPLETION(h->scan_wait);
3551 list_add_tail(&h->scan_list, &scan_q);
3552 ret = 1;
3553 }
3554 mutex_unlock(&scan_mutex);
3555 mutex_unlock(&h->busy_shutting_down);
3556
3557 return ret;
3558 }
3559
3560 /**
3561 * remove_from_scan_list() - remove controller from rescan queue
3562 * @h: Pointer to the controller.
3563 *
3564 * Removes the controller from the rescan queue if present. Blocks if
3565 * the controller is currently conducting a rescan. The controller
3566 * can be in one of three states:
3567 * 1. Doesn't need a scan
3568 * 2. On the scan list, but not scanning yet (we remove it)
3569 * 3. Busy scanning (and not on the list). In this case we want to wait for
3570 * the scan to complete to make sure the scanning thread for this
3571 * controller is completely idle.
3572 **/
3573 static void remove_from_scan_list(struct ctlr_info *h)
3574 {
3575 struct ctlr_info *test_h, *tmp_h;
3576
3577 mutex_lock(&scan_mutex);
3578 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3579 if (test_h == h) { /* state 2. */
3580 list_del(&h->scan_list);
3581 complete_all(&h->scan_wait);
3582 mutex_unlock(&scan_mutex);
3583 return;
3584 }
3585 }
3586 if (h->busy_scanning) { /* state 3. */
3587 mutex_unlock(&scan_mutex);
3588 wait_for_completion(&h->scan_wait);
3589 } else { /* state 1, nothing to do. */
3590 mutex_unlock(&scan_mutex);
3591 }
3592 }
3593
3594 /**
3595 * scan_thread() - kernel thread used to rescan controllers
3596 * @data: Ignored.
3597 *
3598 * A kernel thread used scan for drive topology changes on
3599 * controllers. The thread processes only one controller at a time
3600 * using a queue. Controllers are added to the queue using
3601 * add_to_scan_list() and removed from the queue either after done
3602 * processing or using remove_from_scan_list().
3603 *
3604 * returns 0.
3605 **/
3606 static int scan_thread(void *data)
3607 {
3608 struct ctlr_info *h;
3609
3610 while (1) {
3611 set_current_state(TASK_INTERRUPTIBLE);
3612 schedule();
3613 if (kthread_should_stop())
3614 break;
3615
3616 while (1) {
3617 mutex_lock(&scan_mutex);
3618 if (list_empty(&scan_q)) {
3619 mutex_unlock(&scan_mutex);
3620 break;
3621 }
3622
3623 h = list_entry(scan_q.next,
3624 struct ctlr_info,
3625 scan_list);
3626 list_del(&h->scan_list);
3627 h->busy_scanning = 1;
3628 mutex_unlock(&scan_mutex);
3629
3630 rebuild_lun_table(h, 0, 0);
3631 complete_all(&h->scan_wait);
3632 mutex_lock(&scan_mutex);
3633 h->busy_scanning = 0;
3634 mutex_unlock(&scan_mutex);
3635 }
3636 }
3637
3638 return 0;
3639 }
3640
3641 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3642 {
3643 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3644 return 0;
3645
3646 switch (c->err_info->SenseInfo[12]) {
3647 case STATE_CHANGED:
3648 dev_warn(&h->pdev->dev, "a state change "
3649 "detected, command retried\n");
3650 return 1;
3651 break;
3652 case LUN_FAILED:
3653 dev_warn(&h->pdev->dev, "LUN failure "
3654 "detected, action required\n");
3655 return 1;
3656 break;
3657 case REPORT_LUNS_CHANGED:
3658 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3659 /*
3660 * Here, we could call add_to_scan_list and wake up the scan thread,
3661 * except that it's quite likely that we will get more than one
3662 * REPORT_LUNS_CHANGED condition in quick succession, which means
3663 * that those which occur after the first one will likely happen
3664 * *during* the scan_thread's rescan. And the rescan code is not
3665 * robust enough to restart in the middle, undoing what it has already
3666 * done, and it's not clear that it's even possible to do this, since
3667 * part of what it does is notify the block layer, which starts
3668 * doing it's own i/o to read partition tables and so on, and the
3669 * driver doesn't have visibility to know what might need undoing.
3670 * In any event, if possible, it is horribly complicated to get right
3671 * so we just don't do it for now.
3672 *
3673 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3674 */
3675 return 1;
3676 break;
3677 case POWER_OR_RESET:
3678 dev_warn(&h->pdev->dev,
3679 "a power on or device reset detected\n");
3680 return 1;
3681 break;
3682 case UNIT_ATTENTION_CLEARED:
3683 dev_warn(&h->pdev->dev,
3684 "unit attention cleared by another initiator\n");
3685 return 1;
3686 break;
3687 default:
3688 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3689 return 1;
3690 }
3691 }
3692
3693 /*
3694 * We cannot read the structure directly, for portability we must use
3695 * the io functions.
3696 * This is for debug only.
3697 */
3698 static void print_cfg_table(ctlr_info_t *h)
3699 {
3700 int i;
3701 char temp_name[17];
3702 CfgTable_struct *tb = h->cfgtable;
3703
3704 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3705 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3706 for (i = 0; i < 4; i++)
3707 temp_name[i] = readb(&(tb->Signature[i]));
3708 temp_name[4] = '\0';
3709 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3710 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3711 readl(&(tb->SpecValence)));
3712 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3713 readl(&(tb->TransportSupport)));
3714 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3715 readl(&(tb->TransportActive)));
3716 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3717 readl(&(tb->HostWrite.TransportRequest)));
3718 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3719 readl(&(tb->HostWrite.CoalIntDelay)));
3720 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3721 readl(&(tb->HostWrite.CoalIntCount)));
3722 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3723 readl(&(tb->CmdsOutMax)));
3724 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3725 readl(&(tb->BusTypes)));
3726 for (i = 0; i < 16; i++)
3727 temp_name[i] = readb(&(tb->ServerName[i]));
3728 temp_name[16] = '\0';
3729 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3730 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3731 readl(&(tb->HeartBeat)));
3732 }
3733
3734 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3735 {
3736 int i, offset, mem_type, bar_type;
3737 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3738 return 0;
3739 offset = 0;
3740 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3741 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3742 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3743 offset += 4;
3744 else {
3745 mem_type = pci_resource_flags(pdev, i) &
3746 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3747 switch (mem_type) {
3748 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3749 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3750 offset += 4; /* 32 bit */
3751 break;
3752 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3753 offset += 8;
3754 break;
3755 default: /* reserved in PCI 2.2 */
3756 dev_warn(&pdev->dev,
3757 "Base address is invalid\n");
3758 return -1;
3759 break;
3760 }
3761 }
3762 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3763 return i + 1;
3764 }
3765 return -1;
3766 }
3767
3768 /* Fill in bucket_map[], given nsgs (the max number of
3769 * scatter gather elements supported) and bucket[],
3770 * which is an array of 8 integers. The bucket[] array
3771 * contains 8 different DMA transfer sizes (in 16
3772 * byte increments) which the controller uses to fetch
3773 * commands. This function fills in bucket_map[], which
3774 * maps a given number of scatter gather elements to one of
3775 * the 8 DMA transfer sizes. The point of it is to allow the
3776 * controller to only do as much DMA as needed to fetch the
3777 * command, with the DMA transfer size encoded in the lower
3778 * bits of the command address.
3779 */
3780 static void calc_bucket_map(int bucket[], int num_buckets,
3781 int nsgs, int *bucket_map)
3782 {
3783 int i, j, b, size;
3784
3785 /* even a command with 0 SGs requires 4 blocks */
3786 #define MINIMUM_TRANSFER_BLOCKS 4
3787 #define NUM_BUCKETS 8
3788 /* Note, bucket_map must have nsgs+1 entries. */
3789 for (i = 0; i <= nsgs; i++) {
3790 /* Compute size of a command with i SG entries */
3791 size = i + MINIMUM_TRANSFER_BLOCKS;
3792 b = num_buckets; /* Assume the biggest bucket */
3793 /* Find the bucket that is just big enough */
3794 for (j = 0; j < 8; j++) {
3795 if (bucket[j] >= size) {
3796 b = j;
3797 break;
3798 }
3799 }
3800 /* for a command with i SG entries, use bucket b. */
3801 bucket_map[i] = b;
3802 }
3803 }
3804
3805 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3806 {
3807 int i;
3808
3809 /* under certain very rare conditions, this can take awhile.
3810 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3811 * as we enter this code.) */
3812 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3813 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3814 break;
3815 msleep(10);
3816 }
3817 }
3818
3819 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3820 {
3821 /* This is a bit complicated. There are 8 registers on
3822 * the controller which we write to to tell it 8 different
3823 * sizes of commands which there may be. It's a way of
3824 * reducing the DMA done to fetch each command. Encoded into
3825 * each command's tag are 3 bits which communicate to the controller
3826 * which of the eight sizes that command fits within. The size of
3827 * each command depends on how many scatter gather entries there are.
3828 * Each SG entry requires 16 bytes. The eight registers are programmed
3829 * with the number of 16-byte blocks a command of that size requires.
3830 * The smallest command possible requires 5 such 16 byte blocks.
3831 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3832 * blocks. Note, this only extends to the SG entries contained
3833 * within the command block, and does not extend to chained blocks
3834 * of SG elements. bft[] contains the eight values we write to
3835 * the registers. They are not evenly distributed, but have more
3836 * sizes for small commands, and fewer sizes for larger commands.
3837 */
3838 __u32 trans_offset;
3839 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3840 /*
3841 * 5 = 1 s/g entry or 4k
3842 * 6 = 2 s/g entry or 8k
3843 * 8 = 4 s/g entry or 16k
3844 * 10 = 6 s/g entry or 24k
3845 */
3846 unsigned long register_value;
3847 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3848
3849 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3850
3851 /* Controller spec: zero out this buffer. */
3852 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3853 h->reply_pool_head = h->reply_pool;
3854
3855 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3856 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3857 h->blockFetchTable);
3858 writel(bft[0], &h->transtable->BlockFetch0);
3859 writel(bft[1], &h->transtable->BlockFetch1);
3860 writel(bft[2], &h->transtable->BlockFetch2);
3861 writel(bft[3], &h->transtable->BlockFetch3);
3862 writel(bft[4], &h->transtable->BlockFetch4);
3863 writel(bft[5], &h->transtable->BlockFetch5);
3864 writel(bft[6], &h->transtable->BlockFetch6);
3865 writel(bft[7], &h->transtable->BlockFetch7);
3866
3867 /* size of controller ring buffer */
3868 writel(h->max_commands, &h->transtable->RepQSize);
3869 writel(1, &h->transtable->RepQCount);
3870 writel(0, &h->transtable->RepQCtrAddrLow32);
3871 writel(0, &h->transtable->RepQCtrAddrHigh32);
3872 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3873 writel(0, &h->transtable->RepQAddr0High32);
3874 writel(CFGTBL_Trans_Performant,
3875 &(h->cfgtable->HostWrite.TransportRequest));
3876
3877 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3878 cciss_wait_for_mode_change_ack(h);
3879 register_value = readl(&(h->cfgtable->TransportActive));
3880 if (!(register_value & CFGTBL_Trans_Performant))
3881 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3882 " performant mode\n");
3883 }
3884
3885 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3886 {
3887 __u32 trans_support;
3888
3889 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3890 /* Attempt to put controller into performant mode if supported */
3891 /* Does board support performant mode? */
3892 trans_support = readl(&(h->cfgtable->TransportSupport));
3893 if (!(trans_support & PERFORMANT_MODE))
3894 return;
3895
3896 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3897 /* Performant mode demands commands on a 32 byte boundary
3898 * pci_alloc_consistent aligns on page boundarys already.
3899 * Just need to check if divisible by 32
3900 */
3901 if ((sizeof(CommandList_struct) % 32) != 0) {
3902 dev_warn(&h->pdev->dev, "%s %d %s\n",
3903 "cciss info: command size[",
3904 (int)sizeof(CommandList_struct),
3905 "] not divisible by 32, no performant mode..\n");
3906 return;
3907 }
3908
3909 /* Performant mode ring buffer and supporting data structures */
3910 h->reply_pool = (__u64 *)pci_alloc_consistent(
3911 h->pdev, h->max_commands * sizeof(__u64),
3912 &(h->reply_pool_dhandle));
3913
3914 /* Need a block fetch table for performant mode */
3915 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3916 sizeof(__u32)), GFP_KERNEL);
3917
3918 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3919 goto clean_up;
3920
3921 cciss_enter_performant_mode(h);
3922
3923 /* Change the access methods to the performant access methods */
3924 h->access = SA5_performant_access;
3925 h->transMethod = CFGTBL_Trans_Performant;
3926
3927 return;
3928 clean_up:
3929 kfree(h->blockFetchTable);
3930 if (h->reply_pool)
3931 pci_free_consistent(h->pdev,
3932 h->max_commands * sizeof(__u64),
3933 h->reply_pool,
3934 h->reply_pool_dhandle);
3935 return;
3936
3937 } /* cciss_put_controller_into_performant_mode */
3938
3939 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3940 * controllers that are capable. If not, we use IO-APIC mode.
3941 */
3942
3943 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
3944 {
3945 #ifdef CONFIG_PCI_MSI
3946 int err;
3947 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3948 {0, 2}, {0, 3}
3949 };
3950
3951 /* Some boards advertise MSI but don't really support it */
3952 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3953 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3954 goto default_int_mode;
3955
3956 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3957 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
3958 if (!err) {
3959 h->intr[0] = cciss_msix_entries[0].vector;
3960 h->intr[1] = cciss_msix_entries[1].vector;
3961 h->intr[2] = cciss_msix_entries[2].vector;
3962 h->intr[3] = cciss_msix_entries[3].vector;
3963 h->msix_vector = 1;
3964 return;
3965 }
3966 if (err > 0) {
3967 dev_warn(&h->pdev->dev,
3968 "only %d MSI-X vectors available\n", err);
3969 goto default_int_mode;
3970 } else {
3971 dev_warn(&h->pdev->dev,
3972 "MSI-X init failed %d\n", err);
3973 goto default_int_mode;
3974 }
3975 }
3976 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3977 if (!pci_enable_msi(h->pdev))
3978 h->msi_vector = 1;
3979 else
3980 dev_warn(&h->pdev->dev, "MSI init failed\n");
3981 }
3982 default_int_mode:
3983 #endif /* CONFIG_PCI_MSI */
3984 /* if we get here we're going to use the default interrupt mode */
3985 h->intr[PERF_MODE_INT] = h->pdev->irq;
3986 return;
3987 }
3988
3989 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3990 {
3991 int i;
3992 u32 subsystem_vendor_id, subsystem_device_id;
3993
3994 subsystem_vendor_id = pdev->subsystem_vendor;
3995 subsystem_device_id = pdev->subsystem_device;
3996 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3997 subsystem_vendor_id;
3998
3999 for (i = 0; i < ARRAY_SIZE(products); i++) {
4000 /* Stand aside for hpsa driver on request */
4001 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
4002 return -ENODEV;
4003 if (*board_id == products[i].board_id)
4004 return i;
4005 }
4006 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4007 *board_id);
4008 return -ENODEV;
4009 }
4010
4011 static inline bool cciss_board_disabled(ctlr_info_t *h)
4012 {
4013 u16 command;
4014
4015 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4016 return ((command & PCI_COMMAND_MEMORY) == 0);
4017 }
4018
4019 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4020 unsigned long *memory_bar)
4021 {
4022 int i;
4023
4024 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4025 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4026 /* addressing mode bits already removed */
4027 *memory_bar = pci_resource_start(pdev, i);
4028 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4029 *memory_bar);
4030 return 0;
4031 }
4032 dev_warn(&pdev->dev, "no memory BAR found\n");
4033 return -ENODEV;
4034 }
4035
4036 static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4037 {
4038 int i;
4039 u32 scratchpad;
4040
4041 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4042 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4043 if (scratchpad == CCISS_FIRMWARE_READY)
4044 return 0;
4045 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4046 }
4047 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4048 return -ENODEV;
4049 }
4050
4051 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4052 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4053 u64 *cfg_offset)
4054 {
4055 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4056 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4057 *cfg_base_addr &= (u32) 0x0000ffff;
4058 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4059 if (*cfg_base_addr_index == -1) {
4060 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4061 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4062 return -ENODEV;
4063 }
4064 return 0;
4065 }
4066
4067 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4068 {
4069 u64 cfg_offset;
4070 u32 cfg_base_addr;
4071 u64 cfg_base_addr_index;
4072 u32 trans_offset;
4073 int rc;
4074
4075 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4076 &cfg_base_addr_index, &cfg_offset);
4077 if (rc)
4078 return rc;
4079 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4080 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4081 if (!h->cfgtable)
4082 return -ENOMEM;
4083 /* Find performant mode table. */
4084 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4085 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4086 cfg_base_addr_index)+cfg_offset+trans_offset,
4087 sizeof(*h->transtable));
4088 if (!h->transtable)
4089 return -ENOMEM;
4090 return 0;
4091 }
4092
4093 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4094 {
4095 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4096 if (h->max_commands < 16) {
4097 dev_warn(&h->pdev->dev, "Controller reports "
4098 "max supported commands of %d, an obvious lie. "
4099 "Using 16. Ensure that firmware is up to date.\n",
4100 h->max_commands);
4101 h->max_commands = 16;
4102 }
4103 }
4104
4105 /* Interrogate the hardware for some limits:
4106 * max commands, max SG elements without chaining, and with chaining,
4107 * SG chain block size, etc.
4108 */
4109 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4110 {
4111 cciss_get_max_perf_mode_cmds(h);
4112 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4113 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4114 /*
4115 * Limit in-command s/g elements to 32 save dma'able memory.
4116 * Howvever spec says if 0, use 31
4117 */
4118 h->max_cmd_sgentries = 31;
4119 if (h->maxsgentries > 512) {
4120 h->max_cmd_sgentries = 32;
4121 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4122 h->maxsgentries--; /* save one for chain pointer */
4123 } else {
4124 h->maxsgentries = 31; /* default to traditional values */
4125 h->chainsize = 0;
4126 }
4127 }
4128
4129 static inline bool CISS_signature_present(ctlr_info_t *h)
4130 {
4131 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4132 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4133 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4134 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4135 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4136 return false;
4137 }
4138 return true;
4139 }
4140
4141 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4142 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4143 {
4144 #ifdef CONFIG_X86
4145 u32 prefetch;
4146
4147 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4148 prefetch |= 0x100;
4149 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4150 #endif
4151 }
4152
4153 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4154 * in a prefetch beyond physical memory.
4155 */
4156 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4157 {
4158 u32 dma_prefetch;
4159 __u32 dma_refetch;
4160
4161 if (h->board_id != 0x3225103C)
4162 return;
4163 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4164 dma_prefetch |= 0x8000;
4165 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4166 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4167 dma_refetch |= 0x1;
4168 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4169 }
4170
4171 static int __devinit cciss_pci_init(ctlr_info_t *h)
4172 {
4173 int prod_index, err;
4174
4175 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4176 if (prod_index < 0)
4177 return -ENODEV;
4178 h->product_name = products[prod_index].product_name;
4179 h->access = *(products[prod_index].access);
4180
4181 if (cciss_board_disabled(h)) {
4182 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4183 return -ENODEV;
4184 }
4185 err = pci_enable_device(h->pdev);
4186 if (err) {
4187 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4188 return err;
4189 }
4190
4191 err = pci_request_regions(h->pdev, "cciss");
4192 if (err) {
4193 dev_warn(&h->pdev->dev,
4194 "Cannot obtain PCI resources, aborting\n");
4195 return err;
4196 }
4197
4198 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4199 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4200
4201 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4202 * else we use the IO-APIC interrupt assigned to us by system ROM.
4203 */
4204 cciss_interrupt_mode(h);
4205 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4206 if (err)
4207 goto err_out_free_res;
4208 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4209 if (!h->vaddr) {
4210 err = -ENOMEM;
4211 goto err_out_free_res;
4212 }
4213 err = cciss_wait_for_board_ready(h);
4214 if (err)
4215 goto err_out_free_res;
4216 err = cciss_find_cfgtables(h);
4217 if (err)
4218 goto err_out_free_res;
4219 print_cfg_table(h);
4220 cciss_find_board_params(h);
4221
4222 if (!CISS_signature_present(h)) {
4223 err = -ENODEV;
4224 goto err_out_free_res;
4225 }
4226 cciss_enable_scsi_prefetch(h);
4227 cciss_p600_dma_prefetch_quirk(h);
4228 cciss_put_controller_into_performant_mode(h);
4229 return 0;
4230
4231 err_out_free_res:
4232 /*
4233 * Deliberately omit pci_disable_device(): it does something nasty to
4234 * Smart Array controllers that pci_enable_device does not undo
4235 */
4236 if (h->transtable)
4237 iounmap(h->transtable);
4238 if (h->cfgtable)
4239 iounmap(h->cfgtable);
4240 if (h->vaddr)
4241 iounmap(h->vaddr);
4242 pci_release_regions(h->pdev);
4243 return err;
4244 }
4245
4246 /* Function to find the first free pointer into our hba[] array
4247 * Returns -1 if no free entries are left.
4248 */
4249 static int alloc_cciss_hba(struct pci_dev *pdev)
4250 {
4251 int i;
4252
4253 for (i = 0; i < MAX_CTLR; i++) {
4254 if (!hba[i]) {
4255 ctlr_info_t *h;
4256
4257 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4258 if (!h)
4259 goto Enomem;
4260 hba[i] = h;
4261 return i;
4262 }
4263 }
4264 dev_warn(&pdev->dev, "This driver supports a maximum"
4265 " of %d controllers.\n", MAX_CTLR);
4266 return -1;
4267 Enomem:
4268 dev_warn(&pdev->dev, "out of memory.\n");
4269 return -1;
4270 }
4271
4272 static void free_hba(ctlr_info_t *h)
4273 {
4274 int i;
4275
4276 hba[h->ctlr] = NULL;
4277 for (i = 0; i < h->highest_lun + 1; i++)
4278 if (h->gendisk[i] != NULL)
4279 put_disk(h->gendisk[i]);
4280 kfree(h);
4281 }
4282
4283 /* Send a message CDB to the firmware. */
4284 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4285 {
4286 typedef struct {
4287 CommandListHeader_struct CommandHeader;
4288 RequestBlock_struct Request;
4289 ErrDescriptor_struct ErrorDescriptor;
4290 } Command;
4291 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4292 Command *cmd;
4293 dma_addr_t paddr64;
4294 uint32_t paddr32, tag;
4295 void __iomem *vaddr;
4296 int i, err;
4297
4298 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4299 if (vaddr == NULL)
4300 return -ENOMEM;
4301
4302 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4303 CCISS commands, so they must be allocated from the lower 4GiB of
4304 memory. */
4305 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4306 if (err) {
4307 iounmap(vaddr);
4308 return -ENOMEM;
4309 }
4310
4311 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4312 if (cmd == NULL) {
4313 iounmap(vaddr);
4314 return -ENOMEM;
4315 }
4316
4317 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4318 although there's no guarantee, we assume that the address is at
4319 least 4-byte aligned (most likely, it's page-aligned). */
4320 paddr32 = paddr64;
4321
4322 cmd->CommandHeader.ReplyQueue = 0;
4323 cmd->CommandHeader.SGList = 0;
4324 cmd->CommandHeader.SGTotal = 0;
4325 cmd->CommandHeader.Tag.lower = paddr32;
4326 cmd->CommandHeader.Tag.upper = 0;
4327 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4328
4329 cmd->Request.CDBLen = 16;
4330 cmd->Request.Type.Type = TYPE_MSG;
4331 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4332 cmd->Request.Type.Direction = XFER_NONE;
4333 cmd->Request.Timeout = 0; /* Don't time out */
4334 cmd->Request.CDB[0] = opcode;
4335 cmd->Request.CDB[1] = type;
4336 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4337
4338 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4339 cmd->ErrorDescriptor.Addr.upper = 0;
4340 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4341
4342 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4343
4344 for (i = 0; i < 10; i++) {
4345 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4346 if ((tag & ~3) == paddr32)
4347 break;
4348 schedule_timeout_uninterruptible(HZ);
4349 }
4350
4351 iounmap(vaddr);
4352
4353 /* we leak the DMA buffer here ... no choice since the controller could
4354 still complete the command. */
4355 if (i == 10) {
4356 dev_err(&pdev->dev,
4357 "controller message %02x:%02x timed out\n",
4358 opcode, type);
4359 return -ETIMEDOUT;
4360 }
4361
4362 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4363
4364 if (tag & 2) {
4365 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4366 opcode, type);
4367 return -EIO;
4368 }
4369
4370 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4371 opcode, type);
4372 return 0;
4373 }
4374
4375 #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4376 #define cciss_noop(p) cciss_message(p, 3, 0)
4377
4378 static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4379 {
4380 /* the #defines are stolen from drivers/pci/msi.h. */
4381 #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4382 #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4383
4384 int pos;
4385 u16 control = 0;
4386
4387 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4388 if (pos) {
4389 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4390 if (control & PCI_MSI_FLAGS_ENABLE) {
4391 dev_info(&pdev->dev, "resetting MSI\n");
4392 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4393 }
4394 }
4395
4396 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4397 if (pos) {
4398 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4399 if (control & PCI_MSIX_FLAGS_ENABLE) {
4400 dev_info(&pdev->dev, "resetting MSI-X\n");
4401 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4402 }
4403 }
4404
4405 return 0;
4406 }
4407
4408 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4409 void * __iomem vaddr, bool use_doorbell)
4410 {
4411 u16 pmcsr;
4412 int pos;
4413
4414 if (use_doorbell) {
4415 /* For everything after the P600, the PCI power state method
4416 * of resetting the controller doesn't work, so we have this
4417 * other way using the doorbell register.
4418 */
4419 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4420 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4421 msleep(1000);
4422 } else { /* Try to do it the PCI power state way */
4423
4424 /* Quoting from the Open CISS Specification: "The Power
4425 * Management Control/Status Register (CSR) controls the power
4426 * state of the device. The normal operating state is D0,
4427 * CSR=00h. The software off state is D3, CSR=03h. To reset
4428 * the controller, place the interface device in D3 then to D0,
4429 * this causes a secondary PCI reset which will reset the
4430 * controller." */
4431
4432 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4433 if (pos == 0) {
4434 dev_err(&pdev->dev,
4435 "cciss_controller_hard_reset: "
4436 "PCI PM not supported\n");
4437 return -ENODEV;
4438 }
4439 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4440 /* enter the D3hot power management state */
4441 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4442 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4443 pmcsr |= PCI_D3hot;
4444 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4445
4446 msleep(500);
4447
4448 /* enter the D0 power management state */
4449 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4450 pmcsr |= PCI_D0;
4451 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4452
4453 msleep(500);
4454 }
4455 return 0;
4456 }
4457
4458 /* This does a hard reset of the controller using PCI power management
4459 * states or using the doorbell register. */
4460 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4461 {
4462 u16 saved_config_space[32];
4463 u64 cfg_offset;
4464 u32 cfg_base_addr;
4465 u64 cfg_base_addr_index;
4466 void __iomem *vaddr;
4467 unsigned long paddr;
4468 u32 misc_fw_support, active_transport;
4469 int rc, i;
4470 CfgTable_struct __iomem *cfgtable;
4471 bool use_doorbell;
4472 u32 board_id;
4473
4474 /* For controllers as old a the p600, this is very nearly
4475 * the same thing as
4476 *
4477 * pci_save_state(pci_dev);
4478 * pci_set_power_state(pci_dev, PCI_D3hot);
4479 * pci_set_power_state(pci_dev, PCI_D0);
4480 * pci_restore_state(pci_dev);
4481 *
4482 * but we can't use these nice canned kernel routines on
4483 * kexec, because they also check the MSI/MSI-X state in PCI
4484 * configuration space and do the wrong thing when it is
4485 * set/cleared. Also, the pci_save/restore_state functions
4486 * violate the ordering requirements for restoring the
4487 * configuration space from the CCISS document (see the
4488 * comment below). So we roll our own ....
4489 *
4490 * For controllers newer than the P600, the pci power state
4491 * method of resetting doesn't work so we have another way
4492 * using the doorbell register.
4493 */
4494
4495 /* Exclude 640x boards. These are two pci devices in one slot
4496 * which share a battery backed cache module. One controls the
4497 * cache, the other accesses the cache through the one that controls
4498 * it. If we reset the one controlling the cache, the other will
4499 * likely not be happy. Just forbid resetting this conjoined mess.
4500 */
4501 cciss_lookup_board_id(pdev, &board_id);
4502 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4503 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4504 "due to shared cache module.");
4505 return -ENODEV;
4506 }
4507
4508 for (i = 0; i < 32; i++)
4509 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
4510
4511 /* find the first memory BAR, so we can find the cfg table */
4512 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4513 if (rc)
4514 return rc;
4515 vaddr = remap_pci_mem(paddr, 0x250);
4516 if (!vaddr)
4517 return -ENOMEM;
4518
4519 /* find cfgtable in order to check if reset via doorbell is supported */
4520 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4521 &cfg_base_addr_index, &cfg_offset);
4522 if (rc)
4523 goto unmap_vaddr;
4524 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4525 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4526 if (!cfgtable) {
4527 rc = -ENOMEM;
4528 goto unmap_vaddr;
4529 }
4530
4531 /* If reset via doorbell register is supported, use that. */
4532 misc_fw_support = readl(&cfgtable->misc_fw_support);
4533 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4534
4535 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4536 if (rc)
4537 goto unmap_cfgtable;
4538
4539 /* Restore the PCI configuration space. The Open CISS
4540 * Specification says, "Restore the PCI Configuration
4541 * Registers, offsets 00h through 60h. It is important to
4542 * restore the command register, 16-bits at offset 04h,
4543 * last. Do not restore the configuration status register,
4544 * 16-bits at offset 06h." Note that the offset is 2*i.
4545 */
4546 for (i = 0; i < 32; i++) {
4547 if (i == 2 || i == 3)
4548 continue;
4549 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4550 }
4551 wmb();
4552 pci_write_config_word(pdev, 4, saved_config_space[2]);
4553
4554 /* Some devices (notably the HP Smart Array 5i Controller)
4555 need a little pause here */
4556 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4557
4558 /* Controller should be in simple mode at this point. If it's not,
4559 * It means we're on one of those controllers which doesn't support
4560 * the doorbell reset method and on which the PCI power management reset
4561 * method doesn't work (P800, for example.)
4562 * In those cases, don't try to proceed, as it generally doesn't work.
4563 */
4564 active_transport = readl(&cfgtable->TransportActive);
4565 if (active_transport & PERFORMANT_MODE) {
4566 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4567 " Ignoring controller.\n");
4568 rc = -ENODEV;
4569 }
4570
4571 unmap_cfgtable:
4572 iounmap(cfgtable);
4573
4574 unmap_vaddr:
4575 iounmap(vaddr);
4576 return rc;
4577 }
4578
4579 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4580 {
4581 int rc, i;
4582
4583 if (!reset_devices)
4584 return 0;
4585
4586 /* Reset the controller with a PCI power-cycle or via doorbell */
4587 rc = cciss_kdump_hard_reset_controller(pdev);
4588
4589 /* -ENOTSUPP here means we cannot reset the controller
4590 * but it's already (and still) up and running in
4591 * "performant mode". Or, it might be 640x, which can't reset
4592 * due to concerns about shared bbwc between 6402/6404 pair.
4593 */
4594 if (rc == -ENOTSUPP)
4595 return 0; /* just try to do the kdump anyhow. */
4596 if (rc)
4597 return -ENODEV;
4598 if (cciss_reset_msi(pdev))
4599 return -ENODEV;
4600
4601 /* Now try to get the controller to respond to a no-op */
4602 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4603 if (cciss_noop(pdev) == 0)
4604 break;
4605 else
4606 dev_warn(&pdev->dev, "no-op failed%s\n",
4607 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4608 "; re-trying" : ""));
4609 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4610 }
4611 return 0;
4612 }
4613
4614 /*
4615 * This is it. Find all the controllers and register them. I really hate
4616 * stealing all these major device numbers.
4617 * returns the number of block devices registered.
4618 */
4619 static int __devinit cciss_init_one(struct pci_dev *pdev,
4620 const struct pci_device_id *ent)
4621 {
4622 int i;
4623 int j = 0;
4624 int k = 0;
4625 int rc;
4626 int dac, return_code;
4627 InquiryData_struct *inq_buff;
4628 ctlr_info_t *h;
4629
4630 rc = cciss_init_reset_devices(pdev);
4631 if (rc)
4632 return rc;
4633 i = alloc_cciss_hba(pdev);
4634 if (i < 0)
4635 return -1;
4636
4637 h = hba[i];
4638 h->pdev = pdev;
4639 h->busy_initializing = 1;
4640 INIT_HLIST_HEAD(&h->cmpQ);
4641 INIT_HLIST_HEAD(&h->reqQ);
4642 mutex_init(&h->busy_shutting_down);
4643
4644 if (cciss_pci_init(h) != 0)
4645 goto clean_no_release_regions;
4646
4647 sprintf(h->devname, "cciss%d", i);
4648 h->ctlr = i;
4649
4650 init_completion(&h->scan_wait);
4651
4652 if (cciss_create_hba_sysfs_entry(h))
4653 goto clean0;
4654
4655 /* configure PCI DMA stuff */
4656 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4657 dac = 1;
4658 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4659 dac = 0;
4660 else {
4661 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4662 goto clean1;
4663 }
4664
4665 /*
4666 * register with the major number, or get a dynamic major number
4667 * by passing 0 as argument. This is done for greater than
4668 * 8 controller support.
4669 */
4670 if (i < MAX_CTLR_ORIG)
4671 h->major = COMPAQ_CISS_MAJOR + i;
4672 rc = register_blkdev(h->major, h->devname);
4673 if (rc == -EBUSY || rc == -EINVAL) {
4674 dev_err(&h->pdev->dev,
4675 "Unable to get major number %d for %s "
4676 "on hba %d\n", h->major, h->devname, i);
4677 goto clean1;
4678 } else {
4679 if (i >= MAX_CTLR_ORIG)
4680 h->major = rc;
4681 }
4682
4683 /* make sure the board interrupts are off */
4684 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4685 if (h->msi_vector || h->msix_vector) {
4686 if (request_irq(h->intr[PERF_MODE_INT],
4687 do_cciss_msix_intr,
4688 IRQF_DISABLED, h->devname, h)) {
4689 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4690 h->intr[PERF_MODE_INT], h->devname);
4691 goto clean2;
4692 }
4693 } else {
4694 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4695 IRQF_DISABLED, h->devname, h)) {
4696 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4697 h->intr[PERF_MODE_INT], h->devname);
4698 goto clean2;
4699 }
4700 }
4701
4702 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
4703 h->devname, pdev->device, pci_name(pdev),
4704 h->intr[PERF_MODE_INT], dac ? "" : " not");
4705
4706 h->cmd_pool_bits =
4707 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4708 * sizeof(unsigned long), GFP_KERNEL);
4709 h->cmd_pool = (CommandList_struct *)
4710 pci_alloc_consistent(h->pdev,
4711 h->nr_cmds * sizeof(CommandList_struct),
4712 &(h->cmd_pool_dhandle));
4713 h->errinfo_pool = (ErrorInfo_struct *)
4714 pci_alloc_consistent(h->pdev,
4715 h->nr_cmds * sizeof(ErrorInfo_struct),
4716 &(h->errinfo_pool_dhandle));
4717 if ((h->cmd_pool_bits == NULL)
4718 || (h->cmd_pool == NULL)
4719 || (h->errinfo_pool == NULL)) {
4720 dev_err(&h->pdev->dev, "out of memory");
4721 goto clean4;
4722 }
4723
4724 /* Need space for temp scatter list */
4725 h->scatter_list = kmalloc(h->max_commands *
4726 sizeof(struct scatterlist *),
4727 GFP_KERNEL);
4728 for (k = 0; k < h->nr_cmds; k++) {
4729 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4730 h->maxsgentries,
4731 GFP_KERNEL);
4732 if (h->scatter_list[k] == NULL) {
4733 dev_err(&h->pdev->dev,
4734 "could not allocate s/g lists\n");
4735 goto clean4;
4736 }
4737 }
4738 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4739 h->chainsize, h->nr_cmds);
4740 if (!h->cmd_sg_list && h->chainsize > 0)
4741 goto clean4;
4742
4743 spin_lock_init(&h->lock);
4744
4745 /* Initialize the pdev driver private data.
4746 have it point to h. */
4747 pci_set_drvdata(pdev, h);
4748 /* command and error info recs zeroed out before
4749 they are used */
4750 memset(h->cmd_pool_bits, 0,
4751 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4752 * sizeof(unsigned long));
4753
4754 h->num_luns = 0;
4755 h->highest_lun = -1;
4756 for (j = 0; j < CISS_MAX_LUN; j++) {
4757 h->drv[j] = NULL;
4758 h->gendisk[j] = NULL;
4759 }
4760
4761 cciss_scsi_setup(h);
4762
4763 /* Turn the interrupts on so we can service requests */
4764 h->access.set_intr_mask(h, CCISS_INTR_ON);
4765
4766 /* Get the firmware version */
4767 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4768 if (inq_buff == NULL) {
4769 dev_err(&h->pdev->dev, "out of memory\n");
4770 goto clean4;
4771 }
4772
4773 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
4774 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
4775 if (return_code == IO_OK) {
4776 h->firm_ver[0] = inq_buff->data_byte[32];
4777 h->firm_ver[1] = inq_buff->data_byte[33];
4778 h->firm_ver[2] = inq_buff->data_byte[34];
4779 h->firm_ver[3] = inq_buff->data_byte[35];
4780 } else { /* send command failed */
4781 dev_warn(&h->pdev->dev, "unable to determine firmware"
4782 " version of controller\n");
4783 }
4784 kfree(inq_buff);
4785
4786 cciss_procinit(h);
4787
4788 h->cciss_max_sectors = 8192;
4789
4790 rebuild_lun_table(h, 1, 0);
4791 h->busy_initializing = 0;
4792 return 1;
4793
4794 clean4:
4795 kfree(h->cmd_pool_bits);
4796 /* Free up sg elements */
4797 for (k = 0; k < h->nr_cmds; k++)
4798 kfree(h->scatter_list[k]);
4799 kfree(h->scatter_list);
4800 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4801 if (h->cmd_pool)
4802 pci_free_consistent(h->pdev,
4803 h->nr_cmds * sizeof(CommandList_struct),
4804 h->cmd_pool, h->cmd_pool_dhandle);
4805 if (h->errinfo_pool)
4806 pci_free_consistent(h->pdev,
4807 h->nr_cmds * sizeof(ErrorInfo_struct),
4808 h->errinfo_pool,
4809 h->errinfo_pool_dhandle);
4810 free_irq(h->intr[PERF_MODE_INT], h);
4811 clean2:
4812 unregister_blkdev(h->major, h->devname);
4813 clean1:
4814 cciss_destroy_hba_sysfs_entry(h);
4815 clean0:
4816 pci_release_regions(pdev);
4817 clean_no_release_regions:
4818 h->busy_initializing = 0;
4819
4820 /*
4821 * Deliberately omit pci_disable_device(): it does something nasty to
4822 * Smart Array controllers that pci_enable_device does not undo
4823 */
4824 pci_set_drvdata(pdev, NULL);
4825 free_hba(h);
4826 return -1;
4827 }
4828
4829 static void cciss_shutdown(struct pci_dev *pdev)
4830 {
4831 ctlr_info_t *h;
4832 char *flush_buf;
4833 int return_code;
4834
4835 h = pci_get_drvdata(pdev);
4836 flush_buf = kzalloc(4, GFP_KERNEL);
4837 if (!flush_buf) {
4838 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
4839 return;
4840 }
4841 /* write all data in the battery backed cache to disk */
4842 memset(flush_buf, 0, 4);
4843 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
4844 4, 0, CTLR_LUNID, TYPE_CMD);
4845 kfree(flush_buf);
4846 if (return_code != IO_OK)
4847 dev_warn(&h->pdev->dev, "Error flushing cache\n");
4848 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4849 free_irq(h->intr[PERF_MODE_INT], h);
4850 }
4851
4852 static void __devexit cciss_remove_one(struct pci_dev *pdev)
4853 {
4854 ctlr_info_t *h;
4855 int i, j;
4856
4857 if (pci_get_drvdata(pdev) == NULL) {
4858 dev_err(&pdev->dev, "Unable to remove device\n");
4859 return;
4860 }
4861
4862 h = pci_get_drvdata(pdev);
4863 i = h->ctlr;
4864 if (hba[i] == NULL) {
4865 dev_err(&pdev->dev, "device appears to already be removed\n");
4866 return;
4867 }
4868
4869 mutex_lock(&h->busy_shutting_down);
4870
4871 remove_from_scan_list(h);
4872 remove_proc_entry(h->devname, proc_cciss);
4873 unregister_blkdev(h->major, h->devname);
4874
4875 /* remove it from the disk list */
4876 for (j = 0; j < CISS_MAX_LUN; j++) {
4877 struct gendisk *disk = h->gendisk[j];
4878 if (disk) {
4879 struct request_queue *q = disk->queue;
4880
4881 if (disk->flags & GENHD_FL_UP) {
4882 cciss_destroy_ld_sysfs_entry(h, j, 1);
4883 del_gendisk(disk);
4884 }
4885 if (q)
4886 blk_cleanup_queue(q);
4887 }
4888 }
4889
4890 #ifdef CONFIG_CISS_SCSI_TAPE
4891 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
4892 #endif
4893
4894 cciss_shutdown(pdev);
4895
4896 #ifdef CONFIG_PCI_MSI
4897 if (h->msix_vector)
4898 pci_disable_msix(h->pdev);
4899 else if (h->msi_vector)
4900 pci_disable_msi(h->pdev);
4901 #endif /* CONFIG_PCI_MSI */
4902
4903 iounmap(h->transtable);
4904 iounmap(h->cfgtable);
4905 iounmap(h->vaddr);
4906
4907 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4908 h->cmd_pool, h->cmd_pool_dhandle);
4909 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4910 h->errinfo_pool, h->errinfo_pool_dhandle);
4911 kfree(h->cmd_pool_bits);
4912 /* Free up sg elements */
4913 for (j = 0; j < h->nr_cmds; j++)
4914 kfree(h->scatter_list[j]);
4915 kfree(h->scatter_list);
4916 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4917 /*
4918 * Deliberately omit pci_disable_device(): it does something nasty to
4919 * Smart Array controllers that pci_enable_device does not undo
4920 */
4921 pci_release_regions(pdev);
4922 pci_set_drvdata(pdev, NULL);
4923 cciss_destroy_hba_sysfs_entry(h);
4924 mutex_unlock(&h->busy_shutting_down);
4925 free_hba(h);
4926 }
4927
4928 static struct pci_driver cciss_pci_driver = {
4929 .name = "cciss",
4930 .probe = cciss_init_one,
4931 .remove = __devexit_p(cciss_remove_one),
4932 .id_table = cciss_pci_device_id, /* id_table */
4933 .shutdown = cciss_shutdown,
4934 };
4935
4936 /*
4937 * This is it. Register the PCI driver information for the cards we control
4938 * the OS will call our registered routines when it finds one of our cards.
4939 */
4940 static int __init cciss_init(void)
4941 {
4942 int err;
4943
4944 /*
4945 * The hardware requires that commands are aligned on a 64-bit
4946 * boundary. Given that we use pci_alloc_consistent() to allocate an
4947 * array of them, the size must be a multiple of 8 bytes.
4948 */
4949 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
4950 printk(KERN_INFO DRIVER_NAME "\n");
4951
4952 err = bus_register(&cciss_bus_type);
4953 if (err)
4954 return err;
4955
4956 /* Start the scan thread */
4957 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4958 if (IS_ERR(cciss_scan_thread)) {
4959 err = PTR_ERR(cciss_scan_thread);
4960 goto err_bus_unregister;
4961 }
4962
4963 /* Register for our PCI devices */
4964 err = pci_register_driver(&cciss_pci_driver);
4965 if (err)
4966 goto err_thread_stop;
4967
4968 return err;
4969
4970 err_thread_stop:
4971 kthread_stop(cciss_scan_thread);
4972 err_bus_unregister:
4973 bus_unregister(&cciss_bus_type);
4974
4975 return err;
4976 }
4977
4978 static void __exit cciss_cleanup(void)
4979 {
4980 int i;
4981
4982 pci_unregister_driver(&cciss_pci_driver);
4983 /* double check that all controller entrys have been removed */
4984 for (i = 0; i < MAX_CTLR; i++) {
4985 if (hba[i] != NULL) {
4986 dev_warn(&hba[i]->pdev->dev,
4987 "had to remove controller\n");
4988 cciss_remove_one(hba[i]->pdev);
4989 }
4990 }
4991 kthread_stop(cciss_scan_thread);
4992 remove_proc_entry("driver/cciss", NULL);
4993 bus_unregister(&cciss_bus_type);
4994 }
4995
4996 module_init(cciss_init);
4997 module_exit(cciss_cleanup);
kernel-based virtual machine