USB: make usb_release_interface static
[linux-2.6/kvm.git] / drivers / net / au1000_eth.c
blobb46c5d8a77bdca845398d26a90d97d02f8ee60d6
1 /*
3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
37 #include <linux/dma-mapping.h>
38 #include <linux/module.h>
39 #include <linux/kernel.h>
40 #include <linux/string.h>
41 #include <linux/timer.h>
42 #include <linux/errno.h>
43 #include <linux/in.h>
44 #include <linux/ioport.h>
45 #include <linux/bitops.h>
46 #include <linux/slab.h>
47 #include <linux/interrupt.h>
48 #include <linux/init.h>
49 #include <linux/netdevice.h>
50 #include <linux/etherdevice.h>
51 #include <linux/ethtool.h>
52 #include <linux/mii.h>
53 #include <linux/skbuff.h>
54 #include <linux/delay.h>
55 #include <linux/crc32.h>
56 #include <linux/phy.h>
57 #include <asm/mipsregs.h>
58 #include <asm/irq.h>
59 #include <asm/io.h>
60 #include <asm/processor.h>
62 #include <asm/mach-au1x00/au1000.h>
63 #include <asm/cpu.h>
64 #include "au1000_eth.h"
66 #ifdef AU1000_ETH_DEBUG
67 static int au1000_debug = 5;
68 #else
69 static int au1000_debug = 3;
70 #endif
72 #define DRV_NAME "au1000_eth"
73 #define DRV_VERSION "1.6"
74 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
75 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
77 MODULE_AUTHOR(DRV_AUTHOR);
78 MODULE_DESCRIPTION(DRV_DESC);
79 MODULE_LICENSE("GPL");
81 // prototypes
82 static void hard_stop(struct net_device *);
83 static void enable_rx_tx(struct net_device *dev);
84 static struct net_device * au1000_probe(int port_num);
85 static int au1000_init(struct net_device *);
86 static int au1000_open(struct net_device *);
87 static int au1000_close(struct net_device *);
88 static int au1000_tx(struct sk_buff *, struct net_device *);
89 static int au1000_rx(struct net_device *);
90 static irqreturn_t au1000_interrupt(int, void *);
91 static void au1000_tx_timeout(struct net_device *);
92 static void set_rx_mode(struct net_device *);
93 static int au1000_ioctl(struct net_device *, struct ifreq *, int);
94 static int mdio_read(struct net_device *, int, int);
95 static void mdio_write(struct net_device *, int, int, u16);
96 static void au1000_adjust_link(struct net_device *);
97 static void enable_mac(struct net_device *, int);
99 // externs
100 extern int get_ethernet_addr(char *ethernet_addr);
101 extern void str2eaddr(unsigned char *ea, unsigned char *str);
102 extern char * prom_getcmdline(void);
105 * Theory of operation
107 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
108 * There are four receive and four transmit descriptors. These
109 * descriptors are not in memory; rather, they are just a set of
110 * hardware registers.
112 * Since the Au1000 has a coherent data cache, the receive and
113 * transmit buffers are allocated from the KSEG0 segment. The
114 * hardware registers, however, are still mapped at KSEG1 to
115 * make sure there's no out-of-order writes, and that all writes
116 * complete immediately.
119 /* These addresses are only used if yamon doesn't tell us what
120 * the mac address is, and the mac address is not passed on the
121 * command line.
123 static unsigned char au1000_mac_addr[6] __devinitdata = {
124 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
127 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
130 * board-specific configurations
132 * PHY detection algorithm
134 * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
135 * autodetected:
137 * mii_probe() first searches the current MAC's MII bus for a PHY,
138 * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
139 * defined) PHY address not already claimed by another netdev.
141 * If nothing was found that way when searching for the 2nd ethernet
142 * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
143 * the first MII bus is searched as well for an unclaimed PHY; this is
144 * needed in case of a dual-PHY accessible only through the MAC0's MII
145 * bus.
147 * Finally, if no PHY is found, then the corresponding ethernet
148 * controller is not registered to the network subsystem.
151 /* autodetection defaults */
152 #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
153 #define AU1XXX_PHY1_SEARCH_ON_MAC0
155 /* static PHY setup
157 * most boards PHY setup should be detectable properly with the
158 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
159 * you have a switch attached, or want to use the PHY's interrupt
160 * notification capabilities) you can provide a static PHY
161 * configuration here
163 * IRQs may only be set, if a PHY address was configured
164 * If a PHY address is given, also a bus id is required to be set
166 * ps: make sure the used irqs are configured properly in the board
167 * specific irq-map
170 #if defined(CONFIG_MIPS_BOSPORUS)
172 * Micrel/Kendin 5 port switch attached to MAC0,
173 * MAC0 is associated with PHY address 5 (== WAN port)
174 * MAC1 is not associated with any PHY, since it's connected directly
175 * to the switch.
176 * no interrupts are used
178 # define AU1XXX_PHY_STATIC_CONFIG
180 # define AU1XXX_PHY0_ADDR 5
181 # define AU1XXX_PHY0_BUSID 0
182 # undef AU1XXX_PHY0_IRQ
184 # undef AU1XXX_PHY1_ADDR
185 # undef AU1XXX_PHY1_BUSID
186 # undef AU1XXX_PHY1_IRQ
187 #endif
189 #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
190 # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
191 #endif
194 * MII operations
196 static int mdio_read(struct net_device *dev, int phy_addr, int reg)
198 struct au1000_private *aup = (struct au1000_private *) dev->priv;
199 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
200 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
201 u32 timedout = 20;
202 u32 mii_control;
204 while (*mii_control_reg & MAC_MII_BUSY) {
205 mdelay(1);
206 if (--timedout == 0) {
207 printk(KERN_ERR "%s: read_MII busy timeout!!\n",
208 dev->name);
209 return -1;
213 mii_control = MAC_SET_MII_SELECT_REG(reg) |
214 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
216 *mii_control_reg = mii_control;
218 timedout = 20;
219 while (*mii_control_reg & MAC_MII_BUSY) {
220 mdelay(1);
221 if (--timedout == 0) {
222 printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
223 dev->name);
224 return -1;
227 return (int)*mii_data_reg;
230 static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
232 struct au1000_private *aup = (struct au1000_private *) dev->priv;
233 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
234 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
235 u32 timedout = 20;
236 u32 mii_control;
238 while (*mii_control_reg & MAC_MII_BUSY) {
239 mdelay(1);
240 if (--timedout == 0) {
241 printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
242 dev->name);
243 return;
247 mii_control = MAC_SET_MII_SELECT_REG(reg) |
248 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
250 *mii_data_reg = value;
251 *mii_control_reg = mii_control;
254 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
256 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
257 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
258 struct net_device *const dev = bus->priv;
260 enable_mac(dev, 0); /* make sure the MAC associated with this
261 * mii_bus is enabled */
262 return mdio_read(dev, phy_addr, regnum);
265 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
266 u16 value)
268 struct net_device *const dev = bus->priv;
270 enable_mac(dev, 0); /* make sure the MAC associated with this
271 * mii_bus is enabled */
272 mdio_write(dev, phy_addr, regnum, value);
273 return 0;
276 static int mdiobus_reset(struct mii_bus *bus)
278 struct net_device *const dev = bus->priv;
280 enable_mac(dev, 0); /* make sure the MAC associated with this
281 * mii_bus is enabled */
282 return 0;
285 static int mii_probe (struct net_device *dev)
287 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
288 struct phy_device *phydev = NULL;
290 #if defined(AU1XXX_PHY_STATIC_CONFIG)
291 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
293 if(aup->mac_id == 0) { /* get PHY0 */
294 # if defined(AU1XXX_PHY0_ADDR)
295 phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
296 # else
297 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
298 dev->name);
299 return 0;
300 # endif /* defined(AU1XXX_PHY0_ADDR) */
301 } else if (aup->mac_id == 1) { /* get PHY1 */
302 # if defined(AU1XXX_PHY1_ADDR)
303 phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
304 # else
305 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
306 dev->name);
307 return 0;
308 # endif /* defined(AU1XXX_PHY1_ADDR) */
311 #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
312 int phy_addr;
314 /* find the first (lowest address) PHY on the current MAC's MII bus */
315 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
316 if (aup->mii_bus.phy_map[phy_addr]) {
317 phydev = aup->mii_bus.phy_map[phy_addr];
318 # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
319 break; /* break out with first one found */
320 # endif
323 # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
324 /* try harder to find a PHY */
325 if (!phydev && (aup->mac_id == 1)) {
326 /* no PHY found, maybe we have a dual PHY? */
327 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
328 "let's see if it's attached to MAC0...\n");
330 BUG_ON(!au_macs[0]);
332 /* find the first (lowest address) non-attached PHY on
333 * the MAC0 MII bus */
334 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
335 struct phy_device *const tmp_phydev =
336 au_macs[0]->mii_bus.phy_map[phy_addr];
338 if (!tmp_phydev)
339 continue; /* no PHY here... */
341 if (tmp_phydev->attached_dev)
342 continue; /* already claimed by MAC0 */
344 phydev = tmp_phydev;
345 break; /* found it */
348 # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
350 #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
351 if (!phydev) {
352 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
353 return -1;
356 /* now we are supposed to have a proper phydev, to attach to... */
357 BUG_ON(!phydev);
358 BUG_ON(phydev->attached_dev);
360 phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0,
361 PHY_INTERFACE_MODE_MII);
363 if (IS_ERR(phydev)) {
364 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
365 return PTR_ERR(phydev);
368 /* mask with MAC supported features */
369 phydev->supported &= (SUPPORTED_10baseT_Half
370 | SUPPORTED_10baseT_Full
371 | SUPPORTED_100baseT_Half
372 | SUPPORTED_100baseT_Full
373 | SUPPORTED_Autoneg
374 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
375 | SUPPORTED_MII
376 | SUPPORTED_TP);
378 phydev->advertising = phydev->supported;
380 aup->old_link = 0;
381 aup->old_speed = 0;
382 aup->old_duplex = -1;
383 aup->phy_dev = phydev;
385 printk(KERN_INFO "%s: attached PHY driver [%s] "
386 "(mii_bus:phy_addr=%s, irq=%d)\n",
387 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
389 return 0;
394 * Buffer allocation/deallocation routines. The buffer descriptor returned
395 * has the virtual and dma address of a buffer suitable for
396 * both, receive and transmit operations.
398 static db_dest_t *GetFreeDB(struct au1000_private *aup)
400 db_dest_t *pDB;
401 pDB = aup->pDBfree;
403 if (pDB) {
404 aup->pDBfree = pDB->pnext;
406 return pDB;
409 void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
411 db_dest_t *pDBfree = aup->pDBfree;
412 if (pDBfree)
413 pDBfree->pnext = pDB;
414 aup->pDBfree = pDB;
417 static void enable_rx_tx(struct net_device *dev)
419 struct au1000_private *aup = (struct au1000_private *) dev->priv;
421 if (au1000_debug > 4)
422 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
424 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
425 au_sync_delay(10);
428 static void hard_stop(struct net_device *dev)
430 struct au1000_private *aup = (struct au1000_private *) dev->priv;
432 if (au1000_debug > 4)
433 printk(KERN_INFO "%s: hard stop\n", dev->name);
435 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
436 au_sync_delay(10);
439 static void enable_mac(struct net_device *dev, int force_reset)
441 unsigned long flags;
442 struct au1000_private *aup = (struct au1000_private *) dev->priv;
444 spin_lock_irqsave(&aup->lock, flags);
446 if(force_reset || (!aup->mac_enabled)) {
447 *aup->enable = MAC_EN_CLOCK_ENABLE;
448 au_sync_delay(2);
449 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
450 | MAC_EN_CLOCK_ENABLE);
451 au_sync_delay(2);
453 aup->mac_enabled = 1;
456 spin_unlock_irqrestore(&aup->lock, flags);
459 static void reset_mac_unlocked(struct net_device *dev)
461 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
462 int i;
464 hard_stop(dev);
466 *aup->enable = MAC_EN_CLOCK_ENABLE;
467 au_sync_delay(2);
468 *aup->enable = 0;
469 au_sync_delay(2);
471 aup->tx_full = 0;
472 for (i = 0; i < NUM_RX_DMA; i++) {
473 /* reset control bits */
474 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
476 for (i = 0; i < NUM_TX_DMA; i++) {
477 /* reset control bits */
478 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
481 aup->mac_enabled = 0;
485 static void reset_mac(struct net_device *dev)
487 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
488 unsigned long flags;
490 if (au1000_debug > 4)
491 printk(KERN_INFO "%s: reset mac, aup %x\n",
492 dev->name, (unsigned)aup);
494 spin_lock_irqsave(&aup->lock, flags);
496 reset_mac_unlocked (dev);
498 spin_unlock_irqrestore(&aup->lock, flags);
502 * Setup the receive and transmit "rings". These pointers are the addresses
503 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
504 * these are not descriptors sitting in memory.
506 static void
507 setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
509 int i;
511 for (i = 0; i < NUM_RX_DMA; i++) {
512 aup->rx_dma_ring[i] =
513 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
515 for (i = 0; i < NUM_TX_DMA; i++) {
516 aup->tx_dma_ring[i] =
517 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
521 static struct {
522 u32 base_addr;
523 u32 macen_addr;
524 int irq;
525 struct net_device *dev;
526 } iflist[2] = {
527 #ifdef CONFIG_SOC_AU1000
528 {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
529 {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
530 #endif
531 #ifdef CONFIG_SOC_AU1100
532 {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
533 #endif
534 #ifdef CONFIG_SOC_AU1500
535 {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
536 {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
537 #endif
538 #ifdef CONFIG_SOC_AU1550
539 {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
540 {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
541 #endif
544 static int num_ifs;
547 * Setup the base address and interupt of the Au1xxx ethernet macs
548 * based on cpu type and whether the interface is enabled in sys_pinfunc
549 * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
551 static int __init au1000_init_module(void)
553 int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
554 struct net_device *dev;
555 int i, found_one = 0;
557 num_ifs = NUM_ETH_INTERFACES - ni;
559 for(i = 0; i < num_ifs; i++) {
560 dev = au1000_probe(i);
561 iflist[i].dev = dev;
562 if (dev)
563 found_one++;
565 if (!found_one)
566 return -ENODEV;
567 return 0;
571 * ethtool operations
574 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
576 struct au1000_private *aup = (struct au1000_private *)dev->priv;
578 if (aup->phy_dev)
579 return phy_ethtool_gset(aup->phy_dev, cmd);
581 return -EINVAL;
584 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
586 struct au1000_private *aup = (struct au1000_private *)dev->priv;
588 if (!capable(CAP_NET_ADMIN))
589 return -EPERM;
591 if (aup->phy_dev)
592 return phy_ethtool_sset(aup->phy_dev, cmd);
594 return -EINVAL;
597 static void
598 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
600 struct au1000_private *aup = (struct au1000_private *)dev->priv;
602 strcpy(info->driver, DRV_NAME);
603 strcpy(info->version, DRV_VERSION);
604 info->fw_version[0] = '\0';
605 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
606 info->regdump_len = 0;
609 static const struct ethtool_ops au1000_ethtool_ops = {
610 .get_settings = au1000_get_settings,
611 .set_settings = au1000_set_settings,
612 .get_drvinfo = au1000_get_drvinfo,
613 .get_link = ethtool_op_get_link,
616 static struct net_device * au1000_probe(int port_num)
618 static unsigned version_printed = 0;
619 struct au1000_private *aup = NULL;
620 struct net_device *dev = NULL;
621 db_dest_t *pDB, *pDBfree;
622 char *pmac, *argptr;
623 char ethaddr[6];
624 int irq, i, err;
625 u32 base, macen;
627 if (port_num >= NUM_ETH_INTERFACES)
628 return NULL;
630 base = CPHYSADDR(iflist[port_num].base_addr );
631 macen = CPHYSADDR(iflist[port_num].macen_addr);
632 irq = iflist[port_num].irq;
634 if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
635 !request_mem_region(macen, 4, "Au1x00 ENET"))
636 return NULL;
638 if (version_printed++ == 0)
639 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
641 dev = alloc_etherdev(sizeof(struct au1000_private));
642 if (!dev) {
643 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
644 return NULL;
647 if ((err = register_netdev(dev)) != 0) {
648 printk(KERN_ERR "%s: Cannot register net device, error %d\n",
649 DRV_NAME, err);
650 free_netdev(dev);
651 return NULL;
654 printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
655 dev->name, base, irq);
657 aup = dev->priv;
659 /* Allocate the data buffers */
660 /* Snooping works fine with eth on all au1xxx */
661 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
662 (NUM_TX_BUFFS + NUM_RX_BUFFS),
663 &aup->dma_addr, 0);
664 if (!aup->vaddr) {
665 free_netdev(dev);
666 release_mem_region( base, MAC_IOSIZE);
667 release_mem_region(macen, 4);
668 return NULL;
671 /* aup->mac is the base address of the MAC's registers */
672 aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
674 /* Setup some variables for quick register address access */
675 aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
676 aup->mac_id = port_num;
677 au_macs[port_num] = aup;
679 if (port_num == 0) {
680 /* Check the environment variables first */
681 if (get_ethernet_addr(ethaddr) == 0)
682 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
683 else {
684 /* Check command line */
685 argptr = prom_getcmdline();
686 if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
687 printk(KERN_INFO "%s: No MAC address found\n",
688 dev->name);
689 /* Use the hard coded MAC addresses */
690 else {
691 str2eaddr(ethaddr, pmac + strlen("ethaddr="));
692 memcpy(au1000_mac_addr, ethaddr,
693 sizeof(au1000_mac_addr));
697 setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
698 } else if (port_num == 1)
699 setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
702 * Assign to the Ethernet ports two consecutive MAC addresses
703 * to match those that are printed on their stickers
705 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
706 dev->dev_addr[5] += port_num;
708 *aup->enable = 0;
709 aup->mac_enabled = 0;
711 aup->mii_bus.priv = dev;
712 aup->mii_bus.read = mdiobus_read;
713 aup->mii_bus.write = mdiobus_write;
714 aup->mii_bus.reset = mdiobus_reset;
715 aup->mii_bus.name = "au1000_eth_mii";
716 aup->mii_bus.id = aup->mac_id;
717 aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
718 for(i = 0; i < PHY_MAX_ADDR; ++i)
719 aup->mii_bus.irq[i] = PHY_POLL;
721 /* if known, set corresponding PHY IRQs */
722 #if defined(AU1XXX_PHY_STATIC_CONFIG)
723 # if defined(AU1XXX_PHY0_IRQ)
724 if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
725 aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
726 # endif
727 # if defined(AU1XXX_PHY1_IRQ)
728 if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
729 aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
730 # endif
731 #endif
732 mdiobus_register(&aup->mii_bus);
734 if (mii_probe(dev) != 0) {
735 goto err_out;
738 pDBfree = NULL;
739 /* setup the data buffer descriptors and attach a buffer to each one */
740 pDB = aup->db;
741 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
742 pDB->pnext = pDBfree;
743 pDBfree = pDB;
744 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
745 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
746 pDB++;
748 aup->pDBfree = pDBfree;
750 for (i = 0; i < NUM_RX_DMA; i++) {
751 pDB = GetFreeDB(aup);
752 if (!pDB) {
753 goto err_out;
755 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
756 aup->rx_db_inuse[i] = pDB;
758 for (i = 0; i < NUM_TX_DMA; i++) {
759 pDB = GetFreeDB(aup);
760 if (!pDB) {
761 goto err_out;
763 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
764 aup->tx_dma_ring[i]->len = 0;
765 aup->tx_db_inuse[i] = pDB;
768 spin_lock_init(&aup->lock);
769 dev->base_addr = base;
770 dev->irq = irq;
771 dev->open = au1000_open;
772 dev->hard_start_xmit = au1000_tx;
773 dev->stop = au1000_close;
774 dev->set_multicast_list = &set_rx_mode;
775 dev->do_ioctl = &au1000_ioctl;
776 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
777 dev->tx_timeout = au1000_tx_timeout;
778 dev->watchdog_timeo = ETH_TX_TIMEOUT;
781 * The boot code uses the ethernet controller, so reset it to start
782 * fresh. au1000_init() expects that the device is in reset state.
784 reset_mac(dev);
786 return dev;
788 err_out:
789 /* here we should have a valid dev plus aup-> register addresses
790 * so we can reset the mac properly.*/
791 reset_mac(dev);
793 for (i = 0; i < NUM_RX_DMA; i++) {
794 if (aup->rx_db_inuse[i])
795 ReleaseDB(aup, aup->rx_db_inuse[i]);
797 for (i = 0; i < NUM_TX_DMA; i++) {
798 if (aup->tx_db_inuse[i])
799 ReleaseDB(aup, aup->tx_db_inuse[i]);
801 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
802 (void *)aup->vaddr, aup->dma_addr);
803 unregister_netdev(dev);
804 free_netdev(dev);
805 release_mem_region( base, MAC_IOSIZE);
806 release_mem_region(macen, 4);
807 return NULL;
811 * Initialize the interface.
813 * When the device powers up, the clocks are disabled and the
814 * mac is in reset state. When the interface is closed, we
815 * do the same -- reset the device and disable the clocks to
816 * conserve power. Thus, whenever au1000_init() is called,
817 * the device should already be in reset state.
819 static int au1000_init(struct net_device *dev)
821 struct au1000_private *aup = (struct au1000_private *) dev->priv;
822 u32 flags;
823 int i;
824 u32 control;
826 if (au1000_debug > 4)
827 printk("%s: au1000_init\n", dev->name);
829 /* bring the device out of reset */
830 enable_mac(dev, 1);
832 spin_lock_irqsave(&aup->lock, flags);
834 aup->mac->control = 0;
835 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
836 aup->tx_tail = aup->tx_head;
837 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
839 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
840 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
841 dev->dev_addr[1]<<8 | dev->dev_addr[0];
843 for (i = 0; i < NUM_RX_DMA; i++) {
844 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
846 au_sync();
848 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
849 #ifndef CONFIG_CPU_LITTLE_ENDIAN
850 control |= MAC_BIG_ENDIAN;
851 #endif
852 if (aup->phy_dev) {
853 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
854 control |= MAC_FULL_DUPLEX;
855 else
856 control |= MAC_DISABLE_RX_OWN;
857 } else { /* PHY-less op, assume full-duplex */
858 control |= MAC_FULL_DUPLEX;
861 aup->mac->control = control;
862 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
863 au_sync();
865 spin_unlock_irqrestore(&aup->lock, flags);
866 return 0;
869 static void
870 au1000_adjust_link(struct net_device *dev)
872 struct au1000_private *aup = (struct au1000_private *) dev->priv;
873 struct phy_device *phydev = aup->phy_dev;
874 unsigned long flags;
876 int status_change = 0;
878 BUG_ON(!aup->phy_dev);
880 spin_lock_irqsave(&aup->lock, flags);
882 if (phydev->link && (aup->old_speed != phydev->speed)) {
883 // speed changed
885 switch(phydev->speed) {
886 case SPEED_10:
887 case SPEED_100:
888 break;
889 default:
890 printk(KERN_WARNING
891 "%s: Speed (%d) is not 10/100 ???\n",
892 dev->name, phydev->speed);
893 break;
896 aup->old_speed = phydev->speed;
898 status_change = 1;
901 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
902 // duplex mode changed
904 /* switching duplex mode requires to disable rx and tx! */
905 hard_stop(dev);
907 if (DUPLEX_FULL == phydev->duplex)
908 aup->mac->control = ((aup->mac->control
909 | MAC_FULL_DUPLEX)
910 & ~MAC_DISABLE_RX_OWN);
911 else
912 aup->mac->control = ((aup->mac->control
913 & ~MAC_FULL_DUPLEX)
914 | MAC_DISABLE_RX_OWN);
915 au_sync_delay(1);
917 enable_rx_tx(dev);
918 aup->old_duplex = phydev->duplex;
920 status_change = 1;
923 if(phydev->link != aup->old_link) {
924 // link state changed
926 if (phydev->link) // link went up
927 netif_schedule(dev);
928 else { // link went down
929 aup->old_speed = 0;
930 aup->old_duplex = -1;
933 aup->old_link = phydev->link;
934 status_change = 1;
937 spin_unlock_irqrestore(&aup->lock, flags);
939 if (status_change) {
940 if (phydev->link)
941 printk(KERN_INFO "%s: link up (%d/%s)\n",
942 dev->name, phydev->speed,
943 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
944 else
945 printk(KERN_INFO "%s: link down\n", dev->name);
949 static int au1000_open(struct net_device *dev)
951 int retval;
952 struct au1000_private *aup = (struct au1000_private *) dev->priv;
954 if (au1000_debug > 4)
955 printk("%s: open: dev=%p\n", dev->name, dev);
957 if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
958 dev->name, dev))) {
959 printk(KERN_ERR "%s: unable to get IRQ %d\n",
960 dev->name, dev->irq);
961 return retval;
964 if ((retval = au1000_init(dev))) {
965 printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
966 free_irq(dev->irq, dev);
967 return retval;
970 if (aup->phy_dev) {
971 /* cause the PHY state machine to schedule a link state check */
972 aup->phy_dev->state = PHY_CHANGELINK;
973 phy_start(aup->phy_dev);
976 netif_start_queue(dev);
978 if (au1000_debug > 4)
979 printk("%s: open: Initialization done.\n", dev->name);
981 return 0;
984 static int au1000_close(struct net_device *dev)
986 unsigned long flags;
987 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
989 if (au1000_debug > 4)
990 printk("%s: close: dev=%p\n", dev->name, dev);
992 if (aup->phy_dev)
993 phy_stop(aup->phy_dev);
995 spin_lock_irqsave(&aup->lock, flags);
997 reset_mac_unlocked (dev);
999 /* stop the device */
1000 netif_stop_queue(dev);
1002 /* disable the interrupt */
1003 free_irq(dev->irq, dev);
1004 spin_unlock_irqrestore(&aup->lock, flags);
1006 return 0;
1009 static void __exit au1000_cleanup_module(void)
1011 int i, j;
1012 struct net_device *dev;
1013 struct au1000_private *aup;
1015 for (i = 0; i < num_ifs; i++) {
1016 dev = iflist[i].dev;
1017 if (dev) {
1018 aup = (struct au1000_private *) dev->priv;
1019 unregister_netdev(dev);
1020 for (j = 0; j < NUM_RX_DMA; j++)
1021 if (aup->rx_db_inuse[j])
1022 ReleaseDB(aup, aup->rx_db_inuse[j]);
1023 for (j = 0; j < NUM_TX_DMA; j++)
1024 if (aup->tx_db_inuse[j])
1025 ReleaseDB(aup, aup->tx_db_inuse[j]);
1026 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1027 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1028 (void *)aup->vaddr, aup->dma_addr);
1029 release_mem_region(dev->base_addr, MAC_IOSIZE);
1030 release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
1031 free_netdev(dev);
1036 static void update_tx_stats(struct net_device *dev, u32 status)
1038 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1039 struct net_device_stats *ps = &dev->stats;
1041 if (status & TX_FRAME_ABORTED) {
1042 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
1043 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
1044 /* any other tx errors are only valid
1045 * in half duplex mode */
1046 ps->tx_errors++;
1047 ps->tx_aborted_errors++;
1050 else {
1051 ps->tx_errors++;
1052 ps->tx_aborted_errors++;
1053 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
1054 ps->tx_carrier_errors++;
1061 * Called from the interrupt service routine to acknowledge
1062 * the TX DONE bits. This is a must if the irq is setup as
1063 * edge triggered.
1065 static void au1000_tx_ack(struct net_device *dev)
1067 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1068 volatile tx_dma_t *ptxd;
1070 ptxd = aup->tx_dma_ring[aup->tx_tail];
1072 while (ptxd->buff_stat & TX_T_DONE) {
1073 update_tx_stats(dev, ptxd->status);
1074 ptxd->buff_stat &= ~TX_T_DONE;
1075 ptxd->len = 0;
1076 au_sync();
1078 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
1079 ptxd = aup->tx_dma_ring[aup->tx_tail];
1081 if (aup->tx_full) {
1082 aup->tx_full = 0;
1083 netif_wake_queue(dev);
1090 * Au1000 transmit routine.
1092 static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
1094 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1095 struct net_device_stats *ps = &dev->stats;
1096 volatile tx_dma_t *ptxd;
1097 u32 buff_stat;
1098 db_dest_t *pDB;
1099 int i;
1101 if (au1000_debug > 5)
1102 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
1103 dev->name, (unsigned)aup, skb->len,
1104 skb->data, aup->tx_head);
1106 ptxd = aup->tx_dma_ring[aup->tx_head];
1107 buff_stat = ptxd->buff_stat;
1108 if (buff_stat & TX_DMA_ENABLE) {
1109 /* We've wrapped around and the transmitter is still busy */
1110 netif_stop_queue(dev);
1111 aup->tx_full = 1;
1112 return 1;
1114 else if (buff_stat & TX_T_DONE) {
1115 update_tx_stats(dev, ptxd->status);
1116 ptxd->len = 0;
1119 if (aup->tx_full) {
1120 aup->tx_full = 0;
1121 netif_wake_queue(dev);
1124 pDB = aup->tx_db_inuse[aup->tx_head];
1125 skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
1126 if (skb->len < ETH_ZLEN) {
1127 for (i=skb->len; i<ETH_ZLEN; i++) {
1128 ((char *)pDB->vaddr)[i] = 0;
1130 ptxd->len = ETH_ZLEN;
1132 else
1133 ptxd->len = skb->len;
1135 ps->tx_packets++;
1136 ps->tx_bytes += ptxd->len;
1138 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
1139 au_sync();
1140 dev_kfree_skb(skb);
1141 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
1142 dev->trans_start = jiffies;
1143 return 0;
1146 static inline void update_rx_stats(struct net_device *dev, u32 status)
1148 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1149 struct net_device_stats *ps = &dev->stats;
1151 ps->rx_packets++;
1152 if (status & RX_MCAST_FRAME)
1153 ps->multicast++;
1155 if (status & RX_ERROR) {
1156 ps->rx_errors++;
1157 if (status & RX_MISSED_FRAME)
1158 ps->rx_missed_errors++;
1159 if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
1160 ps->rx_length_errors++;
1161 if (status & RX_CRC_ERROR)
1162 ps->rx_crc_errors++;
1163 if (status & RX_COLL)
1164 ps->collisions++;
1166 else
1167 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
1172 * Au1000 receive routine.
1174 static int au1000_rx(struct net_device *dev)
1176 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1177 struct sk_buff *skb;
1178 volatile rx_dma_t *prxd;
1179 u32 buff_stat, status;
1180 db_dest_t *pDB;
1181 u32 frmlen;
1183 if (au1000_debug > 5)
1184 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
1186 prxd = aup->rx_dma_ring[aup->rx_head];
1187 buff_stat = prxd->buff_stat;
1188 while (buff_stat & RX_T_DONE) {
1189 status = prxd->status;
1190 pDB = aup->rx_db_inuse[aup->rx_head];
1191 update_rx_stats(dev, status);
1192 if (!(status & RX_ERROR)) {
1194 /* good frame */
1195 frmlen = (status & RX_FRAME_LEN_MASK);
1196 frmlen -= 4; /* Remove FCS */
1197 skb = dev_alloc_skb(frmlen + 2);
1198 if (skb == NULL) {
1199 printk(KERN_ERR
1200 "%s: Memory squeeze, dropping packet.\n",
1201 dev->name);
1202 dev->stats.rx_dropped++;
1203 continue;
1205 skb_reserve(skb, 2); /* 16 byte IP header align */
1206 skb_copy_to_linear_data(skb,
1207 (unsigned char *)pDB->vaddr, frmlen);
1208 skb_put(skb, frmlen);
1209 skb->protocol = eth_type_trans(skb, dev);
1210 netif_rx(skb); /* pass the packet to upper layers */
1212 else {
1213 if (au1000_debug > 4) {
1214 if (status & RX_MISSED_FRAME)
1215 printk("rx miss\n");
1216 if (status & RX_WDOG_TIMER)
1217 printk("rx wdog\n");
1218 if (status & RX_RUNT)
1219 printk("rx runt\n");
1220 if (status & RX_OVERLEN)
1221 printk("rx overlen\n");
1222 if (status & RX_COLL)
1223 printk("rx coll\n");
1224 if (status & RX_MII_ERROR)
1225 printk("rx mii error\n");
1226 if (status & RX_CRC_ERROR)
1227 printk("rx crc error\n");
1228 if (status & RX_LEN_ERROR)
1229 printk("rx len error\n");
1230 if (status & RX_U_CNTRL_FRAME)
1231 printk("rx u control frame\n");
1232 if (status & RX_MISSED_FRAME)
1233 printk("rx miss\n");
1236 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
1237 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
1238 au_sync();
1240 /* next descriptor */
1241 prxd = aup->rx_dma_ring[aup->rx_head];
1242 buff_stat = prxd->buff_stat;
1243 dev->last_rx = jiffies;
1245 return 0;
1250 * Au1000 interrupt service routine.
1252 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
1254 struct net_device *dev = (struct net_device *) dev_id;
1256 if (dev == NULL) {
1257 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
1258 return IRQ_RETVAL(1);
1261 /* Handle RX interrupts first to minimize chance of overrun */
1263 au1000_rx(dev);
1264 au1000_tx_ack(dev);
1265 return IRQ_RETVAL(1);
1270 * The Tx ring has been full longer than the watchdog timeout
1271 * value. The transmitter must be hung?
1273 static void au1000_tx_timeout(struct net_device *dev)
1275 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
1276 reset_mac(dev);
1277 au1000_init(dev);
1278 dev->trans_start = jiffies;
1279 netif_wake_queue(dev);
1282 static void set_rx_mode(struct net_device *dev)
1284 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1286 if (au1000_debug > 4)
1287 printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
1289 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1290 aup->mac->control |= MAC_PROMISCUOUS;
1291 } else if ((dev->flags & IFF_ALLMULTI) ||
1292 dev->mc_count > MULTICAST_FILTER_LIMIT) {
1293 aup->mac->control |= MAC_PASS_ALL_MULTI;
1294 aup->mac->control &= ~MAC_PROMISCUOUS;
1295 printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
1296 } else {
1297 int i;
1298 struct dev_mc_list *mclist;
1299 u32 mc_filter[2]; /* Multicast hash filter */
1301 mc_filter[1] = mc_filter[0] = 0;
1302 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1303 i++, mclist = mclist->next) {
1304 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
1305 (long *)mc_filter);
1307 aup->mac->multi_hash_high = mc_filter[1];
1308 aup->mac->multi_hash_low = mc_filter[0];
1309 aup->mac->control &= ~MAC_PROMISCUOUS;
1310 aup->mac->control |= MAC_HASH_MODE;
1314 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1316 struct au1000_private *aup = (struct au1000_private *)dev->priv;
1318 if (!netif_running(dev)) return -EINVAL;
1320 if (!aup->phy_dev) return -EINVAL; // PHY not controllable
1322 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
1325 module_init(au1000_init_module);
1326 module_exit(au1000_cleanup_module);