1 #ifndef __ASM_CMPXCHG_H
2 #define __ASM_CMPXCHG_H
4 #include <linux/bitops.h> /* for LOCK_PREFIX */
6 #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
8 struct __xchg_dummy
{ unsigned long a
[100]; };
9 #define __xg(x) ((struct __xchg_dummy *)(x))
12 #ifdef CONFIG_X86_CMPXCHG64
15 * The semantics of XCHGCMP8B are a bit strange, this is why
16 * there is a loop and the loading of %%eax and %%edx has to
17 * be inside. This inlines well in most cases, the cached
18 * cost is around ~38 cycles. (in the future we might want
19 * to do an SIMD/3DNOW!/MMX/FPU 64-bit store here, but that
20 * might have an implicit FPU-save as a cost, so it's not
21 * clear which path to go.)
23 * cmpxchg8b must be used with the lock prefix here to allow
24 * the instruction to be executed atomically, see page 3-102
25 * of the instruction set reference 24319102.pdf. We need
26 * the reader side to see the coherent 64bit value.
28 static inline void __set_64bit (unsigned long long * ptr
,
29 unsigned int low
, unsigned int high
)
31 __asm__
__volatile__ (
33 "movl (%0), %%eax\n\t"
34 "movl 4(%0), %%edx\n\t"
35 "lock cmpxchg8b (%0)\n\t"
41 : "ax","dx","memory");
44 static inline void __set_64bit_constant (unsigned long long *ptr
,
45 unsigned long long value
)
47 __set_64bit(ptr
,(unsigned int)(value
), (unsigned int)((value
)>>32ULL));
49 #define ll_low(x) *(((unsigned int*)&(x))+0)
50 #define ll_high(x) *(((unsigned int*)&(x))+1)
52 static inline void __set_64bit_var (unsigned long long *ptr
,
53 unsigned long long value
)
55 __set_64bit(ptr
,ll_low(value
), ll_high(value
));
58 #define set_64bit(ptr,value) \
59 (__builtin_constant_p(value) ? \
60 __set_64bit_constant(ptr, value) : \
61 __set_64bit_var(ptr, value) )
63 #define _set_64bit(ptr,value) \
64 (__builtin_constant_p(value) ? \
65 __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \
66 __set_64bit(ptr, ll_low(value), ll_high(value)) )
71 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
72 * Note 2: xchg has side effect, so that attribute volatile is necessary,
73 * but generally the primitive is invalid, *ptr is output argument. --ANK
75 static inline unsigned long __xchg(unsigned long x
, volatile void * ptr
, int size
)
79 __asm__
__volatile__("xchgb %b0,%1"
81 :"m" (*__xg(ptr
)), "0" (x
)
85 __asm__
__volatile__("xchgw %w0,%1"
87 :"m" (*__xg(ptr
)), "0" (x
)
91 __asm__
__volatile__("xchgl %0,%1"
93 :"m" (*__xg(ptr
)), "0" (x
)
101 * Atomic compare and exchange. Compare OLD with MEM, if identical,
102 * store NEW in MEM. Return the initial value in MEM. Success is
103 * indicated by comparing RETURN with OLD.
106 #ifdef CONFIG_X86_CMPXCHG
107 #define __HAVE_ARCH_CMPXCHG 1
108 #define cmpxchg(ptr,o,n)\
109 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
110 (unsigned long)(n),sizeof(*(ptr))))
111 #define sync_cmpxchg(ptr,o,n)\
112 ((__typeof__(*(ptr)))__sync_cmpxchg((ptr),(unsigned long)(o),\
113 (unsigned long)(n),sizeof(*(ptr))))
114 #define cmpxchg_local(ptr,o,n)\
115 ((__typeof__(*(ptr)))__cmpxchg_local((ptr),(unsigned long)(o),\
116 (unsigned long)(n),sizeof(*(ptr))))
119 static inline unsigned long __cmpxchg(volatile void *ptr
, unsigned long old
,
120 unsigned long new, int size
)
125 __asm__
__volatile__(LOCK_PREFIX
"cmpxchgb %b1,%2"
127 : "q"(new), "m"(*__xg(ptr
)), "0"(old
)
131 __asm__
__volatile__(LOCK_PREFIX
"cmpxchgw %w1,%2"
133 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
137 __asm__
__volatile__(LOCK_PREFIX
"cmpxchgl %1,%2"
139 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
147 * Always use locked operations when touching memory shared with a
148 * hypervisor, since the system may be SMP even if the guest kernel
151 static inline unsigned long __sync_cmpxchg(volatile void *ptr
,
153 unsigned long new, int size
)
158 __asm__
__volatile__("lock; cmpxchgb %b1,%2"
160 : "q"(new), "m"(*__xg(ptr
)), "0"(old
)
164 __asm__
__volatile__("lock; cmpxchgw %w1,%2"
166 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
170 __asm__
__volatile__("lock; cmpxchgl %1,%2"
172 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
179 static inline unsigned long __cmpxchg_local(volatile void *ptr
,
180 unsigned long old
, unsigned long new, int size
)
185 __asm__
__volatile__("cmpxchgb %b1,%2"
187 : "q"(new), "m"(*__xg(ptr
)), "0"(old
)
191 __asm__
__volatile__("cmpxchgw %w1,%2"
193 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
197 __asm__
__volatile__("cmpxchgl %1,%2"
199 : "r"(new), "m"(*__xg(ptr
)), "0"(old
)
206 #ifndef CONFIG_X86_CMPXCHG
208 * Building a kernel capable running on 80386. It may be necessary to
209 * simulate the cmpxchg on the 80386 CPU. For that purpose we define
210 * a function for each of the sizes we support.
213 extern unsigned long cmpxchg_386_u8(volatile void *, u8
, u8
);
214 extern unsigned long cmpxchg_386_u16(volatile void *, u16
, u16
);
215 extern unsigned long cmpxchg_386_u32(volatile void *, u32
, u32
);
217 static inline unsigned long cmpxchg_386(volatile void *ptr
, unsigned long old
,
218 unsigned long new, int size
)
222 return cmpxchg_386_u8(ptr
, old
, new);
224 return cmpxchg_386_u16(ptr
, old
, new);
226 return cmpxchg_386_u32(ptr
, old
, new);
231 #define cmpxchg(ptr,o,n) \
233 __typeof__(*(ptr)) __ret; \
234 if (likely(boot_cpu_data.x86 > 3)) \
235 __ret = __cmpxchg((ptr), (unsigned long)(o), \
236 (unsigned long)(n), sizeof(*(ptr))); \
238 __ret = cmpxchg_386((ptr), (unsigned long)(o), \
239 (unsigned long)(n), sizeof(*(ptr))); \
242 #define cmpxchg_local(ptr,o,n) \
244 __typeof__(*(ptr)) __ret; \
245 if (likely(boot_cpu_data.x86 > 3)) \
246 __ret = __cmpxchg_local((ptr), (unsigned long)(o), \
247 (unsigned long)(n), sizeof(*(ptr))); \
249 __ret = cmpxchg_386((ptr), (unsigned long)(o), \
250 (unsigned long)(n), sizeof(*(ptr))); \
255 #ifdef CONFIG_X86_CMPXCHG64
257 static inline unsigned long long __cmpxchg64(volatile void *ptr
, unsigned long long old
,
258 unsigned long long new)
260 unsigned long long prev
;
261 __asm__
__volatile__(LOCK_PREFIX
"cmpxchg8b %3"
263 : "b"((unsigned long)new),
264 "c"((unsigned long)(new >> 32)),
271 static inline unsigned long long __cmpxchg64_local(volatile void *ptr
,
272 unsigned long long old
, unsigned long long new)
274 unsigned long long prev
;
275 __asm__
__volatile__("cmpxchg8b %3"
277 : "b"((unsigned long)new),
278 "c"((unsigned long)(new >> 32)),
285 #define cmpxchg64(ptr,o,n)\
286 ((__typeof__(*(ptr)))__cmpxchg64((ptr),(unsigned long long)(o),\
287 (unsigned long long)(n)))
288 #define cmpxchg64_local(ptr,o,n)\
289 ((__typeof__(*(ptr)))__cmpxchg64_local((ptr),(unsigned long long)(o),\
290 (unsigned long long)(n)))