2 * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
4 * PMC551 PCI Mezzanine Ram Device
7 * Mark Ferrell <mferrell@mvista.com>
8 * Copyright 1999,2000 Nortel Networks
11 * As part of this driver was derived from the slram.c driver it
12 * falls under the same license, which is GNU General Public
16 * This driver is intended to support the PMC551 PCI Ram device
17 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
18 * cPCI embedded systems. The device contains a single SROM
19 * that initially programs the V370PDC chipset onboard the
20 * device, and various banks of DRAM/SDRAM onboard. This driver
21 * implements this PCI Ram device as an MTD (Memory Technology
22 * Device) so that it can be used to hold a file system, or for
23 * added swap space in embedded systems. Since the memory on
24 * this board isn't as fast as main memory we do not try to hook
25 * it into main memory as that would simply reduce performance
26 * on the system. Using it as a block device allows us to use
27 * it as high speed swap or for a high speed disk device of some
28 * sort. Which becomes very useful on diskless systems in the
29 * embedded market I might add.
32 * Due to what I assume is more buggy SROM, the 64M PMC551 I
33 * have available claims that all 4 of it's DRAM banks have 64M
34 * of ram configured (making a grand total of 256M onboard).
35 * This is slightly annoying since the BAR0 size reflects the
36 * aperture size, not the dram size, and the V370PDC supplies no
37 * other method for memory size discovery. This problem is
38 * mostly only relevant when compiled as a module, as the
39 * unloading of the module with an aperture size smaller then
40 * the ram will cause the driver to detect the onboard memory
41 * size to be equal to the aperture size when the module is
42 * reloaded. Soooo, to help, the module supports an msize
43 * option to allow the specification of the onboard memory, and
44 * an asize option, to allow the specification of the aperture
45 * size. The aperture must be equal to or less then the memory
46 * size, the driver will correct this if you screw it up. This
47 * problem is not relevant for compiled in drivers as compiled
48 * in drivers only init once.
51 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
52 * initial example code of how to initialize this device and for
53 * help with questions I had concerning operation of the device.
55 * Most of the MTD code for this driver was originally written
56 * for the slram.o module in the MTD drivers package which
57 * allows the mapping of system memory into an MTD device.
58 * Since the PMC551 memory module is accessed in the same
59 * fashion as system memory, the slram.c code became a very nice
60 * fit to the needs of this driver. All we added was PCI
61 * detection/initialization to the driver and automatically figure
62 * out the size via the PCI detection.o, later changes by Corey
63 * Minyard set up the card to utilize a 1M sliding apature.
65 * Corey Minyard <minyard@nortelnetworks.com>
66 * * Modified driver to utilize a sliding aperture instead of
67 * mapping all memory into kernel space which turned out to
69 * * Located a bug in the SROM's initialization sequence that
70 * made the memory unusable, added a fix to code to touch up
74 * * MUST fix the init function to not spin on a register
75 * waiting for it to set .. this does not safely handle busted
76 * devices that never reset the register correctly which will
77 * cause the system to hang w/ a reboot being the only chance at
78 * recover. [sort of fixed, could be better]
79 * * Add I2C handling of the SROM so we can read the SROM's information
80 * about the aperture size. This should always accurately reflect the
81 * onboard memory size.
82 * * Comb the init routine. It's still a bit cludgy on a few things.
85 #include <linux/kernel.h>
86 #include <linux/module.h>
87 #include <asm/uaccess.h>
88 #include <linux/types.h>
89 #include <linux/sched.h>
90 #include <linux/init.h>
91 #include <linux/ptrace.h>
92 #include <linux/slab.h>
93 #include <linux/string.h>
94 #include <linux/timer.h>
95 #include <linux/major.h>
97 #include <linux/ioctl.h>
99 #include <asm/system.h>
100 #include <linux/pci.h>
102 #include <linux/mtd/mtd.h>
103 #include <linux/mtd/pmc551.h>
104 #include <linux/mtd/compatmac.h>
106 static struct mtd_info
*pmc551list
;
108 static int pmc551_erase (struct mtd_info
*mtd
, struct erase_info
*instr
)
110 struct mypriv
*priv
= mtd
->priv
;
111 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
112 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
117 #ifdef CONFIG_MTD_PMC551_DEBUG
118 printk(KERN_DEBUG
"pmc551_erase(pos:%ld, len:%ld)\n", (long)instr
->addr
, (long)instr
->len
);
121 end
= instr
->addr
+ instr
->len
- 1;
123 /* Is it past the end? */
124 if ( end
> mtd
->size
) {
125 #ifdef CONFIG_MTD_PMC551_DEBUG
126 printk(KERN_DEBUG
"pmc551_erase() out of bounds (%ld > %ld)\n", (long)end
, (long)mtd
->size
);
131 eoff_hi
= end
& ~(priv
->asize
- 1);
132 soff_hi
= instr
->addr
& ~(priv
->asize
- 1);
133 eoff_lo
= end
& (priv
->asize
- 1);
134 soff_lo
= instr
->addr
& (priv
->asize
- 1);
136 pmc551_point (mtd
, instr
->addr
, instr
->len
, &retlen
, &ptr
);
138 if ( soff_hi
== eoff_hi
|| mtd
->size
== priv
->asize
) {
139 /* The whole thing fits within one access, so just one shot
141 memset(ptr
, 0xff, instr
->len
);
143 /* We have to do multiple writes to get all the data
145 while (soff_hi
!= eoff_hi
) {
146 #ifdef CONFIG_MTD_PMC551_DEBUG
147 printk( KERN_DEBUG
"pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
149 memset(ptr
, 0xff, priv
->asize
);
150 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
153 soff_hi
+= priv
->asize
;
154 pmc551_point (mtd
,(priv
->base_map0
|soff_hi
),
155 priv
->asize
, &retlen
, &ptr
);
157 memset (ptr
, 0xff, eoff_lo
);
161 instr
->state
= MTD_ERASE_DONE
;
162 #ifdef CONFIG_MTD_PMC551_DEBUG
163 printk(KERN_DEBUG
"pmc551_erase() done\n");
166 mtd_erase_callback(instr
);
171 static int pmc551_point (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
**mtdbuf
)
173 struct mypriv
*priv
= mtd
->priv
;
177 #ifdef CONFIG_MTD_PMC551_DEBUG
178 printk(KERN_DEBUG
"pmc551_point(%ld, %ld)\n", (long)from
, (long)len
);
181 if (from
+ len
> mtd
->size
) {
182 #ifdef CONFIG_MTD_PMC551_DEBUG
183 printk(KERN_DEBUG
"pmc551_point() out of bounds (%ld > %ld)\n", (long)from
+len
, (long)mtd
->size
);
188 soff_hi
= from
& ~(priv
->asize
- 1);
189 soff_lo
= from
& (priv
->asize
- 1);
191 /* Cheap hack optimization */
192 if( priv
->curr_map0
!= from
) {
193 pci_write_config_dword ( priv
->dev
, PMC551_PCI_MEM_MAP0
,
194 (priv
->base_map0
| soff_hi
) );
195 priv
->curr_map0
= soff_hi
;
198 *mtdbuf
= priv
->start
+ soff_lo
;
204 static void pmc551_unpoint (struct mtd_info
*mtd
, u_char
*addr
, loff_t from
, size_t len
)
206 #ifdef CONFIG_MTD_PMC551_DEBUG
207 printk(KERN_DEBUG
"pmc551_unpoint()\n");
212 static int pmc551_read (struct mtd_info
*mtd
, loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
214 struct mypriv
*priv
= mtd
->priv
;
215 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
216 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
219 u_char
*copyto
= buf
;
221 #ifdef CONFIG_MTD_PMC551_DEBUG
222 printk(KERN_DEBUG
"pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from
, (long)len
, (long)priv
->asize
);
225 end
= from
+ len
- 1;
227 /* Is it past the end? */
228 if (end
> mtd
->size
) {
229 #ifdef CONFIG_MTD_PMC551_DEBUG
230 printk(KERN_DEBUG
"pmc551_read() out of bounds (%ld > %ld)\n", (long) end
, (long)mtd
->size
);
235 soff_hi
= from
& ~(priv
->asize
- 1);
236 eoff_hi
= end
& ~(priv
->asize
- 1);
237 soff_lo
= from
& (priv
->asize
- 1);
238 eoff_lo
= end
& (priv
->asize
- 1);
240 pmc551_point (mtd
, from
, len
, retlen
, &ptr
);
242 if (soff_hi
== eoff_hi
) {
243 /* The whole thing fits within one access, so just one shot
245 memcpy(copyto
, ptr
, len
);
248 /* We have to do multiple writes to get all the data
250 while (soff_hi
!= eoff_hi
) {
251 #ifdef CONFIG_MTD_PMC551_DEBUG
252 printk( KERN_DEBUG
"pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
254 memcpy(copyto
, ptr
, priv
->asize
);
255 copyto
+= priv
->asize
;
256 if (soff_hi
+ priv
->asize
>= mtd
->size
) {
259 soff_hi
+= priv
->asize
;
260 pmc551_point (mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
262 memcpy(copyto
, ptr
, eoff_lo
);
267 #ifdef CONFIG_MTD_PMC551_DEBUG
268 printk(KERN_DEBUG
"pmc551_read() done\n");
270 *retlen
= copyto
- buf
;
274 static int pmc551_write (struct mtd_info
*mtd
, loff_t to
, size_t len
, size_t *retlen
, const u_char
*buf
)
276 struct mypriv
*priv
= mtd
->priv
;
277 u32 soff_hi
, soff_lo
; /* start address offset hi/lo */
278 u32 eoff_hi
, eoff_lo
; /* end address offset hi/lo */
281 const u_char
*copyfrom
= buf
;
284 #ifdef CONFIG_MTD_PMC551_DEBUG
285 printk(KERN_DEBUG
"pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to
, (long)len
, (long)priv
->asize
);
289 /* Is it past the end? or did the u32 wrap? */
290 if (end
> mtd
->size
) {
291 #ifdef CONFIG_MTD_PMC551_DEBUG
292 printk(KERN_DEBUG
"pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end
, (long)mtd
->size
, (long)to
);
297 soff_hi
= to
& ~(priv
->asize
- 1);
298 eoff_hi
= end
& ~(priv
->asize
- 1);
299 soff_lo
= to
& (priv
->asize
- 1);
300 eoff_lo
= end
& (priv
->asize
- 1);
302 pmc551_point (mtd
, to
, len
, retlen
, &ptr
);
304 if (soff_hi
== eoff_hi
) {
305 /* The whole thing fits within one access, so just one shot
307 memcpy(ptr
, copyfrom
, len
);
310 /* We have to do multiple writes to get all the data
312 while (soff_hi
!= eoff_hi
) {
313 #ifdef CONFIG_MTD_PMC551_DEBUG
314 printk( KERN_DEBUG
"pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi
, (long)eoff_hi
);
316 memcpy(ptr
, copyfrom
, priv
->asize
);
317 copyfrom
+= priv
->asize
;
318 if (soff_hi
>= mtd
->size
) {
321 soff_hi
+= priv
->asize
;
322 pmc551_point (mtd
, soff_hi
, priv
->asize
, retlen
, &ptr
);
324 memcpy(ptr
, copyfrom
, eoff_lo
);
329 #ifdef CONFIG_MTD_PMC551_DEBUG
330 printk(KERN_DEBUG
"pmc551_write() done\n");
332 *retlen
= copyfrom
- buf
;
337 * Fixup routines for the V370PDC
338 * PCI device ID 0x020011b0
340 * This function basicly kick starts the DRAM oboard the card and gets it
341 * ready to be used. Before this is done the device reads VERY erratic, so
342 * much that it can crash the Linux 2.2.x series kernels when a user cat's
343 * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
344 * register. FIXME: stop spinning on registers .. must implement a timeout
346 * returns the size of the memory region found.
348 static u32
fixup_pmc551 (struct pci_dev
*dev
)
350 #ifdef CONFIG_MTD_PMC551_BUGFIX
353 u32 size
, dcmd
, cfg
, dtmp
;
363 * Attempt to reset the card
364 * FIXME: Stop Spinning registers
367 /* unlock registers */
368 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, 0xA5 );
369 /* read in old data */
370 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
371 /* bang the reset line up and down for a few */
375 while(counter
++ < 100) {
376 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
380 while(counter
++ < 100) {
381 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
385 pci_write_config_byte(dev
, PMC551_SYS_CTRL_REG
, bcmd
);
388 * Take care and turn off the memory on the device while we
389 * tweak the configurations
391 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
392 tmp
= cmd
& ~(PCI_COMMAND_IO
|PCI_COMMAND_MEMORY
);
393 pci_write_config_word(dev
, PCI_COMMAND
, tmp
);
396 * Disable existing aperture before probing memory size
398 pci_read_config_dword(dev
, PMC551_PCI_MEM_MAP0
, &dcmd
);
399 dtmp
=(dcmd
|PMC551_PCI_MEM_MAP_ENABLE
|PMC551_PCI_MEM_MAP_REG_EN
);
400 pci_write_config_dword(dev
, PMC551_PCI_MEM_MAP0
, dtmp
);
402 * Grab old BAR0 config so that we can figure out memory size
403 * This is another bit of kludge going on. The reason for the
404 * redundancy is I am hoping to retain the original configuration
405 * previously assigned to the card by the BIOS or some previous
406 * fixup routine in the kernel. So we read the old config into cfg,
407 * then write all 1's to the memory space, read back the result into
408 * "size", and then write back all the old config.
410 pci_read_config_dword( dev
, PCI_BASE_ADDRESS_0
, &cfg
);
411 #ifndef CONFIG_MTD_PMC551_BUGFIX
412 pci_write_config_dword( dev
, PCI_BASE_ADDRESS_0
, ~0 );
413 pci_read_config_dword( dev
, PCI_BASE_ADDRESS_0
, &size
);
414 size
= (size
&PCI_BASE_ADDRESS_MEM_MASK
);
416 pci_write_config_dword( dev
, PCI_BASE_ADDRESS_0
, cfg
);
419 * Get the size of the memory by reading all the DRAM size values
420 * and adding them up.
422 * KLUDGE ALERT: the boards we are using have invalid column and
423 * row mux values. We fix them here, but this will break other
424 * memory configurations.
426 pci_read_config_dword(dev
, PMC551_DRAM_BLK0
, &dram_data
);
427 size
= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
428 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
429 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
430 pci_write_config_dword(dev
, PMC551_DRAM_BLK0
, dram_data
);
432 pci_read_config_dword(dev
, PMC551_DRAM_BLK1
, &dram_data
);
433 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
434 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
435 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
436 pci_write_config_dword(dev
, PMC551_DRAM_BLK1
, dram_data
);
438 pci_read_config_dword(dev
, PMC551_DRAM_BLK2
, &dram_data
);
439 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
440 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
441 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
442 pci_write_config_dword(dev
, PMC551_DRAM_BLK2
, dram_data
);
444 pci_read_config_dword(dev
, PMC551_DRAM_BLK3
, &dram_data
);
445 size
+= PMC551_DRAM_BLK_GET_SIZE(dram_data
);
446 dram_data
= PMC551_DRAM_BLK_SET_COL_MUX(dram_data
, 0x5);
447 dram_data
= PMC551_DRAM_BLK_SET_ROW_MUX(dram_data
, 0x9);
448 pci_write_config_dword(dev
, PMC551_DRAM_BLK3
, dram_data
);
451 * Oops .. something went wrong
453 if( (size
&= PCI_BASE_ADDRESS_MEM_MASK
) == 0) {
456 #endif /* CONFIG_MTD_PMC551_BUGFIX */
458 if ((cfg
&PCI_BASE_ADDRESS_SPACE
) != PCI_BASE_ADDRESS_SPACE_MEMORY
) {
465 pci_write_config_word( dev
, PMC551_SDRAM_MA
, 0x0400 );
466 pci_write_config_word( dev
, PMC551_SDRAM_CMD
, 0x00bf );
469 * Wait until command has gone through
470 * FIXME: register spinning issue
472 do { pci_read_config_word( dev
, PMC551_SDRAM_CMD
, &cmd
);
473 if(counter
++ > 100)break;
474 } while ( (PCI_COMMAND_IO
) & cmd
);
477 * Turn on auto refresh
478 * The loop is taken directly from Ramix's example code. I assume that
479 * this must be held high for some duration of time, but I can find no
480 * documentation refrencing the reasons why.
482 for ( i
= 1; i
<=8 ; i
++) {
483 pci_write_config_word (dev
, PMC551_SDRAM_CMD
, 0x0df);
486 * Make certain command has gone through
487 * FIXME: register spinning issue
490 do { pci_read_config_word(dev
, PMC551_SDRAM_CMD
, &cmd
);
491 if(counter
++ > 100)break;
492 } while ( (PCI_COMMAND_IO
) & cmd
);
495 pci_write_config_word ( dev
, PMC551_SDRAM_MA
, 0x0020);
496 pci_write_config_word ( dev
, PMC551_SDRAM_CMD
, 0x0ff);
499 * Wait until command completes
500 * FIXME: register spinning issue
503 do { pci_read_config_word ( dev
, PMC551_SDRAM_CMD
, &cmd
);
504 if(counter
++ > 100)break;
505 } while ( (PCI_COMMAND_IO
) & cmd
);
507 pci_read_config_dword ( dev
, PMC551_DRAM_CFG
, &dcmd
);
509 pci_write_config_dword ( dev
, PMC551_DRAM_CFG
, dcmd
);
512 * Check to make certain fast back-to-back, if not
515 pci_read_config_word( dev
, PCI_STATUS
, &cmd
);
516 if((cmd
&PCI_COMMAND_FAST_BACK
) == 0) {
517 cmd
|= PCI_COMMAND_FAST_BACK
;
518 pci_write_config_word( dev
, PCI_STATUS
, cmd
);
522 * Check to make certain the DEVSEL is set correctly, this device
523 * has a tendancy to assert DEVSEL and TRDY when a write is performed
524 * to the memory when memory is read-only
526 if((cmd
&PCI_STATUS_DEVSEL_MASK
) != 0x0) {
527 cmd
&= ~PCI_STATUS_DEVSEL_MASK
;
528 pci_write_config_word( dev
, PCI_STATUS
, cmd
);
531 * Set to be prefetchable and put everything back based on old cfg.
532 * it's possible that the reset of the V370PDC nuked the original
536 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
537 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
541 * Turn PCI memory and I/O bus access back on
543 pci_write_config_word( dev
, PCI_COMMAND
,
544 PCI_COMMAND_MEMORY
| PCI_COMMAND_IO
);
545 #ifdef CONFIG_MTD_PMC551_DEBUG
549 printk(KERN_DEBUG
"pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%llx\n",
550 (size
<1024)?size
:(size
<1048576)?size
>>10:size
>>20,
551 (size
<1024)?'B':(size
<1048576)?'K':'M',
552 size
, ((dcmd
&(0x1<<3)) == 0)?"non-":"",
553 (unsigned long long)((dev
->resource
[0].start
)&PCI_BASE_ADDRESS_MEM_MASK
));
556 * Check to see the state of the memory
558 pci_read_config_dword( dev
, PMC551_DRAM_BLK0
, &dcmd
);
559 printk(KERN_DEBUG
"pmc551: DRAM_BLK0 Flags: %s,%s\n"
560 "pmc551: DRAM_BLK0 Size: %d at %d\n"
561 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
562 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
563 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
564 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
565 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
567 pci_read_config_dword( dev
, PMC551_DRAM_BLK1
, &dcmd
);
568 printk(KERN_DEBUG
"pmc551: DRAM_BLK1 Flags: %s,%s\n"
569 "pmc551: DRAM_BLK1 Size: %d at %d\n"
570 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
571 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
572 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
573 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
574 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
576 pci_read_config_dword( dev
, PMC551_DRAM_BLK2
, &dcmd
);
577 printk(KERN_DEBUG
"pmc551: DRAM_BLK2 Flags: %s,%s\n"
578 "pmc551: DRAM_BLK2 Size: %d at %d\n"
579 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
580 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
581 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
582 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
583 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
585 pci_read_config_dword( dev
, PMC551_DRAM_BLK3
, &dcmd
);
586 printk(KERN_DEBUG
"pmc551: DRAM_BLK3 Flags: %s,%s\n"
587 "pmc551: DRAM_BLK3 Size: %d at %d\n"
588 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
589 (((0x1<<1)&dcmd
) == 0)?"RW":"RO",
590 (((0x1<<0)&dcmd
) == 0)?"Off":"On",
591 PMC551_DRAM_BLK_GET_SIZE(dcmd
),
592 ((dcmd
>>20)&0x7FF), ((dcmd
>>13)&0x7), ((dcmd
>>9)&0xF) );
594 pci_read_config_word( dev
, PCI_COMMAND
, &cmd
);
595 printk( KERN_DEBUG
"pmc551: Memory Access %s\n",
596 (((0x1<<1)&cmd
) == 0)?"off":"on" );
597 printk( KERN_DEBUG
"pmc551: I/O Access %s\n",
598 (((0x1<<0)&cmd
) == 0)?"off":"on" );
600 pci_read_config_word( dev
, PCI_STATUS
, &cmd
);
601 printk( KERN_DEBUG
"pmc551: Devsel %s\n",
602 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x000)?"Fast":
603 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x200)?"Medium":
604 ((PCI_STATUS_DEVSEL_MASK
&cmd
)==0x400)?"Slow":"Invalid" );
606 printk( KERN_DEBUG
"pmc551: %sFast Back-to-Back\n",
607 ((PCI_COMMAND_FAST_BACK
&cmd
) == 0)?"Not ":"" );
609 pci_read_config_byte(dev
, PMC551_SYS_CTRL_REG
, &bcmd
);
610 printk( KERN_DEBUG
"pmc551: EEPROM is under %s control\n"
611 "pmc551: System Control Register is %slocked to PCI access\n"
612 "pmc551: System Control Register is %slocked to EEPROM access\n",
613 (bcmd
&0x1)?"software":"hardware",
614 (bcmd
&0x20)?"":"un", (bcmd
&0x40)?"":"un");
620 * Kernel version specific module stuffages
624 MODULE_LICENSE("GPL");
625 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
626 MODULE_DESCRIPTION(PMC551_VERSION
);
629 * Stuff these outside the ifdef so as to not bust compiled in driver support
632 #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
633 static int asize
=CONFIG_MTD_PMC551_APERTURE_SIZE
638 module_param(msize
, int, 0);
639 MODULE_PARM_DESC(msize
, "memory size in Megabytes [1 - 1024]");
640 module_param(asize
, int, 0);
641 MODULE_PARM_DESC(asize
, "aperture size, must be <= memsize [1-1024]");
644 * PMC551 Card Initialization
646 static int __init
init_pmc551(void)
648 struct pci_dev
*PCI_Device
= NULL
;
651 struct mtd_info
*mtd
;
655 msize
= (1 << (ffs(msize
) - 1))<<20;
656 if (msize
> (1<<30)) {
657 printk(KERN_NOTICE
"pmc551: Invalid memory size [%d]\n", msize
);
663 asize
= (1 << (ffs(asize
) - 1))<<20;
664 if (asize
> (1<<30) ) {
665 printk(KERN_NOTICE
"pmc551: Invalid aperture size [%d]\n", asize
);
670 printk(KERN_INFO PMC551_VERSION
);
673 * PCU-bus chipset probe.
675 for( count
= 0; count
< MAX_MTD_DEVICES
; count
++ ) {
677 if ((PCI_Device
= pci_find_device(PCI_VENDOR_ID_V3_SEMI
,
678 PCI_DEVICE_ID_V3_SEMI_V370PDC
,
679 PCI_Device
) ) == NULL
) {
683 printk(KERN_NOTICE
"pmc551: Found PCI V370PDC at 0x%llx\n",
684 (unsigned long long)PCI_Device
->resource
[0].start
);
687 * The PMC551 device acts VERY weird if you don't init it
688 * first. i.e. it will not correctly report devsel. If for
689 * some reason the sdram is in a wrote-protected state the
690 * device will DEVSEL when it is written to causing problems
691 * with the oldproc.c driver in
692 * some kernels (2.2.*)
694 if((length
= fixup_pmc551(PCI_Device
)) <= 0) {
695 printk(KERN_NOTICE
"pmc551: Cannot init SDRAM\n");
700 * This is needed until the driver is capable of reading the
701 * onboard I2C SROM to discover the "real" memory size.
705 printk(KERN_NOTICE
"pmc551: Using specified memory size 0x%x\n", length
);
710 mtd
= kmalloc(sizeof(struct mtd_info
), GFP_KERNEL
);
712 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD device.\n");
716 memset(mtd
, 0, sizeof(struct mtd_info
));
718 priv
= kmalloc (sizeof(struct mypriv
), GFP_KERNEL
);
720 printk(KERN_NOTICE
"pmc551: Cannot allocate new MTD device.\n");
724 memset(priv
, 0, sizeof(*priv
));
726 priv
->dev
= PCI_Device
;
729 printk(KERN_NOTICE
"pmc551: reducing aperture size to fit %dM\n",length
>>20);
730 priv
->asize
= asize
= length
;
731 } else if (asize
== 0 || asize
== length
) {
732 printk(KERN_NOTICE
"pmc551: Using existing aperture size %dM\n", length
>>20);
733 priv
->asize
= asize
= length
;
735 printk(KERN_NOTICE
"pmc551: Using specified aperture size %dM\n", asize
>>20);
738 priv
->start
= ioremap(((PCI_Device
->resource
[0].start
)
739 & PCI_BASE_ADDRESS_MEM_MASK
),
743 printk(KERN_NOTICE
"pmc551: Unable to map IO space\n");
749 #ifdef CONFIG_MTD_PMC551_DEBUG
750 printk( KERN_DEBUG
"pmc551: setting aperture to %d\n",
751 ffs(priv
->asize
>>20)-1);
754 priv
->base_map0
= ( PMC551_PCI_MEM_MAP_REG_EN
755 | PMC551_PCI_MEM_MAP_ENABLE
756 | (ffs(priv
->asize
>>20)-1)<<4 );
757 priv
->curr_map0
= priv
->base_map0
;
758 pci_write_config_dword ( priv
->dev
, PMC551_PCI_MEM_MAP0
,
761 #ifdef CONFIG_MTD_PMC551_DEBUG
762 printk( KERN_DEBUG
"pmc551: aperture set to %d\n",
763 (priv
->base_map0
& 0xF0)>>4 );
767 mtd
->flags
= MTD_CAP_RAM
;
768 mtd
->erase
= pmc551_erase
;
769 mtd
->read
= pmc551_read
;
770 mtd
->write
= pmc551_write
;
771 mtd
->point
= pmc551_point
;
772 mtd
->unpoint
= pmc551_unpoint
;
774 mtd
->name
= "PMC551 RAM board";
775 mtd
->erasesize
= 0x10000;
777 mtd
->owner
= THIS_MODULE
;
779 if (add_mtd_device(mtd
)) {
780 printk(KERN_NOTICE
"pmc551: Failed to register new device\n");
781 iounmap(priv
->start
);
786 printk(KERN_NOTICE
"Registered pmc551 memory device.\n");
787 printk(KERN_NOTICE
"Mapped %dM of memory from 0x%p to 0x%p\n",
790 priv
->start
+ priv
->asize
);
791 printk(KERN_NOTICE
"Total memory is %d%c\n",
792 (length
<1024)?length
:
793 (length
<1048576)?length
>>10:length
>>20,
794 (length
<1024)?'B':(length
<1048576)?'K':'M');
795 priv
->nextpmc551
= pmc551list
;
801 printk(KERN_NOTICE
"pmc551: not detected\n");
804 printk(KERN_NOTICE
"pmc551: %d pmc551 devices loaded\n", found
);
810 * PMC551 Card Cleanup
812 static void __exit
cleanup_pmc551(void)
815 struct mtd_info
*mtd
;
818 while((mtd
=pmc551list
)) {
820 pmc551list
= priv
->nextpmc551
;
823 printk (KERN_DEBUG
"pmc551: unmapping %dM starting at 0x%p\n",
824 priv
->asize
>>20, priv
->start
);
825 iounmap (priv
->start
);
829 del_mtd_device (mtd
);
834 printk(KERN_NOTICE
"pmc551: %d pmc551 devices unloaded\n", found
);
837 module_init(init_pmc551
);
838 module_exit(cleanup_pmc551
);