[PATCH] kernel-side context switch code for spufs
[linux-2.6/kvm.git] / include / asm-sparc64 / head.h
blob0abd3a674e8f1abcd178f5f3fe9260efcc2a04ce
1 /* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */
2 #ifndef _SPARC64_HEAD_H
3 #define _SPARC64_HEAD_H
5 #include <asm/pstate.h>
7 #define KERNBASE 0x400000
9 #define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ)
11 #define __CHEETAH_ID 0x003e0014
12 #define __JALAPENO_ID 0x003e0016
14 #define CHEETAH_MANUF 0x003e
15 #define CHEETAH_IMPL 0x0014 /* Ultra-III */
16 #define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */
17 #define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */
18 #define JAGUAR_IMPL 0x0018 /* Ultra-IV */
19 #define PANTHER_IMPL 0x0019 /* Ultra-IV+ */
20 #define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */
22 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
23 rdpr %ver, %tmp1; \
24 sethi %hi(__CHEETAH_ID), %tmp2; \
25 srlx %tmp1, 32, %tmp1; \
26 or %tmp2, %lo(__CHEETAH_ID), %tmp2;\
27 cmp %tmp1, %tmp2; \
28 be,pn %icc, label; \
29 nop;
31 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \
32 rdpr %ver, %tmp1; \
33 sethi %hi(__JALAPENO_ID), %tmp2; \
34 srlx %tmp1, 32, %tmp1; \
35 or %tmp2, %lo(__JALAPENO_ID), %tmp2;\
36 cmp %tmp1, %tmp2; \
37 be,pn %icc, label; \
38 nop;
40 #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \
41 rdpr %ver, %tmp1; \
42 srlx %tmp1, (32 + 16), %tmp2; \
43 cmp %tmp2, CHEETAH_MANUF; \
44 bne,pt %xcc, 99f; \
45 sllx %tmp1, 16, %tmp1; \
46 srlx %tmp1, (32 + 16), %tmp2; \
47 cmp %tmp2, CHEETAH_PLUS_IMPL; \
48 bgeu,pt %xcc, label; \
49 99: nop;
51 #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \
52 rdpr %ver, %tmp1; \
53 srlx %tmp1, (32 + 16), %tmp2; \
54 cmp %tmp2, CHEETAH_MANUF; \
55 bne,pt %xcc, 99f; \
56 sllx %tmp1, 16, %tmp1; \
57 srlx %tmp1, (32 + 16), %tmp2; \
58 cmp %tmp2, CHEETAH_IMPL; \
59 bgeu,pt %xcc, label; \
60 99: nop;
62 #endif /* !(_SPARC64_HEAD_H) */