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netxen: enable ip addr hashing
[linux-2.6/kvm.git] / drivers / net / netxen / netxen_nic_init.c
blob5d7a2c45336377ccdac667bdf747869f2698412a
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31 #include <linux/netdevice.h>
32 #include <linux/delay.h>
33 #include "netxen_nic.h"
34 #include "netxen_nic_hw.h"
35 #include "netxen_nic_phan_reg.h"
36
37 struct crb_addr_pair {
38 u32 addr;
39 u32 data;
40 };
41
42 #define NETXEN_MAX_CRB_XFORM 60
43 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
44 #define NETXEN_ADDR_ERROR (0xffffffff)
45
46 #define crb_addr_transform(name) \
47 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
48 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
49
50 #define NETXEN_NIC_XDMA_RESET 0x8000ff
51
52 static void
53 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
54 struct nx_host_rds_ring *rds_ring);
55
56 static void crb_addr_transform_setup(void)
57 {
58 crb_addr_transform(XDMA);
59 crb_addr_transform(TIMR);
60 crb_addr_transform(SRE);
61 crb_addr_transform(SQN3);
62 crb_addr_transform(SQN2);
63 crb_addr_transform(SQN1);
64 crb_addr_transform(SQN0);
65 crb_addr_transform(SQS3);
66 crb_addr_transform(SQS2);
67 crb_addr_transform(SQS1);
68 crb_addr_transform(SQS0);
69 crb_addr_transform(RPMX7);
70 crb_addr_transform(RPMX6);
71 crb_addr_transform(RPMX5);
72 crb_addr_transform(RPMX4);
73 crb_addr_transform(RPMX3);
74 crb_addr_transform(RPMX2);
75 crb_addr_transform(RPMX1);
76 crb_addr_transform(RPMX0);
77 crb_addr_transform(ROMUSB);
78 crb_addr_transform(SN);
79 crb_addr_transform(QMN);
80 crb_addr_transform(QMS);
81 crb_addr_transform(PGNI);
82 crb_addr_transform(PGND);
83 crb_addr_transform(PGN3);
84 crb_addr_transform(PGN2);
85 crb_addr_transform(PGN1);
86 crb_addr_transform(PGN0);
87 crb_addr_transform(PGSI);
88 crb_addr_transform(PGSD);
89 crb_addr_transform(PGS3);
90 crb_addr_transform(PGS2);
91 crb_addr_transform(PGS1);
92 crb_addr_transform(PGS0);
93 crb_addr_transform(PS);
94 crb_addr_transform(PH);
95 crb_addr_transform(NIU);
96 crb_addr_transform(I2Q);
97 crb_addr_transform(EG);
98 crb_addr_transform(MN);
99 crb_addr_transform(MS);
100 crb_addr_transform(CAS2);
101 crb_addr_transform(CAS1);
102 crb_addr_transform(CAS0);
103 crb_addr_transform(CAM);
104 crb_addr_transform(C2C1);
105 crb_addr_transform(C2C0);
106 crb_addr_transform(SMB);
107 crb_addr_transform(OCM0);
108 crb_addr_transform(I2C0);
109 }
110
111 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
112 {
113 struct netxen_recv_context *recv_ctx;
114 struct nx_host_rds_ring *rds_ring;
115 struct netxen_rx_buffer *rx_buf;
116 int i, ring;
117
118 recv_ctx = &adapter->recv_ctx;
119 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
120 rds_ring = &recv_ctx->rds_rings[ring];
121 for (i = 0; i < rds_ring->num_desc; ++i) {
122 rx_buf = &(rds_ring->rx_buf_arr[i]);
123 if (rx_buf->state == NETXEN_BUFFER_FREE)
124 continue;
125 pci_unmap_single(adapter->pdev,
126 rx_buf->dma,
127 rds_ring->dma_size,
128 PCI_DMA_FROMDEVICE);
129 if (rx_buf->skb != NULL)
130 dev_kfree_skb_any(rx_buf->skb);
131 }
132 }
133 }
134
135 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
136 {
137 struct netxen_cmd_buffer *cmd_buf;
138 struct netxen_skb_frag *buffrag;
139 int i, j;
140 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
141
142 cmd_buf = tx_ring->cmd_buf_arr;
143 for (i = 0; i < tx_ring->num_desc; i++) {
144 buffrag = cmd_buf->frag_array;
145 if (buffrag->dma) {
146 pci_unmap_single(adapter->pdev, buffrag->dma,
147 buffrag->length, PCI_DMA_TODEVICE);
148 buffrag->dma = 0ULL;
149 }
150 for (j = 0; j < cmd_buf->frag_count; j++) {
151 buffrag++;
152 if (buffrag->dma) {
153 pci_unmap_page(adapter->pdev, buffrag->dma,
154 buffrag->length,
155 PCI_DMA_TODEVICE);
156 buffrag->dma = 0ULL;
157 }
158 }
159 if (cmd_buf->skb) {
160 dev_kfree_skb_any(cmd_buf->skb);
161 cmd_buf->skb = NULL;
162 }
163 cmd_buf++;
164 }
165 }
166
167 void netxen_free_sw_resources(struct netxen_adapter *adapter)
168 {
169 struct netxen_recv_context *recv_ctx;
170 struct nx_host_rds_ring *rds_ring;
171 struct nx_host_tx_ring *tx_ring;
172 int ring;
173
174 recv_ctx = &adapter->recv_ctx;
175
176 if (recv_ctx->rds_rings == NULL)
177 goto skip_rds;
178
179 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
180 rds_ring = &recv_ctx->rds_rings[ring];
181 vfree(rds_ring->rx_buf_arr);
182 rds_ring->rx_buf_arr = NULL;
183 }
184 kfree(recv_ctx->rds_rings);
185
186 skip_rds:
187 if (adapter->tx_ring == NULL)
188 return;
189
190 tx_ring = adapter->tx_ring;
191 vfree(tx_ring->cmd_buf_arr);
192 }
193
194 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
195 {
196 struct netxen_recv_context *recv_ctx;
197 struct nx_host_rds_ring *rds_ring;
198 struct nx_host_sds_ring *sds_ring;
199 struct nx_host_tx_ring *tx_ring;
200 struct netxen_rx_buffer *rx_buf;
201 int ring, i, size;
202
203 struct netxen_cmd_buffer *cmd_buf_arr;
204 struct net_device *netdev = adapter->netdev;
205 struct pci_dev *pdev = adapter->pdev;
206
207 size = sizeof(struct nx_host_tx_ring);
208 tx_ring = kzalloc(size, GFP_KERNEL);
209 if (tx_ring == NULL) {
210 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
211 netdev->name);
212 return -ENOMEM;
213 }
214 adapter->tx_ring = tx_ring;
215
216 tx_ring->num_desc = adapter->num_txd;
217 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
218
219 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
220 if (cmd_buf_arr == NULL) {
221 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
222 netdev->name);
223 return -ENOMEM;
224 }
225 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
226 tx_ring->cmd_buf_arr = cmd_buf_arr;
227
228 recv_ctx = &adapter->recv_ctx;
229
230 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
231 rds_ring = kzalloc(size, GFP_KERNEL);
232 if (rds_ring == NULL) {
233 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
234 netdev->name);
235 return -ENOMEM;
236 }
237 recv_ctx->rds_rings = rds_ring;
238
239 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
240 rds_ring = &recv_ctx->rds_rings[ring];
241 switch (ring) {
242 case RCV_RING_NORMAL:
243 rds_ring->num_desc = adapter->num_rxd;
244 if (adapter->ahw.cut_through) {
245 rds_ring->dma_size =
246 NX_CT_DEFAULT_RX_BUF_LEN;
247 rds_ring->skb_size =
248 NX_CT_DEFAULT_RX_BUF_LEN;
249 } else {
250 rds_ring->dma_size = RX_DMA_MAP_LEN;
251 rds_ring->skb_size =
252 MAX_RX_BUFFER_LENGTH;
253 }
254 break;
255
256 case RCV_RING_JUMBO:
257 rds_ring->num_desc = adapter->num_jumbo_rxd;
258 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
259 rds_ring->dma_size =
260 NX_P3_RX_JUMBO_BUF_MAX_LEN;
261 else
262 rds_ring->dma_size =
263 NX_P2_RX_JUMBO_BUF_MAX_LEN;
264 rds_ring->skb_size =
265 rds_ring->dma_size + NET_IP_ALIGN;
266 break;
267
268 case RCV_RING_LRO:
269 rds_ring->num_desc = adapter->num_lro_rxd;
270 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
271 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
272 break;
273
274 }
275 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
276 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
277 if (rds_ring->rx_buf_arr == NULL) {
278 printk(KERN_ERR "%s: Failed to allocate "
279 "rx buffer ring %d\n",
280 netdev->name, ring);
281 /* free whatever was already allocated */
282 goto err_out;
283 }
284 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
285 INIT_LIST_HEAD(&rds_ring->free_list);
286 /*
287 * Now go through all of them, set reference handles
288 * and put them in the queues.
289 */
290 rx_buf = rds_ring->rx_buf_arr;
291 for (i = 0; i < rds_ring->num_desc; i++) {
292 list_add_tail(&rx_buf->list,
293 &rds_ring->free_list);
294 rx_buf->ref_handle = i;
295 rx_buf->state = NETXEN_BUFFER_FREE;
296 rx_buf++;
297 }
298 spin_lock_init(&rds_ring->lock);
299 }
300
301 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
302 sds_ring = &recv_ctx->sds_rings[ring];
303 sds_ring->irq = adapter->msix_entries[ring].vector;
304 sds_ring->adapter = adapter;
305 sds_ring->num_desc = adapter->num_rxd;
306
307 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
308 INIT_LIST_HEAD(&sds_ring->free_list[i]);
309 }
310
311 return 0;
312
313 err_out:
314 netxen_free_sw_resources(adapter);
315 return -ENOMEM;
316 }
317
318 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
319 {
320 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
321 adapter->set_multi = netxen_p2_nic_set_multi;
322
323 switch (adapter->ahw.port_type) {
324 case NETXEN_NIC_GBE:
325 adapter->enable_phy_interrupts =
326 netxen_niu_gbe_enable_phy_interrupts;
327 adapter->disable_phy_interrupts =
328 netxen_niu_gbe_disable_phy_interrupts;
329 adapter->set_mtu = netxen_nic_set_mtu_gb;
330 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
331 adapter->phy_read = netxen_niu_gbe_phy_read;
332 adapter->phy_write = netxen_niu_gbe_phy_write;
333 adapter->init_port = netxen_niu_gbe_init_port;
334 adapter->stop_port = netxen_niu_disable_gbe_port;
335 break;
336
337 case NETXEN_NIC_XGBE:
338 adapter->enable_phy_interrupts =
339 netxen_niu_xgbe_enable_phy_interrupts;
340 adapter->disable_phy_interrupts =
341 netxen_niu_xgbe_disable_phy_interrupts;
342 adapter->set_mtu = netxen_nic_set_mtu_xgb;
343 adapter->init_port = netxen_niu_xg_init_port;
344 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
345 adapter->stop_port = netxen_niu_disable_xg_port;
346 break;
347
348 default:
349 break;
350 }
351
352 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
353 adapter->set_mtu = nx_fw_cmd_set_mtu;
354 adapter->set_promisc = netxen_p3_nic_set_promisc;
355 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
356 adapter->set_multi = netxen_p3_nic_set_multi;
357 }
358 }
359
360 /*
361 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
362 * address to external PCI CRB address.
363 */
364 static u32 netxen_decode_crb_addr(u32 addr)
365 {
366 int i;
367 u32 base_addr, offset, pci_base;
368
369 crb_addr_transform_setup();
370
371 pci_base = NETXEN_ADDR_ERROR;
372 base_addr = addr & 0xfff00000;
373 offset = addr & 0x000fffff;
374
375 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
376 if (crb_addr_xform[i] == base_addr) {
377 pci_base = i << 20;
378 break;
379 }
380 }
381 if (pci_base == NETXEN_ADDR_ERROR)
382 return pci_base;
383 else
384 return (pci_base + offset);
385 }
386
387 static long rom_max_timeout = 100;
388 static long rom_lock_timeout = 10000;
389
390 static int rom_lock(struct netxen_adapter *adapter)
391 {
392 int iter;
393 u32 done = 0;
394 int timeout = 0;
395
396 while (!done) {
397 /* acquire semaphore2 from PCI HW block */
398 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK));
399 if (done == 1)
400 break;
401 if (timeout >= rom_lock_timeout)
402 return -EIO;
403
404 timeout++;
405 /*
406 * Yield CPU
407 */
408 if (!in_atomic())
409 schedule();
410 else {
411 for (iter = 0; iter < 20; iter++)
412 cpu_relax(); /*This a nop instr on i386 */
413 }
414 }
415 NXWR32(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
416 return 0;
417 }
418
419 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
420 {
421 long timeout = 0;
422 long done = 0;
423
424 cond_resched();
425
426 while (done == 0) {
427 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
428 done &= 2;
429 timeout++;
430 if (timeout >= rom_max_timeout) {
431 printk("Timeout reached waiting for rom done");
432 return -EIO;
433 }
434 }
435 return 0;
436 }
437
438 static void netxen_rom_unlock(struct netxen_adapter *adapter)
439 {
440 /* release semaphore2 */
441 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK));
442
443 }
444
445 static int do_rom_fast_read(struct netxen_adapter *adapter,
446 int addr, int *valp)
447 {
448 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
449 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
450 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
451 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
452 if (netxen_wait_rom_done(adapter)) {
453 printk("Error waiting for rom done\n");
454 return -EIO;
455 }
456 /* reset abyte_cnt and dummy_byte_cnt */
457 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
458 udelay(10);
459 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
460
461 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
462 return 0;
463 }
464
465 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
466 u8 *bytes, size_t size)
467 {
468 int addridx;
469 int ret = 0;
470
471 for (addridx = addr; addridx < (addr + size); addridx += 4) {
472 int v;
473 ret = do_rom_fast_read(adapter, addridx, &v);
474 if (ret != 0)
475 break;
476 *(__le32 *)bytes = cpu_to_le32(v);
477 bytes += 4;
478 }
479
480 return ret;
481 }
482
483 int
484 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
485 u8 *bytes, size_t size)
486 {
487 int ret;
488
489 ret = rom_lock(adapter);
490 if (ret < 0)
491 return ret;
492
493 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
494
495 netxen_rom_unlock(adapter);
496 return ret;
497 }
498
499 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
500 {
501 int ret;
502
503 if (rom_lock(adapter) != 0)
504 return -EIO;
505
506 ret = do_rom_fast_read(adapter, addr, valp);
507 netxen_rom_unlock(adapter);
508 return ret;
509 }
510
511 #define NETXEN_BOARDTYPE 0x4008
512 #define NETXEN_BOARDNUM 0x400c
513 #define NETXEN_CHIPNUM 0x4010
514
515 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
516 {
517 int addr, val;
518 int i, n, init_delay = 0;
519 struct crb_addr_pair *buf;
520 unsigned offset;
521 u32 off;
522
523 /* resetall */
524 rom_lock(adapter);
525 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
526 netxen_rom_unlock(adapter);
527
528 if (verbose) {
529 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
530 printk("P2 ROM board type: 0x%08x\n", val);
531 else
532 printk("Could not read board type\n");
533 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
534 printk("P2 ROM board num: 0x%08x\n", val);
535 else
536 printk("Could not read board number\n");
537 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
538 printk("P2 ROM chip num: 0x%08x\n", val);
539 else
540 printk("Could not read chip number\n");
541 }
542
543 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
544 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
545 (n != 0xcafecafe) ||
546 netxen_rom_fast_read(adapter, 4, &n) != 0) {
547 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
548 "n: %08x\n", netxen_nic_driver_name, n);
549 return -EIO;
550 }
551 offset = n & 0xffffU;
552 n = (n >> 16) & 0xffffU;
553 } else {
554 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
555 !(n & 0x80000000)) {
556 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
557 "n: %08x\n", netxen_nic_driver_name, n);
558 return -EIO;
559 }
560 offset = 1;
561 n &= ~0x80000000;
562 }
563
564 if (n < 1024) {
565 if (verbose)
566 printk(KERN_DEBUG "%s: %d CRB init values found"
567 " in ROM.\n", netxen_nic_driver_name, n);
568 } else {
569 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
570 " initialized.\n", __func__, n);
571 return -EIO;
572 }
573
574 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
575 if (buf == NULL) {
576 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
577 netxen_nic_driver_name);
578 return -ENOMEM;
579 }
580 for (i = 0; i < n; i++) {
581 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
582 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
583 kfree(buf);
584 return -EIO;
585 }
586
587 buf[i].addr = addr;
588 buf[i].data = val;
589
590 if (verbose)
591 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
592 netxen_nic_driver_name,
593 (u32)netxen_decode_crb_addr(addr), val);
594 }
595 for (i = 0; i < n; i++) {
596
597 off = netxen_decode_crb_addr(buf[i].addr);
598 if (off == NETXEN_ADDR_ERROR) {
599 printk(KERN_ERR"CRB init value out of range %x\n",
600 buf[i].addr);
601 continue;
602 }
603 off += NETXEN_PCI_CRBSPACE;
604 /* skipping cold reboot MAGIC */
605 if (off == NETXEN_CAM_RAM(0x1fc))
606 continue;
607
608 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
609 /* do not reset PCI */
610 if (off == (ROMUSB_GLB + 0xbc))
611 continue;
612 if (off == (ROMUSB_GLB + 0xa8))
613 continue;
614 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
615 continue;
616 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
617 continue;
618 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
619 continue;
620 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
621 buf[i].data = 0x1020;
622 /* skip the function enable register */
623 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
624 continue;
625 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
626 continue;
627 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
628 continue;
629 }
630
631 if (off == NETXEN_ADDR_ERROR) {
632 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
633 netxen_nic_driver_name, buf[i].addr);
634 continue;
635 }
636
637 init_delay = 1;
638 /* After writing this register, HW needs time for CRB */
639 /* to quiet down (else crb_window returns 0xffffffff) */
640 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
641 init_delay = 1000;
642 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
643 /* hold xdma in reset also */
644 buf[i].data = NETXEN_NIC_XDMA_RESET;
645 buf[i].data = 0x8000ff;
646 }
647 }
648
649 NXWR32(adapter, off, buf[i].data);
650
651 msleep(init_delay);
652 }
653 kfree(buf);
654
655 /* disable_peg_cache_all */
656
657 /* unreset_net_cache */
658 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
659 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
660 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
661 }
662
663 /* p2dn replyCount */
664 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
665 /* disable_peg_cache 0 */
666 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
667 /* disable_peg_cache 1 */
668 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
669
670 /* peg_clr_all */
671
672 /* peg_clr 0 */
673 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
674 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
675 /* peg_clr 1 */
676 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
677 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
678 /* peg_clr 2 */
679 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
680 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
681 /* peg_clr 3 */
682 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
683 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
684 return 0;
685 }
686
687 int
688 netxen_need_fw_reset(struct netxen_adapter *adapter)
689 {
690 u32 count, old_count;
691 u32 val, version, major, minor, build;
692 int i, timeout;
693 u8 fw_type;
694
695 /* NX2031 firmware doesn't support heartbit */
696 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
697 return 1;
698
699 /* last attempt had failed */
700 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
701 return 1;
702
703 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
704
705 for (i = 0; i < 10; i++) {
706
707 timeout = msleep_interruptible(200);
708 if (timeout) {
709 NXWR32(adapter, CRB_CMDPEG_STATE,
710 PHAN_INITIALIZE_FAILED);
711 return -EINTR;
712 }
713
714 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
715 if (count != old_count)
716 break;
717 }
718
719 /* firmware is dead */
720 if (count == old_count)
721 return 1;
722
723 /* check if we have got newer or different file firmware */
724 if (adapter->fw) {
725
726 const struct firmware *fw = adapter->fw;
727
728 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
729 version = NETXEN_DECODE_VERSION(val);
730
731 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
732 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
733 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
734
735 if (version > NETXEN_VERSION_CODE(major, minor, build))
736 return 1;
737
738 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
739
740 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
741 fw_type = (val & 0x4) ?
742 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
743
744 if (adapter->fw_type != fw_type)
745 return 1;
746 }
747 }
748
749 return 0;
750 }
751
752 static char *fw_name[] = {
753 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
754 };
755
756 int
757 netxen_load_firmware(struct netxen_adapter *adapter)
758 {
759 u64 *ptr64;
760 u32 i, flashaddr, size;
761 const struct firmware *fw = adapter->fw;
762 struct pci_dev *pdev = adapter->pdev;
763
764 dev_info(&pdev->dev, "loading firmware from %s\n",
765 fw_name[adapter->fw_type]);
766
767 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
768 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
769
770 if (fw) {
771 __le64 data;
772
773 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
774
775 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
776 flashaddr = NETXEN_BOOTLD_START;
777
778 for (i = 0; i < size; i++) {
779 data = cpu_to_le64(ptr64[i]);
780 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
781 flashaddr += 8;
782 }
783
784 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
785 size = (__force u32)cpu_to_le32(size) / 8;
786
787 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
788 flashaddr = NETXEN_IMAGE_START;
789
790 for (i = 0; i < size; i++) {
791 data = cpu_to_le64(ptr64[i]);
792
793 if (adapter->pci_mem_write(adapter,
794 flashaddr, &data, 8))
795 return -EIO;
796
797 flashaddr += 8;
798 }
799 } else {
800 u32 data;
801
802 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
803 flashaddr = NETXEN_BOOTLD_START;
804
805 for (i = 0; i < size; i++) {
806 if (netxen_rom_fast_read(adapter,
807 flashaddr, (int *)&data) != 0)
808 return -EIO;
809
810 if (adapter->pci_mem_write(adapter,
811 flashaddr, &data, 4))
812 return -EIO;
813
814 flashaddr += 4;
815 }
816 }
817 msleep(1);
818
819 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
820 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
821 else {
822 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
823 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
824 }
825
826 return 0;
827 }
828
829 static int
830 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
831 {
832 __le32 val;
833 u32 ver, min_ver, bios;
834 struct pci_dev *pdev = adapter->pdev;
835 const struct firmware *fw = adapter->fw;
836
837 if (fw->size < NX_FW_MIN_SIZE)
838 return -EINVAL;
839
840 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
841 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
842 return -EINVAL;
843
844 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
845
846 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
847 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
848 else
849 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
850
851 ver = NETXEN_DECODE_VERSION(val);
852
853 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
854 dev_err(&pdev->dev,
855 "%s: firmware version %d.%d.%d unsupported\n",
856 fwname, _major(ver), _minor(ver), _build(ver));
857 return -EINVAL;
858 }
859
860 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
861 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
862 if ((__force u32)val != bios) {
863 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
864 fwname);
865 return -EINVAL;
866 }
867
868 /* check if flashed firmware is newer */
869 if (netxen_rom_fast_read(adapter,
870 NX_FW_VERSION_OFFSET, (int *)&val))
871 return -EIO;
872 val = NETXEN_DECODE_VERSION(val);
873 if (val > ver) {
874 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
875 fwname);
876 return -EINVAL;
877 }
878
879 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
880 return 0;
881 }
882
883 static int
884 netxen_p3_has_mn(struct netxen_adapter *adapter)
885 {
886 u32 capability, flashed_ver;
887 capability = 0;
888
889 netxen_rom_fast_read(adapter,
890 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
891 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
892
893 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
894
895 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
896 if (capability & NX_PEG_TUNE_MN_PRESENT)
897 return 1;
898 }
899 return 0;
900 }
901
902 void netxen_request_firmware(struct netxen_adapter *adapter)
903 {
904 u8 fw_type;
905 struct pci_dev *pdev = adapter->pdev;
906 int rc = 0;
907
908 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
909 fw_type = NX_P2_MN_ROMIMAGE;
910 goto request_fw;
911 }
912
913 fw_type = netxen_p3_has_mn(adapter) ?
914 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
915
916 request_fw:
917 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
918 if (rc != 0) {
919 if (fw_type == NX_P3_MN_ROMIMAGE) {
920 msleep(1);
921 fw_type = NX_P3_CT_ROMIMAGE;
922 goto request_fw;
923 }
924
925 fw_type = NX_FLASH_ROMIMAGE;
926 adapter->fw = NULL;
927 goto done;
928 }
929
930 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
931 if (rc != 0) {
932 release_firmware(adapter->fw);
933
934 if (fw_type == NX_P3_MN_ROMIMAGE) {
935 msleep(1);
936 fw_type = NX_P3_CT_ROMIMAGE;
937 goto request_fw;
938 }
939
940 fw_type = NX_FLASH_ROMIMAGE;
941 adapter->fw = NULL;
942 goto done;
943 }
944
945 done:
946 adapter->fw_type = fw_type;
947 }
948
949
950 void
951 netxen_release_firmware(struct netxen_adapter *adapter)
952 {
953 if (adapter->fw)
954 release_firmware(adapter->fw);
955 }
956
957 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
958 {
959 uint64_t addr;
960 uint32_t hi;
961 uint32_t lo;
962
963 adapter->dummy_dma.addr =
964 pci_alloc_consistent(adapter->pdev,
965 NETXEN_HOST_DUMMY_DMA_SIZE,
966 &adapter->dummy_dma.phys_addr);
967 if (adapter->dummy_dma.addr == NULL) {
968 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
969 __func__);
970 return -ENOMEM;
971 }
972
973 addr = (uint64_t) adapter->dummy_dma.phys_addr;
974 hi = (addr >> 32) & 0xffffffff;
975 lo = addr & 0xffffffff;
976
977 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
978 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
979
980 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
981 uint32_t temp = 0;
982 NXWR32(adapter, CRB_HOST_DUMMY_BUF, temp);
983 }
984
985 return 0;
986 }
987
988 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
989 {
990 int i = 100;
991
992 if (!adapter->dummy_dma.addr)
993 return;
994
995 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
996 do {
997 if (dma_watchdog_shutdown_request(adapter) == 1)
998 break;
999 msleep(50);
1000 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
1001 break;
1002 } while (--i);
1003 }
1004
1005 if (i) {
1006 pci_free_consistent(adapter->pdev,
1007 NETXEN_HOST_DUMMY_DMA_SIZE,
1008 adapter->dummy_dma.addr,
1009 adapter->dummy_dma.phys_addr);
1010 adapter->dummy_dma.addr = NULL;
1011 } else {
1012 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
1013 adapter->netdev->name);
1014 }
1015 }
1016
1017 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1018 {
1019 u32 val = 0;
1020 int retries = 60;
1021
1022 if (pegtune_val)
1023 return 0;
1024
1025 do {
1026 val = NXRD32(adapter, CRB_CMDPEG_STATE);
1027
1028 switch (val) {
1029 case PHAN_INITIALIZE_COMPLETE:
1030 case PHAN_INITIALIZE_ACK:
1031 return 0;
1032 case PHAN_INITIALIZE_FAILED:
1033 goto out_err;
1034 default:
1035 break;
1036 }
1037
1038 msleep(500);
1039
1040 } while (--retries);
1041
1042 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1043
1044 out_err:
1045 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1046 return -EIO;
1047 }
1048
1049 static int
1050 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1051 {
1052 u32 val = 0;
1053 int retries = 2000;
1054
1055 do {
1056 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1057
1058 if (val == PHAN_PEG_RCV_INITIALIZED)
1059 return 0;
1060
1061 msleep(10);
1062
1063 } while (--retries);
1064
1065 if (!retries) {
1066 printk(KERN_ERR "Receive Peg initialization not "
1067 "complete, state: 0x%x.\n", val);
1068 return -EIO;
1069 }
1070
1071 return 0;
1072 }
1073
1074 int netxen_init_firmware(struct netxen_adapter *adapter)
1075 {
1076 int err;
1077
1078 err = netxen_receive_peg_ready(adapter);
1079 if (err)
1080 return err;
1081
1082 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1083 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1084 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1085 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1086
1087 return err;
1088 }
1089
1090 static void
1091 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1092 {
1093 u32 cable_OUI;
1094 u16 cable_len;
1095 u16 link_speed;
1096 u8 link_status, module, duplex, autoneg;
1097 struct net_device *netdev = adapter->netdev;
1098
1099 adapter->has_link_events = 1;
1100
1101 cable_OUI = msg->body[1] & 0xffffffff;
1102 cable_len = (msg->body[1] >> 32) & 0xffff;
1103 link_speed = (msg->body[1] >> 48) & 0xffff;
1104
1105 link_status = msg->body[2] & 0xff;
1106 duplex = (msg->body[2] >> 16) & 0xff;
1107 autoneg = (msg->body[2] >> 24) & 0xff;
1108
1109 module = (msg->body[2] >> 8) & 0xff;
1110 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1111 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1112 netdev->name, cable_OUI, cable_len);
1113 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1114 printk(KERN_INFO "%s: unsupported cable length %d\n",
1115 netdev->name, cable_len);
1116 }
1117
1118 netxen_advert_link_change(adapter, link_status);
1119
1120 /* update link parameters */
1121 if (duplex == LINKEVENT_FULL_DUPLEX)
1122 adapter->link_duplex = DUPLEX_FULL;
1123 else
1124 adapter->link_duplex = DUPLEX_HALF;
1125 adapter->module_type = module;
1126 adapter->link_autoneg = autoneg;
1127 adapter->link_speed = link_speed;
1128 }
1129
1130 static void
1131 netxen_handle_fw_message(int desc_cnt, int index,
1132 struct nx_host_sds_ring *sds_ring)
1133 {
1134 nx_fw_msg_t msg;
1135 struct status_desc *desc;
1136 int i = 0, opcode;
1137
1138 while (desc_cnt > 0 && i < 8) {
1139 desc = &sds_ring->desc_head[index];
1140 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1141 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1142
1143 index = get_next_index(index, sds_ring->num_desc);
1144 desc_cnt--;
1145 }
1146
1147 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1148 switch (opcode) {
1149 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1150 netxen_handle_linkevent(sds_ring->adapter, &msg);
1151 break;
1152 default:
1153 break;
1154 }
1155 }
1156
1157 static int
1158 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1159 struct nx_host_rds_ring *rds_ring,
1160 struct netxen_rx_buffer *buffer)
1161 {
1162 struct sk_buff *skb;
1163 dma_addr_t dma;
1164 struct pci_dev *pdev = adapter->pdev;
1165
1166 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1167 if (!buffer->skb)
1168 return 1;
1169
1170 skb = buffer->skb;
1171
1172 if (!adapter->ahw.cut_through)
1173 skb_reserve(skb, 2);
1174
1175 dma = pci_map_single(pdev, skb->data,
1176 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1177
1178 if (pci_dma_mapping_error(pdev, dma)) {
1179 dev_kfree_skb_any(skb);
1180 buffer->skb = NULL;
1181 return 1;
1182 }
1183
1184 buffer->skb = skb;
1185 buffer->dma = dma;
1186 buffer->state = NETXEN_BUFFER_BUSY;
1187
1188 return 0;
1189 }
1190
1191 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1192 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1193 {
1194 struct netxen_rx_buffer *buffer;
1195 struct sk_buff *skb;
1196
1197 buffer = &rds_ring->rx_buf_arr[index];
1198
1199 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1200 PCI_DMA_FROMDEVICE);
1201
1202 skb = buffer->skb;
1203 if (!skb)
1204 goto no_skb;
1205
1206 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1207 adapter->stats.csummed++;
1208 skb->ip_summed = CHECKSUM_UNNECESSARY;
1209 } else
1210 skb->ip_summed = CHECKSUM_NONE;
1211
1212 skb->dev = adapter->netdev;
1213
1214 buffer->skb = NULL;
1215 no_skb:
1216 buffer->state = NETXEN_BUFFER_FREE;
1217 return skb;
1218 }
1219
1220 static struct netxen_rx_buffer *
1221 netxen_process_rcv(struct netxen_adapter *adapter,
1222 int ring, int index, int length, int cksum, int pkt_offset,
1223 struct nx_host_sds_ring *sds_ring)
1224 {
1225 struct net_device *netdev = adapter->netdev;
1226 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1227 struct netxen_rx_buffer *buffer;
1228 struct sk_buff *skb;
1229 struct nx_host_rds_ring *rds_ring = &recv_ctx->rds_rings[ring];
1230
1231 if (unlikely(index > rds_ring->num_desc))
1232 return NULL;
1233
1234 buffer = &rds_ring->rx_buf_arr[index];
1235
1236 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1237 if (!skb)
1238 return buffer;
1239
1240 if (length > rds_ring->skb_size)
1241 skb_put(skb, rds_ring->skb_size);
1242 else
1243 skb_put(skb, length);
1244
1245
1246 if (pkt_offset)
1247 skb_pull(skb, pkt_offset);
1248
1249 skb->protocol = eth_type_trans(skb, netdev);
1250
1251 napi_gro_receive(&sds_ring->napi, skb);
1252
1253 adapter->stats.no_rcv++;
1254 adapter->stats.rxbytes += length;
1255
1256 return buffer;
1257 }
1258
1259 #define netxen_merge_rx_buffers(list, head) \
1260 do { list_splice_tail_init(list, head); } while (0);
1261
1262 int
1263 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1264 {
1265 struct netxen_adapter *adapter = sds_ring->adapter;
1266
1267 struct list_head *cur;
1268
1269 struct status_desc *desc;
1270 struct netxen_rx_buffer *rxbuf;
1271
1272 u32 consumer = sds_ring->consumer;
1273
1274 int count = 0;
1275 u64 sts_data;
1276 int opcode, ring, index, length, cksum, pkt_offset, desc_cnt;
1277
1278 while (count < max) {
1279 desc = &sds_ring->desc_head[consumer];
1280 sts_data = le64_to_cpu(desc->status_desc_data[0]);
1281
1282 if (!(sts_data & STATUS_OWNER_HOST))
1283 break;
1284
1285 desc_cnt = netxen_get_sts_desc_cnt(sts_data);
1286 ring = netxen_get_sts_type(sts_data);
1287
1288 if (ring > RCV_RING_JUMBO)
1289 goto skip;
1290
1291 opcode = netxen_get_sts_opcode(sts_data);
1292
1293 switch (opcode) {
1294 case NETXEN_NIC_RXPKT_DESC:
1295 case NETXEN_OLD_RXPKT_DESC:
1296 case NETXEN_NIC_SYN_OFFLOAD:
1297 break;
1298 case NETXEN_NIC_RESPONSE_DESC:
1299 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1300 default:
1301 goto skip;
1302 }
1303
1304 WARN_ON(desc_cnt > 1);
1305
1306 index = netxen_get_sts_refhandle(sts_data);
1307 length = netxen_get_sts_totallength(sts_data);
1308 cksum = netxen_get_sts_status(sts_data);
1309 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1310
1311 rxbuf = netxen_process_rcv(adapter, ring, index,
1312 length, cksum, pkt_offset, sds_ring);
1313
1314 if (rxbuf)
1315 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1316
1317 skip:
1318 for (; desc_cnt > 0; desc_cnt--) {
1319 desc = &sds_ring->desc_head[consumer];
1320 desc->status_desc_data[0] =
1321 cpu_to_le64(STATUS_OWNER_PHANTOM);
1322 consumer = get_next_index(consumer, sds_ring->num_desc);
1323 }
1324 count++;
1325 }
1326
1327 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1328 struct nx_host_rds_ring *rds_ring =
1329 &adapter->recv_ctx.rds_rings[ring];
1330
1331 if (!list_empty(&sds_ring->free_list[ring])) {
1332 list_for_each(cur, &sds_ring->free_list[ring]) {
1333 rxbuf = list_entry(cur,
1334 struct netxen_rx_buffer, list);
1335 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1336 }
1337 spin_lock(&rds_ring->lock);
1338 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1339 &rds_ring->free_list);
1340 spin_unlock(&rds_ring->lock);
1341 }
1342
1343 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1344 }
1345
1346 if (count) {
1347 sds_ring->consumer = consumer;
1348 NXWR32(adapter, sds_ring->crb_sts_consumer, consumer);
1349 }
1350
1351 return count;
1352 }
1353
1354 /* Process Command status ring */
1355 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1356 {
1357 u32 sw_consumer, hw_consumer;
1358 int count = 0, i;
1359 struct netxen_cmd_buffer *buffer;
1360 struct pci_dev *pdev = adapter->pdev;
1361 struct net_device *netdev = adapter->netdev;
1362 struct netxen_skb_frag *frag;
1363 int done = 0;
1364 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1365
1366 if (!spin_trylock(&adapter->tx_clean_lock))
1367 return 1;
1368
1369 sw_consumer = tx_ring->sw_consumer;
1370 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1371
1372 while (sw_consumer != hw_consumer) {
1373 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1374 if (buffer->skb) {
1375 frag = &buffer->frag_array[0];
1376 pci_unmap_single(pdev, frag->dma, frag->length,
1377 PCI_DMA_TODEVICE);
1378 frag->dma = 0ULL;
1379 for (i = 1; i < buffer->frag_count; i++) {
1380 frag++; /* Get the next frag */
1381 pci_unmap_page(pdev, frag->dma, frag->length,
1382 PCI_DMA_TODEVICE);
1383 frag->dma = 0ULL;
1384 }
1385
1386 adapter->stats.xmitfinished++;
1387 dev_kfree_skb_any(buffer->skb);
1388 buffer->skb = NULL;
1389 }
1390
1391 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1392 if (++count >= MAX_STATUS_HANDLE)
1393 break;
1394 }
1395
1396 if (count && netif_running(netdev)) {
1397 tx_ring->sw_consumer = sw_consumer;
1398
1399 smp_mb();
1400
1401 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1402 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1403 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1404 netif_wake_queue(netdev);
1405 __netif_tx_unlock(tx_ring->txq);
1406 }
1407 }
1408 /*
1409 * If everything is freed up to consumer then check if the ring is full
1410 * If the ring is full then check if more needs to be freed and
1411 * schedule the call back again.
1412 *
1413 * This happens when there are 2 CPUs. One could be freeing and the
1414 * other filling it. If the ring is full when we get out of here and
1415 * the card has already interrupted the host then the host can miss the
1416 * interrupt.
1417 *
1418 * There is still a possible race condition and the host could miss an
1419 * interrupt. The card has to take care of this.
1420 */
1421 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1422 done = (sw_consumer == hw_consumer);
1423 spin_unlock(&adapter->tx_clean_lock);
1424
1425 return (done);
1426 }
1427
1428 void
1429 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1430 struct nx_host_rds_ring *rds_ring)
1431 {
1432 struct rcv_desc *pdesc;
1433 struct netxen_rx_buffer *buffer;
1434 int producer, count = 0;
1435 netxen_ctx_msg msg = 0;
1436 struct list_head *head;
1437
1438 producer = rds_ring->producer;
1439
1440 spin_lock(&rds_ring->lock);
1441 head = &rds_ring->free_list;
1442 while (!list_empty(head)) {
1443
1444 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1445
1446 if (!buffer->skb) {
1447 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1448 break;
1449 }
1450
1451 count++;
1452 list_del(&buffer->list);
1453
1454 /* make a rcv descriptor */
1455 pdesc = &rds_ring->desc_head[producer];
1456 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1457 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1458 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1459
1460 producer = get_next_index(producer, rds_ring->num_desc);
1461 }
1462 spin_unlock(&rds_ring->lock);
1463
1464 if (count) {
1465 rds_ring->producer = producer;
1466 NXWR32(adapter, rds_ring->crb_rcv_producer,
1467 (producer-1) & (rds_ring->num_desc-1));
1468
1469 if (adapter->fw_major < 4) {
1470 /*
1471 * Write a doorbell msg to tell phanmon of change in
1472 * receive ring producer
1473 * Only for firmware version < 4.0.0
1474 */
1475 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1476 netxen_set_msg_privid(msg);
1477 netxen_set_msg_count(msg,
1478 ((producer - 1) &
1479 (rds_ring->num_desc - 1)));
1480 netxen_set_msg_ctxid(msg, adapter->portnum);
1481 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1482 writel(msg,
1483 DB_NORMALIZE(adapter,
1484 NETXEN_RCV_PRODUCER_OFFSET));
1485 }
1486 }
1487 }
1488
1489 static void
1490 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1491 struct nx_host_rds_ring *rds_ring)
1492 {
1493 struct rcv_desc *pdesc;
1494 struct netxen_rx_buffer *buffer;
1495 int producer, count = 0;
1496 struct list_head *head;
1497
1498 producer = rds_ring->producer;
1499 if (!spin_trylock(&rds_ring->lock))
1500 return;
1501
1502 head = &rds_ring->free_list;
1503 while (!list_empty(head)) {
1504
1505 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1506
1507 if (!buffer->skb) {
1508 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1509 break;
1510 }
1511
1512 count++;
1513 list_del(&buffer->list);
1514
1515 /* make a rcv descriptor */
1516 pdesc = &rds_ring->desc_head[producer];
1517 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1518 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1519 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1520
1521 producer = get_next_index(producer, rds_ring->num_desc);
1522 }
1523
1524 if (count) {
1525 rds_ring->producer = producer;
1526 NXWR32(adapter, rds_ring->crb_rcv_producer,
1527 (producer - 1) & (rds_ring->num_desc - 1));
1528 }
1529 spin_unlock(&rds_ring->lock);
1530 }
1531
1532 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1533 {
1534 memset(&adapter->stats, 0, sizeof(adapter->stats));
1535 return;
1536 }
1537
kernel-based virtual machine