2 * Xilinx SystemACE device driver
4 * Copyright 2007 Secret Lab Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
13 * bitstream from a file on a CF card and squirting it into FPGAs connected
14 * to the SystemACE JTAG chain. It also has the advantage of providing an
15 * MPU interface which can be used to control the FPGA configuration process
16 * and to use the attached CF card for general purpose storage.
18 * This driver is a block device driver for the SystemACE.
21 * The driver registers itself as a platform_device driver at module
22 * load time. The platform bus will take care of calling the
23 * ace_probe() method for all SystemACE instances in the system. Any
24 * number of SystemACE instances are supported. ace_probe() calls
25 * ace_setup() which initialized all data structures, reads the CF
26 * id structure and registers the device.
29 * Just about all of the heavy lifting in this driver is performed by
30 * a Finite State Machine (FSM). The driver needs to wait on a number
31 * of events; some raised by interrupts, some which need to be polled
32 * for. Describing all of the behaviour in a FSM seems to be the
33 * easiest way to keep the complexity low and make it easy to
34 * understand what the driver is doing. If the block ops or the
35 * request function need to interact with the hardware, then they
36 * simply need to flag the request and kick of FSM processing.
38 * The FSM itself is atomic-safe code which can be run from any
39 * context. The general process flow is:
40 * 1. obtain the ace->lock spinlock.
41 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
43 * 3. release the lock.
45 * Individual states do not sleep in any way. If a condition needs to
46 * be waited for then the state much clear the fsm_continue flag and
47 * either schedule the FSM to be run again at a later time, or expect
48 * an interrupt to call the FSM when the desired condition is met.
50 * In normal operation, the FSM is processed at interrupt context
51 * either when the driver's tasklet is scheduled, or when an irq is
52 * raised by the hardware. The tasklet can be scheduled at any time.
53 * The request method in particular schedules the tasklet when a new
54 * request has been indicated by the block layer. Once started, the
55 * FSM proceeds as far as it can processing the request until it
56 * needs on a hardware event. At this point, it must yield execution.
58 * A state has two options when yielding execution:
60 * - Call if need to poll for event.
61 * - clears the fsm_continue flag to exit the processing loop
62 * - reschedules the tasklet to run again as soon as possible
63 * 2. ace_fsm_yieldirq()
64 * - Call if an irq is expected from the HW
65 * - clears the fsm_continue flag to exit the processing loop
66 * - does not reschedule the tasklet so the FSM will not be processed
67 * again until an irq is received.
68 * After calling a yield function, the state must return control back
69 * to the FSM main loop.
71 * Additionally, the driver maintains a kernel timer which can process
72 * the FSM. If the FSM gets stalled, typically due to a missed
73 * interrupt, then the kernel timer will expire and the driver can
74 * continue where it left off.
77 * - Add FPGA configuration control interface.
78 * - Request major number from lanana
83 #include <linux/module.h>
84 #include <linux/ctype.h>
85 #include <linux/init.h>
86 #include <linux/interrupt.h>
87 #include <linux/errno.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/slab.h>
91 #include <linux/blkdev.h>
92 #include <linux/hdreg.h>
93 #include <linux/platform_device.h>
95 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
96 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
97 MODULE_LICENSE("GPL");
99 /* SystemACE register definitions */
100 #define ACE_BUSMODE (0x00)
102 #define ACE_STATUS (0x04)
103 #define ACE_STATUS_CFGLOCK (0x00000001)
104 #define ACE_STATUS_MPULOCK (0x00000002)
105 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
106 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
107 #define ACE_STATUS_CFDETECT (0x00000010)
108 #define ACE_STATUS_DATABUFRDY (0x00000020)
109 #define ACE_STATUS_DATABUFMODE (0x00000040)
110 #define ACE_STATUS_CFGDONE (0x00000080)
111 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
112 #define ACE_STATUS_CFGMODEPIN (0x00000200)
113 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
114 #define ACE_STATUS_CFBSY (0x00020000)
115 #define ACE_STATUS_CFRDY (0x00040000)
116 #define ACE_STATUS_CFDWF (0x00080000)
117 #define ACE_STATUS_CFDSC (0x00100000)
118 #define ACE_STATUS_CFDRQ (0x00200000)
119 #define ACE_STATUS_CFCORR (0x00400000)
120 #define ACE_STATUS_CFERR (0x00800000)
122 #define ACE_ERROR (0x08)
123 #define ACE_CFGLBA (0x0c)
124 #define ACE_MPULBA (0x10)
126 #define ACE_SECCNTCMD (0x14)
127 #define ACE_SECCNTCMD_RESET (0x0100)
128 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
129 #define ACE_SECCNTCMD_READ_DATA (0x0300)
130 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
131 #define ACE_SECCNTCMD_ABORT (0x0600)
133 #define ACE_VERSION (0x16)
134 #define ACE_VERSION_REVISION_MASK (0x00FF)
135 #define ACE_VERSION_MINOR_MASK (0x0F00)
136 #define ACE_VERSION_MAJOR_MASK (0xF000)
138 #define ACE_CTRL (0x18)
139 #define ACE_CTRL_FORCELOCKREQ (0x0001)
140 #define ACE_CTRL_LOCKREQ (0x0002)
141 #define ACE_CTRL_FORCECFGADDR (0x0004)
142 #define ACE_CTRL_FORCECFGMODE (0x0008)
143 #define ACE_CTRL_CFGMODE (0x0010)
144 #define ACE_CTRL_CFGSTART (0x0020)
145 #define ACE_CTRL_CFGSEL (0x0040)
146 #define ACE_CTRL_CFGRESET (0x0080)
147 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
148 #define ACE_CTRL_ERRORIRQ (0x0200)
149 #define ACE_CTRL_CFGDONEIRQ (0x0400)
150 #define ACE_CTRL_RESETIRQ (0x0800)
151 #define ACE_CTRL_CFGPROG (0x1000)
152 #define ACE_CTRL_CFGADDR_MASK (0xe000)
154 #define ACE_FATSTAT (0x1c)
156 #define ACE_NUM_MINORS 16
157 #define ACE_SECTOR_SIZE (512)
158 #define ACE_FIFO_SIZE (32)
159 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
164 /* driver state data */
168 struct list_head list
;
170 /* finite state machine data */
171 struct tasklet_struct fsm_tasklet
;
172 uint fsm_task
; /* Current activity (ACE_TASK_*) */
173 uint fsm_state
; /* Current state (ACE_FSM_STATE_*) */
174 uint fsm_continue_flag
; /* cleared to exit FSM mainloop */
176 struct timer_list stall_timer
;
178 /* Transfer state/result, use for both id and block request */
179 struct request
*req
; /* request being processed */
180 void *data_ptr
; /* pointer to I/O buffer */
181 int data_count
; /* number of buffers remaining */
182 int data_result
; /* Result of transfer; 0 := success */
184 int id_req_count
; /* count of id requests */
186 struct completion id_completion
; /* used when id req finishes */
189 /* Details of hardware device */
190 unsigned long physaddr
;
193 int bus_width
; /* 0 := 8 bit; 1 := 16 bit */
194 struct ace_reg_ops
*reg_ops
;
197 /* Block device data structures */
200 struct request_queue
*queue
;
203 /* Inserted CF card parameters */
204 struct hd_driveid cf_id
;
207 static int ace_major
;
209 /* ---------------------------------------------------------------------
210 * Low level register access
214 u16(*in
) (struct ace_device
* ace
, int reg
);
215 void (*out
) (struct ace_device
* ace
, int reg
, u16 val
);
216 void (*datain
) (struct ace_device
* ace
);
217 void (*dataout
) (struct ace_device
* ace
);
220 /* 8 Bit bus width */
221 static u16
ace_in_8(struct ace_device
*ace
, int reg
)
223 void *r
= ace
->baseaddr
+ reg
;
224 return in_8(r
) | (in_8(r
+ 1) << 8);
227 static void ace_out_8(struct ace_device
*ace
, int reg
, u16 val
)
229 void *r
= ace
->baseaddr
+ reg
;
231 out_8(r
+ 1, val
>> 8);
234 static void ace_datain_8(struct ace_device
*ace
)
236 void *r
= ace
->baseaddr
+ 0x40;
237 u8
*dst
= ace
->data_ptr
;
238 int i
= ACE_FIFO_SIZE
;
244 static void ace_dataout_8(struct ace_device
*ace
)
246 void *r
= ace
->baseaddr
+ 0x40;
247 u8
*src
= ace
->data_ptr
;
248 int i
= ACE_FIFO_SIZE
;
254 static struct ace_reg_ops ace_reg_8_ops
= {
257 .datain
= ace_datain_8
,
258 .dataout
= ace_dataout_8
,
261 /* 16 bit big endian bus attachment */
262 static u16
ace_in_be16(struct ace_device
*ace
, int reg
)
264 return in_be16(ace
->baseaddr
+ reg
);
267 static void ace_out_be16(struct ace_device
*ace
, int reg
, u16 val
)
269 out_be16(ace
->baseaddr
+ reg
, val
);
272 static void ace_datain_be16(struct ace_device
*ace
)
274 int i
= ACE_FIFO_SIZE
/ 2;
275 u16
*dst
= ace
->data_ptr
;
277 *dst
++ = in_le16(ace
->baseaddr
+ 0x40);
281 static void ace_dataout_be16(struct ace_device
*ace
)
283 int i
= ACE_FIFO_SIZE
/ 2;
284 u16
*src
= ace
->data_ptr
;
286 out_le16(ace
->baseaddr
+ 0x40, *src
++);
290 /* 16 bit little endian bus attachment */
291 static u16
ace_in_le16(struct ace_device
*ace
, int reg
)
293 return in_le16(ace
->baseaddr
+ reg
);
296 static void ace_out_le16(struct ace_device
*ace
, int reg
, u16 val
)
298 out_le16(ace
->baseaddr
+ reg
, val
);
301 static void ace_datain_le16(struct ace_device
*ace
)
303 int i
= ACE_FIFO_SIZE
/ 2;
304 u16
*dst
= ace
->data_ptr
;
306 *dst
++ = in_be16(ace
->baseaddr
+ 0x40);
310 static void ace_dataout_le16(struct ace_device
*ace
)
312 int i
= ACE_FIFO_SIZE
/ 2;
313 u16
*src
= ace
->data_ptr
;
315 out_be16(ace
->baseaddr
+ 0x40, *src
++);
319 static struct ace_reg_ops ace_reg_be16_ops
= {
322 .datain
= ace_datain_be16
,
323 .dataout
= ace_dataout_be16
,
326 static struct ace_reg_ops ace_reg_le16_ops
= {
329 .datain
= ace_datain_le16
,
330 .dataout
= ace_dataout_le16
,
333 static inline u16
ace_in(struct ace_device
*ace
, int reg
)
335 return ace
->reg_ops
->in(ace
, reg
);
338 static inline u32
ace_in32(struct ace_device
*ace
, int reg
)
340 return ace_in(ace
, reg
) | (ace_in(ace
, reg
+ 2) << 16);
343 static inline void ace_out(struct ace_device
*ace
, int reg
, u16 val
)
345 ace
->reg_ops
->out(ace
, reg
, val
);
348 static inline void ace_out32(struct ace_device
*ace
, int reg
, u32 val
)
350 ace_out(ace
, reg
, val
);
351 ace_out(ace
, reg
+ 2, val
>> 16);
354 /* ---------------------------------------------------------------------
355 * Debug support functions
359 static void ace_dump_mem(void *base
, int len
)
361 const char *ptr
= base
;
364 for (i
= 0; i
< len
; i
+= 16) {
365 printk(KERN_INFO
"%.8x:", i
);
366 for (j
= 0; j
< 16; j
++) {
369 printk("%.2x", ptr
[i
+ j
]);
372 for (j
= 0; j
< 16; j
++)
373 printk("%c", isprint(ptr
[i
+ j
]) ? ptr
[i
+ j
] : '.');
378 static inline void ace_dump_mem(void *base
, int len
)
383 static void ace_dump_regs(struct ace_device
*ace
)
385 dev_info(ace
->dev
, " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
386 " status:%.8x mpu_lba:%.8x busmode:%4x\n"
387 " error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
388 ace_in32(ace
, ACE_CTRL
),
389 ace_in(ace
, ACE_SECCNTCMD
),
390 ace_in(ace
, ACE_VERSION
),
391 ace_in32(ace
, ACE_STATUS
),
392 ace_in32(ace
, ACE_MPULBA
),
393 ace_in(ace
, ACE_BUSMODE
),
394 ace_in32(ace
, ACE_ERROR
),
395 ace_in32(ace
, ACE_CFGLBA
), ace_in(ace
, ACE_FATSTAT
));
398 void ace_fix_driveid(struct hd_driveid
*id
)
400 #if defined(__BIG_ENDIAN)
401 u16
*buf
= (void *)id
;
404 /* All half words have wrong byte order; swap the bytes */
405 for (i
= 0; i
< sizeof(struct hd_driveid
); i
+= 2, buf
++)
406 *buf
= le16_to_cpu(*buf
);
408 /* Some of the data values are 32bit; swap the half words */
409 id
->lba_capacity
= ((id
->lba_capacity
>> 16) & 0x0000FFFF) |
410 ((id
->lba_capacity
<< 16) & 0xFFFF0000);
411 id
->spg
= ((id
->spg
>> 16) & 0x0000FFFF) |
412 ((id
->spg
<< 16) & 0xFFFF0000);
416 /* ---------------------------------------------------------------------
417 * Finite State Machine (FSM) implementation
420 /* FSM tasks; used to direct state transitions */
421 #define ACE_TASK_IDLE 0
422 #define ACE_TASK_IDENTIFY 1
423 #define ACE_TASK_READ 2
424 #define ACE_TASK_WRITE 3
425 #define ACE_FSM_NUM_TASKS 4
427 /* FSM state definitions */
428 #define ACE_FSM_STATE_IDLE 0
429 #define ACE_FSM_STATE_REQ_LOCK 1
430 #define ACE_FSM_STATE_WAIT_LOCK 2
431 #define ACE_FSM_STATE_WAIT_CFREADY 3
432 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
433 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
434 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
435 #define ACE_FSM_STATE_REQ_PREPARE 7
436 #define ACE_FSM_STATE_REQ_TRANSFER 8
437 #define ACE_FSM_STATE_REQ_COMPLETE 9
438 #define ACE_FSM_STATE_ERROR 10
439 #define ACE_FSM_NUM_STATES 11
441 /* Set flag to exit FSM loop and reschedule tasklet */
442 static inline void ace_fsm_yield(struct ace_device
*ace
)
444 dev_dbg(ace
->dev
, "ace_fsm_yield()\n");
445 tasklet_schedule(&ace
->fsm_tasklet
);
446 ace
->fsm_continue_flag
= 0;
449 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
450 static inline void ace_fsm_yieldirq(struct ace_device
*ace
)
452 dev_dbg(ace
->dev
, "ace_fsm_yieldirq()\n");
454 if (ace
->irq
== NO_IRQ
)
455 /* No IRQ assigned, so need to poll */
456 tasklet_schedule(&ace
->fsm_tasklet
);
457 ace
->fsm_continue_flag
= 0;
460 /* Get the next read/write request; ending requests that we don't handle */
461 struct request
*ace_get_next_request(struct request_queue
* q
)
465 while ((req
= elv_next_request(q
)) != NULL
) {
466 if (blk_fs_request(req
))
473 static void ace_fsm_dostate(struct ace_device
*ace
)
482 dev_dbg(ace
->dev
, "fsm_state=%i, id_req_count=%i\n",
483 ace
->fsm_state
, ace
->id_req_count
);
486 switch (ace
->fsm_state
) {
487 case ACE_FSM_STATE_IDLE
:
488 /* See if there is anything to do */
489 if (ace
->id_req_count
|| ace_get_next_request(ace
->queue
)) {
491 ace
->fsm_state
= ACE_FSM_STATE_REQ_LOCK
;
492 mod_timer(&ace
->stall_timer
, jiffies
+ HZ
);
493 if (!timer_pending(&ace
->stall_timer
))
494 add_timer(&ace
->stall_timer
);
497 del_timer(&ace
->stall_timer
);
498 ace
->fsm_continue_flag
= 0;
501 case ACE_FSM_STATE_REQ_LOCK
:
502 if (ace_in(ace
, ACE_STATUS
) & ACE_STATUS_MPULOCK
) {
503 /* Already have the lock, jump to next state */
504 ace
->fsm_state
= ACE_FSM_STATE_WAIT_CFREADY
;
508 /* Request the lock */
509 val
= ace_in(ace
, ACE_CTRL
);
510 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_LOCKREQ
);
511 ace
->fsm_state
= ACE_FSM_STATE_WAIT_LOCK
;
514 case ACE_FSM_STATE_WAIT_LOCK
:
515 if (ace_in(ace
, ACE_STATUS
) & ACE_STATUS_MPULOCK
) {
516 /* got the lock; move to next state */
517 ace
->fsm_state
= ACE_FSM_STATE_WAIT_CFREADY
;
521 /* wait a bit for the lock */
525 case ACE_FSM_STATE_WAIT_CFREADY
:
526 status
= ace_in32(ace
, ACE_STATUS
);
527 if (!(status
& ACE_STATUS_RDYFORCFCMD
) ||
528 (status
& ACE_STATUS_CFBSY
)) {
529 /* CF card isn't ready; it needs to be polled */
534 /* Device is ready for command; determine what to do next */
535 if (ace
->id_req_count
)
536 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_PREPARE
;
538 ace
->fsm_state
= ACE_FSM_STATE_REQ_PREPARE
;
541 case ACE_FSM_STATE_IDENTIFY_PREPARE
:
542 /* Send identify command */
543 ace
->fsm_task
= ACE_TASK_IDENTIFY
;
544 ace
->data_ptr
= &ace
->cf_id
;
545 ace
->data_count
= ACE_BUF_PER_SECTOR
;
546 ace_out(ace
, ACE_SECCNTCMD
, ACE_SECCNTCMD_IDENTIFY
);
548 /* As per datasheet, put config controller in reset */
549 val
= ace_in(ace
, ACE_CTRL
);
550 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_CFGRESET
);
552 /* irq handler takes over from this point; wait for the
553 * transfer to complete */
554 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_TRANSFER
;
555 ace_fsm_yieldirq(ace
);
558 case ACE_FSM_STATE_IDENTIFY_TRANSFER
:
559 /* Check that the sysace is ready to receive data */
560 status
= ace_in32(ace
, ACE_STATUS
);
561 if (status
& ACE_STATUS_CFBSY
) {
562 dev_dbg(ace
->dev
, "CFBSY set; t=%i iter=%i dc=%i\n",
563 ace
->fsm_task
, ace
->fsm_iter_num
,
568 if (!(status
& ACE_STATUS_DATABUFRDY
)) {
573 /* Transfer the next buffer */
574 ace
->reg_ops
->datain(ace
);
577 /* If there are still buffers to be transfers; jump out here */
578 if (ace
->data_count
!= 0) {
579 ace_fsm_yieldirq(ace
);
583 /* transfer finished; kick state machine */
584 dev_dbg(ace
->dev
, "identify finished\n");
585 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_COMPLETE
;
588 case ACE_FSM_STATE_IDENTIFY_COMPLETE
:
589 ace_fix_driveid(&ace
->cf_id
);
590 ace_dump_mem(&ace
->cf_id
, 512); /* Debug: Dump out disk ID */
592 if (ace
->data_result
) {
593 /* Error occured, disable the disk */
594 ace
->media_change
= 1;
595 set_capacity(ace
->gd
, 0);
596 dev_err(ace
->dev
, "error fetching CF id (%i)\n",
599 ace
->media_change
= 0;
601 /* Record disk parameters */
602 set_capacity(ace
->gd
, ace
->cf_id
.lba_capacity
);
603 dev_info(ace
->dev
, "capacity: %i sectors\n",
604 ace
->cf_id
.lba_capacity
);
607 /* We're done, drop to IDLE state and notify waiters */
608 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
609 ace
->id_result
= ace
->data_result
;
610 while (ace
->id_req_count
) {
611 complete(&ace
->id_completion
);
616 case ACE_FSM_STATE_REQ_PREPARE
:
617 req
= ace_get_next_request(ace
->queue
);
619 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
623 /* Okay, it's a data request, set it up for transfer */
625 "request: sec=%lx hcnt=%lx, ccnt=%x, dir=%i\n",
626 req
->sector
, req
->hard_nr_sectors
,
627 req
->current_nr_sectors
, rq_data_dir(req
));
630 ace
->data_ptr
= req
->buffer
;
631 ace
->data_count
= req
->current_nr_sectors
* ACE_BUF_PER_SECTOR
;
632 ace_out32(ace
, ACE_MPULBA
, req
->sector
& 0x0FFFFFFF);
634 count
= req
->hard_nr_sectors
;
635 if (rq_data_dir(req
)) {
636 /* Kick off write request */
637 dev_dbg(ace
->dev
, "write data\n");
638 ace
->fsm_task
= ACE_TASK_WRITE
;
639 ace_out(ace
, ACE_SECCNTCMD
,
640 count
| ACE_SECCNTCMD_WRITE_DATA
);
642 /* Kick off read request */
643 dev_dbg(ace
->dev
, "read data\n");
644 ace
->fsm_task
= ACE_TASK_READ
;
645 ace_out(ace
, ACE_SECCNTCMD
,
646 count
| ACE_SECCNTCMD_READ_DATA
);
649 /* As per datasheet, put config controller in reset */
650 val
= ace_in(ace
, ACE_CTRL
);
651 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_CFGRESET
);
653 /* Move to the transfer state. The systemace will raise
654 * an interrupt once there is something to do
656 ace
->fsm_state
= ACE_FSM_STATE_REQ_TRANSFER
;
657 if (ace
->fsm_task
== ACE_TASK_READ
)
658 ace_fsm_yieldirq(ace
); /* wait for data ready */
661 case ACE_FSM_STATE_REQ_TRANSFER
:
662 /* Check that the sysace is ready to receive data */
663 status
= ace_in32(ace
, ACE_STATUS
);
664 if (status
& ACE_STATUS_CFBSY
) {
666 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
667 ace
->fsm_task
, ace
->fsm_iter_num
,
668 ace
->req
->current_nr_sectors
* 16,
669 ace
->data_count
, ace
->in_irq
);
670 ace_fsm_yield(ace
); /* need to poll CFBSY bit */
673 if (!(status
& ACE_STATUS_DATABUFRDY
)) {
675 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
676 ace
->fsm_task
, ace
->fsm_iter_num
,
677 ace
->req
->current_nr_sectors
* 16,
678 ace
->data_count
, ace
->in_irq
);
679 ace_fsm_yieldirq(ace
);
683 /* Transfer the next buffer */
685 if (ace
->fsm_task
== ACE_TASK_WRITE
)
686 ace
->reg_ops
->dataout(ace
);
688 ace
->reg_ops
->datain(ace
);
691 /* If there are still buffers to be transfers; jump out here */
692 if (ace
->data_count
!= 0) {
693 ace_fsm_yieldirq(ace
);
697 /* bio finished; is there another one? */
698 i
= ace
->req
->current_nr_sectors
;
699 if (end_that_request_first(ace
->req
, 1, i
)) {
700 /* dev_dbg(ace->dev, "next block; h=%li c=%i\n",
701 * ace->req->hard_nr_sectors,
702 * ace->req->current_nr_sectors);
704 ace
->data_ptr
= ace
->req
->buffer
;
705 ace
->data_count
= ace
->req
->current_nr_sectors
* 16;
706 ace_fsm_yieldirq(ace
);
710 ace
->fsm_state
= ACE_FSM_STATE_REQ_COMPLETE
;
713 case ACE_FSM_STATE_REQ_COMPLETE
:
714 /* Complete the block request */
715 blkdev_dequeue_request(ace
->req
);
716 end_that_request_last(ace
->req
, 1);
719 /* Finished request; go to idle state */
720 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
724 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
729 static void ace_fsm_tasklet(unsigned long data
)
731 struct ace_device
*ace
= (void *)data
;
734 spin_lock_irqsave(&ace
->lock
, flags
);
736 /* Loop over state machine until told to stop */
737 ace
->fsm_continue_flag
= 1;
738 while (ace
->fsm_continue_flag
)
739 ace_fsm_dostate(ace
);
741 spin_unlock_irqrestore(&ace
->lock
, flags
);
744 static void ace_stall_timer(unsigned long data
)
746 struct ace_device
*ace
= (void *)data
;
750 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
751 ace
->fsm_state
, ace
->fsm_task
, ace
->fsm_iter_num
,
753 spin_lock_irqsave(&ace
->lock
, flags
);
755 /* Rearm the stall timer *before* entering FSM (which may then
756 * delete the timer) */
757 mod_timer(&ace
->stall_timer
, jiffies
+ HZ
);
759 /* Loop over state machine until told to stop */
760 ace
->fsm_continue_flag
= 1;
761 while (ace
->fsm_continue_flag
)
762 ace_fsm_dostate(ace
);
764 spin_unlock_irqrestore(&ace
->lock
, flags
);
767 /* ---------------------------------------------------------------------
768 * Interrupt handling routines
770 static int ace_interrupt_checkstate(struct ace_device
*ace
)
772 u32 sreg
= ace_in32(ace
, ACE_STATUS
);
773 u16 creg
= ace_in(ace
, ACE_CTRL
);
775 /* Check for error occurance */
776 if ((sreg
& (ACE_STATUS_CFGERROR
| ACE_STATUS_CFCERROR
)) &&
777 (creg
& ACE_CTRL_ERRORIRQ
)) {
778 dev_err(ace
->dev
, "transfer failure\n");
786 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
789 struct ace_device
*ace
= dev_id
;
791 /* be safe and get the lock */
792 spin_lock(&ace
->lock
);
795 /* clear the interrupt */
796 creg
= ace_in(ace
, ACE_CTRL
);
797 ace_out(ace
, ACE_CTRL
, creg
| ACE_CTRL_RESETIRQ
);
798 ace_out(ace
, ACE_CTRL
, creg
);
800 /* check for IO failures */
801 if (ace_interrupt_checkstate(ace
))
802 ace
->data_result
= -EIO
;
804 if (ace
->fsm_task
== 0) {
806 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
807 ace_in32(ace
, ACE_STATUS
), ace_in32(ace
, ACE_CTRL
),
808 ace_in(ace
, ACE_SECCNTCMD
));
809 dev_err(ace
->dev
, "fsm_task=%i fsm_state=%i data_count=%i\n",
810 ace
->fsm_task
, ace
->fsm_state
, ace
->data_count
);
813 /* Loop over state machine until told to stop */
814 ace
->fsm_continue_flag
= 1;
815 while (ace
->fsm_continue_flag
)
816 ace_fsm_dostate(ace
);
818 /* done with interrupt; drop the lock */
820 spin_unlock(&ace
->lock
);
825 /* ---------------------------------------------------------------------
828 static void ace_request(struct request_queue
* q
)
831 struct ace_device
*ace
;
833 req
= ace_get_next_request(q
);
836 ace
= req
->rq_disk
->private_data
;
837 tasklet_schedule(&ace
->fsm_tasklet
);
841 static int ace_media_changed(struct gendisk
*gd
)
843 struct ace_device
*ace
= gd
->private_data
;
844 dev_dbg(ace
->dev
, "ace_media_changed(): %i\n", ace
->media_change
);
846 return ace
->media_change
;
849 static int ace_revalidate_disk(struct gendisk
*gd
)
851 struct ace_device
*ace
= gd
->private_data
;
854 dev_dbg(ace
->dev
, "ace_revalidate_disk()\n");
856 if (ace
->media_change
) {
857 dev_dbg(ace
->dev
, "requesting cf id and scheduling tasklet\n");
859 spin_lock_irqsave(&ace
->lock
, flags
);
861 spin_unlock_irqrestore(&ace
->lock
, flags
);
863 tasklet_schedule(&ace
->fsm_tasklet
);
864 wait_for_completion(&ace
->id_completion
);
867 dev_dbg(ace
->dev
, "revalidate complete\n");
868 return ace
->id_result
;
871 static int ace_open(struct inode
*inode
, struct file
*filp
)
873 struct ace_device
*ace
= inode
->i_bdev
->bd_disk
->private_data
;
876 dev_dbg(ace
->dev
, "ace_open() users=%i\n", ace
->users
+ 1);
878 filp
->private_data
= ace
;
879 spin_lock_irqsave(&ace
->lock
, flags
);
881 spin_unlock_irqrestore(&ace
->lock
, flags
);
883 check_disk_change(inode
->i_bdev
);
887 static int ace_release(struct inode
*inode
, struct file
*filp
)
889 struct ace_device
*ace
= inode
->i_bdev
->bd_disk
->private_data
;
893 dev_dbg(ace
->dev
, "ace_release() users=%i\n", ace
->users
- 1);
895 spin_lock_irqsave(&ace
->lock
, flags
);
897 if (ace
->users
== 0) {
898 val
= ace_in(ace
, ACE_CTRL
);
899 ace_out(ace
, ACE_CTRL
, val
& ~ACE_CTRL_LOCKREQ
);
901 spin_unlock_irqrestore(&ace
->lock
, flags
);
905 static int ace_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
)
907 struct ace_device
*ace
= bdev
->bd_disk
->private_data
;
909 dev_dbg(ace
->dev
, "ace_getgeo()\n");
911 geo
->heads
= ace
->cf_id
.heads
;
912 geo
->sectors
= ace
->cf_id
.sectors
;
913 geo
->cylinders
= ace
->cf_id
.cyls
;
918 static struct block_device_operations ace_fops
= {
919 .owner
= THIS_MODULE
,
921 .release
= ace_release
,
922 .media_changed
= ace_media_changed
,
923 .revalidate_disk
= ace_revalidate_disk
,
924 .getgeo
= ace_getgeo
,
927 /* --------------------------------------------------------------------
928 * SystemACE device setup/teardown code
930 static int __devinit
ace_setup(struct ace_device
*ace
)
937 spin_lock_init(&ace
->lock
);
938 init_completion(&ace
->id_completion
);
943 ace
->baseaddr
= ioremap(ace
->physaddr
, 0x80);
947 if (ace
->irq
!= NO_IRQ
) {
948 rc
= request_irq(ace
->irq
, ace_interrupt
, 0, "systemace", ace
);
950 /* Failure - fall back to polled mode */
951 dev_err(ace
->dev
, "request_irq failed\n");
957 * Initialize the state machine tasklet and stall timer
959 tasklet_init(&ace
->fsm_tasklet
, ace_fsm_tasklet
, (unsigned long)ace
);
960 setup_timer(&ace
->stall_timer
, ace_stall_timer
, (unsigned long)ace
);
963 * Initialize the request queue
965 ace
->queue
= blk_init_queue(ace_request
, &ace
->lock
);
966 if (ace
->queue
== NULL
)
968 blk_queue_hardsect_size(ace
->queue
, 512);
971 * Allocate and initialize GD structure
973 ace
->gd
= alloc_disk(ACE_NUM_MINORS
);
977 ace
->gd
->major
= ace_major
;
978 ace
->gd
->first_minor
= ace
->id
* ACE_NUM_MINORS
;
979 ace
->gd
->fops
= &ace_fops
;
980 ace
->gd
->queue
= ace
->queue
;
981 ace
->gd
->private_data
= ace
;
982 snprintf(ace
->gd
->disk_name
, 32, "xs%c", ace
->id
+ 'a');
985 if (ace
->bus_width
== 1) {
986 /* 0x0101 should work regardless of endianess */
987 ace_out_le16(ace
, ACE_BUSMODE
, 0x0101);
989 /* read it back to determine endianess */
990 if (ace_in_le16(ace
, ACE_BUSMODE
) == 0x0001)
991 ace
->reg_ops
= &ace_reg_le16_ops
;
993 ace
->reg_ops
= &ace_reg_be16_ops
;
995 ace_out_8(ace
, ACE_BUSMODE
, 0x00);
996 ace
->reg_ops
= &ace_reg_8_ops
;
999 /* Make sure version register is sane */
1000 version
= ace_in(ace
, ACE_VERSION
);
1001 if ((version
== 0) || (version
== 0xFFFF))
1004 /* Put sysace in a sane state by clearing most control reg bits */
1005 ace_out(ace
, ACE_CTRL
, ACE_CTRL_FORCECFGMODE
|
1006 ACE_CTRL_DATABUFRDYIRQ
| ACE_CTRL_ERRORIRQ
);
1008 /* Enable interrupts */
1009 val
= ace_in(ace
, ACE_CTRL
);
1010 val
|= ACE_CTRL_DATABUFRDYIRQ
| ACE_CTRL_ERRORIRQ
;
1011 ace_out(ace
, ACE_CTRL
, val
);
1013 /* Print the identification */
1014 dev_info(ace
->dev
, "Xilinx SystemACE revision %i.%i.%i\n",
1015 (version
>> 12) & 0xf, (version
>> 8) & 0x0f, version
& 0xff);
1016 dev_dbg(ace
->dev
, "physaddr 0x%lx, mapped to 0x%p, irq=%i\n",
1017 ace
->physaddr
, ace
->baseaddr
, ace
->irq
);
1019 ace
->media_change
= 1;
1020 ace_revalidate_disk(ace
->gd
);
1022 /* Make the sysace device 'live' */
1030 blk_cleanup_queue(ace
->queue
);
1032 iounmap(ace
->baseaddr
);
1033 if (ace
->irq
!= NO_IRQ
)
1034 free_irq(ace
->irq
, ace
);
1036 printk(KERN_INFO
"xsysace: error initializing device at 0x%lx\n",
1041 static void __devexit
ace_teardown(struct ace_device
*ace
)
1044 del_gendisk(ace
->gd
);
1049 blk_cleanup_queue(ace
->queue
);
1051 tasklet_kill(&ace
->fsm_tasklet
);
1053 if (ace
->irq
!= NO_IRQ
)
1054 free_irq(ace
->irq
, ace
);
1056 iounmap(ace
->baseaddr
);
1059 /* ---------------------------------------------------------------------
1060 * Platform Bus Support
1063 static int __devinit
ace_probe(struct device
*device
)
1065 struct platform_device
*dev
= to_platform_device(device
);
1066 struct ace_device
*ace
;
1069 dev_dbg(device
, "ace_probe(%p)\n", device
);
1072 * Allocate the ace device structure
1074 ace
= kzalloc(sizeof(struct ace_device
), GFP_KERNEL
);
1082 for (i
= 0; i
< dev
->num_resources
; i
++) {
1083 if (dev
->resource
[i
].flags
& IORESOURCE_MEM
)
1084 ace
->physaddr
= dev
->resource
[i
].start
;
1085 if (dev
->resource
[i
].flags
& IORESOURCE_IRQ
)
1086 ace
->irq
= dev
->resource
[i
].start
;
1089 /* FIXME: Should get bus_width from the platform_device struct */
1092 dev_set_drvdata(&dev
->dev
, ace
);
1094 /* Call the bus-independant setup code */
1095 if (ace_setup(ace
) != 0)
1101 dev_set_drvdata(&dev
->dev
, NULL
);
1104 printk(KERN_ERR
"xsysace: could not initialize device\n");
1109 * Platform bus remove() method
1111 static int __devexit
ace_remove(struct device
*device
)
1113 struct ace_device
*ace
= dev_get_drvdata(device
);
1115 dev_dbg(device
, "ace_remove(%p)\n", device
);
1125 static struct device_driver ace_driver
= {
1127 .bus
= &platform_bus_type
,
1129 .remove
= __devexit_p(ace_remove
),
1132 /* ---------------------------------------------------------------------
1133 * Module init/exit routines
1135 static int __init
ace_init(void)
1137 ace_major
= register_blkdev(ace_major
, "xsysace");
1138 if (ace_major
<= 0) {
1139 printk(KERN_WARNING
"xsysace: register_blkdev() failed\n");
1143 pr_debug("Registering Xilinx SystemACE driver, major=%i\n", ace_major
);
1144 return driver_register(&ace_driver
);
1147 static void __exit
ace_exit(void)
1149 pr_debug("Unregistering Xilinx SystemACE driver\n");
1150 driver_unregister(&ace_driver
);
1151 unregister_blkdev(ace_major
, "xsysace");
1154 module_init(ace_init
);
1155 module_exit(ace_exit
);