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ARM: SAMSUNG: Move gpiolib support in gpio.c to plat-samsung
[linux-2.6/kvm.git] / arch / arm / mach-omap2 / devices.c
blob18ad93160abbc5fca7bf68ae3dba578c7f2f22b9
1 /*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/io.h>
17 #include <linux/clk.h>
18
19 #include <mach/hardware.h>
20 #include <asm/mach-types.h>
21 #include <asm/mach/map.h>
22
23 #include <plat/control.h>
24 #include <plat/tc.h>
25 #include <plat/board.h>
26 #include <plat/mux.h>
27 #include <mach/gpio.h>
28 #include <plat/mmc.h>
29
30 #include "mux.h"
31
32 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
33
34 static struct resource cam_resources[] = {
35 {
36 .start = OMAP24XX_CAMERA_BASE,
37 .end = OMAP24XX_CAMERA_BASE + 0xfff,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = INT_24XX_CAM_IRQ,
42 .flags = IORESOURCE_IRQ,
43 }
44 };
45
46 static struct platform_device omap_cam_device = {
47 .name = "omap24xxcam",
48 .id = -1,
49 .num_resources = ARRAY_SIZE(cam_resources),
50 .resource = cam_resources,
51 };
52
53 static inline void omap_init_camera(void)
54 {
55 platform_device_register(&omap_cam_device);
56 }
57
58 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
59
60 static struct resource omap3isp_resources[] = {
61 {
62 .start = OMAP3430_ISP_BASE,
63 .end = OMAP3430_ISP_END,
64 .flags = IORESOURCE_MEM,
65 },
66 {
67 .start = OMAP3430_ISP_CBUFF_BASE,
68 .end = OMAP3430_ISP_CBUFF_END,
69 .flags = IORESOURCE_MEM,
70 },
71 {
72 .start = OMAP3430_ISP_CCP2_BASE,
73 .end = OMAP3430_ISP_CCP2_END,
74 .flags = IORESOURCE_MEM,
75 },
76 {
77 .start = OMAP3430_ISP_CCDC_BASE,
78 .end = OMAP3430_ISP_CCDC_END,
79 .flags = IORESOURCE_MEM,
80 },
81 {
82 .start = OMAP3430_ISP_HIST_BASE,
83 .end = OMAP3430_ISP_HIST_END,
84 .flags = IORESOURCE_MEM,
85 },
86 {
87 .start = OMAP3430_ISP_H3A_BASE,
88 .end = OMAP3430_ISP_H3A_END,
89 .flags = IORESOURCE_MEM,
90 },
91 {
92 .start = OMAP3430_ISP_PREV_BASE,
93 .end = OMAP3430_ISP_PREV_END,
94 .flags = IORESOURCE_MEM,
95 },
96 {
97 .start = OMAP3430_ISP_RESZ_BASE,
98 .end = OMAP3430_ISP_RESZ_END,
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .start = OMAP3430_ISP_SBL_BASE,
103 .end = OMAP3430_ISP_SBL_END,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .start = OMAP3430_ISP_CSI2A_BASE,
108 .end = OMAP3430_ISP_CSI2A_END,
109 .flags = IORESOURCE_MEM,
110 },
111 {
112 .start = OMAP3430_ISP_CSI2PHY_BASE,
113 .end = OMAP3430_ISP_CSI2PHY_END,
114 .flags = IORESOURCE_MEM,
115 },
116 {
117 .start = INT_34XX_CAM_IRQ,
118 .flags = IORESOURCE_IRQ,
119 }
120 };
121
122 static struct platform_device omap3isp_device = {
123 .name = "omap3isp",
124 .id = -1,
125 .num_resources = ARRAY_SIZE(omap3isp_resources),
126 .resource = omap3isp_resources,
127 };
128
129 static inline void omap_init_camera(void)
130 {
131 platform_device_register(&omap3isp_device);
132 }
133 #else
134 static inline void omap_init_camera(void)
135 {
136 }
137 #endif
138
139 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
140
141 #define MBOX_REG_SIZE 0x120
142
143 #ifdef CONFIG_ARCH_OMAP2
144 static struct resource omap_mbox_resources[] = {
145 {
146 .start = OMAP24XX_MAILBOX_BASE,
147 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
148 .flags = IORESOURCE_MEM,
149 },
150 {
151 .start = INT_24XX_MAIL_U0_MPU,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = INT_24XX_MAIL_U3_MPU,
156 .flags = IORESOURCE_IRQ,
157 },
158 };
159 #endif
160
161 #ifdef CONFIG_ARCH_OMAP3
162 static struct resource omap_mbox_resources[] = {
163 {
164 .start = OMAP34XX_MAILBOX_BASE,
165 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
166 .flags = IORESOURCE_MEM,
167 },
168 {
169 .start = INT_24XX_MAIL_U0_MPU,
170 .flags = IORESOURCE_IRQ,
171 },
172 };
173 #endif
174
175 #ifdef CONFIG_ARCH_OMAP4
176
177 #define OMAP4_MBOX_REG_SIZE 0x130
178 static struct resource omap_mbox_resources[] = {
179 {
180 .start = OMAP44XX_MAILBOX_BASE,
181 .end = OMAP44XX_MAILBOX_BASE +
182 OMAP4_MBOX_REG_SIZE - 1,
183 .flags = IORESOURCE_MEM,
184 },
185 {
186 .start = INT_44XX_MAIL_U0_MPU,
187 .flags = IORESOURCE_IRQ,
188 },
189 };
190 #endif
191
192 static struct platform_device mbox_device = {
193 .name = "omap2-mailbox",
194 .id = -1,
195 };
196
197 static inline void omap_init_mbox(void)
198 {
199 if (cpu_is_omap2420() || cpu_is_omap3430() || cpu_is_omap44xx()) {
200 mbox_device.num_resources = ARRAY_SIZE(omap_mbox_resources);
201 mbox_device.resource = omap_mbox_resources;
202 } else {
203 pr_err("%s: platform not supported\n", __func__);
204 return;
205 }
206 platform_device_register(&mbox_device);
207 }
208 #else
209 static inline void omap_init_mbox(void) { }
210 #endif /* CONFIG_OMAP_MBOX_FWK */
211
212 #if defined(CONFIG_OMAP_STI)
213
214 #if defined(CONFIG_ARCH_OMAP2)
215
216 #define OMAP2_STI_BASE 0x48068000
217 #define OMAP2_STI_CHANNEL_BASE 0x54000000
218 #define OMAP2_STI_IRQ 4
219
220 static struct resource sti_resources[] = {
221 {
222 .start = OMAP2_STI_BASE,
223 .end = OMAP2_STI_BASE + 0x7ff,
224 .flags = IORESOURCE_MEM,
225 },
226 {
227 .start = OMAP2_STI_CHANNEL_BASE,
228 .end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
229 .flags = IORESOURCE_MEM,
230 },
231 {
232 .start = OMAP2_STI_IRQ,
233 .flags = IORESOURCE_IRQ,
234 }
235 };
236 #elif defined(CONFIG_ARCH_OMAP3)
237
238 #define OMAP3_SDTI_BASE 0x54500000
239 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
240
241 static struct resource sti_resources[] = {
242 {
243 .start = OMAP3_SDTI_BASE,
244 .end = OMAP3_SDTI_BASE + 0xFFF,
245 .flags = IORESOURCE_MEM,
246 },
247 {
248 .start = OMAP3_SDTI_CHANNEL_BASE,
249 .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
250 .flags = IORESOURCE_MEM,
251 }
252 };
253
254 #endif
255
256 static struct platform_device sti_device = {
257 .name = "sti",
258 .id = -1,
259 .num_resources = ARRAY_SIZE(sti_resources),
260 .resource = sti_resources,
261 };
262
263 static inline void omap_init_sti(void)
264 {
265 platform_device_register(&sti_device);
266 }
267 #else
268 static inline void omap_init_sti(void) {}
269 #endif
270
271 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
272
273 #include <plat/mcspi.h>
274
275 #define OMAP2_MCSPI1_BASE 0x48098000
276 #define OMAP2_MCSPI2_BASE 0x4809a000
277 #define OMAP2_MCSPI3_BASE 0x480b8000
278 #define OMAP2_MCSPI4_BASE 0x480ba000
279
280 #define OMAP4_MCSPI1_BASE 0x48098100
281 #define OMAP4_MCSPI2_BASE 0x4809a100
282 #define OMAP4_MCSPI3_BASE 0x480b8100
283 #define OMAP4_MCSPI4_BASE 0x480ba100
284
285 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
286 .num_cs = 4,
287 };
288
289 static struct resource omap2_mcspi1_resources[] = {
290 {
291 .start = OMAP2_MCSPI1_BASE,
292 .end = OMAP2_MCSPI1_BASE + 0xff,
293 .flags = IORESOURCE_MEM,
294 },
295 };
296
297 static struct platform_device omap2_mcspi1 = {
298 .name = "omap2_mcspi",
299 .id = 1,
300 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
301 .resource = omap2_mcspi1_resources,
302 .dev = {
303 .platform_data = &omap2_mcspi1_config,
304 },
305 };
306
307 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
308 .num_cs = 2,
309 };
310
311 static struct resource omap2_mcspi2_resources[] = {
312 {
313 .start = OMAP2_MCSPI2_BASE,
314 .end = OMAP2_MCSPI2_BASE + 0xff,
315 .flags = IORESOURCE_MEM,
316 },
317 };
318
319 static struct platform_device omap2_mcspi2 = {
320 .name = "omap2_mcspi",
321 .id = 2,
322 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
323 .resource = omap2_mcspi2_resources,
324 .dev = {
325 .platform_data = &omap2_mcspi2_config,
326 },
327 };
328
329 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
330 defined(CONFIG_ARCH_OMAP4)
331 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
332 .num_cs = 2,
333 };
334
335 static struct resource omap2_mcspi3_resources[] = {
336 {
337 .start = OMAP2_MCSPI3_BASE,
338 .end = OMAP2_MCSPI3_BASE + 0xff,
339 .flags = IORESOURCE_MEM,
340 },
341 };
342
343 static struct platform_device omap2_mcspi3 = {
344 .name = "omap2_mcspi",
345 .id = 3,
346 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
347 .resource = omap2_mcspi3_resources,
348 .dev = {
349 .platform_data = &omap2_mcspi3_config,
350 },
351 };
352 #endif
353
354 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
355 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
356 .num_cs = 1,
357 };
358
359 static struct resource omap2_mcspi4_resources[] = {
360 {
361 .start = OMAP2_MCSPI4_BASE,
362 .end = OMAP2_MCSPI4_BASE + 0xff,
363 .flags = IORESOURCE_MEM,
364 },
365 };
366
367 static struct platform_device omap2_mcspi4 = {
368 .name = "omap2_mcspi",
369 .id = 4,
370 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
371 .resource = omap2_mcspi4_resources,
372 .dev = {
373 .platform_data = &omap2_mcspi4_config,
374 },
375 };
376 #endif
377
378 #ifdef CONFIG_ARCH_OMAP4
379 static inline void omap4_mcspi_fixup(void)
380 {
381 omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
382 omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
383 omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
384 omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
385 omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
386 omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
387 omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
388 omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
389 }
390 #else
391 static inline void omap4_mcspi_fixup(void)
392 {
393 }
394 #endif
395
396 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
397 defined(CONFIG_ARCH_OMAP4)
398 static inline void omap2_mcspi3_init(void)
399 {
400 platform_device_register(&omap2_mcspi3);
401 }
402 #else
403 static inline void omap2_mcspi3_init(void)
404 {
405 }
406 #endif
407
408 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
409 static inline void omap2_mcspi4_init(void)
410 {
411 platform_device_register(&omap2_mcspi4);
412 }
413 #else
414 static inline void omap2_mcspi4_init(void)
415 {
416 }
417 #endif
418
419 static void omap_init_mcspi(void)
420 {
421 if (cpu_is_omap44xx())
422 omap4_mcspi_fixup();
423
424 platform_device_register(&omap2_mcspi1);
425 platform_device_register(&omap2_mcspi2);
426
427 if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
428 omap2_mcspi3_init();
429
430 if (cpu_is_omap343x() || cpu_is_omap44xx())
431 omap2_mcspi4_init();
432 }
433
434 #else
435 static inline void omap_init_mcspi(void) {}
436 #endif
437
438 #ifdef CONFIG_OMAP_SHA1_MD5
439 static struct resource sha1_md5_resources[] = {
440 {
441 .start = OMAP24XX_SEC_SHA1MD5_BASE,
442 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
443 .flags = IORESOURCE_MEM,
444 },
445 {
446 .start = INT_24XX_SHA1MD5,
447 .flags = IORESOURCE_IRQ,
448 }
449 };
450
451 static struct platform_device sha1_md5_device = {
452 .name = "OMAP SHA1/MD5",
453 .id = -1,
454 .num_resources = ARRAY_SIZE(sha1_md5_resources),
455 .resource = sha1_md5_resources,
456 };
457
458 static void omap_init_sha1_md5(void)
459 {
460 platform_device_register(&sha1_md5_device);
461 }
462 #else
463 static inline void omap_init_sha1_md5(void) { }
464 #endif
465
466 /*-------------------------------------------------------------------------*/
467
468 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
469
470 #define MMCHS_SYSCONFIG 0x0010
471 #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
472 #define MMCHS_SYSSTATUS 0x0014
473 #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
474
475 static struct platform_device dummy_pdev = {
476 .dev = {
477 .bus = &platform_bus_type,
478 },
479 };
480
481 /**
482 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
483 *
484 * Ensure that each MMC controller is fully reset. Controllers
485 * left in an unknown state (by bootloader) may prevent retention
486 * or OFF-mode. This is especially important in cases where the
487 * MMC driver is not enabled, _or_ built as a module.
488 *
489 * In order for reset to work, interface, functional and debounce
490 * clocks must be enabled. The debounce clock comes from func_32k_clk
491 * and is not under SW control, so we only enable i- and f-clocks.
492 **/
493 static void __init omap_hsmmc_reset(void)
494 {
495 u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
496 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
497
498 for (i = 0; i < nr_controllers; i++) {
499 u32 v, base = 0;
500 struct clk *iclk, *fclk;
501 struct device *dev = &dummy_pdev.dev;
502
503 switch (i) {
504 case 0:
505 base = OMAP2_MMC1_BASE;
506 break;
507 case 1:
508 base = OMAP2_MMC2_BASE;
509 break;
510 case 2:
511 base = OMAP3_MMC3_BASE;
512 break;
513 case 3:
514 if (!cpu_is_omap44xx())
515 return;
516 base = OMAP4_MMC4_BASE;
517 break;
518 case 4:
519 if (!cpu_is_omap44xx())
520 return;
521 base = OMAP4_MMC5_BASE;
522 break;
523 }
524
525 if (cpu_is_omap44xx())
526 base += OMAP4_MMC_REG_OFFSET;
527
528 dummy_pdev.id = i;
529 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
530 iclk = clk_get(dev, "ick");
531 if (iclk && clk_enable(iclk))
532 iclk = NULL;
533
534 fclk = clk_get(dev, "fck");
535 if (fclk && clk_enable(fclk))
536 fclk = NULL;
537
538 if (!iclk || !fclk) {
539 printk(KERN_WARNING
540 "%s: Unable to enable clocks for MMC%d, "
541 "cannot reset.\n", __func__, i);
542 break;
543 }
544
545 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
546 v = omap_readl(base + MMCHS_SYSSTATUS);
547 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
548 MMCHS_SYSSTATUS_RESETDONE))
549 cpu_relax();
550
551 if (fclk) {
552 clk_disable(fclk);
553 clk_put(fclk);
554 }
555 if (iclk) {
556 clk_disable(iclk);
557 clk_put(iclk);
558 }
559 }
560 }
561 #else
562 static inline void omap_hsmmc_reset(void) {}
563 #endif
564
565 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
566 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
567
568 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
569 int controller_nr)
570 {
571 if (cpu_is_omap2420() && controller_nr == 0) {
572 omap_cfg_reg(H18_24XX_MMC_CMD);
573 omap_cfg_reg(H15_24XX_MMC_CLKI);
574 omap_cfg_reg(G19_24XX_MMC_CLKO);
575 omap_cfg_reg(F20_24XX_MMC_DAT0);
576 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
577 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
578 if (mmc_controller->slots[0].wires == 4) {
579 omap_cfg_reg(H14_24XX_MMC_DAT1);
580 omap_cfg_reg(E19_24XX_MMC_DAT2);
581 omap_cfg_reg(D19_24XX_MMC_DAT3);
582 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
583 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
584 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
585 }
586
587 /*
588 * Use internal loop-back in MMC/SDIO Module Input Clock
589 * selection
590 */
591 if (mmc_controller->slots[0].internal_clock) {
592 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
593 v |= (1 << 24);
594 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
595 }
596 }
597
598 if (cpu_is_omap34xx()) {
599 if (controller_nr == 0) {
600 omap_mux_init_signal("sdmmc1_clk",
601 OMAP_PIN_INPUT_PULLUP);
602 omap_mux_init_signal("sdmmc1_cmd",
603 OMAP_PIN_INPUT_PULLUP);
604 omap_mux_init_signal("sdmmc1_dat0",
605 OMAP_PIN_INPUT_PULLUP);
606 if (mmc_controller->slots[0].wires == 4 ||
607 mmc_controller->slots[0].wires == 8) {
608 omap_mux_init_signal("sdmmc1_dat1",
609 OMAP_PIN_INPUT_PULLUP);
610 omap_mux_init_signal("sdmmc1_dat2",
611 OMAP_PIN_INPUT_PULLUP);
612 omap_mux_init_signal("sdmmc1_dat3",
613 OMAP_PIN_INPUT_PULLUP);
614 }
615 if (mmc_controller->slots[0].wires == 8) {
616 omap_mux_init_signal("sdmmc1_dat4",
617 OMAP_PIN_INPUT_PULLUP);
618 omap_mux_init_signal("sdmmc1_dat5",
619 OMAP_PIN_INPUT_PULLUP);
620 omap_mux_init_signal("sdmmc1_dat6",
621 OMAP_PIN_INPUT_PULLUP);
622 omap_mux_init_signal("sdmmc1_dat7",
623 OMAP_PIN_INPUT_PULLUP);
624 }
625 }
626 if (controller_nr == 1) {
627 /* MMC2 */
628 omap_mux_init_signal("sdmmc2_clk",
629 OMAP_PIN_INPUT_PULLUP);
630 omap_mux_init_signal("sdmmc2_cmd",
631 OMAP_PIN_INPUT_PULLUP);
632 omap_mux_init_signal("sdmmc2_dat0",
633 OMAP_PIN_INPUT_PULLUP);
634
635 /*
636 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
637 * in the board-*.c files
638 */
639 if (mmc_controller->slots[0].wires == 4 ||
640 mmc_controller->slots[0].wires == 8) {
641 omap_mux_init_signal("sdmmc2_dat1",
642 OMAP_PIN_INPUT_PULLUP);
643 omap_mux_init_signal("sdmmc2_dat2",
644 OMAP_PIN_INPUT_PULLUP);
645 omap_mux_init_signal("sdmmc2_dat3",
646 OMAP_PIN_INPUT_PULLUP);
647 }
648 if (mmc_controller->slots[0].wires == 8) {
649 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
650 OMAP_PIN_INPUT_PULLUP);
651 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
652 OMAP_PIN_INPUT_PULLUP);
653 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
654 OMAP_PIN_INPUT_PULLUP);
655 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
656 OMAP_PIN_INPUT_PULLUP);
657 }
658 }
659
660 /*
661 * For MMC3 the pins need to be muxed in the board-*.c files
662 */
663 }
664 }
665
666 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
667 int nr_controllers)
668 {
669 int i;
670 char *name;
671
672 for (i = 0; i < nr_controllers; i++) {
673 unsigned long base, size;
674 unsigned int irq = 0;
675
676 if (!mmc_data[i])
677 continue;
678
679 omap2_mmc_mux(mmc_data[i], i);
680
681 switch (i) {
682 case 0:
683 base = OMAP2_MMC1_BASE;
684 irq = INT_24XX_MMC_IRQ;
685 break;
686 case 1:
687 base = OMAP2_MMC2_BASE;
688 irq = INT_24XX_MMC2_IRQ;
689 break;
690 case 2:
691 if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
692 return;
693 base = OMAP3_MMC3_BASE;
694 irq = INT_34XX_MMC3_IRQ;
695 break;
696 case 3:
697 if (!cpu_is_omap44xx())
698 return;
699 base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
700 irq = INT_44XX_MMC4_IRQ;
701 break;
702 case 4:
703 if (!cpu_is_omap44xx())
704 return;
705 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
706 irq = INT_44XX_MMC5_IRQ;
707 break;
708 default:
709 continue;
710 }
711
712 if (cpu_is_omap2420()) {
713 size = OMAP2420_MMC_SIZE;
714 name = "mmci-omap";
715 } else if (cpu_is_omap44xx()) {
716 if (i < 3) {
717 base += OMAP4_MMC_REG_OFFSET;
718 irq += IRQ_GIC_START;
719 }
720 size = OMAP4_HSMMC_SIZE;
721 name = "mmci-omap-hs";
722 } else {
723 size = OMAP3_HSMMC_SIZE;
724 name = "mmci-omap-hs";
725 }
726 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
727 };
728 }
729
730 #endif
731
732 /*-------------------------------------------------------------------------*/
733
734 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
735 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
736 #define OMAP_HDQ_BASE 0x480B2000
737 #endif
738 static struct resource omap_hdq_resources[] = {
739 {
740 .start = OMAP_HDQ_BASE,
741 .end = OMAP_HDQ_BASE + 0x1C,
742 .flags = IORESOURCE_MEM,
743 },
744 {
745 .start = INT_24XX_HDQ_IRQ,
746 .flags = IORESOURCE_IRQ,
747 },
748 };
749 static struct platform_device omap_hdq_dev = {
750 .name = "omap_hdq",
751 .id = 0,
752 .dev = {
753 .platform_data = NULL,
754 },
755 .num_resources = ARRAY_SIZE(omap_hdq_resources),
756 .resource = omap_hdq_resources,
757 };
758 static inline void omap_hdq_init(void)
759 {
760 (void) platform_device_register(&omap_hdq_dev);
761 }
762 #else
763 static inline void omap_hdq_init(void) {}
764 #endif
765
766 /*-------------------------------------------------------------------------*/
767
768 static int __init omap2_init_devices(void)
769 {
770 /* please keep these calls, and their implementations above,
771 * in alphabetical order so they're easier to sort through.
772 */
773 omap_hsmmc_reset();
774 omap_init_camera();
775 omap_init_mbox();
776 omap_init_mcspi();
777 omap_hdq_init();
778 omap_init_sti();
779 omap_init_sha1_md5();
780
781 return 0;
782 }
783 arch_initcall(omap2_init_devices);
kernel-based virtual machine