4 #include <asm/msr-index.h>
8 * Access to machine-specific registers (available on 586 and better only)
9 * Note: the rd* operations modify the parameters directly (without using
10 * pointer indirection), this allows gcc to optimize better
13 #define rdmsr(msr,val1,val2) \
14 __asm__ __volatile__("rdmsr" \
15 : "=a" (val1), "=d" (val2) \
19 #define rdmsrl(msr,val) do { unsigned long a__,b__; \
20 __asm__ __volatile__("rdmsr" \
21 : "=a" (a__), "=d" (b__) \
23 val = a__ | (b__<<32); \
26 #define wrmsr(msr,val1,val2) \
27 __asm__ __volatile__("wrmsr" \
29 : "c" (msr), "a" (val1), "d" (val2))
31 #define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32)
33 /* wrmsr with exception handling */
34 #define wrmsr_safe(msr,a,b) ({ int ret__; \
35 asm volatile("2: wrmsr ; xorl %0,%0\n" \
37 ".section .fixup,\"ax\"\n\t" \
38 "3: movl %4,%0 ; jmp 1b\n\t" \
40 ".section __ex_table,\"a\"\n" \
45 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \
48 #define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
50 #define rdmsr_safe(msr,a,b) \
52 asm volatile ("1: rdmsr\n" \
54 ".section .fixup,\"ax\"\n" \
58 ".section __ex_table,\"a\"\n" \
61 ".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b))\
62 :"c"(msr), "i"(-EIO), "0"(0)); \
65 #define rdtsc(low,high) \
66 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
69 __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
71 #define rdtscp(low,high,aux) \
72 asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux))
74 #define rdtscll(val) do { \
75 unsigned int __a,__d; \
76 asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \
77 (val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \
80 #define rdtscpll(val, aux) do { \
81 unsigned long __a, __d; \
82 asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \
83 (val) = (__d << 32) | __a; \
86 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
88 #define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
90 #define rdpmc(counter,low,high) \
91 __asm__ __volatile__("rdpmc" \
92 : "=a" (low), "=d" (high) \
95 static inline void cpuid(int op
, unsigned int *eax
, unsigned int *ebx
,
96 unsigned int *ecx
, unsigned int *edx
)
106 /* Some CPUID calls want 'count' to be placed in ecx */
107 static inline void cpuid_count(int op
, int count
, int *eax
, int *ebx
, int *ecx
,
115 : "0" (op
), "c" (count
));
119 * CPUID functions returning a single datum
121 static inline unsigned int cpuid_eax(unsigned int op
)
131 static inline unsigned int cpuid_ebx(unsigned int op
)
133 unsigned int eax
, ebx
;
136 : "=a" (eax
), "=b" (ebx
)
141 static inline unsigned int cpuid_ecx(unsigned int op
)
143 unsigned int eax
, ecx
;
146 : "=a" (eax
), "=c" (ecx
)
151 static inline unsigned int cpuid_edx(unsigned int op
)
153 unsigned int eax
, edx
;
156 : "=a" (eax
), "=d" (edx
)
163 void rdmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
);
164 void wrmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
);
165 #else /* CONFIG_SMP */
166 static inline void rdmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
)
168 rdmsr(msr_no
, *l
, *h
);
170 static inline void wrmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
)
174 #endif /* CONFIG_SMP */
175 #endif /* __ASSEMBLY__ */
176 #endif /* X86_64_MSR_H */