drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/libata.h>
  32 #include <linux/list.h>
  33 #include <linux/kref.h>
  34 #include <scsi/scsi.h>
  35 #include <scsi/scsi_cmnd.h>
  36
  37 /*
  38  * Literals
  39  */
  40 #define IPR_DRIVER_VERSION "2.2.0"
  41 #define IPR_DRIVER_DATE "(September 25, 2006)"
  42
  43 /*
  44  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  45  *      ops per device for devices not running tagged command queuing.
  46  *      This can be adjusted at runtime through sysfs device attributes.
  47  */
  48 #define IPR_MAX_CMD_PER_LUN                             6
  49 #define IPR_MAX_CMD_PER_ATA_LUN                 1
  50
  51 /*
  52  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  53  *      ops the mid-layer can send to the adapter.
  54  */
  55 #define IPR_NUM_BASE_CMD_BLKS                           100
  56
  57 #define PCI_DEVICE_ID_IBM_OBSIDIAN_E    0x0339
  58
  59 #define IPR_SUBS_DEV_ID_2780    0x0264
  60 #define IPR_SUBS_DEV_ID_5702    0x0266
  61 #define IPR_SUBS_DEV_ID_5703    0x0278
  62 #define IPR_SUBS_DEV_ID_572E  0x028D
  63 #define IPR_SUBS_DEV_ID_573E  0x02D3
  64 #define IPR_SUBS_DEV_ID_573D  0x02D4
  65 #define IPR_SUBS_DEV_ID_571A    0x02C0
  66 #define IPR_SUBS_DEV_ID_571B    0x02BE
  67 #define IPR_SUBS_DEV_ID_571E  0x02BF
  68 #define IPR_SUBS_DEV_ID_571F    0x02D5
  69 #define IPR_SUBS_DEV_ID_572A    0x02C1
  70 #define IPR_SUBS_DEV_ID_572B    0x02C2
  71 #define IPR_SUBS_DEV_ID_572F    0x02C3
  72 #define IPR_SUBS_DEV_ID_575B    0x030D
  73 #define IPR_SUBS_DEV_ID_575C    0x0338
  74 #define IPR_SUBS_DEV_ID_57B7    0x0360
  75 #define IPR_SUBS_DEV_ID_57B8    0x02C2
  76
  77 #define IPR_NAME                                "ipr"
  78
  79 /*
  80  * Return codes
  81  */
  82 #define IPR_RC_JOB_CONTINUE             1
  83 #define IPR_RC_JOB_RETURN               2
  84
  85 /*
  86  * IOASCs
  87  */
  88 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  89 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  90 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  91 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  92 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  93 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  94 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  95 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT    0x05240000
  96 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  97 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
  98 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
  99 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
 100 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
 101 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
 102
 103 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
 104 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
 105 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
 106
 107 #define IPR_NUM_LOG_HCAMS                               2
 108 #define IPR_NUM_CFG_CHG_HCAMS                           2
 109 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 110 #define IPR_MAX_NUM_TARGETS_PER_BUS                     256
 111 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 112 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 113 #define IPR_VSET_BUS                                    0xff
 114 #define IPR_IOA_BUS                                             0xff
 115 #define IPR_IOA_TARGET                                  0xff
 116 #define IPR_IOA_LUN                                             0xff
 117 #define IPR_MAX_NUM_BUSES                               16
 118 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 119
 120 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 121
 122 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 123 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 124                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 125
 126 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 127 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 128                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 129
 130 #define IPR_MAX_PHYSICAL_DEVS                           192
 131
 132 #define IPR_MAX_SGLIST                                  64
 133 #define IPR_IOA_MAX_SECTORS                             32767
 134 #define IPR_VSET_MAX_SECTORS                            512
 135 #define IPR_MAX_CDB_LEN                                 16
 136
 137 #define IPR_DEFAULT_BUS_WIDTH                           16
 138 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 139 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 140 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 141 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 142
 143 #define IPR_IOA_RES_HANDLE                              0xffffffff
 144 #define IPR_INVALID_RES_HANDLE                  0
 145 #define IPR_IOA_RES_ADDR                                0x00ffffff
 146
 147 /*
 148  * Adapter Commands
 149  */
 150 #define IPR_QUERY_RSRC_STATE                            0xC2
 151 #define IPR_RESET_DEVICE                                0xC3
 152 #define IPR_RESET_TYPE_SELECT                           0x80
 153 #define IPR_LUN_RESET                                   0x40
 154 #define IPR_TARGET_RESET                                        0x20
 155 #define IPR_BUS_RESET                                   0x10
 156 #define IPR_ATA_PHY_RESET                                       0x80
 157 #define IPR_ID_HOST_RR_Q                                0xC4
 158 #define IPR_QUERY_IOA_CONFIG                            0xC5
 159 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 160 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 161 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 162 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 163 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 164 #define IPR_IOA_SHUTDOWN                                0xF7
 165 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 166
 167 /*
 168  * Timeouts
 169  */
 170 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 171 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 172 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 173 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 174 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 175 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 176 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 177 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 178 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 179 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 180 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 181 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 182 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 183 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 184 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 185
 186 /*
 187  * SCSI Literals
 188  */
 189 #define IPR_VENDOR_ID_LEN                       8
 190 #define IPR_PROD_ID_LEN                         16
 191 #define IPR_SERIAL_NUM_LEN                      8
 192
 193 /*
 194  * Hardware literals
 195  */
 196 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 197 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 198 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 199 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 200 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 201 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 202 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 203 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 204 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 205 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 206 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 207 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 208 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 209 #define IPR_DOORBELL                                    0x82800000
 210 #define IPR_RUNTIME_RESET                               0x40000000
 211
 212 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 213 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 214 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 215 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 216 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 217 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 218 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 219 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 220 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 221 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 222 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 223
 224 #define IPR_PCII_ERROR_INTERRUPTS \
 225 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 226 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 227
 228 #define IPR_PCII_OPER_INTERRUPTS \
 229 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 230
 231 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 232 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 233
 234 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 235 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 236
 237 /*
 238  * Dump literals
 239  */
 240 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 241 #define IPR_NUM_SDT_ENTRIES                             511
 242 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 243
 244 /*
 245  * Misc literals
 246  */
 247 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 248
 249 /*
 250  * Adapter interface types
 251  */
 252
 253 struct ipr_res_addr {
 254         u8 reserved;
 255         u8 bus;
 256         u8 target;
 257         u8 lun;
 258 #define IPR_GET_PHYS_LOC(res_addr) \
 259         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 260 }__attribute__((packed, aligned (4)));
 261
 262 struct ipr_std_inq_vpids {
 263         u8 vendor_id[IPR_VENDOR_ID_LEN];
 264         u8 product_id[IPR_PROD_ID_LEN];
 265 }__attribute__((packed));
 266
 267 struct ipr_vpd {
 268         struct ipr_std_inq_vpids vpids;
 269         u8 sn[IPR_SERIAL_NUM_LEN];
 270 }__attribute__((packed));
 271
 272 struct ipr_ext_vpd {
 273         struct ipr_vpd vpd;
 274         __be32 wwid[2];
 275 }__attribute__((packed));
 276
 277 struct ipr_std_inq_data {
 278         u8 peri_qual_dev_type;
 279 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 280 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 281
 282         u8 removeable_medium_rsvd;
 283 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 284
 285 #define IPR_IS_DASD_DEVICE(std_inq) \
 286 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 287 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 288
 289 #define IPR_IS_SES_DEVICE(std_inq) \
 290 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 291
 292         u8 version;
 293         u8 aen_naca_fmt;
 294         u8 additional_len;
 295         u8 sccs_rsvd;
 296         u8 bq_enc_multi;
 297         u8 sync_cmdq_flags;
 298
 299         struct ipr_std_inq_vpids vpids;
 300
 301         u8 ros_rsvd_ram_rsvd[4];
 302
 303         u8 serial_num[IPR_SERIAL_NUM_LEN];
 304 }__attribute__ ((packed));
 305
 306 struct ipr_config_table_entry {
 307         u8 proto;
 308 #define IPR_PROTO_SATA                  0x02
 309 #define IPR_PROTO_SATA_ATAPI            0x03
 310 #define IPR_PROTO_SAS_STP               0x06
 311 #define IPR_PROTO_SAS_STP_ATAPI 0x07
 312         u8 array_id;
 313         u8 flags;
 314 #define IPR_IS_IOA_RESOURCE     0x80
 315 #define IPR_IS_ARRAY_MEMBER 0x20
 316 #define IPR_IS_HOT_SPARE        0x10
 317
 318         u8 rsvd_subtype;
 319 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 320 #define IPR_SUBTYPE_AF_DASD                     0
 321 #define IPR_SUBTYPE_GENERIC_SCSI        1
 322 #define IPR_SUBTYPE_VOLUME_SET          2
 323 #define IPR_SUBTYPE_GENERIC_ATA 4
 324
 325 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 326 #define IPR_QUEUE_FROZEN_MODEL  0
 327 #define IPR_QUEUE_NACA_MODEL            1
 328
 329         struct ipr_res_addr res_addr;
 330         __be32 res_handle;
 331         __be32 reserved4[2];
 332         struct ipr_std_inq_data std_inq_data;
 333 }__attribute__ ((packed, aligned (4)));
 334
 335 struct ipr_config_table_hdr {
 336         u8 num_entries;
 337         u8 flags;
 338 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 339         __be16 reserved;
 340 }__attribute__((packed, aligned (4)));
 341
 342 struct ipr_config_table {
 343         struct ipr_config_table_hdr hdr;
 344         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 345 }__attribute__((packed, aligned (4)));
 346
 347 struct ipr_hostrcb_cfg_ch_not {
 348         struct ipr_config_table_entry cfgte;
 349         u8 reserved[936];
 350 }__attribute__((packed, aligned (4)));
 351
 352 struct ipr_supported_device {
 353         __be16 data_length;
 354         u8 reserved;
 355         u8 num_records;
 356         struct ipr_std_inq_vpids vpids;
 357         u8 reserved2[16];
 358 }__attribute__((packed, aligned (4)));
 359
 360 /* Command packet structure */
 361 struct ipr_cmd_pkt {
 362         __be16 reserved;                /* Reserved by IOA */
 363         u8 request_type;
 364 #define IPR_RQTYPE_SCSICDB              0x00
 365 #define IPR_RQTYPE_IOACMD               0x01
 366 #define IPR_RQTYPE_HCAM                 0x02
 367 #define IPR_RQTYPE_ATA_PASSTHRU 0x04
 368
 369         u8 luntar_luntrn;
 370
 371         u8 flags_hi;
 372 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 373 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 374 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 375 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 376 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 377
 378         u8 flags_lo;
 379 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 380 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 381 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 382 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 383 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 384 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 385 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 386
 387         u8 cdb[16];
 388         __be16 timeout;
 389 }__attribute__ ((packed, aligned(4)));
 390
 391 struct ipr_ioarcb_ata_regs {
 392         u8 flags;
 393 #define IPR_ATA_FLAG_PACKET_CMD                 0x80
 394 #define IPR_ATA_FLAG_XFER_TYPE_DMA                      0x40
 395 #define IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION  0x20
 396         u8 reserved[3];
 397
 398         __be16 data;
 399         u8 feature;
 400         u8 nsect;
 401         u8 lbal;
 402         u8 lbam;
 403         u8 lbah;
 404         u8 device;
 405         u8 command;
 406         u8 reserved2[3];
 407         u8 hob_feature;
 408         u8 hob_nsect;
 409         u8 hob_lbal;
 410         u8 hob_lbam;
 411         u8 hob_lbah;
 412         u8 ctl;
 413 }__attribute__ ((packed, aligned(4)));
 414
 415 struct ipr_ioarcb_add_data {
 416         union {
 417                 struct ipr_ioarcb_ata_regs regs;
 418                 __be32 add_cmd_parms[10];
 419         }u;
 420 }__attribute__ ((packed, aligned(4)));
 421
 422 /* IOA Request Control Block    128 bytes  */
 423 struct ipr_ioarcb {
 424         __be32 ioarcb_host_pci_addr;
 425         __be32 reserved;
 426         __be32 res_handle;
 427         __be32 host_response_handle;
 428         __be32 reserved1;
 429         __be32 reserved2;
 430         __be32 reserved3;
 431
 432         __be32 write_data_transfer_length;
 433         __be32 read_data_transfer_length;
 434         __be32 write_ioadl_addr;
 435         __be32 write_ioadl_len;
 436         __be32 read_ioadl_addr;
 437         __be32 read_ioadl_len;
 438
 439         __be32 ioasa_host_pci_addr;
 440         __be16 ioasa_len;
 441         __be16 reserved4;
 442
 443         struct ipr_cmd_pkt cmd_pkt;
 444
 445         __be32 add_cmd_parms_len;
 446         struct ipr_ioarcb_add_data add_data;
 447 }__attribute__((packed, aligned (4)));
 448
 449 struct ipr_ioadl_desc {
 450         __be32 flags_and_data_len;
 451 #define IPR_IOADL_FLAGS_MASK            0xff000000
 452 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 453 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 454 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 455 #define IPR_IOADL_FLAGS_READ            0x48000000
 456 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 457 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 458 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 459 #define IPR_IOADL_FLAGS_LAST            0x01000000
 460
 461         __be32 address;
 462 }__attribute__((packed, aligned (8)));
 463
 464 struct ipr_ioasa_vset {
 465         __be32 failing_lba_hi;
 466         __be32 failing_lba_lo;
 467         __be32 reserved;
 468 }__attribute__((packed, aligned (4)));
 469
 470 struct ipr_ioasa_af_dasd {
 471         __be32 failing_lba;
 472         __be32 reserved[2];
 473 }__attribute__((packed, aligned (4)));
 474
 475 struct ipr_ioasa_gpdd {
 476         u8 end_state;
 477         u8 bus_phase;
 478         __be16 reserved;
 479         __be32 ioa_data[2];
 480 }__attribute__((packed, aligned (4)));
 481
 482 struct ipr_ioasa_gata {
 483         u8 error;
 484         u8 nsect;               /* Interrupt reason */
 485         u8 lbal;
 486         u8 lbam;
 487         u8 lbah;
 488         u8 device;
 489         u8 status;
 490         u8 alt_status;  /* ATA CTL */
 491         u8 hob_nsect;
 492         u8 hob_lbal;
 493         u8 hob_lbam;
 494         u8 hob_lbah;
 495 }__attribute__((packed, aligned (4)));
 496
 497 struct ipr_auto_sense {
 498         __be16 auto_sense_len;
 499         __be16 ioa_data_len;
 500         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 501 };
 502
 503 struct ipr_ioasa {
 504         __be32 ioasc;
 505 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 506 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 507 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 508 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 509
 510         __be16 ret_stat_len;    /* Length of the returned IOASA */
 511
 512         __be16 avail_stat_len;  /* Total Length of status available. */
 513
 514         __be32 residual_data_len;       /* number of bytes in the host data */
 515         /* buffers that were not used by the IOARCB command. */
 516
 517         __be32 ilid;
 518 #define IPR_NO_ILID                     0
 519 #define IPR_DRIVER_ILID         0xffffffff
 520
 521         __be32 fd_ioasc;
 522
 523         __be32 fd_phys_locator;
 524
 525         __be32 fd_res_handle;
 526
 527         __be32 ioasc_specific;  /* status code specific field */
 528 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 529 #define IPR_AUTOSENSE_VALID                     0x40000000
 530 #define IPR_ATA_DEVICE_WAS_RESET                0x20000000
 531 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 532 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 533 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 534
 535         union {
 536                 struct ipr_ioasa_vset vset;
 537                 struct ipr_ioasa_af_dasd dasd;
 538                 struct ipr_ioasa_gpdd gpdd;
 539                 struct ipr_ioasa_gata gata;
 540         } u;
 541
 542         struct ipr_auto_sense auto_sense;
 543 }__attribute__((packed, aligned (4)));
 544
 545 struct ipr_mode_parm_hdr {
 546         u8 length;
 547         u8 medium_type;
 548         u8 device_spec_parms;
 549         u8 block_desc_len;
 550 }__attribute__((packed));
 551
 552 struct ipr_mode_pages {
 553         struct ipr_mode_parm_hdr hdr;
 554         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 555 }__attribute__((packed));
 556
 557 struct ipr_mode_page_hdr {
 558         u8 ps_page_code;
 559 #define IPR_MODE_PAGE_PS        0x80
 560 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 561         u8 page_length;
 562 }__attribute__ ((packed));
 563
 564 struct ipr_dev_bus_entry {
 565         struct ipr_res_addr res_addr;
 566         u8 flags;
 567 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 568 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 569 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 570 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 571 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 572 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 573 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 574
 575         u8 scsi_id;
 576         u8 bus_width;
 577         u8 extended_reset_delay;
 578 #define IPR_EXTENDED_RESET_DELAY        7
 579
 580         __be32 max_xfer_rate;
 581
 582         u8 spinup_delay;
 583         u8 reserved3;
 584         __be16 reserved4;
 585 }__attribute__((packed, aligned (4)));
 586
 587 struct ipr_mode_page28 {
 588         struct ipr_mode_page_hdr hdr;
 589         u8 num_entries;
 590         u8 entry_length;
 591         struct ipr_dev_bus_entry bus[0];
 592 }__attribute__((packed));
 593
 594 struct ipr_ioa_vpd {
 595         struct ipr_std_inq_data std_inq_data;
 596         u8 ascii_part_num[12];
 597         u8 reserved[40];
 598         u8 ascii_plant_code[4];
 599 }__attribute__((packed));
 600
 601 struct ipr_inquiry_page3 {
 602         u8 peri_qual_dev_type;
 603         u8 page_code;
 604         u8 reserved1;
 605         u8 page_length;
 606         u8 ascii_len;
 607         u8 reserved2[3];
 608         u8 load_id[4];
 609         u8 major_release;
 610         u8 card_type;
 611         u8 minor_release[2];
 612         u8 ptf_number[4];
 613         u8 patch_number[4];
 614 }__attribute__((packed));
 615
 616 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 617 struct ipr_inquiry_page0 {
 618         u8 peri_qual_dev_type;
 619         u8 page_code;
 620         u8 reserved1;
 621         u8 len;
 622         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 623 }__attribute__((packed));
 624
 625 struct ipr_hostrcb_device_data_entry {
 626         struct ipr_vpd vpd;
 627         struct ipr_res_addr dev_res_addr;
 628         struct ipr_vpd new_vpd;
 629         struct ipr_vpd ioa_last_with_dev_vpd;
 630         struct ipr_vpd cfc_last_with_dev_vpd;
 631         __be32 ioa_data[5];
 632 }__attribute__((packed, aligned (4)));
 633
 634 struct ipr_hostrcb_device_data_entry_enhanced {
 635         struct ipr_ext_vpd vpd;
 636         u8 ccin[4];
 637         struct ipr_res_addr dev_res_addr;
 638         struct ipr_ext_vpd new_vpd;
 639         u8 new_ccin[4];
 640         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 641         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 642 }__attribute__((packed, aligned (4)));
 643
 644 struct ipr_hostrcb_array_data_entry {
 645         struct ipr_vpd vpd;
 646         struct ipr_res_addr expected_dev_res_addr;
 647         struct ipr_res_addr dev_res_addr;
 648 }__attribute__((packed, aligned (4)));
 649
 650 struct ipr_hostrcb_array_data_entry_enhanced {
 651         struct ipr_ext_vpd vpd;
 652         u8 ccin[4];
 653         struct ipr_res_addr expected_dev_res_addr;
 654         struct ipr_res_addr dev_res_addr;
 655 }__attribute__((packed, aligned (4)));
 656
 657 struct ipr_hostrcb_type_ff_error {
 658         __be32 ioa_data[502];
 659 }__attribute__((packed, aligned (4)));
 660
 661 struct ipr_hostrcb_type_01_error {
 662         __be32 seek_counter;
 663         __be32 read_counter;
 664         u8 sense_data[32];
 665         __be32 ioa_data[236];
 666 }__attribute__((packed, aligned (4)));
 667
 668 struct ipr_hostrcb_type_02_error {
 669         struct ipr_vpd ioa_vpd;
 670         struct ipr_vpd cfc_vpd;
 671         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 672         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 673         __be32 ioa_data[3];
 674 }__attribute__((packed, aligned (4)));
 675
 676 struct ipr_hostrcb_type_12_error {
 677         struct ipr_ext_vpd ioa_vpd;
 678         struct ipr_ext_vpd cfc_vpd;
 679         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 680         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 681         __be32 ioa_data[3];
 682 }__attribute__((packed, aligned (4)));
 683
 684 struct ipr_hostrcb_type_03_error {
 685         struct ipr_vpd ioa_vpd;
 686         struct ipr_vpd cfc_vpd;
 687         __be32 errors_detected;
 688         __be32 errors_logged;
 689         u8 ioa_data[12];
 690         struct ipr_hostrcb_device_data_entry dev[3];
 691 }__attribute__((packed, aligned (4)));
 692
 693 struct ipr_hostrcb_type_13_error {
 694         struct ipr_ext_vpd ioa_vpd;
 695         struct ipr_ext_vpd cfc_vpd;
 696         __be32 errors_detected;
 697         __be32 errors_logged;
 698         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 699 }__attribute__((packed, aligned (4)));
 700
 701 struct ipr_hostrcb_type_04_error {
 702         struct ipr_vpd ioa_vpd;
 703         struct ipr_vpd cfc_vpd;
 704         u8 ioa_data[12];
 705         struct ipr_hostrcb_array_data_entry array_member[10];
 706         __be32 exposed_mode_adn;
 707         __be32 array_id;
 708         struct ipr_vpd incomp_dev_vpd;
 709         __be32 ioa_data2;
 710         struct ipr_hostrcb_array_data_entry array_member2[8];
 711         struct ipr_res_addr last_func_vset_res_addr;
 712         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 713         u8 protection_level[8];
 714 }__attribute__((packed, aligned (4)));
 715
 716 struct ipr_hostrcb_type_14_error {
 717         struct ipr_ext_vpd ioa_vpd;
 718         struct ipr_ext_vpd cfc_vpd;
 719         __be32 exposed_mode_adn;
 720         __be32 array_id;
 721         struct ipr_res_addr last_func_vset_res_addr;
 722         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 723         u8 protection_level[8];
 724         __be32 num_entries;
 725         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 726 }__attribute__((packed, aligned (4)));
 727
 728 struct ipr_hostrcb_type_07_error {
 729         u8 failure_reason[64];
 730         struct ipr_vpd vpd;
 731         u32 data[222];
 732 }__attribute__((packed, aligned (4)));
 733
 734 struct ipr_hostrcb_type_17_error {
 735         u8 failure_reason[64];
 736         struct ipr_ext_vpd vpd;
 737         u32 data[476];
 738 }__attribute__((packed, aligned (4)));
 739
 740 struct ipr_hostrcb_config_element {
 741         u8 type_status;
 742 #define IPR_PATH_CFG_TYPE_MASK  0xF0
 743 #define IPR_PATH_CFG_NOT_EXIST  0x00
 744 #define IPR_PATH_CFG_IOA_PORT           0x10
 745 #define IPR_PATH_CFG_EXP_PORT           0x20
 746 #define IPR_PATH_CFG_DEVICE_PORT        0x30
 747 #define IPR_PATH_CFG_DEVICE_LUN 0x40
 748
 749 #define IPR_PATH_CFG_STATUS_MASK        0x0F
 750 #define IPR_PATH_CFG_NO_PROB            0x00
 751 #define IPR_PATH_CFG_DEGRADED           0x01
 752 #define IPR_PATH_CFG_FAILED             0x02
 753 #define IPR_PATH_CFG_SUSPECT            0x03
 754 #define IPR_PATH_NOT_DETECTED           0x04
 755 #define IPR_PATH_INCORRECT_CONN 0x05
 756
 757         u8 cascaded_expander;
 758         u8 phy;
 759         u8 link_rate;
 760 #define IPR_PHY_LINK_RATE_MASK  0x0F
 761
 762         __be32 wwid[2];
 763 }__attribute__((packed, aligned (4)));
 764
 765 struct ipr_hostrcb_fabric_desc {
 766         __be16 length;
 767         u8 ioa_port;
 768         u8 cascaded_expander;
 769         u8 phy;
 770         u8 path_state;
 771 #define IPR_PATH_ACTIVE_MASK            0xC0
 772 #define IPR_PATH_NO_INFO                0x00
 773 #define IPR_PATH_ACTIVE                 0x40
 774 #define IPR_PATH_NOT_ACTIVE             0x80
 775
 776 #define IPR_PATH_STATE_MASK             0x0F
 777 #define IPR_PATH_STATE_NO_INFO  0x00
 778 #define IPR_PATH_HEALTHY                0x01
 779 #define IPR_PATH_DEGRADED               0x02
 780 #define IPR_PATH_FAILED                 0x03
 781
 782         __be16 num_entries;
 783         struct ipr_hostrcb_config_element elem[1];
 784 }__attribute__((packed, aligned (4)));
 785
 786 #define for_each_fabric_cfg(fabric, cfg) \
 787                 for (cfg = (fabric)->elem; \
 788                         cfg < ((fabric)->elem + be16_to_cpu((fabric)->num_entries)); \
 789                         cfg++)
 790
 791 struct ipr_hostrcb_type_20_error {
 792         u8 failure_reason[64];
 793         u8 reserved[3];
 794         u8 num_entries;
 795         struct ipr_hostrcb_fabric_desc desc[1];
 796 }__attribute__((packed, aligned (4)));
 797
 798 struct ipr_hostrcb_error {
 799         __be32 failing_dev_ioasc;
 800         struct ipr_res_addr failing_dev_res_addr;
 801         __be32 failing_dev_res_handle;
 802         __be32 prc;
 803         union {
 804                 struct ipr_hostrcb_type_ff_error type_ff_error;
 805                 struct ipr_hostrcb_type_01_error type_01_error;
 806                 struct ipr_hostrcb_type_02_error type_02_error;
 807                 struct ipr_hostrcb_type_03_error type_03_error;
 808                 struct ipr_hostrcb_type_04_error type_04_error;
 809                 struct ipr_hostrcb_type_07_error type_07_error;
 810                 struct ipr_hostrcb_type_12_error type_12_error;
 811                 struct ipr_hostrcb_type_13_error type_13_error;
 812                 struct ipr_hostrcb_type_14_error type_14_error;
 813                 struct ipr_hostrcb_type_17_error type_17_error;
 814                 struct ipr_hostrcb_type_20_error type_20_error;
 815         } u;
 816 }__attribute__((packed, aligned (4)));
 817
 818 struct ipr_hostrcb_raw {
 819         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 820 }__attribute__((packed, aligned (4)));
 821
 822 struct ipr_hcam {
 823         u8 op_code;
 824 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 825 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 826
 827         u8 notify_type;
 828 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 829 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 830 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 831 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 832 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 833
 834         u8 notifications_lost;
 835 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 836 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 837
 838         u8 flags;
 839 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 840 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 841
 842         u8 overlay_id;
 843 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 844 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 845 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 846 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 847 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 848 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 849 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 850 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 851 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 852 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 853 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 854 #define IPR_HOST_RCB_OVERLAY_ID_20                              0x20
 855 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 856
 857         u8 reserved1[3];
 858         __be32 ilid;
 859         __be32 time_since_last_ioa_reset;
 860         __be32 reserved2;
 861         __be32 length;
 862
 863         union {
 864                 struct ipr_hostrcb_error error;
 865                 struct ipr_hostrcb_cfg_ch_not ccn;
 866                 struct ipr_hostrcb_raw raw;
 867         } u;
 868 }__attribute__((packed, aligned (4)));
 869
 870 struct ipr_hostrcb {
 871         struct ipr_hcam hcam;
 872         dma_addr_t hostrcb_dma;
 873         struct list_head queue;
 874         struct ipr_ioa_cfg *ioa_cfg;
 875 };
 876
 877 /* IPR smart dump table structures */
 878 struct ipr_sdt_entry {
 879         __be32 bar_str_offset;
 880         __be32 end_offset;
 881         u8 entry_byte;
 882         u8 reserved[3];
 883
 884         u8 flags;
 885 #define IPR_SDT_ENDIAN          0x80
 886 #define IPR_SDT_VALID_ENTRY     0x20
 887
 888         u8 resv;
 889         __be16 priority;
 890 }__attribute__((packed, aligned (4)));
 891
 892 struct ipr_sdt_header {
 893         __be32 state;
 894         __be32 num_entries;
 895         __be32 num_entries_used;
 896         __be32 dump_size;
 897 }__attribute__((packed, aligned (4)));
 898
 899 struct ipr_sdt {
 900         struct ipr_sdt_header hdr;
 901         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 902 }__attribute__((packed, aligned (4)));
 903
 904 struct ipr_uc_sdt {
 905         struct ipr_sdt_header hdr;
 906         struct ipr_sdt_entry entry[1];
 907 }__attribute__((packed, aligned (4)));
 908
 909 /*
 910  * Driver types
 911  */
 912 struct ipr_bus_attributes {
 913         u8 bus;
 914         u8 qas_enabled;
 915         u8 bus_width;
 916         u8 reserved;
 917         u32 max_xfer_rate;
 918 };
 919
 920 struct ipr_sata_port {
 921         struct ipr_ioa_cfg *ioa_cfg;
 922         struct ata_port *ap;
 923         struct ipr_resource_entry *res;
 924         struct ipr_ioasa_gata ioasa;
 925 };
 926
 927 struct ipr_resource_entry {
 928         struct ipr_config_table_entry cfgte;
 929         u8 needs_sync_complete:1;
 930         u8 in_erp:1;
 931         u8 add_to_ml:1;
 932         u8 del_from_ml:1;
 933         u8 resetting_device:1;
 934
 935         struct scsi_device *sdev;
 936         struct ipr_sata_port *sata_port;
 937         struct list_head queue;
 938 };
 939
 940 struct ipr_resource_hdr {
 941         u16 num_entries;
 942         u16 reserved;
 943 };
 944
 945 struct ipr_resource_table {
 946         struct ipr_resource_hdr hdr;
 947         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 948 };
 949
 950 struct ipr_misc_cbs {
 951         struct ipr_ioa_vpd ioa_vpd;
 952         struct ipr_inquiry_page0 page0_data;
 953         struct ipr_inquiry_page3 page3_data;
 954         struct ipr_mode_pages mode_pages;
 955         struct ipr_supported_device supp_dev;
 956 };
 957
 958 struct ipr_interrupt_offsets {
 959         unsigned long set_interrupt_mask_reg;
 960         unsigned long clr_interrupt_mask_reg;
 961         unsigned long sense_interrupt_mask_reg;
 962         unsigned long clr_interrupt_reg;
 963
 964         unsigned long sense_interrupt_reg;
 965         unsigned long ioarrin_reg;
 966         unsigned long sense_uproc_interrupt_reg;
 967         unsigned long set_uproc_interrupt_reg;
 968         unsigned long clr_uproc_interrupt_reg;
 969 };
 970
 971 struct ipr_interrupts {
 972         void __iomem *set_interrupt_mask_reg;
 973         void __iomem *clr_interrupt_mask_reg;
 974         void __iomem *sense_interrupt_mask_reg;
 975         void __iomem *clr_interrupt_reg;
 976
 977         void __iomem *sense_interrupt_reg;
 978         void __iomem *ioarrin_reg;
 979         void __iomem *sense_uproc_interrupt_reg;
 980         void __iomem *set_uproc_interrupt_reg;
 981         void __iomem *clr_uproc_interrupt_reg;
 982 };
 983
 984 struct ipr_chip_cfg_t {
 985         u32 mailbox;
 986         u8 cache_line_size;
 987         struct ipr_interrupt_offsets regs;
 988 };
 989
 990 struct ipr_chip_t {
 991         u16 vendor;
 992         u16 device;
 993         const struct ipr_chip_cfg_t *cfg;
 994 };
 995
 996 enum ipr_shutdown_type {
 997         IPR_SHUTDOWN_NORMAL = 0x00,
 998         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
 999         IPR_SHUTDOWN_ABBREV = 0x80,
1000         IPR_SHUTDOWN_NONE = 0x100
1001 };
1002
1003 struct ipr_trace_entry {
1004         u32 time;
1005
1006         u8 op_code;
1007         u8 ata_op_code;
1008         u8 type;
1009 #define IPR_TRACE_START                 0x00
1010 #define IPR_TRACE_FINISH                0xff
1011         u8 cmd_index;
1012
1013         __be32 res_handle;
1014         union {
1015                 u32 ioasc;
1016                 u32 add_data;
1017                 u32 res_addr;
1018         } u;
1019 };
1020
1021 struct ipr_sglist {
1022         u32 order;
1023         u32 num_sg;
1024         u32 num_dma_sg;
1025         u32 buffer_len;
1026         struct scatterlist scatterlist[1];
1027 };
1028
1029 enum ipr_sdt_state {
1030         INACTIVE,
1031         WAIT_FOR_DUMP,
1032         GET_DUMP,
1033         ABORT_DUMP,
1034         DUMP_OBTAINED
1035 };
1036
1037 enum ipr_cache_state {
1038         CACHE_NONE,
1039         CACHE_DISABLED,
1040         CACHE_ENABLED,
1041         CACHE_INVALID
1042 };
1043
1044 /* Per-controller data */
1045 struct ipr_ioa_cfg {
1046         char eye_catcher[8];
1047 #define IPR_EYECATCHER                  "iprcfg"
1048
1049         struct list_head queue;
1050
1051         u8 allow_interrupts:1;
1052         u8 in_reset_reload:1;
1053         u8 in_ioa_bringdown:1;
1054         u8 ioa_unit_checked:1;
1055         u8 ioa_is_dead:1;
1056         u8 dump_taken:1;
1057         u8 allow_cmds:1;
1058         u8 allow_ml_add_del:1;
1059         u8 needs_hard_reset:1;
1060
1061         enum ipr_cache_state cache_state;
1062         u16 type; /* CCIN of the card */
1063
1064         u8 log_level;
1065 #define IPR_MAX_LOG_LEVEL                       4
1066 #define IPR_DEFAULT_LOG_LEVEL           2
1067
1068 #define IPR_NUM_TRACE_INDEX_BITS        8
1069 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
1070 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1071         char trace_start[8];
1072 #define IPR_TRACE_START_LABEL                   "trace"
1073         struct ipr_trace_entry *trace;
1074         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
1075
1076         /*
1077          * Queue for free command blocks
1078          */
1079         char ipr_free_label[8];
1080 #define IPR_FREEQ_LABEL                 "free-q"
1081         struct list_head free_q;
1082
1083         /*
1084          * Queue for command blocks outstanding to the adapter
1085          */
1086         char ipr_pending_label[8];
1087 #define IPR_PENDQ_LABEL                 "pend-q"
1088         struct list_head pending_q;
1089
1090         char cfg_table_start[8];
1091 #define IPR_CFG_TBL_START               "cfg"
1092         struct ipr_config_table *cfg_table;
1093         dma_addr_t cfg_table_dma;
1094
1095         char resource_table_label[8];
1096 #define IPR_RES_TABLE_LABEL             "res_tbl"
1097         struct ipr_resource_entry *res_entries;
1098         struct list_head free_res_q;
1099         struct list_head used_res_q;
1100
1101         char ipr_hcam_label[8];
1102 #define IPR_HCAM_LABEL                  "hcams"
1103         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
1104         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
1105         struct list_head hostrcb_free_q;
1106         struct list_head hostrcb_pending_q;
1107
1108         __be32 *host_rrq;
1109         dma_addr_t host_rrq_dma;
1110 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
1111 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
1112 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
1113 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
1114         volatile __be32 *hrrq_start;
1115         volatile __be32 *hrrq_end;
1116         volatile __be32 *hrrq_curr;
1117         volatile u32 toggle_bit;
1118
1119         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
1120
1121         const struct ipr_chip_cfg_t *chip_cfg;
1122
1123         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
1124         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
1125         void __iomem *ioa_mailbox;
1126         struct ipr_interrupts regs;
1127
1128         u16 saved_pcix_cmd_reg;
1129         u16 reset_retries;
1130
1131         u32 errors_logged;
1132         u32 doorbell;
1133
1134         struct Scsi_Host *host;
1135         struct pci_dev *pdev;
1136         struct ipr_sglist *ucode_sglist;
1137         u8 saved_mode_page_len;
1138
1139         struct work_struct work_q;
1140
1141         wait_queue_head_t reset_wait_q;
1142
1143         struct ipr_dump *dump;
1144         enum ipr_sdt_state sdt_state;
1145
1146         struct ipr_misc_cbs *vpd_cbs;
1147         dma_addr_t vpd_cbs_dma;
1148
1149         struct pci_pool *ipr_cmd_pool;
1150
1151         struct ipr_cmnd *reset_cmd;
1152
1153         struct ata_host ata_host;
1154         char ipr_cmd_label[8];
1155 #define IPR_CMD_LABEL           "ipr_cmnd"
1156         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1157         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1158 };
1159
1160 struct ipr_cmnd {
1161         struct ipr_ioarcb ioarcb;
1162         struct ipr_ioasa ioasa;
1163         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1164         struct list_head queue;
1165         struct scsi_cmnd *scsi_cmd;
1166         struct ata_queued_cmd *qc;
1167         struct completion completion;
1168         struct timer_list timer;
1169         void (*done) (struct ipr_cmnd *);
1170         int (*job_step) (struct ipr_cmnd *);
1171         int (*job_step_failed) (struct ipr_cmnd *);
1172         u16 cmd_index;
1173         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1174         dma_addr_t sense_buffer_dma;
1175         unsigned short dma_use_sg;
1176         dma_addr_t dma_handle;
1177         struct ipr_cmnd *sibling;
1178         union {
1179                 enum ipr_shutdown_type shutdown_type;
1180                 struct ipr_hostrcb *hostrcb;
1181                 unsigned long time_left;
1182                 unsigned long scratch;
1183                 struct ipr_resource_entry *res;
1184                 struct scsi_device *sdev;
1185         } u;
1186
1187         struct ipr_ioa_cfg *ioa_cfg;
1188 };
1189
1190 struct ipr_ses_table_entry {
1191         char product_id[17];
1192         char compare_product_id_byte[17];
1193         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1194 };
1195
1196 struct ipr_dump_header {
1197         u32 eye_catcher;
1198 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1199         u32 len;
1200         u32 num_entries;
1201         u32 first_entry_offset;
1202         u32 status;
1203 #define IPR_DUMP_STATUS_SUCCESS                 0
1204 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1205 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1206         u32 os;
1207 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1208         u32 driver_name;
1209 #define IPR_DUMP_DRIVER_NAME    0x49505232
1210 }__attribute__((packed, aligned (4)));
1211
1212 struct ipr_dump_entry_header {
1213         u32 eye_catcher;
1214 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1215         u32 len;
1216         u32 num_elems;
1217         u32 offset;
1218         u32 data_type;
1219 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1220 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1221         u32 id;
1222 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1223 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1224 #define IPR_DUMP_TRACE_ID               0x54524143
1225 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1226 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1227 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1228 #define IPR_DUMP_PEND_OPS               0x414F5053
1229         u32 status;
1230 }__attribute__((packed, aligned (4)));
1231
1232 struct ipr_dump_location_entry {
1233         struct ipr_dump_entry_header hdr;
1234         u8 location[BUS_ID_SIZE];
1235 }__attribute__((packed));
1236
1237 struct ipr_dump_trace_entry {
1238         struct ipr_dump_entry_header hdr;
1239         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1240 }__attribute__((packed, aligned (4)));
1241
1242 struct ipr_dump_version_entry {
1243         struct ipr_dump_entry_header hdr;
1244         u8 version[sizeof(IPR_DRIVER_VERSION)];
1245 };
1246
1247 struct ipr_dump_ioa_type_entry {
1248         struct ipr_dump_entry_header hdr;
1249         u32 type;
1250         u32 fw_version;
1251 };
1252
1253 struct ipr_driver_dump {
1254         struct ipr_dump_header hdr;
1255         struct ipr_dump_version_entry version_entry;
1256         struct ipr_dump_location_entry location_entry;
1257         struct ipr_dump_ioa_type_entry ioa_type_entry;
1258         struct ipr_dump_trace_entry trace_entry;
1259 }__attribute__((packed));
1260
1261 struct ipr_ioa_dump {
1262         struct ipr_dump_entry_header hdr;
1263         struct ipr_sdt sdt;
1264         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1265         u32 reserved;
1266         u32 next_page_index;
1267         u32 page_offset;
1268         u32 format;
1269 #define IPR_SDT_FMT2            2
1270 #define IPR_SDT_UNKNOWN         3
1271 }__attribute__((packed, aligned (4)));
1272
1273 struct ipr_dump {
1274         struct kref kref;
1275         struct ipr_ioa_cfg *ioa_cfg;
1276         struct ipr_driver_dump driver_dump;
1277         struct ipr_ioa_dump ioa_dump;
1278 };
1279
1280 struct ipr_error_table_t {
1281         u32 ioasc;
1282         int log_ioasa;
1283         int log_hcam;
1284         char *error;
1285 };
1286
1287 struct ipr_software_inq_lid_info {
1288         __be32 load_id;
1289         __be32 timestamp[3];
1290 }__attribute__((packed, aligned (4)));
1291
1292 struct ipr_ucode_image_header {
1293         __be32 header_length;
1294         __be32 lid_table_offset;
1295         u8 major_release;
1296         u8 card_type;
1297         u8 minor_release[2];
1298         u8 reserved[20];
1299         char eyecatcher[16];
1300         __be32 num_lids;
1301         struct ipr_software_inq_lid_info lid[1];
1302 }__attribute__((packed, aligned (4)));
1303
1304 /*
1305  * Macros
1306  */
1307 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1308
1309 #ifdef CONFIG_SCSI_IPR_TRACE
1310 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1311 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1312 #else
1313 #define ipr_create_trace_file(kobj, attr) 0
1314 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1315 #endif
1316
1317 #ifdef CONFIG_SCSI_IPR_DUMP
1318 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1319 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1320 #else
1321 #define ipr_create_dump_file(kobj, attr) 0
1322 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1323 #endif
1324
1325 /*
1326  * Error logging macros
1327  */
1328 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1329 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1330 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1331
1332 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1333         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1334                 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1335
1336 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1337         ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1338
1339 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1340         ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1341
1342 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1343 {                                                                       \
1344         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1345                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1346         } else {                                                        \
1347                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1348                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1349                         (res).bus, (res).target, (res).lun);            \
1350         }                                                               \
1351 }
1352
1353 #define ipr_hcam_err(hostrcb, fmt, ...)                                 \
1354 {                                                                                                       \
1355         if (ipr_is_device(&(hostrcb)->hcam.u.error.failing_dev_res_addr)) {             \
1356                 ipr_ra_err((hostrcb)->ioa_cfg,                                                  \
1357                                 (hostrcb)->hcam.u.error.failing_dev_res_addr,                   \
1358                                 fmt, ##__VA_ARGS__);                                                    \
1359         } else {                                                                                        \
1360                 dev_err(&(hostrcb)->ioa_cfg->pdev->dev, fmt, ##__VA_ARGS__);            \
1361         }                                                                                               \
1362 }
1363
1364 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1365         __FILE__, __FUNCTION__, __LINE__)
1366
1367 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1368 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1369
1370 #define ipr_err_separator \
1371 ipr_err("----------------------------------------------------------\n")
1372
1373
1374 /*
1375  * Inlines
1376  */
1377
1378 /**
1379  * ipr_is_ioa_resource - Determine if a resource is the IOA
1380  * @res:        resource entry struct
1381  *
1382  * Return value:
1383  *      1 if IOA / 0 if not IOA
1384  **/
1385 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1386 {
1387         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1388 }
1389
1390 /**
1391  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1392  * @res:        resource entry struct
1393  *
1394  * Return value:
1395  *      1 if AF DASD / 0 if not AF DASD
1396  **/
1397 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1398 {
1399         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1400             !ipr_is_ioa_resource(res) &&
1401             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1402                 return 1;
1403         else
1404                 return 0;
1405 }
1406
1407 /**
1408  * ipr_is_vset_device - Determine if a resource is a VSET
1409  * @res:        resource entry struct
1410  *
1411  * Return value:
1412  *      1 if VSET / 0 if not VSET
1413  **/
1414 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1415 {
1416         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1417             !ipr_is_ioa_resource(res) &&
1418             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1419                 return 1;
1420         else
1421                 return 0;
1422 }
1423
1424 /**
1425  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1426  * @res:        resource entry struct
1427  *
1428  * Return value:
1429  *      1 if GSCSI / 0 if not GSCSI
1430  **/
1431 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1432 {
1433         if (!ipr_is_ioa_resource(res) &&
1434             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1435                 return 1;
1436         else
1437                 return 0;
1438 }
1439
1440 /**
1441  * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1442  * @res:        resource entry struct
1443  *
1444  * Return value:
1445  *      1 if SCSI disk / 0 if not SCSI disk
1446  **/
1447 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1448 {
1449         if (ipr_is_af_dasd_device(res) ||
1450             (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1451                 return 1;
1452         else
1453                 return 0;
1454 }
1455
1456 /**
1457  * ipr_is_gata - Determine if a resource is a generic ATA resource
1458  * @res:        resource entry struct
1459  *
1460  * Return value:
1461  *      1 if GATA / 0 if not GATA
1462  **/
1463 static inline int ipr_is_gata(struct ipr_resource_entry *res)
1464 {
1465         if (!ipr_is_ioa_resource(res) &&
1466             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA)
1467                 return 1;
1468         else
1469                 return 0;
1470 }
1471
1472 /**
1473  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1474  * @res:        resource entry struct
1475  *
1476  * Return value:
1477  *      1 if NACA queueing model / 0 if not NACA queueing model
1478  **/
1479 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1480 {
1481         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1482                 return 1;
1483         return 0;
1484 }
1485
1486 /**
1487  * ipr_is_device - Determine if resource address is that of a device
1488  * @res_addr:   resource address struct
1489  *
1490  * Return value:
1491  *      1 if AF / 0 if not AF
1492  **/
1493 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1494 {
1495         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1496             (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1497                 return 1;
1498
1499         return 0;
1500 }
1501
1502 /**
1503  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1504  * @sdt_word:   SDT address
1505  *
1506  * Return value:
1507  *      1 if format 2 / 0 if not
1508  **/
1509 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1510 {
1511         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1512
1513         switch (bar_sel) {
1514         case IPR_SDT_FMT2_BAR0_SEL:
1515         case IPR_SDT_FMT2_BAR1_SEL:
1516         case IPR_SDT_FMT2_BAR2_SEL:
1517         case IPR_SDT_FMT2_BAR3_SEL:
1518         case IPR_SDT_FMT2_BAR4_SEL:
1519         case IPR_SDT_FMT2_BAR5_SEL:
1520         case IPR_SDT_FMT2_EXP_ROM_SEL:
1521                 return 1;
1522         };
1523
1524         return 0;
1525 }
1526
1527 #endif