arch/sh/mm/tlb-sh5.c

   1 /*
   2  * arch/sh/mm/tlb-sh5.c
   3  *
   4  * Copyright (C) 2003  Paul Mundt <lethal@linux-sh.org>
   5  * Copyright (C) 2003  Richard Curnow <richard.curnow@superh.com>
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/mm.h>
  12 #include <linux/init.h>
  13 #include <asm/page.h>
  14 #include <asm/tlb.h>
  15 #include <asm/mmu_context.h>
  16
  17 /**
  18  * sh64_tlb_init
  19  *
  20  * Perform initial setup for the DTLB and ITLB.
  21  */
  22 int __init sh64_tlb_init(void)
  23 {
  24         /* Assign some sane DTLB defaults */
  25         cpu_data->dtlb.entries  = 64;
  26         cpu_data->dtlb.step     = 0x10;
  27
  28         cpu_data->dtlb.first    = DTLB_FIXED | cpu_data->dtlb.step;
  29         cpu_data->dtlb.next     = cpu_data->dtlb.first;
  30
  31         cpu_data->dtlb.last     = DTLB_FIXED |
  32                                   ((cpu_data->dtlb.entries - 1) *
  33                                    cpu_data->dtlb.step);
  34
  35         /* And again for the ITLB */
  36         cpu_data->itlb.entries  = 64;
  37         cpu_data->itlb.step     = 0x10;
  38
  39         cpu_data->itlb.first    = ITLB_FIXED | cpu_data->itlb.step;
  40         cpu_data->itlb.next     = cpu_data->itlb.first;
  41         cpu_data->itlb.last     = ITLB_FIXED |
  42                                   ((cpu_data->itlb.entries - 1) *
  43                                    cpu_data->itlb.step);
  44
  45         return 0;
  46 }
  47
  48 /**
  49  * sh64_next_free_dtlb_entry
  50  *
  51  * Find the next available DTLB entry
  52  */
  53 unsigned long long sh64_next_free_dtlb_entry(void)
  54 {
  55         return cpu_data->dtlb.next;
  56 }
  57
  58 /**
  59  * sh64_get_wired_dtlb_entry
  60  *
  61  * Allocate a wired (locked-in) entry in the DTLB
  62  */
  63 unsigned long long sh64_get_wired_dtlb_entry(void)
  64 {
  65         unsigned long long entry = sh64_next_free_dtlb_entry();
  66
  67         cpu_data->dtlb.first += cpu_data->dtlb.step;
  68         cpu_data->dtlb.next  += cpu_data->dtlb.step;
  69
  70         return entry;
  71 }
  72
  73 /**
  74  * sh64_put_wired_dtlb_entry
  75  *
  76  * @entry:      Address of TLB slot.
  77  *
  78  * Free a wired (locked-in) entry in the DTLB.
  79  *
  80  * Works like a stack, last one to allocate must be first one to free.
  81  */
  82 int sh64_put_wired_dtlb_entry(unsigned long long entry)
  83 {
  84         __flush_tlb_slot(entry);
  85
  86         /*
  87          * We don't do any particularly useful tracking of wired entries,
  88          * so this approach works like a stack .. last one to be allocated
  89          * has to be the first one to be freed.
  90          *
  91          * We could potentially load wired entries into a list and work on
  92          * rebalancing the list periodically (which also entails moving the
  93          * contents of a TLB entry) .. though I have a feeling that this is
  94          * more trouble than it's worth.
  95          */
  96
  97         /*
  98          * Entry must be valid .. we don't want any ITLB addresses!
  99          */
 100         if (entry <= DTLB_FIXED)
 101                 return -EINVAL;
 102
 103         /*
 104          * Next, check if we're within range to be freed. (ie, must be the
 105          * entry beneath the first 'free' entry!
 106          */
 107         if (entry < (cpu_data->dtlb.first - cpu_data->dtlb.step))
 108                 return -EINVAL;
 109
 110         /* If we are, then bring this entry back into the list */
 111         cpu_data->dtlb.first    -= cpu_data->dtlb.step;
 112         cpu_data->dtlb.next     = entry;
 113
 114         return 0;
 115 }
 116
 117 /**
 118  * sh64_setup_tlb_slot
 119  *
 120  * @config_addr:        Address of TLB slot.
 121  * @eaddr:              Virtual address.
 122  * @asid:               Address Space Identifier.
 123  * @paddr:              Physical address.
 124  *
 125  * Load up a virtual<->physical translation for @eaddr<->@paddr in the
 126  * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).
 127  */
 128 inline void sh64_setup_tlb_slot(unsigned long long config_addr,
 129                                 unsigned long eaddr,
 130                                 unsigned long asid,
 131                                 unsigned long paddr)
 132 {
 133         unsigned long long pteh, ptel;
 134
 135         /* Sign extension */
 136 #if (NEFF == 32)
 137         pteh = (unsigned long long)(signed long long)(signed long) eaddr;
 138 #else
 139 #error "Can't sign extend more than 32 bits yet"
 140 #endif
 141         pteh &= PAGE_MASK;
 142         pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
 143 #if (NEFF == 32)
 144         ptel = (unsigned long long)(signed long long)(signed long) paddr;
 145 #else
 146 #error "Can't sign extend more than 32 bits yet"
 147 #endif
 148         ptel &= PAGE_MASK;
 149         ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE);
 150
 151         asm volatile("putcfg %0, 1, %1\n\t"
 152                         "putcfg %0, 0, %2\n"
 153                         : : "r" (config_addr), "r" (ptel), "r" (pteh));
 154 }
 155
 156 /**
 157  * sh64_teardown_tlb_slot
 158  *
 159  * @config_addr:        Address of TLB slot.
 160  *
 161  * Teardown any existing mapping in the TLB slot @config_addr.
 162  */
 163 inline void sh64_teardown_tlb_slot(unsigned long long config_addr)
 164         __attribute__ ((alias("__flush_tlb_slot")));