[PATCH] Create include/asm-powerpc
[linux-2.6/kvm.git] / arch / ppc / platforms / 85xx / sbc85xx.c
blob4f6d1ddd6fb8073cc76d7923b3721e77ac80028a
1 /*
2 * arch/ppc/platform/85xx/sbc85xx.c
3 *
4 * WindRiver PowerQUICC III SBC85xx board common routines
6 * Copyright 2002, 2003 Motorola Inc.
7 * Copyright 2004 Red Hat, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/config.h>
16 #include <linux/stddef.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/errno.h>
20 #include <linux/reboot.h>
21 #include <linux/pci.h>
22 #include <linux/kdev_t.h>
23 #include <linux/major.h>
24 #include <linux/console.h>
25 #include <linux/delay.h>
26 #include <linux/irq.h>
27 #include <linux/seq_file.h>
28 #include <linux/serial.h>
29 #include <linux/module.h>
31 #include <asm/system.h>
32 #include <asm/pgtable.h>
33 #include <asm/page.h>
34 #include <asm/atomic.h>
35 #include <asm/time.h>
36 #include <asm/io.h>
37 #include <asm/machdep.h>
38 #include <asm/open_pic.h>
39 #include <asm/bootinfo.h>
40 #include <asm/pci-bridge.h>
41 #include <asm/mpc85xx.h>
42 #include <asm/irq.h>
43 #include <asm/immap_85xx.h>
44 #include <asm/ppc_sys.h>
46 #include <mm/mmu_decl.h>
48 #include <platforms/85xx/sbc85xx.h>
50 unsigned char __res[sizeof (bd_t)];
52 #ifndef CONFIG_PCI
53 unsigned long isa_io_base = 0;
54 unsigned long isa_mem_base = 0;
55 unsigned long pci_dram_offset = 0;
56 #endif
58 extern unsigned long total_memory; /* in mm/init */
60 /* Internal interrupts are all Level Sensitive, and Positive Polarity */
61 static u_char sbc8560_openpic_initsenses[] __initdata = {
62 MPC85XX_INTERNAL_IRQ_SENSES,
63 0x0, /* External 0: */
64 0x0, /* External 1: */
65 #if defined(CONFIG_PCI)
66 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 0 */
67 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 1 */
68 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 2 */
69 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PCI slot 3 */
70 #else
71 0x0, /* External 2: */
72 0x0, /* External 3: */
73 0x0, /* External 4: */
74 0x0, /* External 5: */
75 #endif
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 6: PHY */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
78 0x0, /* External 8: */
79 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: PHY */
80 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 10: PHY */
81 0x0, /* External 11: */
84 /* ************************************************************************ */
85 int
86 sbc8560_show_cpuinfo(struct seq_file *m)
88 uint pvid, svid, phid1;
89 uint memsize = total_memory;
90 bd_t *binfo = (bd_t *) __res;
91 unsigned int freq;
93 /* get the core frequency */
94 freq = binfo->bi_intfreq;
96 pvid = mfspr(SPRN_PVR);
97 svid = mfspr(SPRN_SVR);
99 seq_printf(m, "Vendor\t\t: Wind River\n");
100 seq_printf(m, "Machine\t\t: SBC%s\n", cur_ppc_sys_spec->ppc_sys_name);
101 seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
102 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
103 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
105 /* Display cpu Pll setting */
106 phid1 = mfspr(SPRN_HID1);
107 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
109 /* Display the amount of memory */
110 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
112 return 0;
115 void __init
116 sbc8560_init_IRQ(void)
118 bd_t *binfo = (bd_t *) __res;
119 /* Determine the Physical Address of the OpenPIC regs */
120 phys_addr_t OpenPIC_PAddr =
121 binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
122 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
123 OpenPIC_InitSenses = sbc8560_openpic_initsenses;
124 OpenPIC_NumInitSenses = sizeof (sbc8560_openpic_initsenses);
126 /* Skip reserved space and internal sources */
127 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
128 /* Map PIC IRQs 0-11 */
129 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
131 /* we let openpic interrupts starting from an offset, to
132 * leave space for cascading interrupts underneath.
134 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
136 return;
140 * interrupt routing
143 #ifdef CONFIG_PCI
144 int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
145 unsigned char pin)
147 static char pci_irq_table[][4] =
149 * PCI IDSEL/INTPIN->INTLINE
150 * A B C D
153 {PIRQA, PIRQB, PIRQC, PIRQD},
154 {PIRQD, PIRQA, PIRQB, PIRQC},
155 {PIRQC, PIRQD, PIRQA, PIRQB},
156 {PIRQB, PIRQC, PIRQD, PIRQA},
159 const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
160 return PCI_IRQ_TABLE_LOOKUP;
163 int mpc85xx_exclude_device(u_char bus, u_char devfn)
165 if (bus == 0 && PCI_SLOT(devfn) == 0)
166 return PCIBIOS_DEVICE_NOT_FOUND;
167 else
168 return PCIBIOS_SUCCESSFUL;
170 #endif /* CONFIG_PCI */