arch/x86/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  */
   7 #include <linux/init.h>
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/string.h>
  11 #include <linux/bootmem.h>
  12 #include <linux/bitops.h>
  13 #include <linux/module.h>
  14 #include <asm/pda.h>
  15 #include <asm/pgtable.h>
  16 #include <asm/processor.h>
  17 #include <asm/desc.h>
  18 #include <asm/atomic.h>
  19 #include <asm/mmu_context.h>
  20 #include <asm/smp.h>
  21 #include <asm/i387.h>
  22 #include <asm/percpu.h>
  23 #include <asm/proto.h>
  24 #include <asm/sections.h>
  25 #include <asm/setup.h>
  26
  27 #ifndef CONFIG_DEBUG_BOOT_PARAMS
  28 struct boot_params __initdata boot_params;
  29 #else
  30 struct boot_params boot_params;
  31 #endif
  32
  33 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  34
  35 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
  36 EXPORT_SYMBOL(_cpu_pda);
  37 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
  38
  39 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
  40
  41 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  42
  43 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  44 EXPORT_SYMBOL_GPL(__supported_pte_mask);
  45
  46 static int do_not_nx __cpuinitdata = 0;
  47
  48 /* noexec=on|off
  49 Control non executable mappings for 64bit processes.
  50
  51 on      Enable(default)
  52 off     Disable
  53 */
  54 static int __init nonx_setup(char *str)
  55 {
  56         if (!str)
  57                 return -EINVAL;
  58         if (!strncmp(str, "on", 2)) {
  59                 __supported_pte_mask |= _PAGE_NX;
  60                 do_not_nx = 0;
  61         } else if (!strncmp(str, "off", 3)) {
  62                 do_not_nx = 1;
  63                 __supported_pte_mask &= ~_PAGE_NX;
  64         }
  65         return 0;
  66 }
  67 early_param("noexec", nonx_setup);
  68
  69 int force_personality32 = 0;
  70
  71 /* noexec32=on|off
  72 Control non executable heap for 32bit processes.
  73 To control the stack too use noexec=off
  74
  75 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  76 off     PROT_READ implies PROT_EXEC (default)
  77 */
  78 static int __init nonx32_setup(char *str)
  79 {
  80         if (!strcmp(str, "on"))
  81                 force_personality32 &= ~READ_IMPLIES_EXEC;
  82         else if (!strcmp(str, "off"))
  83                 force_personality32 |= READ_IMPLIES_EXEC;
  84         return 1;
  85 }
  86 __setup("noexec32=", nonx32_setup);
  87
  88 /*
  89  * Copy data used in early init routines from the initial arrays to the
  90  * per cpu data areas.  These arrays then become expendable and the
  91  * *_early_ptr's are zeroed indicating that the static arrays are gone.
  92  */
  93 static void __init setup_per_cpu_maps(void)
  94 {
  95         int cpu;
  96
  97         for_each_possible_cpu(cpu) {
  98 #ifdef CONFIG_SMP
  99                 if (per_cpu_offset(cpu)) {
 100 #endif
 101                         per_cpu(x86_cpu_to_apicid, cpu) =
 102                                                 x86_cpu_to_apicid_init[cpu];
 103                         per_cpu(x86_bios_cpu_apicid, cpu) =
 104                                                 x86_bios_cpu_apicid_init[cpu];
 105 #ifdef CONFIG_NUMA
 106                         per_cpu(x86_cpu_to_node_map, cpu) =
 107                                                 x86_cpu_to_node_map_init[cpu];
 108 #endif
 109 #ifdef CONFIG_SMP
 110                 }
 111                 else
 112                         printk(KERN_NOTICE "per_cpu_offset zero for cpu %d\n",
 113                                                                         cpu);
 114 #endif
 115         }
 116
 117         /* indicate the early static arrays will soon be gone */
 118         x86_cpu_to_apicid_early_ptr = NULL;
 119         x86_bios_cpu_apicid_early_ptr = NULL;
 120 #ifdef CONFIG_NUMA
 121         x86_cpu_to_node_map_early_ptr = NULL;
 122 #endif
 123 }
 124
 125 /*
 126  * Great future plan:
 127  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
 128  * Always point %gs to its beginning
 129  */
 130 void __init setup_per_cpu_areas(void)
 131 {
 132         int i;
 133         unsigned long size;
 134
 135 #ifdef CONFIG_HOTPLUG_CPU
 136         prefill_possible_map();
 137 #endif
 138
 139         /* Copy section for each CPU (we discard the original) */
 140         size = PERCPU_ENOUGH_ROOM;
 141
 142         printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
 143         for_each_cpu_mask (i, cpu_possible_map) {
 144                 char *ptr;
 145
 146                 if (!NODE_DATA(early_cpu_to_node(i))) {
 147                         printk("cpu with no node %d, num_online_nodes %d\n",
 148                                i, num_online_nodes());
 149                         ptr = alloc_bootmem_pages(size);
 150                 } else {
 151                         ptr = alloc_bootmem_pages_node(NODE_DATA(early_cpu_to_node(i)), size);
 152                 }
 153                 if (!ptr)
 154                         panic("Cannot allocate cpu data for CPU %d\n", i);
 155                 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
 156                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 157         }
 158
 159         /* setup percpu data maps early */
 160         setup_per_cpu_maps();
 161 }
 162
 163 void pda_init(int cpu)
 164 {
 165         struct x8664_pda *pda = cpu_pda(cpu);
 166
 167         /* Setup up data that may be needed in __get_free_pages early */
 168         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 169         /* Memory clobbers used to order PDA accessed */
 170         mb();
 171         wrmsrl(MSR_GS_BASE, pda);
 172         mb();
 173
 174         pda->cpunumber = cpu;
 175         pda->irqcount = -1;
 176         pda->kernelstack =
 177                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 178         pda->active_mm = &init_mm;
 179         pda->mmu_state = 0;
 180
 181         if (cpu == 0) {
 182                 /* others are initialized in smpboot.c */
 183                 pda->pcurrent = &init_task;
 184                 pda->irqstackptr = boot_cpu_stack;
 185         } else {
 186                 pda->irqstackptr = (char *)
 187                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 188                 if (!pda->irqstackptr)
 189                         panic("cannot allocate irqstack for cpu %d", cpu);
 190         }
 191
 192
 193         pda->irqstackptr += IRQSTACKSIZE-64;
 194 }
 195
 196 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
 197 __attribute__((section(".bss.page_aligned")));
 198
 199 extern asmlinkage void ignore_sysret(void);
 200
 201 /* May not be marked __init: used by software suspend */
 202 void syscall_init(void)
 203 {
 204         /*
 205          * LSTAR and STAR live in a bit strange symbiosis.
 206          * They both write to the same internal register. STAR allows to set CS/DS
 207          * but only a 32bit target. LSTAR sets the 64bit rip.
 208          */
 209         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 210         wrmsrl(MSR_LSTAR, system_call);
 211         wrmsrl(MSR_CSTAR, ignore_sysret);
 212
 213 #ifdef CONFIG_IA32_EMULATION
 214         syscall32_cpu_init ();
 215 #endif
 216
 217         /* Flags to clear on syscall */
 218         wrmsrl(MSR_SYSCALL_MASK,
 219                X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
 220 }
 221
 222 void __cpuinit check_efer(void)
 223 {
 224         unsigned long efer;
 225
 226         rdmsrl(MSR_EFER, efer);
 227         if (!(efer & EFER_NX) || do_not_nx) {
 228                 __supported_pte_mask &= ~_PAGE_NX;
 229         }
 230 }
 231
 232 unsigned long kernel_eflags;
 233
 234 /*
 235  * Copies of the original ist values from the tss are only accessed during
 236  * debugging, no special alignment required.
 237  */
 238 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 239
 240 /*
 241  * cpu_init() initializes state that is per-CPU. Some data is already
 242  * initialized (naturally) in the bootstrap process, such as the GDT
 243  * and IDT. We reload them nevertheless, this function acts as a
 244  * 'CPU state barrier', nothing should get across.
 245  * A lot of state is already set up in PDA init.
 246  */
 247 void __cpuinit cpu_init (void)
 248 {
 249         int cpu = stack_smp_processor_id();
 250         struct tss_struct *t = &per_cpu(init_tss, cpu);
 251         struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
 252         unsigned long v;
 253         char *estacks = NULL;
 254         struct task_struct *me;
 255         int i;
 256
 257         /* CPU 0 is initialised in head64.c */
 258         if (cpu != 0) {
 259                 pda_init(cpu);
 260         } else
 261                 estacks = boot_exception_stacks;
 262
 263         me = current;
 264
 265         if (cpu_test_and_set(cpu, cpu_initialized))
 266                 panic("CPU#%d already initialized!\n", cpu);
 267
 268         printk("Initializing CPU#%d\n", cpu);
 269
 270         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 271
 272         /*
 273          * Initialize the per-CPU GDT with the boot GDT,
 274          * and set up the GDT descriptor:
 275          */
 276         if (cpu)
 277                 memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
 278
 279         cpu_gdt_descr[cpu].size = GDT_SIZE;
 280         load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
 281         load_idt((const struct desc_ptr *)&idt_descr);
 282
 283         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
 284         syscall_init();
 285
 286         wrmsrl(MSR_FS_BASE, 0);
 287         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 288         barrier();
 289
 290         check_efer();
 291
 292         /*
 293          * set up and load the per-CPU TSS
 294          */
 295         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 296                 static const unsigned int order[N_EXCEPTION_STACKS] = {
 297                         [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
 298                         [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
 299                 };
 300                 if (cpu) {
 301                         estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
 302                         if (!estacks)
 303                                 panic("Cannot allocate exception stack %ld %d\n",
 304                                       v, cpu);
 305                 }
 306                 estacks += PAGE_SIZE << order[v];
 307                 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
 308         }
 309
 310         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 311         /*
 312          * <= is required because the CPU will access up to
 313          * 8 bits beyond the end of the IO permission bitmap.
 314          */
 315         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 316                 t->io_bitmap[i] = ~0UL;
 317
 318         atomic_inc(&init_mm.mm_count);
 319         me->active_mm = &init_mm;
 320         if (me->mm)
 321                 BUG();
 322         enter_lazy_tlb(&init_mm, me);
 323
 324         set_tss_desc(cpu, t);
 325         load_TR_desc();
 326         load_LDT(&init_mm.context);
 327
 328         /*
 329          * Clear all 6 debug registers:
 330          */
 331
 332         set_debugreg(0UL, 0);
 333         set_debugreg(0UL, 1);
 334         set_debugreg(0UL, 2);
 335         set_debugreg(0UL, 3);
 336         set_debugreg(0UL, 6);
 337         set_debugreg(0UL, 7);
 338
 339         fpu_init();
 340
 341         raw_local_save_flags(kernel_eflags);
 342 }