[PATCH] powerpc: Merge kexec
[linux-2.6/kvm.git] / include / asm-x86_64 / desc.h
blob33764869387bc1c5ad9a707df503e5eef0c8bedf
1 /* Written 2000 by Andi Kleen */
2 #ifndef __ARCH_DESC_H
3 #define __ARCH_DESC_H
5 #include <linux/threads.h>
6 #include <asm/ldt.h>
8 #ifndef __ASSEMBLY__
10 #include <linux/string.h>
11 #include <linux/smp.h>
13 #include <asm/segment.h>
14 #include <asm/mmu.h>
16 // 8 byte segment descriptor
17 struct desc_struct {
18 u16 limit0;
19 u16 base0;
20 unsigned base1 : 8, type : 4, s : 1, dpl : 2, p : 1;
21 unsigned limit : 4, avl : 1, l : 1, d : 1, g : 1, base2 : 8;
22 } __attribute__((packed));
24 struct n_desc_struct {
25 unsigned int a,b;
26 };
28 extern struct desc_struct cpu_gdt_table[NR_CPUS][GDT_ENTRIES];
30 enum {
31 GATE_INTERRUPT = 0xE,
32 GATE_TRAP = 0xF,
33 GATE_CALL = 0xC,
34 };
36 // 16byte gate
37 struct gate_struct {
38 u16 offset_low;
39 u16 segment;
40 unsigned ist : 3, zero0 : 5, type : 5, dpl : 2, p : 1;
41 u16 offset_middle;
42 u32 offset_high;
43 u32 zero1;
44 } __attribute__((packed));
46 #define PTR_LOW(x) ((unsigned long)(x) & 0xFFFF)
47 #define PTR_MIDDLE(x) (((unsigned long)(x) >> 16) & 0xFFFF)
48 #define PTR_HIGH(x) ((unsigned long)(x) >> 32)
50 enum {
51 DESC_TSS = 0x9,
52 DESC_LDT = 0x2,
53 };
55 // LDT or TSS descriptor in the GDT. 16 bytes.
56 struct ldttss_desc {
57 u16 limit0;
58 u16 base0;
59 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
60 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
61 u32 base3;
62 u32 zero1;
63 } __attribute__((packed));
65 struct desc_ptr {
66 unsigned short size;
67 unsigned long address;
68 } __attribute__((packed)) ;
70 #define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
71 #define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
72 #define clear_LDT() asm volatile("lldt %w0"::"r" (0))
75 * This is the ldt that every process will get unless we need
76 * something other than this.
78 extern struct desc_struct default_ldt[];
79 extern struct gate_struct idt_table[];
80 extern struct desc_ptr cpu_gdt_descr[];
82 static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist)
84 struct gate_struct s;
85 s.offset_low = PTR_LOW(func);
86 s.segment = __KERNEL_CS;
87 s.ist = ist;
88 s.p = 1;
89 s.dpl = dpl;
90 s.zero0 = 0;
91 s.zero1 = 0;
92 s.type = type;
93 s.offset_middle = PTR_MIDDLE(func);
94 s.offset_high = PTR_HIGH(func);
95 /* does not need to be atomic because it is only done once at setup time */
96 memcpy(adr, &s, 16);
99 static inline void set_intr_gate(int nr, void *func)
101 BUG_ON((unsigned)nr > 0xFF);
102 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0);
105 static inline void set_intr_gate_ist(int nr, void *func, unsigned ist)
107 BUG_ON((unsigned)nr > 0xFF);
108 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist);
111 static inline void set_system_gate(int nr, void *func)
113 BUG_ON((unsigned)nr > 0xFF);
114 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0);
117 static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned type,
118 unsigned size)
120 struct ldttss_desc d;
121 memset(&d,0,sizeof(d));
122 d.limit0 = size & 0xFFFF;
123 d.base0 = PTR_LOW(tss);
124 d.base1 = PTR_MIDDLE(tss) & 0xFF;
125 d.type = type;
126 d.p = 1;
127 d.limit1 = (size >> 16) & 0xF;
128 d.base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF;
129 d.base3 = PTR_HIGH(tss);
130 memcpy(ptr, &d, 16);
133 static inline void set_tss_desc(unsigned cpu, void *addr)
136 * sizeof(unsigned long) coming from an extra "long" at the end
137 * of the iobitmap. See tss_struct definition in processor.h
139 * -1? seg base+limit should be pointing to the address of the
140 * last valid byte
142 set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_TSS],
143 (unsigned long)addr, DESC_TSS,
144 IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1);
147 static inline void set_ldt_desc(unsigned cpu, void *addr, int size)
149 set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_LDT], (unsigned long)addr,
150 DESC_LDT, size * 8 - 1);
153 static inline void set_seg_base(unsigned cpu, int entry, void *base)
155 struct desc_struct *d = &cpu_gdt_table[cpu][entry];
156 u32 addr = (u32)(u64)base;
157 BUG_ON((u64)base >> 32);
158 d->base0 = addr & 0xffff;
159 d->base1 = (addr >> 16) & 0xff;
160 d->base2 = (addr >> 24) & 0xff;
163 #define LDT_entry_a(info) \
164 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
165 /* Don't allow setting of the lm bit. It is useless anyways because
166 64bit system calls require __USER_CS. */
167 #define LDT_entry_b(info) \
168 (((info)->base_addr & 0xff000000) | \
169 (((info)->base_addr & 0x00ff0000) >> 16) | \
170 ((info)->limit & 0xf0000) | \
171 (((info)->read_exec_only ^ 1) << 9) | \
172 ((info)->contents << 10) | \
173 (((info)->seg_not_present ^ 1) << 15) | \
174 ((info)->seg_32bit << 22) | \
175 ((info)->limit_in_pages << 23) | \
176 ((info)->useable << 20) | \
177 /* ((info)->lm << 21) | */ \
178 0x7000)
180 #define LDT_empty(info) (\
181 (info)->base_addr == 0 && \
182 (info)->limit == 0 && \
183 (info)->contents == 0 && \
184 (info)->read_exec_only == 1 && \
185 (info)->seg_32bit == 0 && \
186 (info)->limit_in_pages == 0 && \
187 (info)->seg_not_present == 1 && \
188 (info)->useable == 0 && \
189 (info)->lm == 0)
191 #if TLS_SIZE != 24
192 # error update this code.
193 #endif
195 static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
197 u64 *gdt = (u64 *)(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN);
198 gdt[0] = t->tls_array[0];
199 gdt[1] = t->tls_array[1];
200 gdt[2] = t->tls_array[2];
204 * load one particular LDT into the current CPU
206 static inline void load_LDT_nolock (mm_context_t *pc, int cpu)
208 int count = pc->size;
210 if (likely(!count)) {
211 clear_LDT();
212 return;
215 set_ldt_desc(cpu, pc->ldt, count);
216 load_LDT_desc();
219 static inline void load_LDT(mm_context_t *pc)
221 int cpu = get_cpu();
222 load_LDT_nolock(pc, cpu);
223 put_cpu();
226 extern struct desc_ptr idt_descr;
228 #endif /* !__ASSEMBLY__ */
230 #endif