arch/arm/plat-mxc/include/mach/uncompress.h

   1 /*
   2  *  arch/arm/plat-mxc/include/mach/uncompress.h
   3  *
   4  *
   5  *
   6  *  Copyright (C) 1999 ARM Limited
   7  *  Copyright (C) Shane Nay (shane@minirl.com)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  */
  23 #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
  24 #define __ASM_ARCH_MXC_UNCOMPRESS_H__
  25
  26 #define __MXC_BOOT_UNCOMPRESS
  27
  28 #include <mach/hardware.h>
  29 #include <asm/mach-types.h>
  30
  31 static unsigned long uart_base;
  32
  33 #define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
  34
  35 #define USR2 0x98
  36 #define USR2_TXFE (1<<14)
  37 #define TXR  0x40
  38 #define UCR1 0x80
  39 #define UCR1_UARTEN 1
  40
  41 /*
  42  * The following code assumes the serial port has already been
  43  * initialized by the bootloader.  We search for the first enabled
  44  * port in the most probable order.  If you didn't setup a port in
  45  * your bootloader then nothing will appear (which might be desired).
  46  *
  47  * This does not append a newline
  48  */
  49
  50 static void putc(int ch)
  51 {
  52         if (!uart_base)
  53                 return;
  54         if (!(UART(UCR1) & UCR1_UARTEN))
  55                 return;
  56
  57         while (!(UART(USR2) & USR2_TXFE))
  58                 barrier();
  59
  60         UART(TXR) = ch;
  61 }
  62
  63 #define flush() do { } while (0)
  64
  65 #define MX1_UART1_BASE_ADDR     0x00206000
  66 #define MX25_UART1_BASE_ADDR    0x43f90000
  67 #define MX2X_UART1_BASE_ADDR    0x1000a000
  68 #define MX3X_UART1_BASE_ADDR    0x43F90000
  69 #define MX3X_UART2_BASE_ADDR    0x43F94000
  70
  71 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
  72 {
  73         switch (arch_id) {
  74         case MACH_TYPE_MX1ADS:
  75         case MACH_TYPE_SCB9328:
  76                 uart_base = MX1_UART1_BASE_ADDR;
  77                 break;
  78         case MACH_TYPE_MX25_3DS:
  79                 uart_base = MX25_UART1_BASE_ADDR;
  80                 break;
  81         case MACH_TYPE_IMX27LITE:
  82         case MACH_TYPE_MX27_3DS:
  83         case MACH_TYPE_MX27ADS:
  84         case MACH_TYPE_PCM038:
  85         case MACH_TYPE_MX21ADS:
  86         case MACH_TYPE_PCA100:
  87                 uart_base = MX2X_UART1_BASE_ADDR;
  88                 break;
  89         case MACH_TYPE_MX31LITE:
  90         case MACH_TYPE_ARMADILLO5X0:
  91         case MACH_TYPE_MX31MOBOARD:
  92         case MACH_TYPE_QONG:
  93         case MACH_TYPE_MX31_3DS:
  94         case MACH_TYPE_PCM037:
  95         case MACH_TYPE_MX31ADS:
  96         case MACH_TYPE_MX35_3DS:
  97         case MACH_TYPE_PCM043:
  98         case MACH_TYPE_LILLY1131:
  99                 uart_base = MX3X_UART1_BASE_ADDR;
 100                 break;
 101         case MACH_TYPE_MAGX_ZN5:
 102                 uart_base = MX3X_UART2_BASE_ADDR;
 103                 break;
 104         default:
 105                 break;
 106         }
 107 }
 108
 109 #define arch_decomp_setup()     __arch_decomp_setup(arch_id)
 110 #define arch_decomp_wdog()
 111
 112 #endif                          /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */