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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6/kvm.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
blobefee4e39d2822bd479bc8dca3c8f8a776f3b89cf
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57 #include "iwl-agn.h"
58
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /*
67 * module name, copyright, version, etc.
68 */
69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70
71 #ifdef CONFIG_IWLWIFI_DEBUG
72 #define VD "d"
73 #else
74 #define VD
75 #endif
76
77 #define DRV_VERSION IWLWIFI_VERSION VD
78
79
80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
81 MODULE_VERSION(DRV_VERSION);
82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("iwl4965");
85
86 /*************** STATION TABLE MANAGEMENT ****
87 * mac80211 should be examined to determine if sta_info is duplicating
88 * the functionality provided here
89 */
90
91 /**************************************************************/
92
93 /**
94 * iwl_commit_rxon - commit staging_rxon to hardware
95 *
96 * The RXON command in staging_rxon is committed to the hardware and
97 * the active_rxon structure is updated with the new data. This
98 * function correctly transitions out of the RXON_ASSOC_MSK state if
99 * a HW tune is required based on the RXON structure changes.
100 */
101 int iwl_commit_rxon(struct iwl_priv *priv)
102 {
103 /* cast away the const for active_rxon in this function */
104 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
105 int ret;
106 bool new_assoc =
107 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
108
109 if (!iwl_is_alive(priv))
110 return -EBUSY;
111
112 /* always get timestamp with Rx frame */
113 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
114
115 ret = iwl_check_rxon_cmd(priv);
116 if (ret) {
117 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
118 return -EINVAL;
119 }
120
121 /*
122 * receive commit_rxon request
123 * abort any previous channel switch if still in process
124 */
125 if (priv->switch_rxon.switch_in_progress &&
126 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
127 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
128 le16_to_cpu(priv->switch_rxon.channel));
129 priv->switch_rxon.switch_in_progress = false;
130 }
131
132 /* If we don't need to send a full RXON, we can use
133 * iwl_rxon_assoc_cmd which is used to reconfigure filter
134 * and other flags for the current radio configuration. */
135 if (!iwl_full_rxon_required(priv)) {
136 ret = iwl_send_rxon_assoc(priv);
137 if (ret) {
138 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
139 return ret;
140 }
141
142 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
143 iwl_print_rx_config_cmd(priv);
144 return 0;
145 }
146
147 /* station table will be cleared */
148 priv->assoc_station_added = 0;
149
150 /* If we are currently associated and the new config requires
151 * an RXON_ASSOC and the new config wants the associated mask enabled,
152 * we must clear the associated from the active configuration
153 * before we apply the new config */
154 if (iwl_is_associated(priv) && new_assoc) {
155 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
156 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
157
158 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
159 sizeof(struct iwl_rxon_cmd),
160 &priv->active_rxon);
161
162 /* If the mask clearing failed then we set
163 * active_rxon back to what it was previously */
164 if (ret) {
165 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
166 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
167 return ret;
168 }
169 }
170
171 IWL_DEBUG_INFO(priv, "Sending RXON\n"
172 "* with%s RXON_FILTER_ASSOC_MSK\n"
173 "* channel = %d\n"
174 "* bssid = %pM\n",
175 (new_assoc ? "" : "out"),
176 le16_to_cpu(priv->staging_rxon.channel),
177 priv->staging_rxon.bssid_addr);
178
179 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
180
181 /* Apply the new configuration
182 * RXON unassoc clears the station table in uCode, send it before
183 * we add the bcast station. If assoc bit is set, we will send RXON
184 * after having added the bcast and bssid station.
185 */
186 if (!new_assoc) {
187 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
188 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
189 if (ret) {
190 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
191 return ret;
192 }
193 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
194 }
195
196 iwl_clear_stations_table(priv);
197
198 priv->start_calib = 0;
199
200 /* Add the broadcast address so we can send broadcast frames */
201 priv->cfg->ops->lib->add_bcast_station(priv);
202
203
204 /* If we have set the ASSOC_MSK and we are in BSS mode then
205 * add the IWL_AP_ID to the station rate table */
206 if (new_assoc) {
207 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
208 ret = iwl_rxon_add_station(priv,
209 priv->active_rxon.bssid_addr, 1);
210 if (ret == IWL_INVALID_STATION) {
211 IWL_ERR(priv,
212 "Error adding AP address for TX.\n");
213 return -EIO;
214 }
215 priv->assoc_station_added = 1;
216 if (priv->default_wep_key &&
217 iwl_send_static_wepkey_cmd(priv, 0))
218 IWL_ERR(priv,
219 "Could not send WEP static key.\n");
220 }
221
222 /*
223 * allow CTS-to-self if possible for new association.
224 * this is relevant only for 5000 series and up,
225 * but will not damage 4965
226 */
227 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
228
229 /* Apply the new configuration
230 * RXON assoc doesn't clear the station table in uCode,
231 */
232 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
233 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
234 if (ret) {
235 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
236 return ret;
237 }
238 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
239 }
240 iwl_print_rx_config_cmd(priv);
241
242 iwl_init_sensitivity(priv);
243
244 /* If we issue a new RXON command which required a tune then we must
245 * send a new TXPOWER command or we won't be able to Tx any frames */
246 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
247 if (ret) {
248 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
249 return ret;
250 }
251
252 return 0;
253 }
254
255 void iwl_update_chain_flags(struct iwl_priv *priv)
256 {
257
258 if (priv->cfg->ops->hcmd->set_rxon_chain)
259 priv->cfg->ops->hcmd->set_rxon_chain(priv);
260 iwlcore_commit_rxon(priv);
261 }
262
263 static void iwl_clear_free_frames(struct iwl_priv *priv)
264 {
265 struct list_head *element;
266
267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct iwl_frame, list));
274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282 }
283
284 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
285 {
286 struct iwl_frame *frame;
287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
291 IWL_ERR(priv, "Could not allocate frame!\n");
292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
301 return list_entry(element, struct iwl_frame, list);
302 }
303
304 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
305 {
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308 }
309
310 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
311 struct ieee80211_hdr *hdr,
312 int left)
313 {
314 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
315 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
316 (priv->iw_mode != NL80211_IFTYPE_AP)))
317 return 0;
318
319 if (priv->ibss_beacon->len > left)
320 return 0;
321
322 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
323
324 return priv->ibss_beacon->len;
325 }
326
327 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
328 static void iwl_set_beacon_tim(struct iwl_priv *priv,
329 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
330 u8 *beacon, u32 frame_size)
331 {
332 u16 tim_idx;
333 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
334
335 /*
336 * The index is relative to frame start but we start looking at the
337 * variable-length part of the beacon.
338 */
339 tim_idx = mgmt->u.beacon.variable - beacon;
340
341 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
342 while ((tim_idx < (frame_size - 2)) &&
343 (beacon[tim_idx] != WLAN_EID_TIM))
344 tim_idx += beacon[tim_idx+1] + 2;
345
346 /* If TIM field was found, set variables */
347 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
348 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
349 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
350 } else
351 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
352 }
353
354 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
355 struct iwl_frame *frame)
356 {
357 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
358 u32 frame_size;
359 u32 rate_flags;
360 u32 rate;
361 /*
362 * We have to set up the TX command, the TX Beacon command, and the
363 * beacon contents.
364 */
365
366 /* Initialize memory */
367 tx_beacon_cmd = &frame->u.beacon;
368 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
369
370 /* Set up TX beacon contents */
371 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
372 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
373 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
374 return 0;
375
376 /* Set up TX command fields */
377 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
378 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
379 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
380 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
381 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
382
383 /* Set up TX beacon command fields */
384 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
385 frame_size);
386
387 /* Set up packet rate and flags */
388 rate = iwl_rate_get_lowest_plcp(priv);
389 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
390 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
391 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
392 rate_flags |= RATE_MCS_CCK_MSK;
393 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
394 rate_flags);
395
396 return sizeof(*tx_beacon_cmd) + frame_size;
397 }
398 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
399 {
400 struct iwl_frame *frame;
401 unsigned int frame_size;
402 int rc;
403
404 frame = iwl_get_free_frame(priv);
405 if (!frame) {
406 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
407 "command.\n");
408 return -ENOMEM;
409 }
410
411 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
412 if (!frame_size) {
413 IWL_ERR(priv, "Error configuring the beacon command\n");
414 iwl_free_frame(priv, frame);
415 return -EINVAL;
416 }
417
418 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
419 &frame->u.cmd[0]);
420
421 iwl_free_frame(priv, frame);
422
423 return rc;
424 }
425
426 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
427 {
428 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
429
430 dma_addr_t addr = get_unaligned_le32(&tb->lo);
431 if (sizeof(dma_addr_t) > sizeof(u32))
432 addr |=
433 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
434
435 return addr;
436 }
437
438 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
439 {
440 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
441
442 return le16_to_cpu(tb->hi_n_len) >> 4;
443 }
444
445 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
446 dma_addr_t addr, u16 len)
447 {
448 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
449 u16 hi_n_len = len << 4;
450
451 put_unaligned_le32(addr, &tb->lo);
452 if (sizeof(dma_addr_t) > sizeof(u32))
453 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
454
455 tb->hi_n_len = cpu_to_le16(hi_n_len);
456
457 tfd->num_tbs = idx + 1;
458 }
459
460 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
461 {
462 return tfd->num_tbs & 0x1f;
463 }
464
465 /**
466 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
467 * @priv - driver private data
468 * @txq - tx queue
469 *
470 * Does NOT advance any TFD circular buffer read/write indexes
471 * Does NOT free the TFD itself (which is within circular buffer)
472 */
473 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
474 {
475 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 struct iwl_tfd *tfd;
477 struct pci_dev *dev = priv->pci_dev;
478 int index = txq->q.read_ptr;
479 int i;
480 int num_tbs;
481
482 tfd = &tfd_tmp[index];
483
484 /* Sanity check on number of chunks */
485 num_tbs = iwl_tfd_get_num_tbs(tfd);
486
487 if (num_tbs >= IWL_NUM_OF_TBS) {
488 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
489 /* @todo issue fatal error, it is quite serious situation */
490 return;
491 }
492
493 /* Unmap tx_cmd */
494 if (num_tbs)
495 pci_unmap_single(dev,
496 pci_unmap_addr(&txq->meta[index], mapping),
497 pci_unmap_len(&txq->meta[index], len),
498 PCI_DMA_BIDIRECTIONAL);
499
500 /* Unmap chunks, if any. */
501 for (i = 1; i < num_tbs; i++) {
502 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
503 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
504
505 if (txq->txb) {
506 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
507 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
508 }
509 }
510 }
511
512 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
513 struct iwl_tx_queue *txq,
514 dma_addr_t addr, u16 len,
515 u8 reset, u8 pad)
516 {
517 struct iwl_queue *q;
518 struct iwl_tfd *tfd, *tfd_tmp;
519 u32 num_tbs;
520
521 q = &txq->q;
522 tfd_tmp = (struct iwl_tfd *)txq->tfds;
523 tfd = &tfd_tmp[q->write_ptr];
524
525 if (reset)
526 memset(tfd, 0, sizeof(*tfd));
527
528 num_tbs = iwl_tfd_get_num_tbs(tfd);
529
530 /* Each TFD can point to a maximum 20 Tx buffers */
531 if (num_tbs >= IWL_NUM_OF_TBS) {
532 IWL_ERR(priv, "Error can not send more than %d chunks\n",
533 IWL_NUM_OF_TBS);
534 return -EINVAL;
535 }
536
537 BUG_ON(addr & ~DMA_BIT_MASK(36));
538 if (unlikely(addr & ~IWL_TX_DMA_MASK))
539 IWL_ERR(priv, "Unaligned address = %llx\n",
540 (unsigned long long)addr);
541
542 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
543
544 return 0;
545 }
546
547 /*
548 * Tell nic where to find circular buffer of Tx Frame Descriptors for
549 * given Tx queue, and enable the DMA channel used for that queue.
550 *
551 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
552 * channels supported in hardware.
553 */
554 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
555 struct iwl_tx_queue *txq)
556 {
557 int txq_id = txq->q.id;
558
559 /* Circular buffer (TFD queue in DRAM) physical base address */
560 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
561 txq->q.dma_addr >> 8);
562
563 return 0;
564 }
565
566 /******************************************************************************
567 *
568 * Generic RX handler implementations
569 *
570 ******************************************************************************/
571 static void iwl_rx_reply_alive(struct iwl_priv *priv,
572 struct iwl_rx_mem_buffer *rxb)
573 {
574 struct iwl_rx_packet *pkt = rxb_addr(rxb);
575 struct iwl_alive_resp *palive;
576 struct delayed_work *pwork;
577
578 palive = &pkt->u.alive_frame;
579
580 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
581 "0x%01X 0x%01X\n",
582 palive->is_valid, palive->ver_type,
583 palive->ver_subtype);
584
585 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
586 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
587 memcpy(&priv->card_alive_init,
588 &pkt->u.alive_frame,
589 sizeof(struct iwl_init_alive_resp));
590 pwork = &priv->init_alive_start;
591 } else {
592 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
593 memcpy(&priv->card_alive, &pkt->u.alive_frame,
594 sizeof(struct iwl_alive_resp));
595 pwork = &priv->alive_start;
596 }
597
598 /* We delay the ALIVE response by 5ms to
599 * give the HW RF Kill time to activate... */
600 if (palive->is_valid == UCODE_VALID_OK)
601 queue_delayed_work(priv->workqueue, pwork,
602 msecs_to_jiffies(5));
603 else
604 IWL_WARN(priv, "uCode did not respond OK.\n");
605 }
606
607 static void iwl_bg_beacon_update(struct work_struct *work)
608 {
609 struct iwl_priv *priv =
610 container_of(work, struct iwl_priv, beacon_update);
611 struct sk_buff *beacon;
612
613 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
614 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
615
616 if (!beacon) {
617 IWL_ERR(priv, "update beacon failed\n");
618 return;
619 }
620
621 mutex_lock(&priv->mutex);
622 /* new beacon skb is allocated every time; dispose previous.*/
623 if (priv->ibss_beacon)
624 dev_kfree_skb(priv->ibss_beacon);
625
626 priv->ibss_beacon = beacon;
627 mutex_unlock(&priv->mutex);
628
629 iwl_send_beacon_cmd(priv);
630 }
631
632 /**
633 * iwl_bg_statistics_periodic - Timer callback to queue statistics
634 *
635 * This callback is provided in order to send a statistics request.
636 *
637 * This timer function is continually reset to execute within
638 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
639 * was received. We need to ensure we receive the statistics in order
640 * to update the temperature used for calibrating the TXPOWER.
641 */
642 static void iwl_bg_statistics_periodic(unsigned long data)
643 {
644 struct iwl_priv *priv = (struct iwl_priv *)data;
645
646 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
647 return;
648
649 /* dont send host command if rf-kill is on */
650 if (!iwl_is_ready_rf(priv))
651 return;
652
653 iwl_send_statistics_request(priv, CMD_ASYNC, false);
654 }
655
656
657 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
658 u32 start_idx, u32 num_events,
659 u32 mode)
660 {
661 u32 i;
662 u32 ptr; /* SRAM byte address of log data */
663 u32 ev, time, data; /* event log data */
664 unsigned long reg_flags;
665
666 if (mode == 0)
667 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
668 else
669 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
670
671 /* Make sure device is powered up for SRAM reads */
672 spin_lock_irqsave(&priv->reg_lock, reg_flags);
673 if (iwl_grab_nic_access(priv)) {
674 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
675 return;
676 }
677
678 /* Set starting address; reads will auto-increment */
679 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
680 rmb();
681
682 /*
683 * "time" is actually "data" for mode 0 (no timestamp).
684 * place event id # at far right for easier visual parsing.
685 */
686 for (i = 0; i < num_events; i++) {
687 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
688 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
689 if (mode == 0) {
690 trace_iwlwifi_dev_ucode_cont_event(priv,
691 0, time, ev);
692 } else {
693 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
694 trace_iwlwifi_dev_ucode_cont_event(priv,
695 time, data, ev);
696 }
697 }
698 /* Allow device to power down */
699 iwl_release_nic_access(priv);
700 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
701 }
702
703 static void iwl_continuous_event_trace(struct iwl_priv *priv)
704 {
705 u32 capacity; /* event log capacity in # entries */
706 u32 base; /* SRAM byte address of event log header */
707 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
708 u32 num_wraps; /* # times uCode wrapped to top of log */
709 u32 next_entry; /* index of next entry to be written by uCode */
710
711 if (priv->ucode_type == UCODE_INIT)
712 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
713 else
714 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
715 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
716 capacity = iwl_read_targ_mem(priv, base);
717 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
718 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
719 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
720 } else
721 return;
722
723 if (num_wraps == priv->event_log.num_wraps) {
724 iwl_print_cont_event_trace(priv,
725 base, priv->event_log.next_entry,
726 next_entry - priv->event_log.next_entry,
727 mode);
728 priv->event_log.non_wraps_count++;
729 } else {
730 if ((num_wraps - priv->event_log.num_wraps) > 1)
731 priv->event_log.wraps_more_count++;
732 else
733 priv->event_log.wraps_once_count++;
734 trace_iwlwifi_dev_ucode_wrap_event(priv,
735 num_wraps - priv->event_log.num_wraps,
736 next_entry, priv->event_log.next_entry);
737 if (next_entry < priv->event_log.next_entry) {
738 iwl_print_cont_event_trace(priv, base,
739 priv->event_log.next_entry,
740 capacity - priv->event_log.next_entry,
741 mode);
742
743 iwl_print_cont_event_trace(priv, base, 0,
744 next_entry, mode);
745 } else {
746 iwl_print_cont_event_trace(priv, base,
747 next_entry, capacity - next_entry,
748 mode);
749
750 iwl_print_cont_event_trace(priv, base, 0,
751 next_entry, mode);
752 }
753 }
754 priv->event_log.num_wraps = num_wraps;
755 priv->event_log.next_entry = next_entry;
756 }
757
758 /**
759 * iwl_bg_ucode_trace - Timer callback to log ucode event
760 *
761 * The timer is continually set to execute every
762 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
763 * this function is to perform continuous uCode event logging operation
764 * if enabled
765 */
766 static void iwl_bg_ucode_trace(unsigned long data)
767 {
768 struct iwl_priv *priv = (struct iwl_priv *)data;
769
770 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
771 return;
772
773 if (priv->event_log.ucode_trace) {
774 iwl_continuous_event_trace(priv);
775 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
776 mod_timer(&priv->ucode_trace,
777 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
778 }
779 }
780
781 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
782 struct iwl_rx_mem_buffer *rxb)
783 {
784 #ifdef CONFIG_IWLWIFI_DEBUG
785 struct iwl_rx_packet *pkt = rxb_addr(rxb);
786 struct iwl4965_beacon_notif *beacon =
787 (struct iwl4965_beacon_notif *)pkt->u.raw;
788 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
789
790 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
791 "tsf %d %d rate %d\n",
792 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
793 beacon->beacon_notify_hdr.failure_frame,
794 le32_to_cpu(beacon->ibss_mgr_status),
795 le32_to_cpu(beacon->high_tsf),
796 le32_to_cpu(beacon->low_tsf), rate);
797 #endif
798
799 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
800 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
801 queue_work(priv->workqueue, &priv->beacon_update);
802 }
803
804 /* Handle notification from uCode that card's power state is changing
805 * due to software, hardware, or critical temperature RFKILL */
806 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
807 struct iwl_rx_mem_buffer *rxb)
808 {
809 struct iwl_rx_packet *pkt = rxb_addr(rxb);
810 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
811 unsigned long status = priv->status;
812
813 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
814 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
815 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
816 (flags & CT_CARD_DISABLED) ?
817 "Reached" : "Not reached");
818
819 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
820 CT_CARD_DISABLED)) {
821
822 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
823 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
824
825 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
826 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
827
828 if (!(flags & RXON_CARD_DISABLED)) {
829 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
830 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
831 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
832 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
833 }
834 if (flags & CT_CARD_DISABLED)
835 iwl_tt_enter_ct_kill(priv);
836 }
837 if (!(flags & CT_CARD_DISABLED))
838 iwl_tt_exit_ct_kill(priv);
839
840 if (flags & HW_CARD_DISABLED)
841 set_bit(STATUS_RF_KILL_HW, &priv->status);
842 else
843 clear_bit(STATUS_RF_KILL_HW, &priv->status);
844
845
846 if (!(flags & RXON_CARD_DISABLED))
847 iwl_scan_cancel(priv);
848
849 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
850 test_bit(STATUS_RF_KILL_HW, &priv->status)))
851 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
852 test_bit(STATUS_RF_KILL_HW, &priv->status));
853 else
854 wake_up_interruptible(&priv->wait_command_queue);
855 }
856
857 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
858 {
859 if (src == IWL_PWR_SRC_VAUX) {
860 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
861 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
862 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
863 ~APMG_PS_CTRL_MSK_PWR_SRC);
864 } else {
865 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
866 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
867 ~APMG_PS_CTRL_MSK_PWR_SRC);
868 }
869
870 return 0;
871 }
872
873 /**
874 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
875 *
876 * Setup the RX handlers for each of the reply types sent from the uCode
877 * to the host.
878 *
879 * This function chains into the hardware specific files for them to setup
880 * any hardware specific handlers as well.
881 */
882 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
883 {
884 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
885 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
886 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
887 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
888 iwl_rx_spectrum_measure_notif;
889 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
890 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
891 iwl_rx_pm_debug_statistics_notif;
892 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
893
894 /*
895 * The same handler is used for both the REPLY to a discrete
896 * statistics request from the host as well as for the periodic
897 * statistics notifications (after received beacons) from the uCode.
898 */
899 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
900 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
901
902 iwl_setup_rx_scan_handlers(priv);
903
904 /* status change handler */
905 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
906
907 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
908 iwl_rx_missed_beacon_notif;
909 /* Rx handlers */
910 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
911 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
912 /* block ack */
913 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
914 /* Set up hardware specific Rx handlers */
915 priv->cfg->ops->lib->rx_handler_setup(priv);
916 }
917
918 /**
919 * iwl_rx_handle - Main entry function for receiving responses from uCode
920 *
921 * Uses the priv->rx_handlers callback function array to invoke
922 * the appropriate handlers, including command responses,
923 * frame-received notifications, and other notifications.
924 */
925 void iwl_rx_handle(struct iwl_priv *priv)
926 {
927 struct iwl_rx_mem_buffer *rxb;
928 struct iwl_rx_packet *pkt;
929 struct iwl_rx_queue *rxq = &priv->rxq;
930 u32 r, i;
931 int reclaim;
932 unsigned long flags;
933 u8 fill_rx = 0;
934 u32 count = 8;
935 int total_empty;
936
937 /* uCode's read index (stored in shared DRAM) indicates the last Rx
938 * buffer that the driver may process (last buffer filled by ucode). */
939 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
940 i = rxq->read;
941
942 /* Rx interrupt, but nothing sent from uCode */
943 if (i == r)
944 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
945
946 /* calculate total frames need to be restock after handling RX */
947 total_empty = r - rxq->write_actual;
948 if (total_empty < 0)
949 total_empty += RX_QUEUE_SIZE;
950
951 if (total_empty > (RX_QUEUE_SIZE / 2))
952 fill_rx = 1;
953
954 while (i != r) {
955 rxb = rxq->queue[i];
956
957 /* If an RXB doesn't have a Rx queue slot associated with it,
958 * then a bug has been introduced in the queue refilling
959 * routines -- catch it here */
960 BUG_ON(rxb == NULL);
961
962 rxq->queue[i] = NULL;
963
964 pci_unmap_page(priv->pci_dev, rxb->page_dma,
965 PAGE_SIZE << priv->hw_params.rx_page_order,
966 PCI_DMA_FROMDEVICE);
967 pkt = rxb_addr(rxb);
968
969 trace_iwlwifi_dev_rx(priv, pkt,
970 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
971
972 /* Reclaim a command buffer only if this packet is a response
973 * to a (driver-originated) command.
974 * If the packet (e.g. Rx frame) originated from uCode,
975 * there is no command buffer to reclaim.
976 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
977 * but apparently a few don't get set; catch them here. */
978 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
979 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
980 (pkt->hdr.cmd != REPLY_RX) &&
981 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
982 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
983 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
984 (pkt->hdr.cmd != REPLY_TX);
985
986 /* Based on type of command response or notification,
987 * handle those that need handling via function in
988 * rx_handlers table. See iwl_setup_rx_handlers() */
989 if (priv->rx_handlers[pkt->hdr.cmd]) {
990 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
991 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
992 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
993 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
994 } else {
995 /* No handling needed */
996 IWL_DEBUG_RX(priv,
997 "r %d i %d No handler needed for %s, 0x%02x\n",
998 r, i, get_cmd_string(pkt->hdr.cmd),
999 pkt->hdr.cmd);
1000 }
1001
1002 /*
1003 * XXX: After here, we should always check rxb->page
1004 * against NULL before touching it or its virtual
1005 * memory (pkt). Because some rx_handler might have
1006 * already taken or freed the pages.
1007 */
1008
1009 if (reclaim) {
1010 /* Invoke any callbacks, transfer the buffer to caller,
1011 * and fire off the (possibly) blocking iwl_send_cmd()
1012 * as we reclaim the driver command queue */
1013 if (rxb->page)
1014 iwl_tx_cmd_complete(priv, rxb);
1015 else
1016 IWL_WARN(priv, "Claim null rxb?\n");
1017 }
1018
1019 /* Reuse the page if possible. For notification packets and
1020 * SKBs that fail to Rx correctly, add them back into the
1021 * rx_free list for reuse later. */
1022 spin_lock_irqsave(&rxq->lock, flags);
1023 if (rxb->page != NULL) {
1024 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1025 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1026 PCI_DMA_FROMDEVICE);
1027 list_add_tail(&rxb->list, &rxq->rx_free);
1028 rxq->free_count++;
1029 } else
1030 list_add_tail(&rxb->list, &rxq->rx_used);
1031
1032 spin_unlock_irqrestore(&rxq->lock, flags);
1033
1034 i = (i + 1) & RX_QUEUE_MASK;
1035 /* If there are a lot of unused frames,
1036 * restock the Rx queue so ucode wont assert. */
1037 if (fill_rx) {
1038 count++;
1039 if (count >= 8) {
1040 rxq->read = i;
1041 iwl_rx_replenish_now(priv);
1042 count = 0;
1043 }
1044 }
1045 }
1046
1047 /* Backtrack one entry */
1048 rxq->read = i;
1049 if (fill_rx)
1050 iwl_rx_replenish_now(priv);
1051 else
1052 iwl_rx_queue_restock(priv);
1053 }
1054
1055 /* call this function to flush any scheduled tasklet */
1056 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1057 {
1058 /* wait to make sure we flush pending tasklet*/
1059 synchronize_irq(priv->pci_dev->irq);
1060 tasklet_kill(&priv->irq_tasklet);
1061 }
1062
1063 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1064 {
1065 u32 inta, handled = 0;
1066 u32 inta_fh;
1067 unsigned long flags;
1068 u32 i;
1069 #ifdef CONFIG_IWLWIFI_DEBUG
1070 u32 inta_mask;
1071 #endif
1072
1073 spin_lock_irqsave(&priv->lock, flags);
1074
1075 /* Ack/clear/reset pending uCode interrupts.
1076 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1077 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1078 inta = iwl_read32(priv, CSR_INT);
1079 iwl_write32(priv, CSR_INT, inta);
1080
1081 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1082 * Any new interrupts that happen after this, either while we're
1083 * in this tasklet, or later, will show up in next ISR/tasklet. */
1084 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1085 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1086
1087 #ifdef CONFIG_IWLWIFI_DEBUG
1088 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1089 /* just for debug */
1090 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1091 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1092 inta, inta_mask, inta_fh);
1093 }
1094 #endif
1095
1096 spin_unlock_irqrestore(&priv->lock, flags);
1097
1098 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1099 * atomic, make sure that inta covers all the interrupts that
1100 * we've discovered, even if FH interrupt came in just after
1101 * reading CSR_INT. */
1102 if (inta_fh & CSR49_FH_INT_RX_MASK)
1103 inta |= CSR_INT_BIT_FH_RX;
1104 if (inta_fh & CSR49_FH_INT_TX_MASK)
1105 inta |= CSR_INT_BIT_FH_TX;
1106
1107 /* Now service all interrupt bits discovered above. */
1108 if (inta & CSR_INT_BIT_HW_ERR) {
1109 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1110
1111 /* Tell the device to stop sending interrupts */
1112 iwl_disable_interrupts(priv);
1113
1114 priv->isr_stats.hw++;
1115 iwl_irq_handle_error(priv);
1116
1117 handled |= CSR_INT_BIT_HW_ERR;
1118
1119 return;
1120 }
1121
1122 #ifdef CONFIG_IWLWIFI_DEBUG
1123 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1124 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1125 if (inta & CSR_INT_BIT_SCD) {
1126 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1127 "the frame/frames.\n");
1128 priv->isr_stats.sch++;
1129 }
1130
1131 /* Alive notification via Rx interrupt will do the real work */
1132 if (inta & CSR_INT_BIT_ALIVE) {
1133 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1134 priv->isr_stats.alive++;
1135 }
1136 }
1137 #endif
1138 /* Safely ignore these bits for debug checks below */
1139 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1140
1141 /* HW RF KILL switch toggled */
1142 if (inta & CSR_INT_BIT_RF_KILL) {
1143 int hw_rf_kill = 0;
1144 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1145 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1146 hw_rf_kill = 1;
1147
1148 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1149 hw_rf_kill ? "disable radio" : "enable radio");
1150
1151 priv->isr_stats.rfkill++;
1152
1153 /* driver only loads ucode once setting the interface up.
1154 * the driver allows loading the ucode even if the radio
1155 * is killed. Hence update the killswitch state here. The
1156 * rfkill handler will care about restarting if needed.
1157 */
1158 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1159 if (hw_rf_kill)
1160 set_bit(STATUS_RF_KILL_HW, &priv->status);
1161 else
1162 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1163 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1164 }
1165
1166 handled |= CSR_INT_BIT_RF_KILL;
1167 }
1168
1169 /* Chip got too hot and stopped itself */
1170 if (inta & CSR_INT_BIT_CT_KILL) {
1171 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1172 priv->isr_stats.ctkill++;
1173 handled |= CSR_INT_BIT_CT_KILL;
1174 }
1175
1176 /* Error detected by uCode */
1177 if (inta & CSR_INT_BIT_SW_ERR) {
1178 IWL_ERR(priv, "Microcode SW error detected. "
1179 " Restarting 0x%X.\n", inta);
1180 priv->isr_stats.sw++;
1181 priv->isr_stats.sw_err = inta;
1182 iwl_irq_handle_error(priv);
1183 handled |= CSR_INT_BIT_SW_ERR;
1184 }
1185
1186 /*
1187 * uCode wakes up after power-down sleep.
1188 * Tell device about any new tx or host commands enqueued,
1189 * and about any Rx buffers made available while asleep.
1190 */
1191 if (inta & CSR_INT_BIT_WAKEUP) {
1192 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1193 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1194 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1195 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1196 priv->isr_stats.wakeup++;
1197 handled |= CSR_INT_BIT_WAKEUP;
1198 }
1199
1200 /* All uCode command responses, including Tx command responses,
1201 * Rx "responses" (frame-received notification), and other
1202 * notifications from uCode come through here*/
1203 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1204 iwl_rx_handle(priv);
1205 priv->isr_stats.rx++;
1206 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1207 }
1208
1209 /* This "Tx" DMA channel is used only for loading uCode */
1210 if (inta & CSR_INT_BIT_FH_TX) {
1211 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1212 priv->isr_stats.tx++;
1213 handled |= CSR_INT_BIT_FH_TX;
1214 /* Wake up uCode load routine, now that load is complete */
1215 priv->ucode_write_complete = 1;
1216 wake_up_interruptible(&priv->wait_command_queue);
1217 }
1218
1219 if (inta & ~handled) {
1220 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1221 priv->isr_stats.unhandled++;
1222 }
1223
1224 if (inta & ~(priv->inta_mask)) {
1225 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1226 inta & ~priv->inta_mask);
1227 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1228 }
1229
1230 /* Re-enable all interrupts */
1231 /* only Re-enable if diabled by irq */
1232 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1233 iwl_enable_interrupts(priv);
1234
1235 #ifdef CONFIG_IWLWIFI_DEBUG
1236 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1237 inta = iwl_read32(priv, CSR_INT);
1238 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1239 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1240 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1241 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1242 }
1243 #endif
1244 }
1245
1246 /* tasklet for iwlagn interrupt */
1247 static void iwl_irq_tasklet(struct iwl_priv *priv)
1248 {
1249 u32 inta = 0;
1250 u32 handled = 0;
1251 unsigned long flags;
1252 u32 i;
1253 #ifdef CONFIG_IWLWIFI_DEBUG
1254 u32 inta_mask;
1255 #endif
1256
1257 spin_lock_irqsave(&priv->lock, flags);
1258
1259 /* Ack/clear/reset pending uCode interrupts.
1260 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1261 */
1262 iwl_write32(priv, CSR_INT, priv->_agn.inta);
1263
1264 inta = priv->_agn.inta;
1265
1266 #ifdef CONFIG_IWLWIFI_DEBUG
1267 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1268 /* just for debug */
1269 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1270 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1271 inta, inta_mask);
1272 }
1273 #endif
1274
1275 spin_unlock_irqrestore(&priv->lock, flags);
1276
1277 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1278 priv->_agn.inta = 0;
1279
1280 /* Now service all interrupt bits discovered above. */
1281 if (inta & CSR_INT_BIT_HW_ERR) {
1282 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1283
1284 /* Tell the device to stop sending interrupts */
1285 iwl_disable_interrupts(priv);
1286
1287 priv->isr_stats.hw++;
1288 iwl_irq_handle_error(priv);
1289
1290 handled |= CSR_INT_BIT_HW_ERR;
1291
1292 return;
1293 }
1294
1295 #ifdef CONFIG_IWLWIFI_DEBUG
1296 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1297 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1298 if (inta & CSR_INT_BIT_SCD) {
1299 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1300 "the frame/frames.\n");
1301 priv->isr_stats.sch++;
1302 }
1303
1304 /* Alive notification via Rx interrupt will do the real work */
1305 if (inta & CSR_INT_BIT_ALIVE) {
1306 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1307 priv->isr_stats.alive++;
1308 }
1309 }
1310 #endif
1311 /* Safely ignore these bits for debug checks below */
1312 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1313
1314 /* HW RF KILL switch toggled */
1315 if (inta & CSR_INT_BIT_RF_KILL) {
1316 int hw_rf_kill = 0;
1317 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1318 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1319 hw_rf_kill = 1;
1320
1321 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1322 hw_rf_kill ? "disable radio" : "enable radio");
1323
1324 priv->isr_stats.rfkill++;
1325
1326 /* driver only loads ucode once setting the interface up.
1327 * the driver allows loading the ucode even if the radio
1328 * is killed. Hence update the killswitch state here. The
1329 * rfkill handler will care about restarting if needed.
1330 */
1331 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1332 if (hw_rf_kill)
1333 set_bit(STATUS_RF_KILL_HW, &priv->status);
1334 else
1335 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1336 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1337 }
1338
1339 handled |= CSR_INT_BIT_RF_KILL;
1340 }
1341
1342 /* Chip got too hot and stopped itself */
1343 if (inta & CSR_INT_BIT_CT_KILL) {
1344 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1345 priv->isr_stats.ctkill++;
1346 handled |= CSR_INT_BIT_CT_KILL;
1347 }
1348
1349 /* Error detected by uCode */
1350 if (inta & CSR_INT_BIT_SW_ERR) {
1351 IWL_ERR(priv, "Microcode SW error detected. "
1352 " Restarting 0x%X.\n", inta);
1353 priv->isr_stats.sw++;
1354 priv->isr_stats.sw_err = inta;
1355 iwl_irq_handle_error(priv);
1356 handled |= CSR_INT_BIT_SW_ERR;
1357 }
1358
1359 /* uCode wakes up after power-down sleep */
1360 if (inta & CSR_INT_BIT_WAKEUP) {
1361 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1362 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1363 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1364 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1365
1366 priv->isr_stats.wakeup++;
1367
1368 handled |= CSR_INT_BIT_WAKEUP;
1369 }
1370
1371 /* All uCode command responses, including Tx command responses,
1372 * Rx "responses" (frame-received notification), and other
1373 * notifications from uCode come through here*/
1374 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1375 CSR_INT_BIT_RX_PERIODIC)) {
1376 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1377 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1378 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1379 iwl_write32(priv, CSR_FH_INT_STATUS,
1380 CSR49_FH_INT_RX_MASK);
1381 }
1382 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1383 handled |= CSR_INT_BIT_RX_PERIODIC;
1384 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1385 }
1386 /* Sending RX interrupt require many steps to be done in the
1387 * the device:
1388 * 1- write interrupt to current index in ICT table.
1389 * 2- dma RX frame.
1390 * 3- update RX shared data to indicate last write index.
1391 * 4- send interrupt.
1392 * This could lead to RX race, driver could receive RX interrupt
1393 * but the shared data changes does not reflect this;
1394 * periodic interrupt will detect any dangling Rx activity.
1395 */
1396
1397 /* Disable periodic interrupt; we use it as just a one-shot. */
1398 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1399 CSR_INT_PERIODIC_DIS);
1400 iwl_rx_handle(priv);
1401
1402 /*
1403 * Enable periodic interrupt in 8 msec only if we received
1404 * real RX interrupt (instead of just periodic int), to catch
1405 * any dangling Rx interrupt. If it was just the periodic
1406 * interrupt, there was no dangling Rx activity, and no need
1407 * to extend the periodic interrupt; one-shot is enough.
1408 */
1409 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1410 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1411 CSR_INT_PERIODIC_ENA);
1412
1413 priv->isr_stats.rx++;
1414 }
1415
1416 /* This "Tx" DMA channel is used only for loading uCode */
1417 if (inta & CSR_INT_BIT_FH_TX) {
1418 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1419 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1420 priv->isr_stats.tx++;
1421 handled |= CSR_INT_BIT_FH_TX;
1422 /* Wake up uCode load routine, now that load is complete */
1423 priv->ucode_write_complete = 1;
1424 wake_up_interruptible(&priv->wait_command_queue);
1425 }
1426
1427 if (inta & ~handled) {
1428 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1429 priv->isr_stats.unhandled++;
1430 }
1431
1432 if (inta & ~(priv->inta_mask)) {
1433 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1434 inta & ~priv->inta_mask);
1435 }
1436
1437 /* Re-enable all interrupts */
1438 /* only Re-enable if diabled by irq */
1439 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1440 iwl_enable_interrupts(priv);
1441 }
1442
1443
1444 /******************************************************************************
1445 *
1446 * uCode download functions
1447 *
1448 ******************************************************************************/
1449
1450 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1451 {
1452 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1453 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1454 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1458 }
1459
1460 static void iwl_nic_start(struct iwl_priv *priv)
1461 {
1462 /* Remove all resets to allow NIC to operate */
1463 iwl_write32(priv, CSR_RESET, 0);
1464 }
1465
1466
1467 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1468 static int iwl_mac_setup_register(struct iwl_priv *priv);
1469
1470 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1471 {
1472 const char *name_pre = priv->cfg->fw_name_pre;
1473
1474 if (first)
1475 priv->fw_index = priv->cfg->ucode_api_max;
1476 else
1477 priv->fw_index--;
1478
1479 if (priv->fw_index < priv->cfg->ucode_api_min) {
1480 IWL_ERR(priv, "no suitable firmware found!\n");
1481 return -ENOENT;
1482 }
1483
1484 sprintf(priv->firmware_name, "%s%d%s",
1485 name_pre, priv->fw_index, ".ucode");
1486
1487 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1488 priv->firmware_name);
1489
1490 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1491 &priv->pci_dev->dev, GFP_KERNEL, priv,
1492 iwl_ucode_callback);
1493 }
1494
1495 /**
1496 * iwl_ucode_callback - callback when firmware was loaded
1497 *
1498 * If loaded successfully, copies the firmware into buffers
1499 * for the card to fetch (via DMA).
1500 */
1501 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1502 {
1503 struct iwl_priv *priv = context;
1504 struct iwl_ucode_header *ucode;
1505 const unsigned int api_max = priv->cfg->ucode_api_max;
1506 const unsigned int api_min = priv->cfg->ucode_api_min;
1507 u8 *src;
1508 size_t len;
1509 u32 api_ver, build;
1510 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1511 int err;
1512 u16 eeprom_ver;
1513
1514 if (!ucode_raw) {
1515 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1516 priv->firmware_name);
1517 goto try_again;
1518 }
1519
1520 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1521 priv->firmware_name, ucode_raw->size);
1522
1523 /* Make sure that we got at least the v1 header! */
1524 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1525 IWL_ERR(priv, "File size way too small!\n");
1526 goto try_again;
1527 }
1528
1529 /* Data from ucode file: header followed by uCode images */
1530 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1531
1532 priv->ucode_ver = le32_to_cpu(ucode->ver);
1533 api_ver = IWL_UCODE_API(priv->ucode_ver);
1534 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1535 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1536 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1537 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1538 init_data_size =
1539 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1540 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1541 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1542
1543 /* api_ver should match the api version forming part of the
1544 * firmware filename ... but we don't check for that and only rely
1545 * on the API version read from firmware header from here on forward */
1546
1547 if (api_ver < api_min || api_ver > api_max) {
1548 IWL_ERR(priv, "Driver unable to support your firmware API. "
1549 "Driver supports v%u, firmware is v%u.\n",
1550 api_max, api_ver);
1551 goto try_again;
1552 }
1553
1554 if (api_ver != api_max)
1555 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1556 "got v%u. New firmware can be obtained "
1557 "from http://www.intellinuxwireless.org.\n",
1558 api_max, api_ver);
1559
1560 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1561 IWL_UCODE_MAJOR(priv->ucode_ver),
1562 IWL_UCODE_MINOR(priv->ucode_ver),
1563 IWL_UCODE_API(priv->ucode_ver),
1564 IWL_UCODE_SERIAL(priv->ucode_ver));
1565
1566 snprintf(priv->hw->wiphy->fw_version,
1567 sizeof(priv->hw->wiphy->fw_version),
1568 "%u.%u.%u.%u",
1569 IWL_UCODE_MAJOR(priv->ucode_ver),
1570 IWL_UCODE_MINOR(priv->ucode_ver),
1571 IWL_UCODE_API(priv->ucode_ver),
1572 IWL_UCODE_SERIAL(priv->ucode_ver));
1573
1574 if (build)
1575 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1576
1577 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1578 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1579 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1580 ? "OTP" : "EEPROM", eeprom_ver);
1581
1582 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1583 priv->ucode_ver);
1584 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1585 inst_size);
1586 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1587 data_size);
1588 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1589 init_size);
1590 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1591 init_data_size);
1592 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1593 boot_size);
1594
1595 /*
1596 * For any of the failures below (before allocating pci memory)
1597 * we will try to load a version with a smaller API -- maybe the
1598 * user just got a corrupted version of the latest API.
1599 */
1600
1601 /* Verify size of file vs. image size info in file's header */
1602 if (ucode_raw->size !=
1603 priv->cfg->ops->ucode->get_header_size(api_ver) +
1604 inst_size + data_size + init_size +
1605 init_data_size + boot_size) {
1606
1607 IWL_DEBUG_INFO(priv,
1608 "uCode file size %d does not match expected size\n",
1609 (int)ucode_raw->size);
1610 goto try_again;
1611 }
1612
1613 /* Verify that uCode images will fit in card's SRAM */
1614 if (inst_size > priv->hw_params.max_inst_size) {
1615 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1616 inst_size);
1617 goto try_again;
1618 }
1619
1620 if (data_size > priv->hw_params.max_data_size) {
1621 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1622 data_size);
1623 goto try_again;
1624 }
1625 if (init_size > priv->hw_params.max_inst_size) {
1626 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1627 init_size);
1628 goto try_again;
1629 }
1630 if (init_data_size > priv->hw_params.max_data_size) {
1631 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1632 init_data_size);
1633 goto try_again;
1634 }
1635 if (boot_size > priv->hw_params.max_bsm_size) {
1636 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1637 boot_size);
1638 goto try_again;
1639 }
1640
1641 /* Allocate ucode buffers for card's bus-master loading ... */
1642
1643 /* Runtime instructions and 2 copies of data:
1644 * 1) unmodified from disk
1645 * 2) backup cache for save/restore during power-downs */
1646 priv->ucode_code.len = inst_size;
1647 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1648
1649 priv->ucode_data.len = data_size;
1650 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1651
1652 priv->ucode_data_backup.len = data_size;
1653 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1654
1655 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1656 !priv->ucode_data_backup.v_addr)
1657 goto err_pci_alloc;
1658
1659 /* Initialization instructions and data */
1660 if (init_size && init_data_size) {
1661 priv->ucode_init.len = init_size;
1662 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1663
1664 priv->ucode_init_data.len = init_data_size;
1665 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1666
1667 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1668 goto err_pci_alloc;
1669 }
1670
1671 /* Bootstrap (instructions only, no data) */
1672 if (boot_size) {
1673 priv->ucode_boot.len = boot_size;
1674 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1675
1676 if (!priv->ucode_boot.v_addr)
1677 goto err_pci_alloc;
1678 }
1679
1680 /* Copy images into buffers for card's bus-master reads ... */
1681
1682 /* Runtime instructions (first block of data in file) */
1683 len = inst_size;
1684 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1685 memcpy(priv->ucode_code.v_addr, src, len);
1686 src += len;
1687
1688 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1689 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1690
1691 /* Runtime data (2nd block)
1692 * NOTE: Copy into backup buffer will be done in iwl_up() */
1693 len = data_size;
1694 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1695 memcpy(priv->ucode_data.v_addr, src, len);
1696 memcpy(priv->ucode_data_backup.v_addr, src, len);
1697 src += len;
1698
1699 /* Initialization instructions (3rd block) */
1700 if (init_size) {
1701 len = init_size;
1702 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1703 len);
1704 memcpy(priv->ucode_init.v_addr, src, len);
1705 src += len;
1706 }
1707
1708 /* Initialization data (4th block) */
1709 if (init_data_size) {
1710 len = init_data_size;
1711 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1712 len);
1713 memcpy(priv->ucode_init_data.v_addr, src, len);
1714 src += len;
1715 }
1716
1717 /* Bootstrap instructions (5th block) */
1718 len = boot_size;
1719 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1720 memcpy(priv->ucode_boot.v_addr, src, len);
1721
1722 /**************************************************
1723 * This is still part of probe() in a sense...
1724 *
1725 * 9. Setup and register with mac80211 and debugfs
1726 **************************************************/
1727 err = iwl_mac_setup_register(priv);
1728 if (err)
1729 goto out_unbind;
1730
1731 err = iwl_dbgfs_register(priv, DRV_NAME);
1732 if (err)
1733 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1734
1735 /* We have our copies now, allow OS release its copies */
1736 release_firmware(ucode_raw);
1737 return;
1738
1739 try_again:
1740 /* try next, if any */
1741 if (iwl_request_firmware(priv, false))
1742 goto out_unbind;
1743 release_firmware(ucode_raw);
1744 return;
1745
1746 err_pci_alloc:
1747 IWL_ERR(priv, "failed to allocate pci memory\n");
1748 iwl_dealloc_ucode_pci(priv);
1749 out_unbind:
1750 device_release_driver(&priv->pci_dev->dev);
1751 release_firmware(ucode_raw);
1752 }
1753
1754 static const char *desc_lookup_text[] = {
1755 "OK",
1756 "FAIL",
1757 "BAD_PARAM",
1758 "BAD_CHECKSUM",
1759 "NMI_INTERRUPT_WDG",
1760 "SYSASSERT",
1761 "FATAL_ERROR",
1762 "BAD_COMMAND",
1763 "HW_ERROR_TUNE_LOCK",
1764 "HW_ERROR_TEMPERATURE",
1765 "ILLEGAL_CHAN_FREQ",
1766 "VCC_NOT_STABLE",
1767 "FH_ERROR",
1768 "NMI_INTERRUPT_HOST",
1769 "NMI_INTERRUPT_ACTION_PT",
1770 "NMI_INTERRUPT_UNKNOWN",
1771 "UCODE_VERSION_MISMATCH",
1772 "HW_ERROR_ABS_LOCK",
1773 "HW_ERROR_CAL_LOCK_FAIL",
1774 "NMI_INTERRUPT_INST_ACTION_PT",
1775 "NMI_INTERRUPT_DATA_ACTION_PT",
1776 "NMI_TRM_HW_ER",
1777 "NMI_INTERRUPT_TRM",
1778 "NMI_INTERRUPT_BREAK_POINT"
1779 "DEBUG_0",
1780 "DEBUG_1",
1781 "DEBUG_2",
1782 "DEBUG_3",
1783 "ADVANCED SYSASSERT"
1784 };
1785
1786 static const char *desc_lookup(int i)
1787 {
1788 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1789
1790 if (i < 0 || i > max)
1791 i = max;
1792
1793 return desc_lookup_text[i];
1794 }
1795
1796 #define ERROR_START_OFFSET (1 * sizeof(u32))
1797 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1798
1799 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1800 {
1801 u32 data2, line;
1802 u32 desc, time, count, base, data1;
1803 u32 blink1, blink2, ilink1, ilink2;
1804
1805 if (priv->ucode_type == UCODE_INIT)
1806 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1807 else
1808 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1809
1810 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1811 IWL_ERR(priv,
1812 "Not valid error log pointer 0x%08X for %s uCode\n",
1813 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1814 return;
1815 }
1816
1817 count = iwl_read_targ_mem(priv, base);
1818
1819 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1820 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1821 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1822 priv->status, count);
1823 }
1824
1825 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1826 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1827 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1828 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1829 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1830 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1831 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1832 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1833 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1834
1835 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1836 blink1, blink2, ilink1, ilink2);
1837
1838 IWL_ERR(priv, "Desc Time "
1839 "data1 data2 line\n");
1840 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1841 desc_lookup(desc), desc, time, data1, data2, line);
1842 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1843 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1844 ilink1, ilink2);
1845
1846 }
1847
1848 #define EVENT_START_OFFSET (4 * sizeof(u32))
1849
1850 /**
1851 * iwl_print_event_log - Dump error event log to syslog
1852 *
1853 */
1854 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1855 u32 num_events, u32 mode,
1856 int pos, char **buf, size_t bufsz)
1857 {
1858 u32 i;
1859 u32 base; /* SRAM byte address of event log header */
1860 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1861 u32 ptr; /* SRAM byte address of log data */
1862 u32 ev, time, data; /* event log data */
1863 unsigned long reg_flags;
1864
1865 if (num_events == 0)
1866 return pos;
1867 if (priv->ucode_type == UCODE_INIT)
1868 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1869 else
1870 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1871
1872 if (mode == 0)
1873 event_size = 2 * sizeof(u32);
1874 else
1875 event_size = 3 * sizeof(u32);
1876
1877 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1878
1879 /* Make sure device is powered up for SRAM reads */
1880 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1881 iwl_grab_nic_access(priv);
1882
1883 /* Set starting address; reads will auto-increment */
1884 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1885 rmb();
1886
1887 /* "time" is actually "data" for mode 0 (no timestamp).
1888 * place event id # at far right for easier visual parsing. */
1889 for (i = 0; i < num_events; i++) {
1890 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1891 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1892 if (mode == 0) {
1893 /* data, ev */
1894 if (bufsz) {
1895 pos += scnprintf(*buf + pos, bufsz - pos,
1896 "EVT_LOG:0x%08x:%04u\n",
1897 time, ev);
1898 } else {
1899 trace_iwlwifi_dev_ucode_event(priv, 0,
1900 time, ev);
1901 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1902 time, ev);
1903 }
1904 } else {
1905 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1906 if (bufsz) {
1907 pos += scnprintf(*buf + pos, bufsz - pos,
1908 "EVT_LOGT:%010u:0x%08x:%04u\n",
1909 time, data, ev);
1910 } else {
1911 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1912 time, data, ev);
1913 trace_iwlwifi_dev_ucode_event(priv, time,
1914 data, ev);
1915 }
1916 }
1917 }
1918
1919 /* Allow device to power down */
1920 iwl_release_nic_access(priv);
1921 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1922 return pos;
1923 }
1924
1925 /**
1926 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1927 */
1928 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1929 u32 num_wraps, u32 next_entry,
1930 u32 size, u32 mode,
1931 int pos, char **buf, size_t bufsz)
1932 {
1933 /*
1934 * display the newest DEFAULT_LOG_ENTRIES entries
1935 * i.e the entries just before the next ont that uCode would fill.
1936 */
1937 if (num_wraps) {
1938 if (next_entry < size) {
1939 pos = iwl_print_event_log(priv,
1940 capacity - (size - next_entry),
1941 size - next_entry, mode,
1942 pos, buf, bufsz);
1943 pos = iwl_print_event_log(priv, 0,
1944 next_entry, mode,
1945 pos, buf, bufsz);
1946 } else
1947 pos = iwl_print_event_log(priv, next_entry - size,
1948 size, mode, pos, buf, bufsz);
1949 } else {
1950 if (next_entry < size) {
1951 pos = iwl_print_event_log(priv, 0, next_entry,
1952 mode, pos, buf, bufsz);
1953 } else {
1954 pos = iwl_print_event_log(priv, next_entry - size,
1955 size, mode, pos, buf, bufsz);
1956 }
1957 }
1958 return pos;
1959 }
1960
1961 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1962 #define MAX_EVENT_LOG_SIZE (512)
1963
1964 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1965
1966 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1967 char **buf, bool display)
1968 {
1969 u32 base; /* SRAM byte address of event log header */
1970 u32 capacity; /* event log capacity in # entries */
1971 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1972 u32 num_wraps; /* # times uCode wrapped to top of log */
1973 u32 next_entry; /* index of next entry to be written by uCode */
1974 u32 size; /* # entries that we'll print */
1975 int pos = 0;
1976 size_t bufsz = 0;
1977
1978 if (priv->ucode_type == UCODE_INIT)
1979 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1980 else
1981 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1982
1983 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1984 IWL_ERR(priv,
1985 "Invalid event log pointer 0x%08X for %s uCode\n",
1986 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1987 return -EINVAL;
1988 }
1989
1990 /* event log header */
1991 capacity = iwl_read_targ_mem(priv, base);
1992 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1993 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1994 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1995
1996 if (capacity > MAX_EVENT_LOG_SIZE) {
1997 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1998 capacity, MAX_EVENT_LOG_SIZE);
1999 capacity = MAX_EVENT_LOG_SIZE;
2000 }
2001
2002 if (next_entry > MAX_EVENT_LOG_SIZE) {
2003 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2004 next_entry, MAX_EVENT_LOG_SIZE);
2005 next_entry = MAX_EVENT_LOG_SIZE;
2006 }
2007
2008 size = num_wraps ? capacity : next_entry;
2009
2010 /* bail out if nothing in log */
2011 if (size == 0) {
2012 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2013 return pos;
2014 }
2015
2016 #ifdef CONFIG_IWLWIFI_DEBUG
2017 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2018 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2019 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2020 #else
2021 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2022 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2023 #endif
2024 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2025 size);
2026
2027 #ifdef CONFIG_IWLWIFI_DEBUG
2028 if (display) {
2029 if (full_log)
2030 bufsz = capacity * 48;
2031 else
2032 bufsz = size * 48;
2033 *buf = kmalloc(bufsz, GFP_KERNEL);
2034 if (!*buf)
2035 return -ENOMEM;
2036 }
2037 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2038 /*
2039 * if uCode has wrapped back to top of log,
2040 * start at the oldest entry,
2041 * i.e the next one that uCode would fill.
2042 */
2043 if (num_wraps)
2044 pos = iwl_print_event_log(priv, next_entry,
2045 capacity - next_entry, mode,
2046 pos, buf, bufsz);
2047 /* (then/else) start at top of log */
2048 pos = iwl_print_event_log(priv, 0,
2049 next_entry, mode, pos, buf, bufsz);
2050 } else
2051 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2052 next_entry, size, mode,
2053 pos, buf, bufsz);
2054 #else
2055 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2056 next_entry, size, mode,
2057 pos, buf, bufsz);
2058 #endif
2059 return pos;
2060 }
2061
2062 /**
2063 * iwl_alive_start - called after REPLY_ALIVE notification received
2064 * from protocol/runtime uCode (initialization uCode's
2065 * Alive gets handled by iwl_init_alive_start()).
2066 */
2067 static void iwl_alive_start(struct iwl_priv *priv)
2068 {
2069 int ret = 0;
2070
2071 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2072
2073 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2074 /* We had an error bringing up the hardware, so take it
2075 * all the way back down so we can try again */
2076 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2077 goto restart;
2078 }
2079
2080 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2081 * This is a paranoid check, because we would not have gotten the
2082 * "runtime" alive if code weren't properly loaded. */
2083 if (iwl_verify_ucode(priv)) {
2084 /* Runtime instruction load was bad;
2085 * take it all the way back down so we can try again */
2086 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2087 goto restart;
2088 }
2089
2090 iwl_clear_stations_table(priv);
2091 ret = priv->cfg->ops->lib->alive_notify(priv);
2092 if (ret) {
2093 IWL_WARN(priv,
2094 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2095 goto restart;
2096 }
2097
2098 /* After the ALIVE response, we can send host commands to the uCode */
2099 set_bit(STATUS_ALIVE, &priv->status);
2100
2101 if (iwl_is_rfkill(priv))
2102 return;
2103
2104 ieee80211_wake_queues(priv->hw);
2105
2106 priv->active_rate = IWL_RATES_MASK;
2107
2108 /* Configure Tx antenna selection based on H/W config */
2109 if (priv->cfg->ops->hcmd->set_tx_ant)
2110 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2111
2112 if (iwl_is_associated(priv)) {
2113 struct iwl_rxon_cmd *active_rxon =
2114 (struct iwl_rxon_cmd *)&priv->active_rxon;
2115 /* apply any changes in staging */
2116 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2117 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2118 } else {
2119 /* Initialize our rx_config data */
2120 iwl_connection_init_rx_config(priv, priv->iw_mode);
2121
2122 if (priv->cfg->ops->hcmd->set_rxon_chain)
2123 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2124
2125 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2126 }
2127
2128 /* Configure Bluetooth device coexistence support */
2129 iwl_send_bt_config(priv);
2130
2131 iwl_reset_run_time_calib(priv);
2132
2133 /* Configure the adapter for unassociated operation */
2134 iwlcore_commit_rxon(priv);
2135
2136 /* At this point, the NIC is initialized and operational */
2137 iwl_rf_kill_ct_config(priv);
2138
2139 iwl_leds_init(priv);
2140
2141 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2142 set_bit(STATUS_READY, &priv->status);
2143 wake_up_interruptible(&priv->wait_command_queue);
2144
2145 iwl_power_update_mode(priv, true);
2146
2147 return;
2148
2149 restart:
2150 queue_work(priv->workqueue, &priv->restart);
2151 }
2152
2153 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2154
2155 static void __iwl_down(struct iwl_priv *priv)
2156 {
2157 unsigned long flags;
2158 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2159
2160 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2161
2162 if (!exit_pending)
2163 set_bit(STATUS_EXIT_PENDING, &priv->status);
2164
2165 iwl_clear_stations_table(priv);
2166
2167 /* Unblock any waiting calls */
2168 wake_up_interruptible_all(&priv->wait_command_queue);
2169
2170 /* Wipe out the EXIT_PENDING status bit if we are not actually
2171 * exiting the module */
2172 if (!exit_pending)
2173 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2174
2175 /* stop and reset the on-board processor */
2176 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2177
2178 /* tell the device to stop sending interrupts */
2179 spin_lock_irqsave(&priv->lock, flags);
2180 iwl_disable_interrupts(priv);
2181 spin_unlock_irqrestore(&priv->lock, flags);
2182 iwl_synchronize_irq(priv);
2183
2184 if (priv->mac80211_registered)
2185 ieee80211_stop_queues(priv->hw);
2186
2187 /* If we have not previously called iwl_init() then
2188 * clear all bits but the RF Kill bit and return */
2189 if (!iwl_is_init(priv)) {
2190 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2191 STATUS_RF_KILL_HW |
2192 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2193 STATUS_GEO_CONFIGURED |
2194 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2195 STATUS_EXIT_PENDING;
2196 goto exit;
2197 }
2198
2199 /* ...otherwise clear out all the status bits but the RF Kill
2200 * bit and continue taking the NIC down. */
2201 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2202 STATUS_RF_KILL_HW |
2203 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2204 STATUS_GEO_CONFIGURED |
2205 test_bit(STATUS_FW_ERROR, &priv->status) <<
2206 STATUS_FW_ERROR |
2207 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2208 STATUS_EXIT_PENDING;
2209
2210 /* device going down, Stop using ICT table */
2211 iwl_disable_ict(priv);
2212
2213 iwl_txq_ctx_stop(priv);
2214 iwl_rxq_stop(priv);
2215
2216 /* Power-down device's busmaster DMA clocks */
2217 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2218 udelay(5);
2219
2220 /* Make sure (redundant) we've released our request to stay awake */
2221 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2222
2223 /* Stop the device, and put it in low power state */
2224 priv->cfg->ops->lib->apm_ops.stop(priv);
2225
2226 exit:
2227 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2228
2229 if (priv->ibss_beacon)
2230 dev_kfree_skb(priv->ibss_beacon);
2231 priv->ibss_beacon = NULL;
2232
2233 /* clear out any free frames */
2234 iwl_clear_free_frames(priv);
2235 }
2236
2237 static void iwl_down(struct iwl_priv *priv)
2238 {
2239 mutex_lock(&priv->mutex);
2240 __iwl_down(priv);
2241 mutex_unlock(&priv->mutex);
2242
2243 iwl_cancel_deferred_work(priv);
2244 }
2245
2246 #define HW_READY_TIMEOUT (50)
2247
2248 static int iwl_set_hw_ready(struct iwl_priv *priv)
2249 {
2250 int ret = 0;
2251
2252 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2253 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2254
2255 /* See if we got it */
2256 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2257 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2258 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2259 HW_READY_TIMEOUT);
2260 if (ret != -ETIMEDOUT)
2261 priv->hw_ready = true;
2262 else
2263 priv->hw_ready = false;
2264
2265 IWL_DEBUG_INFO(priv, "hardware %s\n",
2266 (priv->hw_ready == 1) ? "ready" : "not ready");
2267 return ret;
2268 }
2269
2270 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2271 {
2272 int ret = 0;
2273
2274 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2275
2276 ret = iwl_set_hw_ready(priv);
2277 if (priv->hw_ready)
2278 return ret;
2279
2280 /* If HW is not ready, prepare the conditions to check again */
2281 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2282 CSR_HW_IF_CONFIG_REG_PREPARE);
2283
2284 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2285 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2286 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2287
2288 /* HW should be ready by now, check again. */
2289 if (ret != -ETIMEDOUT)
2290 iwl_set_hw_ready(priv);
2291
2292 return ret;
2293 }
2294
2295 #define MAX_HW_RESTARTS 5
2296
2297 static int __iwl_up(struct iwl_priv *priv)
2298 {
2299 int i;
2300 int ret;
2301
2302 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2303 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2304 return -EIO;
2305 }
2306
2307 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2308 IWL_ERR(priv, "ucode not available for device bringup\n");
2309 return -EIO;
2310 }
2311
2312 iwl_prepare_card_hw(priv);
2313
2314 if (!priv->hw_ready) {
2315 IWL_WARN(priv, "Exit HW not ready\n");
2316 return -EIO;
2317 }
2318
2319 /* If platform's RF_KILL switch is NOT set to KILL */
2320 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2321 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2322 else
2323 set_bit(STATUS_RF_KILL_HW, &priv->status);
2324
2325 if (iwl_is_rfkill(priv)) {
2326 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2327
2328 iwl_enable_interrupts(priv);
2329 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2330 return 0;
2331 }
2332
2333 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2334
2335 ret = iwl_hw_nic_init(priv);
2336 if (ret) {
2337 IWL_ERR(priv, "Unable to init nic\n");
2338 return ret;
2339 }
2340
2341 /* make sure rfkill handshake bits are cleared */
2342 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2343 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2344 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2345
2346 /* clear (again), then enable host interrupts */
2347 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2348 iwl_enable_interrupts(priv);
2349
2350 /* really make sure rfkill handshake bits are cleared */
2351 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2352 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2353
2354 /* Copy original ucode data image from disk into backup cache.
2355 * This will be used to initialize the on-board processor's
2356 * data SRAM for a clean start when the runtime program first loads. */
2357 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2358 priv->ucode_data.len);
2359
2360 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2361
2362 iwl_clear_stations_table(priv);
2363
2364 /* load bootstrap state machine,
2365 * load bootstrap program into processor's memory,
2366 * prepare to load the "initialize" uCode */
2367 ret = priv->cfg->ops->lib->load_ucode(priv);
2368
2369 if (ret) {
2370 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2371 ret);
2372 continue;
2373 }
2374
2375 /* start card; "initialize" will load runtime ucode */
2376 iwl_nic_start(priv);
2377
2378 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2379
2380 return 0;
2381 }
2382
2383 set_bit(STATUS_EXIT_PENDING, &priv->status);
2384 __iwl_down(priv);
2385 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2386
2387 /* tried to restart and config the device for as long as our
2388 * patience could withstand */
2389 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2390 return -EIO;
2391 }
2392
2393
2394 /*****************************************************************************
2395 *
2396 * Workqueue callbacks
2397 *
2398 *****************************************************************************/
2399
2400 static void iwl_bg_init_alive_start(struct work_struct *data)
2401 {
2402 struct iwl_priv *priv =
2403 container_of(data, struct iwl_priv, init_alive_start.work);
2404
2405 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2406 return;
2407
2408 mutex_lock(&priv->mutex);
2409 priv->cfg->ops->lib->init_alive_start(priv);
2410 mutex_unlock(&priv->mutex);
2411 }
2412
2413 static void iwl_bg_alive_start(struct work_struct *data)
2414 {
2415 struct iwl_priv *priv =
2416 container_of(data, struct iwl_priv, alive_start.work);
2417
2418 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2419 return;
2420
2421 /* enable dram interrupt */
2422 iwl_reset_ict(priv);
2423
2424 mutex_lock(&priv->mutex);
2425 iwl_alive_start(priv);
2426 mutex_unlock(&priv->mutex);
2427 }
2428
2429 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2430 {
2431 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2432 run_time_calib_work);
2433
2434 mutex_lock(&priv->mutex);
2435
2436 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2437 test_bit(STATUS_SCANNING, &priv->status)) {
2438 mutex_unlock(&priv->mutex);
2439 return;
2440 }
2441
2442 if (priv->start_calib) {
2443 iwl_chain_noise_calibration(priv, &priv->statistics);
2444
2445 iwl_sensitivity_calibration(priv, &priv->statistics);
2446 }
2447
2448 mutex_unlock(&priv->mutex);
2449 return;
2450 }
2451
2452 static void iwl_bg_restart(struct work_struct *data)
2453 {
2454 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2455
2456 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2457 return;
2458
2459 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2460 mutex_lock(&priv->mutex);
2461 priv->vif = NULL;
2462 priv->is_open = 0;
2463 mutex_unlock(&priv->mutex);
2464 iwl_down(priv);
2465 ieee80211_restart_hw(priv->hw);
2466 } else {
2467 iwl_down(priv);
2468
2469 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2470 return;
2471
2472 mutex_lock(&priv->mutex);
2473 __iwl_up(priv);
2474 mutex_unlock(&priv->mutex);
2475 }
2476 }
2477
2478 static void iwl_bg_rx_replenish(struct work_struct *data)
2479 {
2480 struct iwl_priv *priv =
2481 container_of(data, struct iwl_priv, rx_replenish);
2482
2483 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2484 return;
2485
2486 mutex_lock(&priv->mutex);
2487 iwl_rx_replenish(priv);
2488 mutex_unlock(&priv->mutex);
2489 }
2490
2491 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2492
2493 void iwl_post_associate(struct iwl_priv *priv)
2494 {
2495 struct ieee80211_conf *conf = NULL;
2496 int ret = 0;
2497 unsigned long flags;
2498
2499 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2500 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2501 return;
2502 }
2503
2504 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2505 priv->assoc_id, priv->active_rxon.bssid_addr);
2506
2507
2508 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2509 return;
2510
2511
2512 if (!priv->vif || !priv->is_open)
2513 return;
2514
2515 iwl_scan_cancel_timeout(priv, 200);
2516
2517 conf = ieee80211_get_hw_conf(priv->hw);
2518
2519 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2520 iwlcore_commit_rxon(priv);
2521
2522 iwl_setup_rxon_timing(priv);
2523 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2524 sizeof(priv->rxon_timing), &priv->rxon_timing);
2525 if (ret)
2526 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2527 "Attempting to continue.\n");
2528
2529 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2530
2531 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2532
2533 if (priv->cfg->ops->hcmd->set_rxon_chain)
2534 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2535
2536 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2537
2538 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2539 priv->assoc_id, priv->beacon_int);
2540
2541 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2542 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2543 else
2544 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2545
2546 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2547 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2548 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2549 else
2550 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2551
2552 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2553 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2554
2555 }
2556
2557 iwlcore_commit_rxon(priv);
2558
2559 switch (priv->iw_mode) {
2560 case NL80211_IFTYPE_STATION:
2561 break;
2562
2563 case NL80211_IFTYPE_ADHOC:
2564
2565 /* assume default assoc id */
2566 priv->assoc_id = 1;
2567
2568 iwl_rxon_add_station(priv, priv->bssid, 0);
2569 iwl_send_beacon_cmd(priv);
2570
2571 break;
2572
2573 default:
2574 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2575 __func__, priv->iw_mode);
2576 break;
2577 }
2578
2579 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2580 priv->assoc_station_added = 1;
2581
2582 spin_lock_irqsave(&priv->lock, flags);
2583 iwl_activate_qos(priv, 0);
2584 spin_unlock_irqrestore(&priv->lock, flags);
2585
2586 /* the chain noise calibration will enabled PM upon completion
2587 * If chain noise has already been run, then we need to enable
2588 * power management here */
2589 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2590 iwl_power_update_mode(priv, false);
2591
2592 /* Enable Rx differential gain and sensitivity calibrations */
2593 iwl_chain_noise_reset(priv);
2594 priv->start_calib = 1;
2595
2596 }
2597
2598 /*****************************************************************************
2599 *
2600 * mac80211 entry point functions
2601 *
2602 *****************************************************************************/
2603
2604 #define UCODE_READY_TIMEOUT (4 * HZ)
2605
2606 /*
2607 * Not a mac80211 entry point function, but it fits in with all the
2608 * other mac80211 functions grouped here.
2609 */
2610 static int iwl_mac_setup_register(struct iwl_priv *priv)
2611 {
2612 int ret;
2613 struct ieee80211_hw *hw = priv->hw;
2614 hw->rate_control_algorithm = "iwl-agn-rs";
2615
2616 /* Tell mac80211 our characteristics */
2617 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2618 IEEE80211_HW_NOISE_DBM |
2619 IEEE80211_HW_AMPDU_AGGREGATION |
2620 IEEE80211_HW_SPECTRUM_MGMT;
2621
2622 if (!priv->cfg->broken_powersave)
2623 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2624 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2625
2626 if (priv->cfg->sku & IWL_SKU_N)
2627 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2628 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2629
2630 hw->sta_data_size = sizeof(struct iwl_station_priv);
2631 hw->wiphy->interface_modes =
2632 BIT(NL80211_IFTYPE_STATION) |
2633 BIT(NL80211_IFTYPE_ADHOC);
2634
2635 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2636 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2637
2638 /*
2639 * For now, disable PS by default because it affects
2640 * RX performance significantly.
2641 */
2642 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2643
2644 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2645 /* we create the 802.11 header and a zero-length SSID element */
2646 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2647
2648 /* Default value; 4 EDCA QOS priorities */
2649 hw->queues = 4;
2650
2651 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2652
2653 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2654 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2655 &priv->bands[IEEE80211_BAND_2GHZ];
2656 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2657 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2658 &priv->bands[IEEE80211_BAND_5GHZ];
2659
2660 ret = ieee80211_register_hw(priv->hw);
2661 if (ret) {
2662 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2663 return ret;
2664 }
2665 priv->mac80211_registered = 1;
2666
2667 return 0;
2668 }
2669
2670
2671 static int iwl_mac_start(struct ieee80211_hw *hw)
2672 {
2673 struct iwl_priv *priv = hw->priv;
2674 int ret;
2675
2676 IWL_DEBUG_MAC80211(priv, "enter\n");
2677
2678 /* we should be verifying the device is ready to be opened */
2679 mutex_lock(&priv->mutex);
2680 ret = __iwl_up(priv);
2681 mutex_unlock(&priv->mutex);
2682
2683 if (ret)
2684 return ret;
2685
2686 if (iwl_is_rfkill(priv))
2687 goto out;
2688
2689 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2690
2691 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2692 * mac80211 will not be run successfully. */
2693 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2694 test_bit(STATUS_READY, &priv->status),
2695 UCODE_READY_TIMEOUT);
2696 if (!ret) {
2697 if (!test_bit(STATUS_READY, &priv->status)) {
2698 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2699 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2700 return -ETIMEDOUT;
2701 }
2702 }
2703
2704 iwl_led_start(priv);
2705
2706 out:
2707 priv->is_open = 1;
2708 IWL_DEBUG_MAC80211(priv, "leave\n");
2709 return 0;
2710 }
2711
2712 static void iwl_mac_stop(struct ieee80211_hw *hw)
2713 {
2714 struct iwl_priv *priv = hw->priv;
2715
2716 IWL_DEBUG_MAC80211(priv, "enter\n");
2717
2718 if (!priv->is_open)
2719 return;
2720
2721 priv->is_open = 0;
2722
2723 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2724 /* stop mac, cancel any scan request and clear
2725 * RXON_FILTER_ASSOC_MSK BIT
2726 */
2727 mutex_lock(&priv->mutex);
2728 iwl_scan_cancel_timeout(priv, 100);
2729 mutex_unlock(&priv->mutex);
2730 }
2731
2732 iwl_down(priv);
2733
2734 flush_workqueue(priv->workqueue);
2735
2736 /* enable interrupts again in order to receive rfkill changes */
2737 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2738 iwl_enable_interrupts(priv);
2739
2740 IWL_DEBUG_MAC80211(priv, "leave\n");
2741 }
2742
2743 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2744 {
2745 struct iwl_priv *priv = hw->priv;
2746
2747 IWL_DEBUG_MACDUMP(priv, "enter\n");
2748
2749 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2750 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2751
2752 if (iwl_tx_skb(priv, skb))
2753 dev_kfree_skb_any(skb);
2754
2755 IWL_DEBUG_MACDUMP(priv, "leave\n");
2756 return NETDEV_TX_OK;
2757 }
2758
2759 void iwl_config_ap(struct iwl_priv *priv)
2760 {
2761 int ret = 0;
2762 unsigned long flags;
2763
2764 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2765 return;
2766
2767 /* The following should be done only at AP bring up */
2768 if (!iwl_is_associated(priv)) {
2769
2770 /* RXON - unassoc (to set timing command) */
2771 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2772 iwlcore_commit_rxon(priv);
2773
2774 /* RXON Timing */
2775 iwl_setup_rxon_timing(priv);
2776 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2777 sizeof(priv->rxon_timing), &priv->rxon_timing);
2778 if (ret)
2779 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2780 "Attempting to continue.\n");
2781
2782 /* AP has all antennas */
2783 priv->chain_noise_data.active_chains =
2784 priv->hw_params.valid_rx_ant;
2785 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2786 if (priv->cfg->ops->hcmd->set_rxon_chain)
2787 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2788
2789 /* FIXME: what should be the assoc_id for AP? */
2790 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2791 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2792 priv->staging_rxon.flags |=
2793 RXON_FLG_SHORT_PREAMBLE_MSK;
2794 else
2795 priv->staging_rxon.flags &=
2796 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2797
2798 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2799 if (priv->assoc_capability &
2800 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2801 priv->staging_rxon.flags |=
2802 RXON_FLG_SHORT_SLOT_MSK;
2803 else
2804 priv->staging_rxon.flags &=
2805 ~RXON_FLG_SHORT_SLOT_MSK;
2806
2807 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2808 priv->staging_rxon.flags &=
2809 ~RXON_FLG_SHORT_SLOT_MSK;
2810 }
2811 /* restore RXON assoc */
2812 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2813 iwlcore_commit_rxon(priv);
2814 iwl_reset_qos(priv);
2815 spin_lock_irqsave(&priv->lock, flags);
2816 iwl_activate_qos(priv, 1);
2817 spin_unlock_irqrestore(&priv->lock, flags);
2818 iwl_add_bcast_station(priv);
2819 }
2820 iwl_send_beacon_cmd(priv);
2821
2822 /* FIXME - we need to add code here to detect a totally new
2823 * configuration, reset the AP, unassoc, rxon timing, assoc,
2824 * clear sta table, add BCAST sta... */
2825 }
2826
2827 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2828 struct ieee80211_vif *vif,
2829 struct ieee80211_key_conf *keyconf,
2830 struct ieee80211_sta *sta,
2831 u32 iv32, u16 *phase1key)
2832 {
2833
2834 struct iwl_priv *priv = hw->priv;
2835 IWL_DEBUG_MAC80211(priv, "enter\n");
2836
2837 iwl_update_tkip_key(priv, keyconf,
2838 sta ? sta->addr : iwl_bcast_addr,
2839 iv32, phase1key);
2840
2841 IWL_DEBUG_MAC80211(priv, "leave\n");
2842 }
2843
2844 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2845 struct ieee80211_vif *vif,
2846 struct ieee80211_sta *sta,
2847 struct ieee80211_key_conf *key)
2848 {
2849 struct iwl_priv *priv = hw->priv;
2850 const u8 *addr;
2851 int ret;
2852 u8 sta_id;
2853 bool is_default_wep_key = false;
2854
2855 IWL_DEBUG_MAC80211(priv, "enter\n");
2856
2857 if (priv->cfg->mod_params->sw_crypto) {
2858 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2859 return -EOPNOTSUPP;
2860 }
2861 addr = sta ? sta->addr : iwl_bcast_addr;
2862 sta_id = iwl_find_station(priv, addr);
2863 if (sta_id == IWL_INVALID_STATION) {
2864 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2865 addr);
2866 return -EINVAL;
2867
2868 }
2869
2870 mutex_lock(&priv->mutex);
2871 iwl_scan_cancel_timeout(priv, 100);
2872
2873 /* If we are getting WEP group key and we didn't receive any key mapping
2874 * so far, we are in legacy wep mode (group key only), otherwise we are
2875 * in 1X mode.
2876 * In legacy wep mode, we use another host command to the uCode */
2877 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2878 priv->iw_mode != NL80211_IFTYPE_AP) {
2879 if (cmd == SET_KEY)
2880 is_default_wep_key = !priv->key_mapping_key;
2881 else
2882 is_default_wep_key =
2883 (key->hw_key_idx == HW_KEY_DEFAULT);
2884 }
2885
2886 switch (cmd) {
2887 case SET_KEY:
2888 if (is_default_wep_key)
2889 ret = iwl_set_default_wep_key(priv, key);
2890 else
2891 ret = iwl_set_dynamic_key(priv, key, sta_id);
2892
2893 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2894 break;
2895 case DISABLE_KEY:
2896 if (is_default_wep_key)
2897 ret = iwl_remove_default_wep_key(priv, key);
2898 else
2899 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2900
2901 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2902 break;
2903 default:
2904 ret = -EINVAL;
2905 }
2906
2907 mutex_unlock(&priv->mutex);
2908 IWL_DEBUG_MAC80211(priv, "leave\n");
2909
2910 return ret;
2911 }
2912
2913 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2914 struct ieee80211_vif *vif,
2915 enum ieee80211_ampdu_mlme_action action,
2916 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2917 {
2918 struct iwl_priv *priv = hw->priv;
2919 int ret;
2920
2921 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2922 sta->addr, tid);
2923
2924 if (!(priv->cfg->sku & IWL_SKU_N))
2925 return -EACCES;
2926
2927 switch (action) {
2928 case IEEE80211_AMPDU_RX_START:
2929 IWL_DEBUG_HT(priv, "start Rx\n");
2930 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2931 case IEEE80211_AMPDU_RX_STOP:
2932 IWL_DEBUG_HT(priv, "stop Rx\n");
2933 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2934 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2935 return 0;
2936 else
2937 return ret;
2938 case IEEE80211_AMPDU_TX_START:
2939 IWL_DEBUG_HT(priv, "start Tx\n");
2940 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2941 case IEEE80211_AMPDU_TX_STOP:
2942 IWL_DEBUG_HT(priv, "stop Tx\n");
2943 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2944 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2945 return 0;
2946 else
2947 return ret;
2948 case IEEE80211_AMPDU_TX_OPERATIONAL:
2949 /* do nothing */
2950 return -EOPNOTSUPP;
2951 default:
2952 IWL_DEBUG_HT(priv, "unknown\n");
2953 return -EINVAL;
2954 break;
2955 }
2956 return 0;
2957 }
2958
2959 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2960 struct ieee80211_low_level_stats *stats)
2961 {
2962 struct iwl_priv *priv = hw->priv;
2963
2964 priv = hw->priv;
2965 IWL_DEBUG_MAC80211(priv, "enter\n");
2966 IWL_DEBUG_MAC80211(priv, "leave\n");
2967
2968 return 0;
2969 }
2970
2971 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2972 struct ieee80211_vif *vif,
2973 enum sta_notify_cmd cmd,
2974 struct ieee80211_sta *sta)
2975 {
2976 struct iwl_priv *priv = hw->priv;
2977 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2978 int sta_id;
2979
2980 /*
2981 * TODO: We really should use this callback to
2982 * actually maintain the station table in
2983 * the device.
2984 */
2985
2986 switch (cmd) {
2987 case STA_NOTIFY_ADD:
2988 atomic_set(&sta_priv->pending_frames, 0);
2989 if (vif->type == NL80211_IFTYPE_AP)
2990 sta_priv->client = true;
2991 break;
2992 case STA_NOTIFY_SLEEP:
2993 WARN_ON(!sta_priv->client);
2994 sta_priv->asleep = true;
2995 if (atomic_read(&sta_priv->pending_frames) > 0)
2996 ieee80211_sta_block_awake(hw, sta, true);
2997 break;
2998 case STA_NOTIFY_AWAKE:
2999 WARN_ON(!sta_priv->client);
3000 if (!sta_priv->asleep)
3001 break;
3002 sta_priv->asleep = false;
3003 sta_id = iwl_find_station(priv, sta->addr);
3004 if (sta_id != IWL_INVALID_STATION)
3005 iwl_sta_modify_ps_wake(priv, sta_id);
3006 break;
3007 default:
3008 break;
3009 }
3010 }
3011
3012 /*****************************************************************************
3013 *
3014 * sysfs attributes
3015 *
3016 *****************************************************************************/
3017
3018 #ifdef CONFIG_IWLWIFI_DEBUG
3019
3020 /*
3021 * The following adds a new attribute to the sysfs representation
3022 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3023 * used for controlling the debug level.
3024 *
3025 * See the level definitions in iwl for details.
3026 *
3027 * The debug_level being managed using sysfs below is a per device debug
3028 * level that is used instead of the global debug level if it (the per
3029 * device debug level) is set.
3030 */
3031 static ssize_t show_debug_level(struct device *d,
3032 struct device_attribute *attr, char *buf)
3033 {
3034 struct iwl_priv *priv = dev_get_drvdata(d);
3035 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3036 }
3037 static ssize_t store_debug_level(struct device *d,
3038 struct device_attribute *attr,
3039 const char *buf, size_t count)
3040 {
3041 struct iwl_priv *priv = dev_get_drvdata(d);
3042 unsigned long val;
3043 int ret;
3044
3045 ret = strict_strtoul(buf, 0, &val);
3046 if (ret)
3047 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3048 else {
3049 priv->debug_level = val;
3050 if (iwl_alloc_traffic_mem(priv))
3051 IWL_ERR(priv,
3052 "Not enough memory to generate traffic log\n");
3053 }
3054 return strnlen(buf, count);
3055 }
3056
3057 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3058 show_debug_level, store_debug_level);
3059
3060
3061 #endif /* CONFIG_IWLWIFI_DEBUG */
3062
3063
3064 static ssize_t show_temperature(struct device *d,
3065 struct device_attribute *attr, char *buf)
3066 {
3067 struct iwl_priv *priv = dev_get_drvdata(d);
3068
3069 if (!iwl_is_alive(priv))
3070 return -EAGAIN;
3071
3072 return sprintf(buf, "%d\n", priv->temperature);
3073 }
3074
3075 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3076
3077 static ssize_t show_tx_power(struct device *d,
3078 struct device_attribute *attr, char *buf)
3079 {
3080 struct iwl_priv *priv = dev_get_drvdata(d);
3081
3082 if (!iwl_is_ready_rf(priv))
3083 return sprintf(buf, "off\n");
3084 else
3085 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3086 }
3087
3088 static ssize_t store_tx_power(struct device *d,
3089 struct device_attribute *attr,
3090 const char *buf, size_t count)
3091 {
3092 struct iwl_priv *priv = dev_get_drvdata(d);
3093 unsigned long val;
3094 int ret;
3095
3096 ret = strict_strtoul(buf, 10, &val);
3097 if (ret)
3098 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3099 else {
3100 ret = iwl_set_tx_power(priv, val, false);
3101 if (ret)
3102 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3103 ret);
3104 else
3105 ret = count;
3106 }
3107 return ret;
3108 }
3109
3110 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3111
3112 static ssize_t show_statistics(struct device *d,
3113 struct device_attribute *attr, char *buf)
3114 {
3115 struct iwl_priv *priv = dev_get_drvdata(d);
3116 u32 size = sizeof(struct iwl_notif_statistics);
3117 u32 len = 0, ofs = 0;
3118 u8 *data = (u8 *)&priv->statistics;
3119 int rc = 0;
3120
3121 if (!iwl_is_alive(priv))
3122 return -EAGAIN;
3123
3124 mutex_lock(&priv->mutex);
3125 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3126 mutex_unlock(&priv->mutex);
3127
3128 if (rc) {
3129 len = sprintf(buf,
3130 "Error sending statistics request: 0x%08X\n", rc);
3131 return len;
3132 }
3133
3134 while (size && (PAGE_SIZE - len)) {
3135 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3136 PAGE_SIZE - len, 1);
3137 len = strlen(buf);
3138 if (PAGE_SIZE - len)
3139 buf[len++] = '\n';
3140
3141 ofs += 16;
3142 size -= min(size, 16U);
3143 }
3144
3145 return len;
3146 }
3147
3148 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3149
3150 static ssize_t show_rts_ht_protection(struct device *d,
3151 struct device_attribute *attr, char *buf)
3152 {
3153 struct iwl_priv *priv = dev_get_drvdata(d);
3154
3155 return sprintf(buf, "%s\n",
3156 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3157 }
3158
3159 static ssize_t store_rts_ht_protection(struct device *d,
3160 struct device_attribute *attr,
3161 const char *buf, size_t count)
3162 {
3163 struct iwl_priv *priv = dev_get_drvdata(d);
3164 unsigned long val;
3165 int ret;
3166
3167 ret = strict_strtoul(buf, 10, &val);
3168 if (ret)
3169 IWL_INFO(priv, "Input is not in decimal form.\n");
3170 else {
3171 if (!iwl_is_associated(priv))
3172 priv->cfg->use_rts_for_ht = val ? true : false;
3173 else
3174 IWL_ERR(priv, "Sta associated with AP - "
3175 "Change protection mechanism is not allowed\n");
3176 ret = count;
3177 }
3178 return ret;
3179 }
3180
3181 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3182 show_rts_ht_protection, store_rts_ht_protection);
3183
3184
3185 /*****************************************************************************
3186 *
3187 * driver setup and teardown
3188 *
3189 *****************************************************************************/
3190
3191 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3192 {
3193 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3194
3195 init_waitqueue_head(&priv->wait_command_queue);
3196
3197 INIT_WORK(&priv->restart, iwl_bg_restart);
3198 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3199 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3200 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3201 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3202 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3203
3204 iwl_setup_scan_deferred_work(priv);
3205
3206 if (priv->cfg->ops->lib->setup_deferred_work)
3207 priv->cfg->ops->lib->setup_deferred_work(priv);
3208
3209 init_timer(&priv->statistics_periodic);
3210 priv->statistics_periodic.data = (unsigned long)priv;
3211 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3212
3213 init_timer(&priv->ucode_trace);
3214 priv->ucode_trace.data = (unsigned long)priv;
3215 priv->ucode_trace.function = iwl_bg_ucode_trace;
3216
3217 if (!priv->cfg->use_isr_legacy)
3218 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3219 iwl_irq_tasklet, (unsigned long)priv);
3220 else
3221 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3222 iwl_irq_tasklet_legacy, (unsigned long)priv);
3223 }
3224
3225 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3226 {
3227 if (priv->cfg->ops->lib->cancel_deferred_work)
3228 priv->cfg->ops->lib->cancel_deferred_work(priv);
3229
3230 cancel_delayed_work_sync(&priv->init_alive_start);
3231 cancel_delayed_work(&priv->scan_check);
3232 cancel_delayed_work(&priv->alive_start);
3233 cancel_work_sync(&priv->beacon_update);
3234 del_timer_sync(&priv->statistics_periodic);
3235 del_timer_sync(&priv->ucode_trace);
3236 }
3237
3238 static void iwl_init_hw_rates(struct iwl_priv *priv,
3239 struct ieee80211_rate *rates)
3240 {
3241 int i;
3242
3243 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3244 rates[i].bitrate = iwl_rates[i].ieee * 5;
3245 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3246 rates[i].hw_value_short = i;
3247 rates[i].flags = 0;
3248 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3249 /*
3250 * If CCK != 1M then set short preamble rate flag.
3251 */
3252 rates[i].flags |=
3253 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3254 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3255 }
3256 }
3257 }
3258
3259 static int iwl_init_drv(struct iwl_priv *priv)
3260 {
3261 int ret;
3262
3263 priv->ibss_beacon = NULL;
3264
3265 spin_lock_init(&priv->sta_lock);
3266 spin_lock_init(&priv->hcmd_lock);
3267
3268 INIT_LIST_HEAD(&priv->free_frames);
3269
3270 mutex_init(&priv->mutex);
3271 mutex_init(&priv->sync_cmd_mutex);
3272
3273 /* Clear the driver's (not device's) station table */
3274 iwl_clear_stations_table(priv);
3275
3276 priv->ieee_channels = NULL;
3277 priv->ieee_rates = NULL;
3278 priv->band = IEEE80211_BAND_2GHZ;
3279
3280 priv->iw_mode = NL80211_IFTYPE_STATION;
3281 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3282 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3283
3284 /* initialize force reset */
3285 priv->force_reset[IWL_RF_RESET].reset_duration =
3286 IWL_DELAY_NEXT_FORCE_RF_RESET;
3287 priv->force_reset[IWL_FW_RESET].reset_duration =
3288 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3289
3290 /* Choose which receivers/antennas to use */
3291 if (priv->cfg->ops->hcmd->set_rxon_chain)
3292 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3293
3294 iwl_init_scan_params(priv);
3295
3296 iwl_reset_qos(priv);
3297
3298 priv->qos_data.qos_active = 0;
3299 priv->qos_data.qos_cap.val = 0;
3300
3301 /* Set the tx_power_user_lmt to the lowest power level
3302 * this value will get overwritten by channel max power avg
3303 * from eeprom */
3304 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3305
3306 ret = iwl_init_channel_map(priv);
3307 if (ret) {
3308 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3309 goto err;
3310 }
3311
3312 ret = iwlcore_init_geos(priv);
3313 if (ret) {
3314 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3315 goto err_free_channel_map;
3316 }
3317 iwl_init_hw_rates(priv, priv->ieee_rates);
3318
3319 return 0;
3320
3321 err_free_channel_map:
3322 iwl_free_channel_map(priv);
3323 err:
3324 return ret;
3325 }
3326
3327 static void iwl_uninit_drv(struct iwl_priv *priv)
3328 {
3329 iwl_calib_free_results(priv);
3330 iwlcore_free_geos(priv);
3331 iwl_free_channel_map(priv);
3332 kfree(priv->scan);
3333 }
3334
3335 static struct attribute *iwl_sysfs_entries[] = {
3336 &dev_attr_statistics.attr,
3337 &dev_attr_temperature.attr,
3338 &dev_attr_tx_power.attr,
3339 &dev_attr_rts_ht_protection.attr,
3340 #ifdef CONFIG_IWLWIFI_DEBUG
3341 &dev_attr_debug_level.attr,
3342 #endif
3343 NULL
3344 };
3345
3346 static struct attribute_group iwl_attribute_group = {
3347 .name = NULL, /* put in device directory */
3348 .attrs = iwl_sysfs_entries,
3349 };
3350
3351 static struct ieee80211_ops iwl_hw_ops = {
3352 .tx = iwl_mac_tx,
3353 .start = iwl_mac_start,
3354 .stop = iwl_mac_stop,
3355 .add_interface = iwl_mac_add_interface,
3356 .remove_interface = iwl_mac_remove_interface,
3357 .config = iwl_mac_config,
3358 .configure_filter = iwl_configure_filter,
3359 .set_key = iwl_mac_set_key,
3360 .update_tkip_key = iwl_mac_update_tkip_key,
3361 .get_stats = iwl_mac_get_stats,
3362 .conf_tx = iwl_mac_conf_tx,
3363 .reset_tsf = iwl_mac_reset_tsf,
3364 .bss_info_changed = iwl_bss_info_changed,
3365 .ampdu_action = iwl_mac_ampdu_action,
3366 .hw_scan = iwl_mac_hw_scan,
3367 .sta_notify = iwl_mac_sta_notify,
3368 };
3369
3370 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3371 {
3372 int err = 0;
3373 struct iwl_priv *priv;
3374 struct ieee80211_hw *hw;
3375 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3376 unsigned long flags;
3377 u16 pci_cmd;
3378
3379 /************************
3380 * 1. Allocating HW data
3381 ************************/
3382
3383 /* Disabling hardware scan means that mac80211 will perform scans
3384 * "the hard way", rather than using device's scan. */
3385 if (cfg->mod_params->disable_hw_scan) {
3386 if (iwl_debug_level & IWL_DL_INFO)
3387 dev_printk(KERN_DEBUG, &(pdev->dev),
3388 "Disabling hw_scan\n");
3389 iwl_hw_ops.hw_scan = NULL;
3390 }
3391
3392 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3393 if (!hw) {
3394 err = -ENOMEM;
3395 goto out;
3396 }
3397 priv = hw->priv;
3398 /* At this point both hw and priv are allocated. */
3399
3400 SET_IEEE80211_DEV(hw, &pdev->dev);
3401
3402 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3403 priv->cfg = cfg;
3404 priv->pci_dev = pdev;
3405 priv->inta_mask = CSR_INI_SET_MASK;
3406
3407 #ifdef CONFIG_IWLWIFI_DEBUG
3408 atomic_set(&priv->restrict_refcnt, 0);
3409 #endif
3410 if (iwl_alloc_traffic_mem(priv))
3411 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3412
3413 /**************************
3414 * 2. Initializing PCI bus
3415 **************************/
3416 if (pci_enable_device(pdev)) {
3417 err = -ENODEV;
3418 goto out_ieee80211_free_hw;
3419 }
3420
3421 pci_set_master(pdev);
3422
3423 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3424 if (!err)
3425 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3426 if (err) {
3427 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3428 if (!err)
3429 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3430 /* both attempts failed: */
3431 if (err) {
3432 IWL_WARN(priv, "No suitable DMA available.\n");
3433 goto out_pci_disable_device;
3434 }
3435 }
3436
3437 err = pci_request_regions(pdev, DRV_NAME);
3438 if (err)
3439 goto out_pci_disable_device;
3440
3441 pci_set_drvdata(pdev, priv);
3442
3443
3444 /***********************
3445 * 3. Read REV register
3446 ***********************/
3447 priv->hw_base = pci_iomap(pdev, 0, 0);
3448 if (!priv->hw_base) {
3449 err = -ENODEV;
3450 goto out_pci_release_regions;
3451 }
3452
3453 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3454 (unsigned long long) pci_resource_len(pdev, 0));
3455 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3456
3457 /* these spin locks will be used in apm_ops.init and EEPROM access
3458 * we should init now
3459 */
3460 spin_lock_init(&priv->reg_lock);
3461 spin_lock_init(&priv->lock);
3462
3463 /*
3464 * stop and reset the on-board processor just in case it is in a
3465 * strange state ... like being left stranded by a primary kernel
3466 * and this is now the kdump kernel trying to start up
3467 */
3468 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3469
3470 iwl_hw_detect(priv);
3471 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3472 priv->cfg->name, priv->hw_rev);
3473
3474 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3475 * PCI Tx retries from interfering with C3 CPU state */
3476 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3477
3478 iwl_prepare_card_hw(priv);
3479 if (!priv->hw_ready) {
3480 IWL_WARN(priv, "Failed, HW not ready\n");
3481 goto out_iounmap;
3482 }
3483
3484 /*****************
3485 * 4. Read EEPROM
3486 *****************/
3487 /* Read the EEPROM */
3488 err = iwl_eeprom_init(priv);
3489 if (err) {
3490 IWL_ERR(priv, "Unable to init EEPROM\n");
3491 goto out_iounmap;
3492 }
3493 err = iwl_eeprom_check_version(priv);
3494 if (err)
3495 goto out_free_eeprom;
3496
3497 /* extract MAC Address */
3498 iwl_eeprom_get_mac(priv, priv->mac_addr);
3499 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3500 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3501
3502 /************************
3503 * 5. Setup HW constants
3504 ************************/
3505 if (iwl_set_hw_params(priv)) {
3506 IWL_ERR(priv, "failed to set hw parameters\n");
3507 goto out_free_eeprom;
3508 }
3509
3510 /*******************
3511 * 6. Setup priv
3512 *******************/
3513
3514 err = iwl_init_drv(priv);
3515 if (err)
3516 goto out_free_eeprom;
3517 /* At this point both hw and priv are initialized. */
3518
3519 /********************
3520 * 7. Setup services
3521 ********************/
3522 spin_lock_irqsave(&priv->lock, flags);
3523 iwl_disable_interrupts(priv);
3524 spin_unlock_irqrestore(&priv->lock, flags);
3525
3526 pci_enable_msi(priv->pci_dev);
3527
3528 iwl_alloc_isr_ict(priv);
3529 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3530 IRQF_SHARED, DRV_NAME, priv);
3531 if (err) {
3532 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3533 goto out_disable_msi;
3534 }
3535 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3536 if (err) {
3537 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3538 goto out_free_irq;
3539 }
3540
3541 iwl_setup_deferred_work(priv);
3542 iwl_setup_rx_handlers(priv);
3543
3544 /*********************************************
3545 * 8. Enable interrupts and read RFKILL state
3546 *********************************************/
3547
3548 /* enable interrupts if needed: hw bug w/a */
3549 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3550 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3551 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3552 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3553 }
3554
3555 iwl_enable_interrupts(priv);
3556
3557 /* If platform's RF_KILL switch is NOT set to KILL */
3558 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3559 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3560 else
3561 set_bit(STATUS_RF_KILL_HW, &priv->status);
3562
3563 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3564 test_bit(STATUS_RF_KILL_HW, &priv->status));
3565
3566 iwl_power_initialize(priv);
3567 iwl_tt_initialize(priv);
3568
3569 err = iwl_request_firmware(priv, true);
3570 if (err)
3571 goto out_remove_sysfs;
3572
3573 return 0;
3574
3575 out_remove_sysfs:
3576 destroy_workqueue(priv->workqueue);
3577 priv->workqueue = NULL;
3578 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3579 out_free_irq:
3580 free_irq(priv->pci_dev->irq, priv);
3581 iwl_free_isr_ict(priv);
3582 out_disable_msi:
3583 pci_disable_msi(priv->pci_dev);
3584 iwl_uninit_drv(priv);
3585 out_free_eeprom:
3586 iwl_eeprom_free(priv);
3587 out_iounmap:
3588 pci_iounmap(pdev, priv->hw_base);
3589 out_pci_release_regions:
3590 pci_set_drvdata(pdev, NULL);
3591 pci_release_regions(pdev);
3592 out_pci_disable_device:
3593 pci_disable_device(pdev);
3594 out_ieee80211_free_hw:
3595 iwl_free_traffic_mem(priv);
3596 ieee80211_free_hw(priv->hw);
3597 out:
3598 return err;
3599 }
3600
3601 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3602 {
3603 struct iwl_priv *priv = pci_get_drvdata(pdev);
3604 unsigned long flags;
3605
3606 if (!priv)
3607 return;
3608
3609 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3610
3611 iwl_dbgfs_unregister(priv);
3612 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3613
3614 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3615 * to be called and iwl_down since we are removing the device
3616 * we need to set STATUS_EXIT_PENDING bit.
3617 */
3618 set_bit(STATUS_EXIT_PENDING, &priv->status);
3619 if (priv->mac80211_registered) {
3620 ieee80211_unregister_hw(priv->hw);
3621 priv->mac80211_registered = 0;
3622 } else {
3623 iwl_down(priv);
3624 }
3625
3626 /*
3627 * Make sure device is reset to low power before unloading driver.
3628 * This may be redundant with iwl_down(), but there are paths to
3629 * run iwl_down() without calling apm_ops.stop(), and there are
3630 * paths to avoid running iwl_down() at all before leaving driver.
3631 * This (inexpensive) call *makes sure* device is reset.
3632 */
3633 priv->cfg->ops->lib->apm_ops.stop(priv);
3634
3635 iwl_tt_exit(priv);
3636
3637 /* make sure we flush any pending irq or
3638 * tasklet for the driver
3639 */
3640 spin_lock_irqsave(&priv->lock, flags);
3641 iwl_disable_interrupts(priv);
3642 spin_unlock_irqrestore(&priv->lock, flags);
3643
3644 iwl_synchronize_irq(priv);
3645
3646 iwl_dealloc_ucode_pci(priv);
3647
3648 if (priv->rxq.bd)
3649 iwl_rx_queue_free(priv, &priv->rxq);
3650 iwl_hw_txq_ctx_free(priv);
3651
3652 iwl_clear_stations_table(priv);
3653 iwl_eeprom_free(priv);
3654
3655
3656 /*netif_stop_queue(dev); */
3657 flush_workqueue(priv->workqueue);
3658
3659 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3660 * priv->workqueue... so we can't take down the workqueue
3661 * until now... */
3662 destroy_workqueue(priv->workqueue);
3663 priv->workqueue = NULL;
3664 iwl_free_traffic_mem(priv);
3665
3666 free_irq(priv->pci_dev->irq, priv);
3667 pci_disable_msi(priv->pci_dev);
3668 pci_iounmap(pdev, priv->hw_base);
3669 pci_release_regions(pdev);
3670 pci_disable_device(pdev);
3671 pci_set_drvdata(pdev, NULL);
3672
3673 iwl_uninit_drv(priv);
3674
3675 iwl_free_isr_ict(priv);
3676
3677 if (priv->ibss_beacon)
3678 dev_kfree_skb(priv->ibss_beacon);
3679
3680 ieee80211_free_hw(priv->hw);
3681 }
3682
3683
3684 /*****************************************************************************
3685 *
3686 * driver and module entry point
3687 *
3688 *****************************************************************************/
3689
3690 /* Hardware specific file defines the PCI IDs table for that hardware module */
3691 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3692 #ifdef CONFIG_IWL4965
3693 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3694 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3695 #endif /* CONFIG_IWL4965 */
3696 #ifdef CONFIG_IWL5000
3697 /* 5100 Series WiFi */
3698 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3699 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3700 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3701 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3702 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3703 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3704 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3705 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3706 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3707 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3708 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3709 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3710 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3711 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3712 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3713 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3714 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3715 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3716 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3717 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3718 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3719 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3720 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3721 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3722
3723 /* 5300 Series WiFi */
3724 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3725 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3726 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3727 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3728 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3729 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3730 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3731 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3732 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3733 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3734 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3735 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3736
3737 /* 5350 Series WiFi/WiMax */
3738 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3739 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3740 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3741
3742 /* 5150 Series Wifi/WiMax */
3743 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3744 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3745 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3746 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3747 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3748 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3749
3750 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3751 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3752 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3753 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3754
3755 /* 6x00 Series */
3756 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3757 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3758 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3759 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3760 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3761 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3762 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3763 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3764 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3765 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3766
3767 /* 6x50 WiFi/WiMax Series */
3768 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3769 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3770 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3771 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3772 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3773 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3774
3775 /* 1000 Series WiFi */
3776 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3777 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3778 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3779 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3780 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3781 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3782 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3783 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3784 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3785 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3786 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3787 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3788 #endif /* CONFIG_IWL5000 */
3789
3790 {0}
3791 };
3792 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3793
3794 static struct pci_driver iwl_driver = {
3795 .name = DRV_NAME,
3796 .id_table = iwl_hw_card_ids,
3797 .probe = iwl_pci_probe,
3798 .remove = __devexit_p(iwl_pci_remove),
3799 #ifdef CONFIG_PM
3800 .suspend = iwl_pci_suspend,
3801 .resume = iwl_pci_resume,
3802 #endif
3803 };
3804
3805 static int __init iwl_init(void)
3806 {
3807
3808 int ret;
3809 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3810 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3811
3812 ret = iwlagn_rate_control_register();
3813 if (ret) {
3814 printk(KERN_ERR DRV_NAME
3815 "Unable to register rate control algorithm: %d\n", ret);
3816 return ret;
3817 }
3818
3819 ret = pci_register_driver(&iwl_driver);
3820 if (ret) {
3821 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3822 goto error_register;
3823 }
3824
3825 return ret;
3826
3827 error_register:
3828 iwlagn_rate_control_unregister();
3829 return ret;
3830 }
3831
3832 static void __exit iwl_exit(void)
3833 {
3834 pci_unregister_driver(&iwl_driver);
3835 iwlagn_rate_control_unregister();
3836 }
3837
3838 module_exit(iwl_exit);
3839 module_init(iwl_init);
3840
3841 #ifdef CONFIG_IWLWIFI_DEBUG
3842 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3843 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3844 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3845 MODULE_PARM_DESC(debug, "debug output mask");
3846 #endif
3847
kernel-based virtual machine