[PATCH] merge some from Rusty's trivial patches
[linux-2.6/kvm.git] / arch / ppc64 / kernel / bpa_iic.c
blob0aaa878e19d36767861cba4b7da846c833675d78
1 /*
2 * BPA Internal Interrupt Controller
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/config.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/percpu.h>
27 #include <linux/types.h>
29 #include <asm/io.h>
30 #include <asm/pgtable.h>
31 #include <asm/prom.h>
32 #include <asm/ptrace.h>
34 #include "bpa_iic.h"
36 struct iic_pending_bits {
37 u32 data;
38 u8 flags;
39 u8 class;
40 u8 source;
41 u8 prio;
44 enum iic_pending_flags {
45 IIC_VALID = 0x80,
46 IIC_IPI = 0x40,
49 struct iic_regs {
50 struct iic_pending_bits pending;
51 struct iic_pending_bits pending_destr;
52 u64 generate;
53 u64 prio;
56 struct iic {
57 struct iic_regs __iomem *regs;
60 static DEFINE_PER_CPU(struct iic, iic);
62 void iic_local_enable(void)
64 out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
67 void iic_local_disable(void)
69 out_be64(&__get_cpu_var(iic).regs->prio, 0x0);
72 static unsigned int iic_startup(unsigned int irq)
74 return 0;
77 static void iic_enable(unsigned int irq)
79 iic_local_enable();
82 static void iic_disable(unsigned int irq)
86 static void iic_end(unsigned int irq)
88 iic_local_enable();
91 static struct hw_interrupt_type iic_pic = {
92 .typename = " BPA-IIC ",
93 .startup = iic_startup,
94 .enable = iic_enable,
95 .disable = iic_disable,
96 .end = iic_end,
99 static int iic_external_get_irq(struct iic_pending_bits pending)
101 int irq;
102 unsigned char node, unit;
104 node = pending.source >> 4;
105 unit = pending.source & 0xf;
106 irq = -1;
109 * This mapping is specific to the Broadband
110 * Engine. We might need to get the numbers
111 * from the device tree to support future CPUs.
113 switch (unit) {
114 case 0x00:
115 case 0x0b:
117 * One of these units can be connected
118 * to an external interrupt controller.
120 if (pending.prio > 0x3f ||
121 pending.class != 2)
122 break;
123 irq = IIC_EXT_OFFSET
124 + spider_get_irq(pending.prio + node * IIC_NODE_STRIDE)
125 + node * IIC_NODE_STRIDE;
126 break;
127 case 0x01 ... 0x04:
128 case 0x07 ... 0x0a:
130 * These units are connected to the SPEs
132 if (pending.class > 2)
133 break;
134 irq = IIC_SPE_OFFSET
135 + pending.class * IIC_CLASS_STRIDE
136 + node * IIC_NODE_STRIDE
137 + unit;
138 break;
140 if (irq == -1)
141 printk(KERN_WARNING "Unexpected interrupt class %02x, "
142 "source %02x, prio %02x, cpu %02x\n", pending.class,
143 pending.source, pending.prio, smp_processor_id());
144 return irq;
147 /* Get an IRQ number from the pending state register of the IIC */
148 int iic_get_irq(struct pt_regs *regs)
150 struct iic *iic;
151 int irq;
152 struct iic_pending_bits pending;
154 iic = &__get_cpu_var(iic);
155 *(unsigned long *) &pending =
156 in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
158 irq = -1;
159 if (pending.flags & IIC_VALID) {
160 if (pending.flags & IIC_IPI) {
161 irq = IIC_IPI_OFFSET + (pending.prio >> 4);
163 if (irq > 0x80)
164 printk(KERN_WARNING "Unexpected IPI prio %02x"
165 "on CPU %02x\n", pending.prio,
166 smp_processor_id());
168 } else {
169 irq = iic_external_get_irq(pending);
172 return irq;
175 static struct iic_regs __iomem *find_iic(int cpu)
177 struct device_node *np;
178 int nodeid = cpu / 2;
179 unsigned long regs;
180 struct iic_regs __iomem *iic_regs;
182 for (np = of_find_node_by_type(NULL, "cpu");
184 np = of_find_node_by_type(np, "cpu")) {
185 if (nodeid == *(int *)get_property(np, "node-id", NULL))
186 break;
189 if (!np) {
190 printk(KERN_WARNING "IIC: CPU %d not found\n", cpu);
191 iic_regs = NULL;
192 } else {
193 regs = *(long *)get_property(np, "iic", NULL);
195 /* hack until we have decided on the devtree info */
196 regs += 0x400;
197 if (cpu & 1)
198 regs += 0x20;
200 printk(KERN_DEBUG "IIC for CPU %d at %lx\n", cpu, regs);
201 iic_regs = __ioremap(regs, sizeof(struct iic_regs),
202 _PAGE_NO_CACHE);
204 return iic_regs;
207 #ifdef CONFIG_SMP
209 /* Use the highest interrupt priorities for IPI */
210 static inline int iic_ipi_to_irq(int ipi)
212 return IIC_IPI_OFFSET + IIC_NUM_IPIS - 1 - ipi;
215 static inline int iic_irq_to_ipi(int irq)
217 return IIC_NUM_IPIS - 1 - (irq - IIC_IPI_OFFSET);
220 void iic_setup_cpu(void)
222 out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
225 void iic_cause_IPI(int cpu, int mesg)
227 out_be64(&per_cpu(iic, cpu).regs->generate, (IIC_NUM_IPIS - 1 - mesg) << 4);
230 static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
232 smp_message_recv(iic_irq_to_ipi(irq), regs);
233 return IRQ_HANDLED;
236 static void iic_request_ipi(int ipi, const char *name)
238 int irq;
240 irq = iic_ipi_to_irq(ipi);
241 /* IPIs are marked SA_INTERRUPT as they must run with irqs
242 * disabled */
243 get_irq_desc(irq)->handler = &iic_pic;
244 get_irq_desc(irq)->status |= IRQ_PER_CPU;
245 request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
248 void iic_request_IPIs(void)
250 iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
251 iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
252 #ifdef CONFIG_DEBUGGER
253 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
254 #endif /* CONFIG_DEBUGGER */
256 #endif /* CONFIG_SMP */
258 static void iic_setup_spe_handlers(void)
260 int be, isrc;
262 /* Assume two threads per BE are present */
263 for (be=0; be < num_present_cpus() / 2; be++) {
264 for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
265 int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
266 get_irq_desc(irq)->handler = &iic_pic;
271 void iic_init_IRQ(void)
273 int cpu, irq_offset;
274 struct iic *iic;
276 irq_offset = 0;
277 for_each_cpu(cpu) {
278 iic = &per_cpu(iic, cpu);
279 iic->regs = find_iic(cpu);
280 if (iic->regs)
281 out_be64(&iic->regs->prio, 0xff);
283 iic_setup_spe_handlers();