include/asm-x86/hw_irq_64.h

   1 /*
   2  * IDT vectors usable for external interrupt sources start
   3  * at 0x20:
   4  */
   5 #define FIRST_EXTERNAL_VECTOR   0x20
   6
   7 #define IA32_SYSCALL_VECTOR     0x80
   8
   9
  10 /* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
  11  * cleanup after irq migration.
  12  */
  13 #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
  14
  15 /*
  16  * Vectors 0x30-0x3f are used for ISA interrupts.
  17  */
  18 #define IRQ0_VECTOR             (FIRST_EXTERNAL_VECTOR + 0x10)
  19 #define IRQ1_VECTOR             (IRQ0_VECTOR + 1)
  20 #define IRQ2_VECTOR             (IRQ0_VECTOR + 2)
  21 #define IRQ3_VECTOR             (IRQ0_VECTOR + 3)
  22 #define IRQ4_VECTOR             (IRQ0_VECTOR + 4)
  23 #define IRQ5_VECTOR             (IRQ0_VECTOR + 5)
  24 #define IRQ6_VECTOR             (IRQ0_VECTOR + 6)
  25 #define IRQ7_VECTOR             (IRQ0_VECTOR + 7)
  26 #define IRQ8_VECTOR             (IRQ0_VECTOR + 8)
  27 #define IRQ9_VECTOR             (IRQ0_VECTOR + 9)
  28 #define IRQ10_VECTOR            (IRQ0_VECTOR + 10)
  29 #define IRQ11_VECTOR            (IRQ0_VECTOR + 11)
  30 #define IRQ12_VECTOR            (IRQ0_VECTOR + 12)
  31 #define IRQ13_VECTOR            (IRQ0_VECTOR + 13)
  32 #define IRQ14_VECTOR            (IRQ0_VECTOR + 14)
  33 #define IRQ15_VECTOR            (IRQ0_VECTOR + 15)
  34
  35 /*
  36  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
  37  *
  38  *  some of the following vectors are 'rare', they are merged
  39  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  40  *  TLB, reschedule and local APIC vectors are performance-critical.
  41  */
  42 #define SPURIOUS_APIC_VECTOR    0xff
  43 #define ERROR_APIC_VECTOR       0xfe
  44 #define RESCHEDULE_VECTOR       0xfd
  45 #define CALL_FUNCTION_VECTOR    0xfc
  46 /* fb free - please don't readd KDB here because it's useless
  47    (hint - think what a NMI bit does to a vector) */
  48 #define THERMAL_APIC_VECTOR     0xfa
  49 #define THRESHOLD_APIC_VECTOR   0xf9
  50 /* f8 free */
  51 #define INVALIDATE_TLB_VECTOR_END       0xf7
  52 #define INVALIDATE_TLB_VECTOR_START     0xf0    /* f0-f7 used for TLB flush */
  53
  54 #define NUM_INVALIDATE_TLB_VECTORS      8
  55
  56 /*
  57  * Local APIC timer IRQ vector is on a different priority level,
  58  * to work around the 'lost local interrupt if more than 2 IRQ
  59  * sources per level' errata.
  60  */
  61 #define LOCAL_TIMER_VECTOR      0xef
  62
  63 /*
  64  * First APIC vector available to drivers: (vectors 0x30-0xee)
  65  * we start at 0x41 to spread out vectors evenly between priority
  66  * levels. (0x80 is the syscall vector)
  67  */
  68 #define FIRST_DEVICE_VECTOR     (IRQ15_VECTOR + 2)
  69 #define FIRST_SYSTEM_VECTOR     0xef   /* duplicated in irq.h */
  70
  71
  72 #ifndef __ASSEMBLY__
  73
  74 typedef int vector_irq_t[NR_VECTORS];
  75 DECLARE_PER_CPU(vector_irq_t, vector_irq);
  76 extern void __setup_vector_irq(int cpu);
  77 extern spinlock_t vector_lock;
  78
  79 /*
  80  * Various low-level irq details needed by irq.c, process.c,
  81  * time.c, io_apic.c and smp.c
  82  *
  83  * Interrupt entry/exit code at both C and assembly level
  84  */
  85
  86 extern void enable_IO_APIC(void);
  87 extern void native_init_IRQ(void);
  88
  89 #include <asm/ptrace.h>
  90
  91 #define IRQ_NAME2(nr) nr##_interrupt(void)
  92 #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
  93
  94 /*
  95  *      SMP has a few special interrupts for IPI messages
  96  */
  97
  98 #define BUILD_IRQ(nr)                           \
  99         asmlinkage void IRQ_NAME(nr);           \
 100         asm("\n.p2align\n"                      \
 101             "IRQ" #nr "_interrupt:\n\t"         \
 102             "push $~(" #nr ") ; "               \
 103             "jmp common_interrupt");
 104
 105 #endif