include/asm-mips/mach-ocelot3/cpu-feature-overrides.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2004 MontaVista Software Inc.
   7  * Author: Manish Lachwani, mlachwani@mvista.com
   8  * Copyright (C) 2004 Ralf Baechle
   9  */
  10 #ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
  11 #define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
  12
  13 /*
  14  * Momentum Ocelot-3 is based on Rm7900 processor which
  15  * is based on the E9000 core.
  16  */
  17 #define cpu_has_watch           1
  18 #define cpu_has_mips16          0
  19 #define cpu_has_divec           0
  20 #define cpu_has_vce             0
  21 #define cpu_has_cache_cdex_p    0
  22 #define cpu_has_cache_cdex_s    0
  23 #define cpu_has_prefetch        1
  24 #define cpu_has_mcheck          0
  25 #define cpu_has_ejtag           0
  26
  27 #define cpu_has_llsc            1
  28 #define cpu_has_vtag_icache     0
  29 #define cpu_has_dc_aliases      0
  30 #define cpu_has_ic_fills_f_dc   0
  31 #define cpu_icache_snoops_remote_store  0
  32
  33 #define cpu_has_nofpuex         0
  34 #define cpu_has_64bits          1
  35
  36 #define cpu_has_subset_pcaches  0
  37
  38 #define cpu_dcache_line_size()  32
  39 #define cpu_icache_line_size()  32
  40 #define cpu_scache_line_size()  32
  41
  42 /*
  43  * On the RM9000 we need to ensure that I-cache lines being fetches only
  44  * contain valid instructions are funny things will happen.
  45  */
  46 #define PLAT_TRAMPOLINE_STUFF_LINE      32UL
  47
  48 #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */