1 #ifndef _ASM_I386_DMA_MAPPING_H
2 #define _ASM_I386_DMA_MAPPING_H
8 #include <asm/scatterlist.h>
10 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
13 void *dma_alloc_coherent(struct device
*dev
, size_t size
,
14 dma_addr_t
*dma_handle
, unsigned int __nocast flag
);
16 void dma_free_coherent(struct device
*dev
, size_t size
,
17 void *vaddr
, dma_addr_t dma_handle
);
19 static inline dma_addr_t
20 dma_map_single(struct device
*dev
, void *ptr
, size_t size
,
21 enum dma_data_direction direction
)
23 BUG_ON(direction
== DMA_NONE
);
24 flush_write_buffers();
25 return virt_to_phys(ptr
);
29 dma_unmap_single(struct device
*dev
, dma_addr_t dma_addr
, size_t size
,
30 enum dma_data_direction direction
)
32 BUG_ON(direction
== DMA_NONE
);
36 dma_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
37 enum dma_data_direction direction
)
41 BUG_ON(direction
== DMA_NONE
);
43 for (i
= 0; i
< nents
; i
++ ) {
46 sg
[i
].dma_address
= page_to_phys(sg
[i
].page
) + sg
[i
].offset
;
49 flush_write_buffers();
53 static inline dma_addr_t
54 dma_map_page(struct device
*dev
, struct page
*page
, unsigned long offset
,
55 size_t size
, enum dma_data_direction direction
)
57 BUG_ON(direction
== DMA_NONE
);
58 return page_to_phys(page
) + offset
;
62 dma_unmap_page(struct device
*dev
, dma_addr_t dma_address
, size_t size
,
63 enum dma_data_direction direction
)
65 BUG_ON(direction
== DMA_NONE
);
70 dma_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nhwentries
,
71 enum dma_data_direction direction
)
73 BUG_ON(direction
== DMA_NONE
);
77 dma_sync_single_for_cpu(struct device
*dev
, dma_addr_t dma_handle
, size_t size
,
78 enum dma_data_direction direction
)
83 dma_sync_single_for_device(struct device
*dev
, dma_addr_t dma_handle
, size_t size
,
84 enum dma_data_direction direction
)
86 flush_write_buffers();
90 dma_sync_single_range_for_cpu(struct device
*dev
, dma_addr_t dma_handle
,
91 unsigned long offset
, size_t size
,
92 enum dma_data_direction direction
)
97 dma_sync_single_range_for_device(struct device
*dev
, dma_addr_t dma_handle
,
98 unsigned long offset
, size_t size
,
99 enum dma_data_direction direction
)
101 flush_write_buffers();
105 dma_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
, int nelems
,
106 enum dma_data_direction direction
)
111 dma_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
, int nelems
,
112 enum dma_data_direction direction
)
114 flush_write_buffers();
118 dma_mapping_error(dma_addr_t dma_addr
)
124 dma_supported(struct device
*dev
, u64 mask
)
127 * we fall back to GFP_DMA when the mask isn't all 1s,
128 * so we can't guarantee allocations that must be
129 * within a tighter range than GFP_DMA..
131 if(mask
< 0x00ffffff)
138 dma_set_mask(struct device
*dev
, u64 mask
)
140 if(!dev
->dma_mask
|| !dma_supported(dev
, mask
))
143 *dev
->dma_mask
= mask
;
149 dma_get_cache_alignment(void)
151 /* no easy way to get cache size on all x86, so return the
152 * maximum possible, to be safe */
153 return (1 << L1_CACHE_SHIFT_MAX
);
156 #define dma_is_consistent(d) (1)
159 dma_cache_sync(void *vaddr
, size_t size
,
160 enum dma_data_direction direction
)
162 flush_write_buffers();
165 #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
167 dma_declare_coherent_memory(struct device
*dev
, dma_addr_t bus_addr
,
168 dma_addr_t device_addr
, size_t size
, int flags
);
171 dma_release_declared_memory(struct device
*dev
);
174 dma_mark_declared_memory_occupied(struct device
*dev
,
175 dma_addr_t device_addr
, size_t size
);