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Linux-2.6.12-rc2
[linux-2.6/kvm.git] / drivers / input / misc / hp_sdc_rtc.c
blob1cd7657f7e42439bf5471c7772737ea13bc5ffba
1 /*
2 * HP i8042 SDC + MSM-58321 BBRTC driver.
3 *
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 *
29 * References:
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * efirtc.c by Stephane Eranian/Hewlett Packard
33 *
34 */
35
36 #include <linux/hp_sdc.h>
37 #include <linux/errno.h>
38 #include <linux/types.h>
39 #include <linux/init.h>
40 #include <linux/module.h>
41 #include <linux/time.h>
42 #include <linux/miscdevice.h>
43 #include <linux/proc_fs.h>
44 #include <linux/poll.h>
45 #include <linux/rtc.h>
46
47 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
48 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
49 MODULE_LICENSE("Dual BSD/GPL");
50
51 #define RTC_VERSION "1.10d"
52
53 static unsigned long epoch = 2000;
54
55 static struct semaphore i8042tregs;
56
57 static hp_sdc_irqhook hp_sdc_rtc_isr;
58
59 static struct fasync_struct *hp_sdc_rtc_async_queue;
60
61 static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);
62
63 static loff_t hp_sdc_rtc_llseek(struct file *file, loff_t offset, int origin);
64
65 static ssize_t hp_sdc_rtc_read(struct file *file, char *buf,
66 size_t count, loff_t *ppos);
67
68 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file,
69 unsigned int cmd, unsigned long arg);
70
71 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait);
72
73 static int hp_sdc_rtc_open(struct inode *inode, struct file *file);
74 static int hp_sdc_rtc_release(struct inode *inode, struct file *file);
75 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);
76
77 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
78 int count, int *eof, void *data);
79
80 static void hp_sdc_rtc_isr (int irq, void *dev_id,
81 uint8_t status, uint8_t data)
82 {
83 return;
84 }
85
86 static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
87 {
88 struct semaphore tsem;
89 hp_sdc_transaction t;
90 uint8_t tseq[91];
91 int i;
92
93 i = 0;
94 while (i < 91) {
95 tseq[i++] = HP_SDC_ACT_DATAREG |
96 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
97 tseq[i++] = 0x01; /* write i8042[0x70] */
98 tseq[i] = i / 7; /* BBRTC reg address */
99 i++;
100 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */
101 tseq[i++] = 2; /* expect 1 stat/dat pair back. */
102 i++; i++; /* buffer for stat/dat pair */
103 }
104 tseq[84] |= HP_SDC_ACT_SEMAPHORE;
105 t.endidx = 91;
106 t.seq = tseq;
107 t.act.semaphore = &tsem;
108 init_MUTEX_LOCKED(&tsem);
109
110 if (hp_sdc_enqueue_transaction(&t)) return -1;
111
112 down_interruptible(&tsem); /* Put ourselves to sleep for results. */
113
114 /* Check for nonpresence of BBRTC */
115 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
116 tseq[55] | tseq[62] | tseq[34] | tseq[41] |
117 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f))
118 return -1;
119
120 memset(rtctm, 0, sizeof(struct rtc_time));
121 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
122 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
123 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
124 rtctm->tm_wday = (tseq[48] & 0x0f);
125 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
126 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
127 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10;
128
129 return 0;
130 }
131
132 static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
133 {
134 struct rtc_time tm, tm_last;
135 int i = 0;
136
137 /* MSM-58321 has no read latch, so must read twice and compare. */
138
139 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
140 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
141
142 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
143 if (i++ > 4) return -1;
144 memcpy(&tm_last, &tm, sizeof(struct rtc_time));
145 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
146 }
147
148 memcpy(rtctm, &tm, sizeof(struct rtc_time));
149
150 return 0;
151 }
152
153
154 static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
155 {
156 hp_sdc_transaction t;
157 uint8_t tseq[26] = {
158 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
159 0,
160 HP_SDC_CMD_READ_T1, 2, 0, 0,
161 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
162 HP_SDC_CMD_READ_T2, 2, 0, 0,
163 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
164 HP_SDC_CMD_READ_T3, 2, 0, 0,
165 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
166 HP_SDC_CMD_READ_T4, 2, 0, 0,
167 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
168 HP_SDC_CMD_READ_T5, 2, 0, 0
169 };
170
171 t.endidx = numreg * 5;
172
173 tseq[1] = loadcmd;
174 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
175
176 t.seq = tseq;
177 t.act.semaphore = &i8042tregs;
178
179 down_interruptible(&i8042tregs); /* Sleep if output regs in use. */
180
181 if (hp_sdc_enqueue_transaction(&t)) return -1;
182
183 down_interruptible(&i8042tregs); /* Sleep until results come back. */
184 up(&i8042tregs);
185
186 return (tseq[5] |
187 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) |
188 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
189 }
190
191
192 /* Read the i8042 real-time clock */
193 static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
194 int64_t raw;
195 uint32_t tenms;
196 unsigned int days;
197
198 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
199 if (raw < 0) return -1;
200
201 tenms = (uint32_t)raw & 0xffffff;
202 days = (unsigned int)(raw >> 24) & 0xffff;
203
204 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
205 res->tv_sec = (time_t)(tenms / 100) + days * 86400;
206
207 return 0;
208 }
209
210
211 /* Read the i8042 fast handshake timer */
212 static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
213 uint64_t raw;
214 unsigned int tenms;
215
216 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
217 if (raw < 0) return -1;
218
219 tenms = (unsigned int)raw & 0xffff;
220
221 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
222 res->tv_sec = (time_t)(tenms / 100);
223
224 return 0;
225 }
226
227
228 /* Read the i8042 match timer (a.k.a. alarm) */
229 static inline int hp_sdc_rtc_read_mt(struct timeval *res) {
230 int64_t raw;
231 uint32_t tenms;
232
233 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
234 if (raw < 0) return -1;
235
236 tenms = (uint32_t)raw & 0xffffff;
237
238 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
239 res->tv_sec = (time_t)(tenms / 100);
240
241 return 0;
242 }
243
244
245 /* Read the i8042 delay timer */
246 static inline int hp_sdc_rtc_read_dt(struct timeval *res) {
247 int64_t raw;
248 uint32_t tenms;
249
250 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
251 if (raw < 0) return -1;
252
253 tenms = (uint32_t)raw & 0xffffff;
254
255 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
256 res->tv_sec = (time_t)(tenms / 100);
257
258 return 0;
259 }
260
261
262 /* Read the i8042 cycle timer (a.k.a. periodic) */
263 static inline int hp_sdc_rtc_read_ct(struct timeval *res) {
264 int64_t raw;
265 uint32_t tenms;
266
267 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
268 if (raw < 0) return -1;
269
270 tenms = (uint32_t)raw & 0xffffff;
271
272 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
273 res->tv_sec = (time_t)(tenms / 100);
274
275 return 0;
276 }
277
278
279 /* Set the i8042 real-time clock */
280 static int hp_sdc_rtc_set_rt (struct timeval *setto)
281 {
282 uint32_t tenms;
283 unsigned int days;
284 hp_sdc_transaction t;
285 uint8_t tseq[11] = {
286 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
287 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
288 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
289 HP_SDC_CMD_SET_RTD, 2, 0, 0
290 };
291
292 t.endidx = 10;
293
294 if (0xffff < setto->tv_sec / 86400) return -1;
295 days = setto->tv_sec / 86400;
296 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
297 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
298 if (days > 0xffff) return -1;
299
300 if (0xffffff < setto->tv_sec) return -1;
301 tenms = setto->tv_sec * 100;
302 if (0xffffff < setto->tv_usec / 10000) return -1;
303 tenms += setto->tv_usec / 10000;
304 if (tenms > 0xffffff) return -1;
305
306 tseq[3] = (uint8_t)(tenms & 0xff);
307 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
308 tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
309
310 tseq[9] = (uint8_t)(days & 0xff);
311 tseq[10] = (uint8_t)((days >> 8) & 0xff);
312
313 t.seq = tseq;
314
315 if (hp_sdc_enqueue_transaction(&t)) return -1;
316 return 0;
317 }
318
319 /* Set the i8042 fast handshake timer */
320 static int hp_sdc_rtc_set_fhs (struct timeval *setto)
321 {
322 uint32_t tenms;
323 hp_sdc_transaction t;
324 uint8_t tseq[5] = {
325 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
326 HP_SDC_CMD_SET_FHS, 2, 0, 0
327 };
328
329 t.endidx = 4;
330
331 if (0xffff < setto->tv_sec) return -1;
332 tenms = setto->tv_sec * 100;
333 if (0xffff < setto->tv_usec / 10000) return -1;
334 tenms += setto->tv_usec / 10000;
335 if (tenms > 0xffff) return -1;
336
337 tseq[3] = (uint8_t)(tenms & 0xff);
338 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
339
340 t.seq = tseq;
341
342 if (hp_sdc_enqueue_transaction(&t)) return -1;
343 return 0;
344 }
345
346
347 /* Set the i8042 match timer (a.k.a. alarm) */
348 #define hp_sdc_rtc_set_mt (setto) \
349 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)
350
351 /* Set the i8042 delay timer */
352 #define hp_sdc_rtc_set_dt (setto) \
353 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)
354
355 /* Set the i8042 cycle timer (a.k.a. periodic) */
356 #define hp_sdc_rtc_set_ct (setto) \
357 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)
358
359 /* Set one of the i8042 3-byte wide timers */
360 static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
361 {
362 uint32_t tenms;
363 hp_sdc_transaction t;
364 uint8_t tseq[6] = {
365 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
366 0, 3, 0, 0, 0
367 };
368
369 t.endidx = 6;
370
371 if (0xffffff < setto->tv_sec) return -1;
372 tenms = setto->tv_sec * 100;
373 if (0xffffff < setto->tv_usec / 10000) return -1;
374 tenms += setto->tv_usec / 10000;
375 if (tenms > 0xffffff) return -1;
376
377 tseq[1] = setcmd;
378 tseq[3] = (uint8_t)(tenms & 0xff);
379 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
380 tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
381
382 t.seq = tseq;
383
384 if (hp_sdc_enqueue_transaction(&t)) {
385 return -1;
386 }
387 return 0;
388 }
389
390 static loff_t hp_sdc_rtc_llseek(struct file *file, loff_t offset, int origin)
391 {
392 return -ESPIPE;
393 }
394
395 static ssize_t hp_sdc_rtc_read(struct file *file, char *buf,
396 size_t count, loff_t *ppos) {
397 ssize_t retval;
398
399 if (count < sizeof(unsigned long))
400 return -EINVAL;
401
402 retval = put_user(68, (unsigned long *)buf);
403 return retval;
404 }
405
406 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait)
407 {
408 unsigned long l;
409
410 l = 0;
411 if (l != 0)
412 return POLLIN | POLLRDNORM;
413 return 0;
414 }
415
416 static int hp_sdc_rtc_open(struct inode *inode, struct file *file)
417 {
418 return 0;
419 }
420
421 static int hp_sdc_rtc_release(struct inode *inode, struct file *file)
422 {
423 /* Turn off interrupts? */
424
425 if (file->f_flags & FASYNC) {
426 hp_sdc_rtc_fasync (-1, file, 0);
427 }
428
429 return 0;
430 }
431
432 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
433 {
434 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
435 }
436
437 static int hp_sdc_rtc_proc_output (char *buf)
438 {
439 #define YN(bit) ("no")
440 #define NY(bit) ("yes")
441 char *p;
442 struct rtc_time tm;
443 struct timeval tv;
444
445 memset(&tm, 0, sizeof(struct rtc_time));
446
447 p = buf;
448
449 if (hp_sdc_rtc_read_bbrtc(&tm)) {
450 p += sprintf(p, "BBRTC\t\t: READ FAILED!\n");
451 } else {
452 p += sprintf(p,
453 "rtc_time\t: %02d:%02d:%02d\n"
454 "rtc_date\t: %04d-%02d-%02d\n"
455 "rtc_epoch\t: %04lu\n",
456 tm.tm_hour, tm.tm_min, tm.tm_sec,
457 tm.tm_year + 1900, tm.tm_mon + 1,
458 tm.tm_mday, epoch);
459 }
460
461 if (hp_sdc_rtc_read_rt(&tv)) {
462 p += sprintf(p, "i8042 rtc\t: READ FAILED!\n");
463 } else {
464 p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n",
465 tv.tv_sec, tv.tv_usec/1000);
466 }
467
468 if (hp_sdc_rtc_read_fhs(&tv)) {
469 p += sprintf(p, "handshake\t: READ FAILED!\n");
470 } else {
471 p += sprintf(p, "handshake\t: %ld.%02d seconds\n",
472 tv.tv_sec, tv.tv_usec/1000);
473 }
474
475 if (hp_sdc_rtc_read_mt(&tv)) {
476 p += sprintf(p, "alarm\t\t: READ FAILED!\n");
477 } else {
478 p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n",
479 tv.tv_sec, tv.tv_usec/1000);
480 }
481
482 if (hp_sdc_rtc_read_dt(&tv)) {
483 p += sprintf(p, "delay\t\t: READ FAILED!\n");
484 } else {
485 p += sprintf(p, "delay\t\t: %ld.%02d seconds\n",
486 tv.tv_sec, tv.tv_usec/1000);
487 }
488
489 if (hp_sdc_rtc_read_ct(&tv)) {
490 p += sprintf(p, "periodic\t: READ FAILED!\n");
491 } else {
492 p += sprintf(p, "periodic\t: %ld.%02d seconds\n",
493 tv.tv_sec, tv.tv_usec/1000);
494 }
495
496 p += sprintf(p,
497 "DST_enable\t: %s\n"
498 "BCD\t\t: %s\n"
499 "24hr\t\t: %s\n"
500 "square_wave\t: %s\n"
501 "alarm_IRQ\t: %s\n"
502 "update_IRQ\t: %s\n"
503 "periodic_IRQ\t: %s\n"
504 "periodic_freq\t: %ld\n"
505 "batt_status\t: %s\n",
506 YN(RTC_DST_EN),
507 NY(RTC_DM_BINARY),
508 YN(RTC_24H),
509 YN(RTC_SQWE),
510 YN(RTC_AIE),
511 YN(RTC_UIE),
512 YN(RTC_PIE),
513 1UL,
514 1 ? "okay" : "dead");
515
516 return p - buf;
517 #undef YN
518 #undef NY
519 }
520
521 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
522 int count, int *eof, void *data)
523 {
524 int len = hp_sdc_rtc_proc_output (page);
525 if (len <= off+count) *eof = 1;
526 *start = page + off;
527 len -= off;
528 if (len>count) len = count;
529 if (len<0) len = 0;
530 return len;
531 }
532
533 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file,
534 unsigned int cmd, unsigned long arg)
535 {
536 #if 1
537 return -EINVAL;
538 #else
539
540 struct rtc_time wtime;
541 struct timeval ttime;
542 int use_wtime = 0;
543
544 /* This needs major work. */
545
546 switch (cmd) {
547
548 case RTC_AIE_OFF: /* Mask alarm int. enab. bit */
549 case RTC_AIE_ON: /* Allow alarm interrupts. */
550 case RTC_PIE_OFF: /* Mask periodic int. enab. bit */
551 case RTC_PIE_ON: /* Allow periodic ints */
552 case RTC_UIE_ON: /* Allow ints for RTC updates. */
553 case RTC_UIE_OFF: /* Allow ints for RTC updates. */
554 {
555 /* We cannot mask individual user timers and we
556 cannot tell them apart when they occur, so it
557 would be disingenuous to succeed these IOCTLs */
558 return -EINVAL;
559 }
560 case RTC_ALM_READ: /* Read the present alarm time */
561 {
562 if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
563 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
564
565 wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600;
566 wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60;
567 wtime.tm_sec = ttime.tv_sec;
568
569 break;
570 }
571 case RTC_IRQP_READ: /* Read the periodic IRQ rate. */
572 {
573 return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
574 }
575 case RTC_IRQP_SET: /* Set periodic IRQ rate. */
576 {
577 /*
578 * The max we can do is 100Hz.
579 */
580
581 if ((arg < 1) || (arg > 100)) return -EINVAL;
582 ttime.tv_sec = 0;
583 ttime.tv_usec = 1000000 / arg;
584 if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
585 hp_sdc_rtc_freq = arg;
586 return 0;
587 }
588 case RTC_ALM_SET: /* Store a time into the alarm */
589 {
590 /*
591 * This expects a struct hp_sdc_rtc_time. Writing 0xff means
592 * "don't care" or "match all" for PC timers. The HP SDC
593 * does not support that perk, but it could be emulated fairly
594 * easily. Only the tm_hour, tm_min and tm_sec are used.
595 * We could do it with 10ms accuracy with the HP SDC, if the
596 * rtc interface left us a way to do that.
597 */
598 struct hp_sdc_rtc_time alm_tm;
599
600 if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
601 sizeof(struct hp_sdc_rtc_time)))
602 return -EFAULT;
603
604 if (alm_tm.tm_hour > 23) return -EINVAL;
605 if (alm_tm.tm_min > 59) return -EINVAL;
606 if (alm_tm.tm_sec > 59) return -EINVAL;
607
608 ttime.sec = alm_tm.tm_hour * 3600 +
609 alm_tm.tm_min * 60 + alm_tm.tm_sec;
610 ttime.usec = 0;
611 if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
612 return 0;
613 }
614 case RTC_RD_TIME: /* Read the time/date from RTC */
615 {
616 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
617 break;
618 }
619 case RTC_SET_TIME: /* Set the RTC */
620 {
621 struct rtc_time hp_sdc_rtc_tm;
622 unsigned char mon, day, hrs, min, sec, leap_yr;
623 unsigned int yrs;
624
625 if (!capable(CAP_SYS_TIME))
626 return -EACCES;
627 if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
628 sizeof(struct rtc_time)))
629 return -EFAULT;
630
631 yrs = hp_sdc_rtc_tm.tm_year + 1900;
632 mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
633 day = hp_sdc_rtc_tm.tm_mday;
634 hrs = hp_sdc_rtc_tm.tm_hour;
635 min = hp_sdc_rtc_tm.tm_min;
636 sec = hp_sdc_rtc_tm.tm_sec;
637
638 if (yrs < 1970)
639 return -EINVAL;
640
641 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
642
643 if ((mon > 12) || (day == 0))
644 return -EINVAL;
645 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
646 return -EINVAL;
647 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
648 return -EINVAL;
649
650 if ((yrs -= eH) > 255) /* They are unsigned */
651 return -EINVAL;
652
653
654 return 0;
655 }
656 case RTC_EPOCH_READ: /* Read the epoch. */
657 {
658 return put_user (epoch, (unsigned long *)arg);
659 }
660 case RTC_EPOCH_SET: /* Set the epoch. */
661 {
662 /*
663 * There were no RTC clocks before 1900.
664 */
665 if (arg < 1900)
666 return -EINVAL;
667 if (!capable(CAP_SYS_TIME))
668 return -EACCES;
669
670 epoch = arg;
671 return 0;
672 }
673 default:
674 return -EINVAL;
675 }
676 return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
677 #endif
678 }
679
680 static struct file_operations hp_sdc_rtc_fops = {
681 .owner = THIS_MODULE,
682 .llseek = hp_sdc_rtc_llseek,
683 .read = hp_sdc_rtc_read,
684 .poll = hp_sdc_rtc_poll,
685 .ioctl = hp_sdc_rtc_ioctl,
686 .open = hp_sdc_rtc_open,
687 .release = hp_sdc_rtc_release,
688 .fasync = hp_sdc_rtc_fasync,
689 };
690
691 static struct miscdevice hp_sdc_rtc_dev = {
692 .minor = RTC_MINOR,
693 .name = "rtc_HIL",
694 .fops = &hp_sdc_rtc_fops
695 };
696
697 static int __init hp_sdc_rtc_init(void)
698 {
699 int ret;
700
701 init_MUTEX(&i8042tregs);
702
703 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
704 return ret;
705 misc_register(&hp_sdc_rtc_dev);
706 create_proc_read_entry ("driver/rtc", 0, 0,
707 hp_sdc_rtc_read_proc, NULL);
708
709 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
710 "(RTC v " RTC_VERSION ")\n");
711
712 return 0;
713 }
714
715 static void __exit hp_sdc_rtc_exit(void)
716 {
717 remove_proc_entry ("driver/rtc", NULL);
718 misc_deregister(&hp_sdc_rtc_dev);
719 hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
720 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
721 }
722
723 module_init(hp_sdc_rtc_init);
724 module_exit(hp_sdc_rtc_exit);
kernel-based virtual machine