| blob | 0696ed4b9d644f01aef775f2a92aad1e67ea4a13 |
1 /* $Id: rtrap.S,v 1.61 2002/02/09 19:49:31 davem Exp $
2 * rtrap.S: Preparing for return from trap on Sparc V9.
3 *
4 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
6 */
8 #include <linux/config.h>
10 #include <asm/asi.h>
11 #include <asm/pstate.h>
12 #include <asm/ptrace.h>
13 #include <asm/spitfire.h>
14 #include <asm/head.h>
15 #include <asm/visasm.h>
16 #include <asm/processor.h>
18 #define RTRAP_PSTATE (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
19 #define RTRAP_PSTATE_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV)
20 #define RTRAP_PSTATE_AG_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
22 /* Register %l6 keeps track of whether we are returning
23 * from a system call or not. It is cleared if we call
24 * do_notify_resume, and it must not be otherwise modified
25 * until we fully commit to returning to userspace.
26 */
28 .text
29 .align 32
30 __handle_softirq:
31 call do_softirq
32 nop
33 ba,a,pt %xcc, __handle_softirq_continue
34 nop
35 __handle_preemption:
36 call schedule
37 wrpr %g0, RTRAP_PSTATE, %pstate
38 ba,pt %xcc, __handle_preemption_continue
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
41 __handle_user_windows:
42 call fault_in_user_windows
43 wrpr %g0, RTRAP_PSTATE, %pstate
44 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
45 /* Redo sched+sig checks */
46 ldx [%g6 + TI_FLAGS], %l0
47 andcc %l0, _TIF_NEED_RESCHED, %g0
49 be,pt %xcc, 1f
50 nop
51 call schedule
52 wrpr %g0, RTRAP_PSTATE, %pstate
53 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
54 ldx [%g6 + TI_FLAGS], %l0
56 1: andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
57 be,pt %xcc, __handle_user_windows_continue
58 nop
59 clr %o0
60 mov %l5, %o2
61 mov %l6, %o3
62 add %sp, PTREGS_OFF, %o1
63 mov %l0, %o4
65 call do_notify_resume
66 wrpr %g0, RTRAP_PSTATE, %pstate
67 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
68 clr %l6
69 /* Signal delivery can modify pt_regs tstate, so we must
70 * reload it.
71 */
72 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
73 sethi %hi(0xf << 20), %l4
74 and %l1, %l4, %l4
75 ba,pt %xcc, __handle_user_windows_continue
77 andn %l1, %l4, %l1
78 __handle_perfctrs:
79 call update_perfctrs
80 wrpr %g0, RTRAP_PSTATE, %pstate
81 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
82 ldub [%g6 + TI_WSAVED], %o2
83 brz,pt %o2, 1f
84 nop
85 /* Redo userwin+sched+sig checks */
86 call fault_in_user_windows
88 wrpr %g0, RTRAP_PSTATE, %pstate
89 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
90 ldx [%g6 + TI_FLAGS], %l0
91 andcc %l0, _TIF_NEED_RESCHED, %g0
92 be,pt %xcc, 1f
94 nop
95 call schedule
96 wrpr %g0, RTRAP_PSTATE, %pstate
97 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
98 ldx [%g6 + TI_FLAGS], %l0
99 1: andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
101 be,pt %xcc, __handle_perfctrs_continue
102 sethi %hi(TSTATE_PEF), %o0
103 clr %o0
104 mov %l5, %o2
105 mov %l6, %o3
106 add %sp, PTREGS_OFF, %o1
107 mov %l0, %o4
108 call do_notify_resume
110 wrpr %g0, RTRAP_PSTATE, %pstate
111 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
112 clr %l6
113 /* Signal delivery can modify pt_regs tstate, so we must
114 * reload it.
115 */
116 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
117 sethi %hi(0xf << 20), %l4
118 and %l1, %l4, %l4
119 andn %l1, %l4, %l1
120 ba,pt %xcc, __handle_perfctrs_continue
122 sethi %hi(TSTATE_PEF), %o0
123 __handle_userfpu:
124 rd %fprs, %l5
125 andcc %l5, FPRS_FEF, %g0
126 sethi %hi(TSTATE_PEF), %o0
127 be,a,pn %icc, __handle_userfpu_continue
128 andn %l1, %o0, %l1
129 ba,a,pt %xcc, __handle_userfpu_continue
131 __handle_signal:
132 clr %o0
133 mov %l5, %o2
134 mov %l6, %o3
135 add %sp, PTREGS_OFF, %o1
136 mov %l0, %o4
137 call do_notify_resume
138 wrpr %g0, RTRAP_PSTATE, %pstate
139 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
140 clr %l6
142 /* Signal delivery can modify pt_regs tstate, so we must
143 * reload it.
144 */
145 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
146 sethi %hi(0xf << 20), %l4
147 and %l1, %l4, %l4
148 ba,pt %xcc, __handle_signal_continue
149 andn %l1, %l4, %l1
151 .align 64
152 .globl rtrap_irq, rtrap_clr_l6, rtrap, irqsz_patchme, rtrap_xcall
153 rtrap_irq:
154 rtrap_clr_l6: clr %l6
155 rtrap:
156 ldub [%g6 + TI_CPU], %l0
157 sethi %hi(irq_stat), %l2 ! &softirq_active
158 or %l2, %lo(irq_stat), %l2 ! &softirq_active
159 irqsz_patchme: sllx %l0, 0, %l0
160 lduw [%l2 + %l0], %l1 ! softirq_pending
161 cmp %l1, 0
163 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
164 bne,pn %icc, __handle_softirq
165 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
166 __handle_softirq_continue:
167 rtrap_xcall:
168 sethi %hi(0xf << 20), %l4
169 andcc %l1, TSTATE_PRIV, %l3
170 and %l1, %l4, %l4
171 bne,pn %icc, to_kernel
172 andn %l1, %l4, %l1
174 /* We must hold IRQs off and atomically test schedule+signal
175 * state, then hold them off all the way back to userspace.
176 * If we are returning to kernel, none of this matters.
177 *
178 * If we do not do this, there is a window where we would do
179 * the tests, later the signal/resched event arrives but we do
180 * not process it since we are still in kernel mode. It would
181 * take until the next local IRQ before the signal/resched
182 * event would be handled.
183 *
184 * This also means that if we have to deal with performance
185 * counters or user windows, we have to redo all of these
186 * sched+signal checks with IRQs disabled.
187 */
188 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
189 wrpr 0, %pil
190 __handle_preemption_continue:
191 ldx [%g6 + TI_FLAGS], %l0
192 sethi %hi(_TIF_USER_WORK_MASK), %o0
193 or %o0, %lo(_TIF_USER_WORK_MASK), %o0
194 andcc %l0, %o0, %g0
195 sethi %hi(TSTATE_PEF), %o0
196 be,pt %xcc, user_nowork
197 andcc %l1, %o0, %g0
198 andcc %l0, _TIF_NEED_RESCHED, %g0
199 bne,pn %xcc, __handle_preemption
200 andcc %l0, (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING), %g0
201 bne,pn %xcc, __handle_signal
202 __handle_signal_continue:
203 ldub [%g6 + TI_WSAVED], %o2
204 brnz,pn %o2, __handle_user_windows
205 nop
206 __handle_user_windows_continue:
207 ldx [%g6 + TI_FLAGS], %l5
208 andcc %l5, _TIF_PERFCTR, %g0
209 sethi %hi(TSTATE_PEF), %o0
210 bne,pn %xcc, __handle_perfctrs
211 __handle_perfctrs_continue:
212 andcc %l1, %o0, %g0
214 /* This fpdepth clear is necessary for non-syscall rtraps only */
215 user_nowork:
216 bne,pn %xcc, __handle_userfpu
217 stb %g0, [%g6 + TI_FPDEPTH]
218 __handle_userfpu_continue:
220 rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
221 ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2
223 ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3
224 ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4
225 ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5
226 mov TSB_REG, %g6
227 brnz,a,pn %l3, 1f
228 ldxa [%g6] ASI_IMMU, %g5
229 1: ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
230 ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7
231 wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate
232 ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0
233 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
235 ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2
236 ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3
237 ldx [%sp + PTREGS_OFF + PT_V9_I4], %i4
238 ldx [%sp + PTREGS_OFF + PT_V9_I5], %i5
239 ldx [%sp + PTREGS_OFF + PT_V9_I6], %i6
240 ldx [%sp + PTREGS_OFF + PT_V9_I7], %i7
241 ldx [%sp + PTREGS_OFF + PT_V9_TPC], %l2
242 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %o2
244 ld [%sp + PTREGS_OFF + PT_V9_Y], %o3
245 wr %o3, %g0, %y
246 srl %l4, 20, %l4
247 wrpr %l4, 0x0, %pil
248 wrpr %g0, 0x1, %tl
249 wrpr %l1, %g0, %tstate
250 wrpr %l2, %g0, %tpc
251 wrpr %o2, %g0, %tnpc
253 brnz,pn %l3, kern_rtt
254 mov PRIMARY_CONTEXT, %l7
255 ldxa [%l7 + %l7] ASI_DMMU, %l0
256 cplus_rtrap_insn_1:
257 sethi %hi(0), %l1
258 sllx %l1, 32, %l1
259 or %l0, %l1, %l0
260 stxa %l0, [%l7] ASI_DMMU
261 flush %g6
262 rdpr %wstate, %l1
263 rdpr %otherwin, %l2
264 srl %l1, 3, %l1
266 wrpr %l2, %g0, %canrestore
267 wrpr %l1, %g0, %wstate
268 wrpr %g0, %g0, %otherwin
269 restore
270 rdpr %canrestore, %g1
271 wrpr %g1, 0x0, %cleanwin
272 retry
273 nop
275 kern_rtt: restore
276 retry
277 to_kernel:
278 #ifdef CONFIG_PREEMPT
279 ldsw [%g6 + TI_PRE_COUNT], %l5
280 brnz %l5, kern_fpucheck
281 ldx [%g6 + TI_FLAGS], %l5
282 andcc %l5, _TIF_NEED_RESCHED, %g0
283 be,pt %xcc, kern_fpucheck
284 srl %l4, 20, %l5
285 cmp %l5, 0
286 bne,pn %xcc, kern_fpucheck
287 sethi %hi(PREEMPT_ACTIVE), %l6
288 stw %l6, [%g6 + TI_PRE_COUNT]
289 call schedule
290 nop
291 ba,pt %xcc, rtrap
292 stw %g0, [%g6 + TI_PRE_COUNT]
293 #endif
294 kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5
295 brz,pt %l5, rt_continue
296 srl %l5, 1, %o0
297 add %g6, TI_FPSAVED, %l6
298 ldub [%l6 + %o0], %l2
299 sub %l5, 2, %l5
301 add %g6, TI_GSR, %o1
302 andcc %l2, (FPRS_FEF|FPRS_DU), %g0
303 be,pt %icc, 2f
304 and %l2, FPRS_DL, %l6
305 andcc %l2, FPRS_FEF, %g0
306 be,pn %icc, 5f
307 sll %o0, 3, %o5
308 rd %fprs, %g1
310 wr %g1, FPRS_FEF, %fprs
311 ldx [%o1 + %o5], %g1
312 add %g6, TI_XFSR, %o1
313 membar #StoreLoad | #LoadLoad
314 sll %o0, 8, %o2
315 add %g6, TI_FPREGS, %o3
316 brz,pn %l6, 1f
317 add %g6, TI_FPREGS+0x40, %o4
319 ldda [%o3 + %o2] ASI_BLK_P, %f0
320 ldda [%o4 + %o2] ASI_BLK_P, %f16
321 1: andcc %l2, FPRS_DU, %g0
322 be,pn %icc, 1f
323 wr %g1, 0, %gsr
324 add %o2, 0x80, %o2
325 ldda [%o3 + %o2] ASI_BLK_P, %f32
326 ldda [%o4 + %o2] ASI_BLK_P, %f48
328 1: membar #Sync
329 ldx [%o1 + %o5], %fsr
330 2: stb %l5, [%g6 + TI_FPDEPTH]
331 ba,pt %xcc, rt_continue
332 nop
333 5: wr %g0, FPRS_FEF, %fprs
334 membar #StoreLoad | #LoadLoad
335 sll %o0, 8, %o2
337 add %g6, TI_FPREGS+0x80, %o3
338 add %g6, TI_FPREGS+0xc0, %o4
339 ldda [%o3 + %o2] ASI_BLK_P, %f32
340 ldda [%o4 + %o2] ASI_BLK_P, %f48
341 membar #Sync
342 wr %g0, FPRS_DU, %fprs
343 ba,pt %xcc, rt_continue
344 stb %l5, [%g6 + TI_FPDEPTH]
346 cplus_rinsn_1:
347 sethi %uhi(CTX_CHEETAH_PLUS_NUC), %l1
349 .globl cheetah_plus_patch_rtrap
350 cheetah_plus_patch_rtrap:
351 /* We configure the dTLB512_0 for 4MB pages and the
352 * dTLB512_1 for 8K pages when in context zero.
353 */
354 sethi %hi(cplus_rinsn_1), %o0
355 sethi %hi(cplus_rtrap_insn_1), %o2
356 lduw [%o0 + %lo(cplus_rinsn_1)], %o1
357 or %o2, %lo(cplus_rtrap_insn_1), %o2
358 stw %o1, [%o2]
359 flush %o2
361 retl
362 nop