2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/config.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/init.h>
12 #include <linux/slab.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/dmi.h>
18 #include <asm/io_apic.h>
19 #include <asm/hw_irq.h>
20 #include <linux/acpi.h>
24 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
25 #define PIRQ_VERSION 0x0100
27 static int broken_hp_bios_irq9
;
28 static int acer_tm360_irqrouting
;
30 static struct irq_routing_table
*pirq_table
;
32 static int pirq_enable_irq(struct pci_dev
*dev
);
35 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
36 * Avoid using: 13, 14 and 15 (FP error and IDE).
37 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
39 unsigned int pcibios_irq_mask
= 0xfff8;
41 static int pirq_penalty
[16] = {
42 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
43 0, 0, 0, 0, 1000, 100000, 100000, 100000
49 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
50 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int new);
53 struct irq_router_handler
{
55 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
58 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = NULL
;
61 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
64 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
67 struct irq_routing_table
*rt
;
71 for(addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000); addr
+= 16) {
72 rt
= (struct irq_routing_table
*) addr
;
73 if (rt
->signature
!= PIRQ_SIGNATURE
||
74 rt
->version
!= PIRQ_VERSION
||
76 rt
->size
< sizeof(struct irq_routing_table
))
79 for(i
=0; i
<rt
->size
; i
++)
82 DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt
);
90 * If we have a IRQ routing table, use it to search for peer host
91 * bridges. It's a gross hack, but since there are no other known
92 * ways how to get a list of buses, we have to go this way.
95 static void __init
pirq_peer_trick(void)
97 struct irq_routing_table
*rt
= pirq_table
;
102 memset(busmap
, 0, sizeof(busmap
));
103 for(i
=0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
); i
++) {
108 DBG("%02x:%02x slot=%02x", e
->bus
, e
->devfn
/8, e
->slot
);
110 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
, e
->irq
[j
].bitmap
);
116 for(i
= 1; i
< 256; i
++) {
117 if (!busmap
[i
] || pci_find_bus(0, i
))
119 if (pci_scan_bus(i
, &pci_root_ops
, NULL
))
120 printk(KERN_INFO
"PCI: Discovered primary peer bus %02x [IRQ]\n", i
);
122 pcibios_last_bus
= -1;
126 * Code for querying and setting of IRQ routes on various interrupt routers.
129 void eisa_set_level_irq(unsigned int irq
)
131 unsigned char mask
= 1 << (irq
& 7);
132 unsigned int port
= 0x4d0 + (irq
>> 3);
134 static u16 eisa_irq_mask
;
136 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
139 eisa_irq_mask
|= (1 << irq
);
140 printk("PCI: setting IRQ %u as level-triggered\n", irq
);
144 outb(val
| mask
, port
);
149 * Common IRQ routing practice: nybbles in config space,
150 * offset by some magic constant.
152 static unsigned int read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
155 unsigned reg
= offset
+ (nr
>> 1);
157 pci_read_config_byte(router
, reg
, &x
);
158 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
161 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
, unsigned int val
)
164 unsigned reg
= offset
+ (nr
>> 1);
166 pci_read_config_byte(router
, reg
, &x
);
167 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
168 pci_write_config_byte(router
, reg
, x
);
172 * ALI pirq entries are damn ugly, and completely undocumented.
173 * This has been figured out from pirq tables, and it's not a pretty
176 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
178 static unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
180 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
183 static int pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
185 static unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
186 unsigned int val
= irqmap
[irq
];
189 write_config_nybble(router
, 0x48, pirq
-1, val
);
196 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
197 * just a pointer to the config space.
199 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
203 pci_read_config_byte(router
, pirq
, &x
);
204 return (x
< 16) ? x
: 0;
207 static int pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
209 pci_write_config_byte(router
, pirq
, irq
);
214 * The VIA pirq rules are nibble-based, like ALI,
215 * but without the ugly irq number munging.
216 * However, PIRQD is in the upper instead of lower 4 bits.
218 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
220 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
223 static int pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
225 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
230 * ITE 8330G pirq rules are nibble-based
231 * FIXME: pirqmap may be { 1, 0, 3, 2 },
232 * 2+3 are both mapped to irq 9 on my system
234 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
236 static unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
237 return read_config_nybble(router
,0x43, pirqmap
[pirq
-1]);
240 static int pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
242 static unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
243 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
248 * OPTI: high four bits are nibble pointer..
249 * I wonder what the low bits do?
251 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
253 return read_config_nybble(router
, 0xb8, pirq
>> 4);
256 static int pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
258 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
263 * Cyrix: nibble offset 0x5C
264 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
265 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
267 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
269 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
272 static int pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
274 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
279 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
280 * We have to deal with the following issues here:
281 * - vendors have different ideas about the meaning of link values
282 * - some onboard devices (integrated in the chipset) have special
283 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
284 * - different revision of the router have a different layout for
285 * the routing registers, particularly for the onchip devices
287 * For all routing registers the common thing is we have one byte
288 * per routeable link which is defined as:
289 * bit 7 IRQ mapping enabled (0) or disabled (1)
290 * bits [6:4] reserved (sometimes used for onchip devices)
291 * bits [3:0] IRQ to map to
292 * allowed: 3-7, 9-12, 14-15
293 * reserved: 0, 1, 2, 8, 13
295 * The config-space registers located at 0x41/0x42/0x43/0x44 are
296 * always used to route the normal PCI INT A/B/C/D respectively.
297 * Apparently there are systems implementing PCI routing table using
298 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
299 * We try our best to handle both link mappings.
301 * Currently (2003-05-21) it appears most SiS chipsets follow the
302 * definition of routing registers from the SiS-5595 southbridge.
303 * According to the SiS 5595 datasheets the revision id's of the
304 * router (ISA-bridge) should be 0x01 or 0xb0.
306 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
307 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
308 * They seem to work with the current routing code. However there is
309 * some concern because of the two USB-OHCI HCs (original SiS 5595
310 * had only one). YMMV.
312 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
315 * bits [6:5] must be written 01
316 * bit 4 channel-select primary (0), secondary (1)
319 * bit 6 OHCI function disabled (0), enabled (1)
321 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
323 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
325 * We support USBIRQ (in addition to INTA-INTD) and keep the
326 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
328 * Currently the only reported exception is the new SiS 65x chipset
329 * which includes the SiS 69x southbridge. Here we have the 85C503
330 * router revision 0x04 and there are changes in the register layout
331 * mostly related to the different USB HCs with USB 2.0 support.
333 * Onchip routing for router rev-id 0x04 (try-and-error observation)
335 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
336 * bit 6-4 are probably unused, not like 5595
339 #define PIRQ_SIS_IRQ_MASK 0x0f
340 #define PIRQ_SIS_IRQ_DISABLE 0x80
341 #define PIRQ_SIS_USB_ENABLE 0x40
343 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
349 if (reg
>= 0x01 && reg
<= 0x04)
351 pci_read_config_byte(router
, reg
, &x
);
352 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
355 static int pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
361 if (reg
>= 0x01 && reg
<= 0x04)
363 pci_read_config_byte(router
, reg
, &x
);
364 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
365 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
366 pci_write_config_byte(router
, reg
, x
);
372 * VLSI: nibble offset 0x74 - educated guess due to routing table and
373 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
374 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
375 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
376 * for the busbridge to the docking station.
379 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
382 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
385 return read_config_nybble(router
, 0x74, pirq
-1);
388 static int pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
391 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
394 write_config_nybble(router
, 0x74, pirq
-1, irq
);
399 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
400 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
401 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
402 * register is a straight binary coding of desired PIC IRQ (low nibble).
404 * The 'link' value in the PIRQ table is already in the correct format
405 * for the Index register. There are some special index values:
406 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
407 * and 0x03 for SMBus.
409 static int pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
412 return inb(0xc01) & 0xf;
415 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
422 /* Support for AMD756 PCI IRQ Routing
423 * Jhon H. Caicedo <jhcaiced@osso.org.co>
424 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
425 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
426 * The AMD756 pirq rules are nibble-based
427 * offset 0x56 0-3 PIRQA 4-7 PIRQB
428 * offset 0x57 0-3 PIRQC 4-7 PIRQD
430 static int pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
436 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
438 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
439 dev
->vendor
, dev
->device
, pirq
, irq
);
443 static int pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
445 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
446 dev
->vendor
, dev
->device
, pirq
, irq
);
449 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
454 #ifdef CONFIG_PCI_BIOS
456 static int pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
458 struct pci_dev
*bridge
;
459 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
460 return pcibios_set_irq_routing(bridge
, pin
, irq
);
465 static __init
int intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
467 static struct pci_device_id pirq_440gx
[] = {
468 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_0
) },
469 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_2
) },
473 /* 440GX has a proprietary PIRQ router -- don't use it */
474 if (pci_dev_present(pirq_440gx
))
479 case PCI_DEVICE_ID_INTEL_82371FB_0
:
480 case PCI_DEVICE_ID_INTEL_82371SB_0
:
481 case PCI_DEVICE_ID_INTEL_82371AB_0
:
482 case PCI_DEVICE_ID_INTEL_82371MX
:
483 case PCI_DEVICE_ID_INTEL_82443MX_0
:
484 case PCI_DEVICE_ID_INTEL_82801AA_0
:
485 case PCI_DEVICE_ID_INTEL_82801AB_0
:
486 case PCI_DEVICE_ID_INTEL_82801BA_0
:
487 case PCI_DEVICE_ID_INTEL_82801BA_10
:
488 case PCI_DEVICE_ID_INTEL_82801CA_0
:
489 case PCI_DEVICE_ID_INTEL_82801CA_12
:
490 case PCI_DEVICE_ID_INTEL_82801DB_0
:
491 case PCI_DEVICE_ID_INTEL_82801E_0
:
492 case PCI_DEVICE_ID_INTEL_82801EB_0
:
493 case PCI_DEVICE_ID_INTEL_ESB_1
:
494 case PCI_DEVICE_ID_INTEL_ICH6_0
:
495 case PCI_DEVICE_ID_INTEL_ICH6_1
:
496 case PCI_DEVICE_ID_INTEL_ICH7_0
:
497 case PCI_DEVICE_ID_INTEL_ICH7_1
:
498 r
->name
= "PIIX/ICH";
499 r
->get
= pirq_piix_get
;
500 r
->set
= pirq_piix_set
;
506 static __init
int via_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
508 /* FIXME: We should move some of the quirk fixup stuff here */
511 case PCI_DEVICE_ID_VIA_82C586_0
:
512 case PCI_DEVICE_ID_VIA_82C596
:
513 case PCI_DEVICE_ID_VIA_82C686
:
514 case PCI_DEVICE_ID_VIA_8231
:
515 /* FIXME: add new ones for 8233/5 */
517 r
->get
= pirq_via_get
;
518 r
->set
= pirq_via_set
;
524 static __init
int vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
528 case PCI_DEVICE_ID_VLSI_82C534
:
529 r
->name
= "VLSI 82C534";
530 r
->get
= pirq_vlsi_get
;
531 r
->set
= pirq_vlsi_set
;
538 static __init
int serverworks_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
542 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
543 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
544 r
->name
= "ServerWorks";
545 r
->get
= pirq_serverworks_get
;
546 r
->set
= pirq_serverworks_set
;
552 static __init
int sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
554 if (device
!= PCI_DEVICE_ID_SI_503
)
558 r
->get
= pirq_sis_get
;
559 r
->set
= pirq_sis_set
;
563 static __init
int cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
567 case PCI_DEVICE_ID_CYRIX_5520
:
569 r
->get
= pirq_cyrix_get
;
570 r
->set
= pirq_cyrix_set
;
576 static __init
int opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
580 case PCI_DEVICE_ID_OPTI_82C700
:
582 r
->get
= pirq_opti_get
;
583 r
->set
= pirq_opti_set
;
589 static __init
int ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
593 case PCI_DEVICE_ID_ITE_IT8330G_0
:
595 r
->get
= pirq_ite_get
;
596 r
->set
= pirq_ite_set
;
602 static __init
int ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
606 case PCI_DEVICE_ID_AL_M1533
:
607 case PCI_DEVICE_ID_AL_M1563
:
608 printk("PCI: Using ALI IRQ Router\n");
610 r
->get
= pirq_ali_get
;
611 r
->set
= pirq_ali_set
;
617 static __init
int amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
621 case PCI_DEVICE_ID_AMD_VIPER_740B
:
624 case PCI_DEVICE_ID_AMD_VIPER_7413
:
627 case PCI_DEVICE_ID_AMD_VIPER_7443
:
633 r
->get
= pirq_amd756_get
;
634 r
->set
= pirq_amd756_set
;
638 static __initdata
struct irq_router_handler pirq_routers
[] = {
639 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
640 { PCI_VENDOR_ID_AL
, ali_router_probe
},
641 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
642 { PCI_VENDOR_ID_VIA
, via_router_probe
},
643 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
644 { PCI_VENDOR_ID_SI
, sis_router_probe
},
645 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
646 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
647 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
648 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
649 /* Someone with docs needs to add the ATI Radeon IGP */
652 static struct irq_router pirq_router
;
653 static struct pci_dev
*pirq_router_dev
;
657 * FIXME: should we have an option to say "generic for
661 static void __init
pirq_find_router(struct irq_router
*r
)
663 struct irq_routing_table
*rt
= pirq_table
;
664 struct irq_router_handler
*h
;
666 #ifdef CONFIG_PCI_BIOS
667 if (!rt
->signature
) {
668 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
669 r
->set
= pirq_bios_set
;
675 /* Default unless a driver reloads it */
680 DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
681 rt
->rtr_vendor
, rt
->rtr_device
);
683 pirq_router_dev
= pci_find_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
684 if (!pirq_router_dev
) {
685 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
689 for( h
= pirq_routers
; h
->vendor
; h
++) {
690 /* First look for a router match */
691 if (rt
->rtr_vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
693 /* Fall back to a device match */
694 if (pirq_router_dev
->vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
697 printk(KERN_INFO
"PCI: Using IRQ router %s [%04x/%04x] at %s\n",
699 pirq_router_dev
->vendor
,
700 pirq_router_dev
->device
,
701 pci_name(pirq_router_dev
));
704 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
706 struct irq_routing_table
*rt
= pirq_table
;
707 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
);
708 struct irq_info
*info
;
710 for (info
= rt
->slots
; entries
--; info
++)
711 if (info
->bus
== dev
->bus
->number
&& PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
716 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
719 struct irq_info
*info
;
723 struct irq_router
*r
= &pirq_router
;
724 struct pci_dev
*dev2
= NULL
;
728 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
730 DBG(" -> no interrupt pin\n");
735 /* Find IRQ routing entry */
740 DBG("IRQ for %s[%c]", pci_name(dev
), 'A' + pin
);
741 info
= pirq_get_info(dev
);
743 DBG(" -> not found in routing table\n");
746 pirq
= info
->irq
[pin
].link
;
747 mask
= info
->irq
[pin
].bitmap
;
749 DBG(" -> not routed\n");
752 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq
, mask
, pirq_table
->exclusive_irqs
);
753 mask
&= pcibios_irq_mask
;
755 /* Work around broken HP Pavilion Notebooks which assign USB to
756 IRQ 9 even though it is actually wired to IRQ 11 */
758 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
760 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
761 r
->set(pirq_router_dev
, dev
, pirq
, 11);
764 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
765 if (acer_tm360_irqrouting
&& dev
->irq
== 11 && dev
->vendor
== PCI_VENDOR_ID_O2
) {
768 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
769 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
773 * Find the best IRQ to assign: use the one
774 * reported by the device if possible.
777 if (!((1 << newirq
) & mask
)) {
778 if ( pci_probe
& PCI_USE_PIRQ_MASK
) newirq
= 0;
779 else printk(KERN_WARNING
"PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq
, pci_name(dev
));
781 if (!newirq
&& assign
) {
782 for (i
= 0; i
< 16; i
++) {
783 if (!(mask
& (1 << i
)))
785 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] && can_request_irq(i
, SA_SHIRQ
))
789 DBG(" -> newirq=%d", newirq
);
791 /* Check if it is hardcoded */
792 if ((pirq
& 0xf0) == 0xf0) {
794 DBG(" -> hardcoded IRQ %d\n", irq
);
796 } else if ( r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
797 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
)) ) {
798 DBG(" -> got IRQ %d\n", irq
);
800 } else if (newirq
&& r
->set
&& (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
801 DBG(" -> assigning IRQ %d", newirq
);
802 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
803 eisa_set_level_irq(newirq
);
811 DBG(" ... failed\n");
812 if (newirq
&& mask
== (1 << newirq
)) {
818 printk(KERN_INFO
"PCI: %s IRQ %d for device %s\n", msg
, irq
, pci_name(dev
));
820 /* Update IRQ for all devices with the same pirq value */
821 while ((dev2
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev2
)) != NULL
) {
822 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
826 info
= pirq_get_info(dev2
);
829 if (info
->irq
[pin
].link
== pirq
) {
830 /* We refuse to override the dev->irq information. Give a warning! */
831 if ( dev2
->irq
&& dev2
->irq
!= irq
&& \
832 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
833 ((1 << dev2
->irq
) & mask
)) ) {
834 #ifndef CONFIG_PCI_MSI
835 printk(KERN_INFO
"IRQ routing conflict for %s, have irq %d, want irq %d\n",
836 pci_name(dev2
), dev2
->irq
, irq
);
843 printk(KERN_INFO
"PCI: Sharing IRQ %d with %s\n", irq
, pci_name(dev2
));
849 static void __init
pcibios_fixup_irqs(void)
851 struct pci_dev
*dev
= NULL
;
854 DBG("PCI: IRQ fixup\n");
855 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
857 * If the BIOS has set an out of range IRQ number, just ignore it.
858 * Also keep track of which IRQ's are already in use.
860 if (dev
->irq
>= 16) {
861 DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev
), dev
->irq
);
864 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
865 if (pirq_penalty
[dev
->irq
] >= 100 && pirq_penalty
[dev
->irq
] < 100000)
866 pirq_penalty
[dev
->irq
] = 0;
867 pirq_penalty
[dev
->irq
]++;
871 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
872 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
873 #ifdef CONFIG_X86_IO_APIC
875 * Recalculate IRQ numbers if we use the I/O APIC.
877 if (io_apic_assign_pci_irqs
)
882 pin
--; /* interrupt pins are numbered starting from 1 */
883 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
885 * Busses behind bridges are typically not listed in the MP-table.
886 * In this case we have to look up the IRQ based on the parent bus,
887 * parent slot, and pin number. The SMP code detects such bridged
888 * busses itself so we should get into this branch reliably.
890 if (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
891 struct pci_dev
* bridge
= dev
->bus
->self
;
893 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
894 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
895 PCI_SLOT(bridge
->devfn
), pin
);
897 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
898 pci_name(bridge
), 'A' + pin
, irq
);
901 if (use_pci_vector() &&
902 !platform_legacy_irq(irq
))
903 irq
= IO_APIC_VECTOR(irq
);
905 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
906 pci_name(dev
), 'A' + pin
, irq
);
913 * Still no IRQ? Try to lookup one...
915 if (pin
&& !dev
->irq
)
916 pcibios_lookup_irq(dev
, 0);
921 * Work around broken HP Pavilion Notebooks which assign USB to
922 * IRQ 9 even though it is actually wired to IRQ 11
924 static int __init
fix_broken_hp_bios_irq9(struct dmi_system_id
*d
)
926 if (!broken_hp_bios_irq9
) {
927 broken_hp_bios_irq9
= 1;
928 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
934 * Work around broken Acer TravelMate 360 Notebooks which assign
935 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
937 static int __init
fix_acer_tm360_irqrouting(struct dmi_system_id
*d
)
939 if (!acer_tm360_irqrouting
) {
940 acer_tm360_irqrouting
= 1;
941 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
946 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
948 .callback
= fix_broken_hp_bios_irq9
,
949 .ident
= "HP Pavilion N5400 Series Laptop",
951 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
952 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
953 DMI_MATCH(DMI_PRODUCT_VERSION
, "HP Pavilion Notebook Model GE"),
954 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
958 .callback
= fix_acer_tm360_irqrouting
,
959 .ident
= "Acer TravelMate 36x Laptop",
961 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
962 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
968 static int __init
pcibios_irq_init(void)
970 DBG("PCI: IRQ init\n");
972 if (pcibios_enable_irq
|| raw_pci_ops
== NULL
)
975 dmi_check_system(pciirq_dmi_table
);
977 pirq_table
= pirq_find_routing_table();
979 #ifdef CONFIG_PCI_BIOS
980 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
981 pirq_table
= pcibios_get_irq_routing_table();
985 pirq_find_router(&pirq_router
);
986 if (pirq_table
->exclusive_irqs
) {
989 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
990 pirq_penalty
[i
] += 100;
992 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
993 if (io_apic_assign_pci_irqs
)
997 pcibios_enable_irq
= pirq_enable_irq
;
999 pcibios_fixup_irqs();
1003 subsys_initcall(pcibios_irq_init
);
1006 static void pirq_penalize_isa_irq(int irq
)
1009 * If any ISAPnP device reports an IRQ in its list of possible
1010 * IRQ's, we try to avoid assigning it to PCI devices.
1013 pirq_penalty
[irq
] += 100;
1016 void pcibios_penalize_isa_irq(int irq
)
1018 #ifdef CONFIG_ACPI_PCI
1020 acpi_penalize_isa_irq(irq
);
1023 pirq_penalize_isa_irq(irq
);
1026 static int pirq_enable_irq(struct pci_dev
*dev
)
1029 extern int via_interrupt_line_quirk
;
1030 struct pci_dev
*temp_dev
;
1032 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1033 if (pin
&& !pcibios_lookup_irq(dev
, 1) && !dev
->irq
) {
1036 pin
--; /* interrupt pins are numbered starting from 1 */
1038 if (io_apic_assign_pci_irqs
) {
1041 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
1043 * Busses behind bridges are typically not listed in the MP-table.
1044 * In this case we have to look up the IRQ based on the parent bus,
1045 * parent slot, and pin number. The SMP code detects such bridged
1046 * busses itself so we should get into this branch reliably.
1049 while (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1050 struct pci_dev
* bridge
= dev
->bus
->self
;
1052 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1053 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1054 PCI_SLOT(bridge
->devfn
), pin
);
1056 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
1057 pci_name(bridge
), 'A' + pin
, irq
);
1062 #ifdef CONFIG_PCI_MSI
1063 if (!platform_legacy_irq(irq
))
1064 irq
= IO_APIC_VECTOR(irq
);
1066 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1067 pci_name(dev
), 'A' + pin
, irq
);
1071 msg
= " Probably buggy MP table.";
1072 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1075 msg
= " Please try using pci=biosirq.";
1077 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1078 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&& !(dev
->class & 0x5))
1081 printk(KERN_WARNING
"PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1082 'A' + pin
, pci_name(dev
), msg
);
1084 /* VIA bridges use interrupt line for apic/pci steering across
1086 else if (via_interrupt_line_quirk
)
1087 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
& 15);
1091 int pci_vector_resources(int last
, int nr_released
)
1093 int count
= nr_released
;
1096 int offset
= (last
% 8);
1098 while (next
< FIRST_SYSTEM_VECTOR
) {
1100 #ifdef CONFIG_X86_64
1101 if (next
== IA32_SYSCALL_VECTOR
)
1104 if (next
== SYSCALL_VECTOR
)
1108 if (next
>= FIRST_SYSTEM_VECTOR
) {
1110 next
= FIRST_DEVICE_VECTOR
+ offset
;