arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

   1 /*
   2  *      Pentium 4/Xeon CPU on demand clock modulation/speed scaling
   3  *      (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   4  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   5  *      (C) 2002 Arjan van de Ven <arjanv@redhat.com>
   6  *      (C) 2002 Tora T. Engstad
   7  *      All Rights Reserved
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  *
  14  *      The author(s) of this software shall not be held liable for damages
  15  *      of any nature resulting due to the use of this software. This
  16  *      software is provided AS-IS with no warranties.
  17  *
  18  *      Date            Errata                  Description
  19  *      20020525        N44, O17        12.5% or 25% DC causes lockup
  20  *
  21  */
  22
  23 #include <linux/config.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/smp.h>
  28 #include <linux/cpufreq.h>
  29 #include <linux/slab.h>
  30 #include <linux/cpumask.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/msr.h>
  34 #include <asm/timex.h>
  35
  36 #include "speedstep-lib.h"
  37
  38 #define PFX     "p4-clockmod: "
  39 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
  40
  41 /*
  42  * Duty Cycle (3bits), note DC_DISABLE is not specified in
  43  * intel docs i just use it to mean disable
  44  */
  45 enum {
  46         DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT,
  47         DC_64PT, DC_75PT, DC_88PT, DC_DISABLE
  48 };
  49
  50 #define DC_ENTRIES      8
  51
  52
  53 static int has_N44_O17_errata[NR_CPUS];
  54 static unsigned int stock_freq;
  55 static struct cpufreq_driver p4clockmod_driver;
  56 static unsigned int cpufreq_p4_get(unsigned int cpu);
  57
  58 static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
  59 {
  60         u32 l, h;
  61
  62         if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
  63                 return -EINVAL;
  64
  65         rdmsr(MSR_IA32_THERM_STATUS, l, h);
  66
  67         if (l & 0x01)
  68                 dprintk("CPU#%d currently thermal throttled\n", cpu);
  69
  70         if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
  71                 newstate = DC_38PT;
  72
  73         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
  74         if (newstate == DC_DISABLE) {
  75                 dprintk("CPU#%d disabling modulation\n", cpu);
  76                 wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
  77         } else {
  78                 dprintk("CPU#%d setting duty cycle to %d%%\n",
  79                         cpu, ((125 * newstate) / 10));
  80                 /* bits 63 - 5  : reserved
  81                  * bit  4       : enable/disable
  82                  * bits 3-1     : duty cycle
  83                  * bit  0       : reserved
  84                  */
  85                 l = (l & ~14);
  86                 l = l | (1<<4) | ((newstate & 0x7)<<1);
  87                 wrmsr(MSR_IA32_THERM_CONTROL, l, h);
  88         }
  89
  90         return 0;
  91 }
  92
  93
  94 static struct cpufreq_frequency_table p4clockmod_table[] = {
  95         {DC_RESV, CPUFREQ_ENTRY_INVALID},
  96         {DC_DFLT, 0},
  97         {DC_25PT, 0},
  98         {DC_38PT, 0},
  99         {DC_50PT, 0},
 100         {DC_64PT, 0},
 101         {DC_75PT, 0},
 102         {DC_88PT, 0},
 103         {DC_DISABLE, 0},
 104         {DC_RESV, CPUFREQ_TABLE_END},
 105 };
 106
 107
 108 static int cpufreq_p4_target(struct cpufreq_policy *policy,
 109                              unsigned int target_freq,
 110                              unsigned int relation)
 111 {
 112         unsigned int    newstate = DC_RESV;
 113         struct cpufreq_freqs freqs;
 114         cpumask_t cpus_allowed;
 115         int i;
 116
 117         if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
 118                 return -EINVAL;
 119
 120         freqs.old = cpufreq_p4_get(policy->cpu);
 121         freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
 122
 123         if (freqs.new == freqs.old)
 124                 return 0;
 125
 126         /* notifiers */
 127         for_each_cpu_mask(i, policy->cpus) {
 128                 freqs.cpu = i;
 129                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 130         }
 131
 132         /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
 133          * Developer's Manual, Volume 3
 134          */
 135         cpus_allowed = current->cpus_allowed;
 136
 137         for_each_cpu_mask(i, policy->cpus) {
 138                 cpumask_t this_cpu = cpumask_of_cpu(i);
 139
 140                 set_cpus_allowed(current, this_cpu);
 141                 BUG_ON(smp_processor_id() != i);
 142
 143                 cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
 144         }
 145         set_cpus_allowed(current, cpus_allowed);
 146
 147         /* notifiers */
 148         for_each_cpu_mask(i, policy->cpus) {
 149                 freqs.cpu = i;
 150                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 151         }
 152
 153         return 0;
 154 }
 155
 156
 157 static int cpufreq_p4_verify(struct cpufreq_policy *policy)
 158 {
 159         return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]);
 160 }
 161
 162
 163 static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 164 {
 165         if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {
 166                 /* Pentium M (Banias) */
 167                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 168                        "The speedstep_centrino module offers voltage scaling"
 169                        " in addition of frequency scaling. You should use "
 170                        "that instead of p4-clockmod, if possible.\n");
 171                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 172         }
 173
 174         if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) {
 175                 /* Pentium M (Dothan) */
 176                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 177                        "The speedstep_centrino module offers voltage scaling"
 178                        " in addition of frequency scaling. You should use "
 179                        "that instead of p4-clockmod, if possible.\n");
 180                 /* on P-4s, the TSC runs with constant frequency independent whether
 181                  * throttling is active or not. */
 182                 p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 183                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 184         }
 185
 186         if (c->x86 != 0xF) {
 187                 printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");
 188                 return 0;
 189         }
 190
 191         /* on P-4s, the TSC runs with constant frequency independent whether
 192          * throttling is active or not. */
 193         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 194
 195         if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
 196                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
 197                        "The speedstep-ich or acpi cpufreq modules offer "
 198                        "voltage scaling in addition of frequency scaling. "
 199                        "You should use either one instead of p4-clockmod, "
 200                        "if possible.\n");
 201                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
 202         }
 203
 204         return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
 205 }
 206
 207
 208
 209 static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
 210 {
 211         struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
 212         int cpuid = 0;
 213         unsigned int i;
 214
 215 #ifdef CONFIG_SMP
 216         policy->cpus = cpu_sibling_map[policy->cpu];
 217 #endif
 218
 219         /* Errata workaround */
 220         cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
 221         switch (cpuid) {
 222         case 0x0f07:
 223         case 0x0f0a:
 224         case 0x0f11:
 225         case 0x0f12:
 226                 has_N44_O17_errata[policy->cpu] = 1;
 227                 dprintk("has errata -- disabling low frequencies\n");
 228         }
 229
 230         /* get max frequency */
 231         stock_freq = cpufreq_p4_get_frequency(c);
 232         if (!stock_freq)
 233                 return -EINVAL;
 234
 235         /* table init */
 236         for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
 237                 if ((i<2) && (has_N44_O17_errata[policy->cpu]))
 238                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 239                 else
 240                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
 241         }
 242         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 243
 244         /* cpuinfo and default policy values */
 245         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 246         policy->cpuinfo.transition_latency = 1000000; /* assumed */
 247         policy->cur = stock_freq;
 248
 249         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
 250 }
 251
 252
 253 static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
 254 {
 255         cpufreq_frequency_table_put_attr(policy->cpu);
 256         return 0;
 257 }
 258
 259 static unsigned int cpufreq_p4_get(unsigned int cpu)
 260 {
 261         cpumask_t cpus_allowed;
 262         u32 l, h;
 263
 264         cpus_allowed = current->cpus_allowed;
 265
 266         set_cpus_allowed(current, cpumask_of_cpu(cpu));
 267         BUG_ON(smp_processor_id() != cpu);
 268
 269         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
 270
 271         set_cpus_allowed(current, cpus_allowed);
 272
 273         if (l & 0x10) {
 274                 l = l >> 1;
 275                 l &= 0x7;
 276         } else
 277                 l = DC_DISABLE;
 278
 279         if (l != DC_DISABLE)
 280                 return (stock_freq * l / 8);
 281
 282         return stock_freq;
 283 }
 284
 285 static struct freq_attr* p4clockmod_attr[] = {
 286         &cpufreq_freq_attr_scaling_available_freqs,
 287         NULL,
 288 };
 289
 290 static struct cpufreq_driver p4clockmod_driver = {
 291         .verify         = cpufreq_p4_verify,
 292         .target         = cpufreq_p4_target,
 293         .init           = cpufreq_p4_cpu_init,
 294         .exit           = cpufreq_p4_cpu_exit,
 295         .get            = cpufreq_p4_get,
 296         .name           = "p4-clockmod",
 297         .owner          = THIS_MODULE,
 298         .attr           = p4clockmod_attr,
 299 };
 300
 301
 302 static int __init cpufreq_p4_init(void)
 303 {
 304         struct cpuinfo_x86 *c = cpu_data;
 305         int ret;
 306
 307         /*
 308          * THERM_CONTROL is architectural for IA32 now, so
 309          * we can rely on the capability checks
 310          */
 311         if (c->x86_vendor != X86_VENDOR_INTEL)
 312                 return -ENODEV;
 313
 314         if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
 315                 !test_bit(X86_FEATURE_ACC, c->x86_capability))
 316                 return -ENODEV;
 317
 318         ret = cpufreq_register_driver(&p4clockmod_driver);
 319         if (!ret)
 320                 printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
 321
 322         return (ret);
 323 }
 324
 325
 326 static void __exit cpufreq_p4_exit(void)
 327 {
 328         cpufreq_unregister_driver(&p4clockmod_driver);
 329 }
 330
 331
 332 MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
 333 MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
 334 MODULE_LICENSE ("GPL");
 335
 336 late_initcall(cpufreq_p4_init);
 337 module_exit(cpufreq_p4_exit);