1 /* $Id: head.S,v 1.7 2004/05/14 07:58:01 starvik Exp $
3 * Head of the kernel - alter with care
5 * Copyright (C) 2000, 2001 Axis Communications AB
7 * Authors: Bjorn Wesen (bjornw@axis.com)
10 * Revision 1.7 2004/05/14 07:58:01 starvik
11 * Merge of changes from 2.4
13 * Revision 1.6 2003/04/28 05:31:46 starvik
14 * Added section attributes
16 * Revision 1.5 2002/12/11 15:42:02 starvik
17 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c
19 * Revision 1.4 2002/11/07 09:00:44 starvik
20 * Names changed for init sections
21 * init_task_union -> init_thread_union
23 * Revision 1.3 2002/02/05 15:38:23 bjornw
24 * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it...
26 * Revision 1.2 2001/12/18 13:35:19 bjornw
27 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
29 * Revision 1.43 2001/11/08 15:09:43 starvik
30 * Only start MII clock if Ethernet is configured
32 * Revision 1.42 2001/11/08 14:37:34 starvik
33 * Start MII clock early to make sure that it is running at tranceiver reset
35 * Revision 1.41 2001/10/29 14:55:58 pkj
36 * Corrected pa$r0 to par0.
38 * Revision 1.40 2001/10/03 14:59:57 pkj
39 * Added support for resetting the Bluetooth hardware.
41 * Revision 1.39 2001/10/01 14:45:03 bjornw
42 * Removed underscores and added register prefixes
44 * Revision 1.38 2001/09/21 07:14:11 jonashg
45 * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
47 * Revision 1.37 2001/09/11 13:44:29 orjanf
48 * Decouple usage of serial ports for debug and kgdb.
50 * Revision 1.36 2001/06/29 12:39:31 pkj
51 * Added support for mirroring the first flash to just below the
52 * second one, to make them look consecutive to cramfs.
54 * Revision 1.35 2001/06/25 14:07:00 hp
56 * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
57 * magic numbers. Add comment that -traditional must not be used.
58 * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
59 * Correct and update comment.
60 * * Makefile (.S.o): Don't use -traditional. Add comment why the
61 * toplevel rule can't be used (now that there's a reason).
63 * Revision 1.34 2001/05/15 07:08:14 hp
64 * Tweak "notice" to reflect that both r8 r9 are used
66 * Revision 1.33 2001/05/15 06:40:05 hp
67 * Put bulk of code in .text.init, data in .data.init
69 * Revision 1.32 2001/05/15 06:18:56 hp
70 * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g
72 * Revision 1.31 2001/05/15 06:08:40 hp
73 * Add sentence about autodetecting the bit31-MMU-bug
75 * Revision 1.30 2001/05/15 06:00:05 hp
76 * Update comment: LOW_MAP is not forced on xsim anymore.
78 * Revision 1.29 2001/04/18 12:51:59 orjanf
79 * * Reverted review change regarding the use of bcs/bcc.
80 * * Removed non-working LED-clearing code.
82 * Revision 1.28 2001/04/17 13:58:39 orjanf
83 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
85 * Revision 1.27 2001/04/17 11:42:35 orjanf
86 * Changed according to review:
87 * * Added comment explaining memory map bug.
88 * * Changed bcs and bcc to blo and bhs, respectively.
89 * * Removed mentioning of Stallone and Olga boards.
91 * Revision 1.26 2001/04/06 12:31:07 jonashg
92 * Check for cramfs in flash before RAM instead of RAM before flash.
94 * Revision 1.25 2001/04/04 06:23:53 starvik
95 * Initialize DRAM if not already initialized
97 * Revision 1.24 2001/04/03 11:12:00 starvik
98 * Removed dram init (done by rescue or etrax100boot
101 * Revision 1.23 2001/04/03 09:53:03 starvik
102 * Include hw_settings.S
104 * Revision 1.22 2001/03/26 14:23:26 bjornw
105 * Namechange of some config options
107 * Revision 1.21 2001/03/08 12:14:41 bjornw
108 * * Config name for ETRAX IDE was renamed
109 * * Removed G27 auto-setting when JULIETTE is chosen (need to make this
110 * a new config option later)
112 * Revision 1.20 2001/02/23 12:47:56 bjornw
113 * MMU regs during LOW_MAP updated to reflect a newer reality
115 * Revision 1.19 2001/02/19 11:12:07 bjornw
116 * Changed comment header format
118 * Revision 1.18 2001/02/15 07:25:38 starvik
119 * Added support for synchronous serial ports
121 * Revision 1.17 2001/02/08 15:53:13 starvik
122 * Last commit removed some important ifdefs
124 * Revision 1.16 2001/02/08 15:20:38 starvik
125 * Include dram_init.S as inline
127 * Revision 1.15 2001/01/29 18:12:01 bjornw
128 * Corrected some comments
130 * Revision 1.14 2001/01/29 13:11:29 starvik
131 * Include dram_init.S (with DRAM/SDRAM initialization)
133 * Revision 1.13 2001/01/23 14:54:57 markusl
135 * i.e. added r_gen_config settings
137 * Revision 1.12 2001/01/19 16:16:29 perf
138 * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion.
139 * Renamed serial options from ETRAX100 to ETRAX.
141 * Revision 1.11 2001/01/16 16:31:38 bjornw
142 * * Changed name and semantics of running_from_flash to romfs_in_flash,
143 * set by head.S to indicate to setup.c whether there is a cramfs image
144 * after the kernels BSS or not. Should work for all three boot-cases
145 * (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot),
146 * and flash with cramfs in flash)
148 * Revision 1.10 2001/01/16 14:12:21 bjornw
149 * * Check for cramfs start passed in r9 from the decompressor, if all other
150 * cramfs options fail (if we boot from DRAM but don't find a cramfs image
151 * after the kernel in DRAM, it is probably still in the flash)
152 * * Check magic in cramfs detection when booting from flash directly
154 * Revision 1.9 2001/01/15 17:17:02 bjornw
155 * * Corrected the code that detects the cramfs lengths
156 * * Added a comment saying that the above does not work due to other
159 * Revision 1.8 2001/01/15 16:27:51 jonashg
160 * Made boot after flashing work.
161 * * end destination is __vmlinux_end in RAM.
162 * * _romfs_start moved because of virtual memory.
164 * Revision 1.7 2000/11/21 13:55:29 bjornw
165 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
167 * Revision 1.6 2000/10/06 12:36:55 bjornw
168 * Forgot swapper_pg_dir when changing memory map..
170 * Revision 1.5 2000/10/04 16:49:30 bjornw
171 * * Fixed memory mapping in LX
172 * * Check for cramfs instead of romfs
176 #include <linux/config.h>
177 #define ASSEMBLER_MACROS_ONLY
178 /* The IO_* macros use the ## token concatenation operator, so
179 -traditional must not be used when assembling this file. */
180 #include <asm/arch/sv_addr_ag.h>
182 #define CRAMFS_MAGIC 0x28cd3d45
183 #define RAM_INIT_MAGIC 0x56902387
185 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
186 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
193 .globl romfs_in_flash
194 .globl swapper_pg_dir
198 ;; This is the entry point of the kernel. We are in supervisor mode.
199 ;; 0x00000000 if Flash, 0x40004000 if DRAM
200 ;; since etrax actually starts at address 2 when booting from flash, we
201 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
203 ;; NOTICE! The registers r8 and r9 are used as parameters carrying
204 ;; information from the decompressor (if the kernel was compressed).
205 ;; They should not be used in the code below until read.
210 ;; First setup the kseg_c mapping from where the kernel is linked
211 ;; to 0x40000000 (where the actual DRAM resides) otherwise
212 ;; we cannot do very much! See arch/cris/README.mm
214 ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
215 ;; we will get a fault as soon as we enable the MMU if we dont
216 ;; temporarily map those segments linearily.
218 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
219 ;; slightly different. The bug is that you can't remap bit 31 of
220 ;; an address. Though we can check the version register for
221 ;; whether the bug is present, some constants would then have to
222 ;; be variables, so we don't. The drawback is that you can "only" map
223 ;; 1G per process with CONFIG_CRIS_LOW_MAP.
225 #ifdef CONFIG_CRIS_LOW_MAP
226 ; kseg mappings, temporary map of 0xc0->0x40
227 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
228 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
229 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
230 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
231 move.d $r0, [R_MMU_KBASE_HI]
233 ; temporary map of 0x40->0x40 and 0x60->0x40
234 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
235 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
236 move.d $r0, [R_MMU_KBASE_LO]
238 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
239 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
240 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
241 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
242 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
243 | IO_STATE (R_MMU_CONFIG, seg_f, page) \
244 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
245 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
246 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
247 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
248 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
249 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
250 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
251 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
252 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
253 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
254 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
255 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
256 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
257 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
258 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
259 move.d $r0, [R_MMU_CONFIG]
262 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
263 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
264 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
265 move.d $r0, [R_MMU_KBASE_HI]
267 ; temporary map of 0x40->0x40 and 0x00->0x00
268 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
269 move.d $r0, [R_MMU_KBASE_LO]
271 ; mmu enable, segs f,e,c,b,4,0 segment mapped
272 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
273 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
274 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
275 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
276 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
277 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
278 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
279 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
280 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
281 | IO_STATE (R_MMU_CONFIG, seg_a, page) \
282 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
283 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
284 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
285 | IO_STATE (R_MMU_CONFIG, seg_6, page) \
286 | IO_STATE (R_MMU_CONFIG, seg_5, page) \
287 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
288 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
289 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
290 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
291 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
292 move.d $r0, [R_MMU_CONFIG]
295 ;; Now we need to sort out the segments and their locations in RAM or
296 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
297 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
298 ;; But the linker has linked the kernel to expect this layout in
300 ;; 1) kernel text, 2) kernel data, 3) kernel BSS
301 ;; (the location of the ROM filesystem is determined by the krom driver)
302 ;; If we boot this from Flash, we want to keep the ROM filesystem in
303 ;; the flash, we want to copy the text and need to copy the data to DRAM.
304 ;; But if we boot from DRAM, we need to move the ROMFS image
305 ;; from its position after kernel data, to after kernel BSS, BEFORE the
306 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
308 ;; In both cases, we start in un-cached mode, and need to jump into a
309 ;; cached PC after we're done fiddling around with the segments.
311 ;; arch/etrax100/etrax100.ld sets some symbols that define the start
312 ;; and end of each segment.
314 ;; Check if we start from DRAM or FLASH by testing PC
317 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
318 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
322 jump _inram ; enter cached ram
324 ;; Jumpgate for branches.
328 ;; Put this in a suitable section where we can reclaim storage
330 .section ".init.text", "ax"
332 #ifdef CONFIG_ETRAX_ETHERNET
333 ;; Start MII clock to make sure it is running when tranceiver is reset
334 move.d START_ETHERNET_CLOCK, $r0
335 move.d $r0, [R_NETWORK_GEN_CONFIG]
338 ;; Set up waitstates etc according to kernel configuration.
339 #ifndef CONFIG_SVINTO_SIM
340 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
341 move.d $r0, [R_WAITSTATES]
343 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
344 move.d $r0, [R_BUS_CONFIG]
347 ;; We need to initialze DRAM registers before we start using the DRAM
349 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
350 beq _dram_init_finished
353 #include "../lib/dram_init.S"
356 ;; Copy text+data to DRAM
357 ;; This is fragile - the calculation of r4 as the image size depends
358 ;; on that the labels below actually are the first and last positions
359 ;; in the linker-script.
361 ;; Then the locating of the cramfs image depends on the aforementioned
362 ;; image being located in the flash at 0. This is most often not true,
363 ;; thus the following does not work (normally there is a rescue-block
364 ;; between the physical start of the flash and the flash-image start,
365 ;; and when run with compression, the kernel is actually unpacked to
366 ;; DRAM and we never get here in the first place :))
368 moveq 0, $r0 ; source
369 move.d text_start, $r1 ; destination
370 move.d __vmlinux_end, $r2 ; end destination
372 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
373 1: move.w [$r0+], $r3
379 ;; We keep the cramfs in the flash.
380 ;; There might be none, but that does not matter because
381 ;; we don't do anything than read some bytes here.
384 move.d $r0, [romfs_length] ; default if there is no cramfs
386 move.d [$r4], $r0 ; cramfs_super.magic
387 cmp.d CRAMFS_MAGIC, $r0
390 move.d [$r4 + 4], $r0 ; cramfs_super.size
391 move.d $r0, [romfs_length]
392 #ifdef CONFIG_CRIS_LOW_MAP
393 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
395 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
397 move.d $r4, [romfs_start]
400 move.d $r0, [romfs_in_flash]
402 jump _start_it ; enter code, cached this time
405 ;; Move the ROM fs to after BSS end. This assumes that the cramfs
406 ;; second longword contains the length of the cramfs
409 move.d $r0, [romfs_length] ; default if there is no cramfs
411 ;; The kernel could have been unpacked to DRAM by the loader, but
412 ;; the cramfs image could still be in the Flash directly after the
413 ;; compressed kernel image. The loader passes the address of the
414 ;; byte succeeding the last compressed byte in the flash in the
415 ;; register r9 when starting the kernel. Check if r9 points to a
416 ;; decent cramfs image!
417 ;; (Notice that if this is not booted from the loader, r9 will be
418 ;; garbage but we do sanity checks on it, the chance that it points
419 ;; to a cramfs magic is small.. )
421 cmp.d 0x0ffffff8, $r9
422 bhs _no_romfs_in_flash ; r9 points outside the flash area
424 move.d [$r9], $r0 ; cramfs_super.magic
425 cmp.d CRAMFS_MAGIC, $r0
426 bne _no_romfs_in_flash
428 move.d [$r9+4], $r0 ; cramfs_super.length
429 move.d $r0, [romfs_length]
430 #ifdef CONFIG_CRIS_LOW_MAP
431 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
433 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
435 move.d $r9, [romfs_start]
438 move.d $r0, [romfs_in_flash]
440 jump _start_it ; enter code, cached this time
444 ;; Check if there is a cramfs (magic value).
445 ;; Notice that we check for cramfs magic value - which is
446 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
447 ;; not need this mechanism anyway)
449 move.d __vmlinux_end, $r0; the image will be after the vmlinux end address
450 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
451 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
455 ;; Ok. What is its size ?
457 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
459 ;; We want to copy it to the end of the BSS
463 ;; Remember values so cramfs and setup can find this info
465 move.d $r1, [romfs_start] ; new romfs location
466 move.d $r2, [romfs_length]
468 ;; We need to copy it backwards, since they can be overlapping
473 ;; Go ahead. Make my loop.
475 lsrq 1, $r2 ; size is in bytes, we copy words
477 1: move.w [$r0=$r0-2],$r3
478 move.w $r3,[$r1=$r1-2]
484 ;; Dont worry that the BSS is tainted. It will be cleared later.
487 move.d $r0, [romfs_in_flash]
489 jump _start_it ; better skip the additional cramfs check below
493 ;; the kernel stack is overlayed with the task structure for each
494 ;; task. thus the initial kernel stack is in the same page as the
495 ;; init_task (but starts in the top of the page, size 8192)
496 move.d init_thread_union + 8192, $sp
497 move.d ibr_start,$r0 ; this symbol is set by the linker script
499 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
501 ;; Clear BSS region, from _bss_start to _end
503 move.d __bss_start, $r0
510 #ifdef CONFIG_BLK_DEV_ETRAXIDE
511 ;; disable ATA before enabling it in genconfig below
513 move.d $r0,[R_ATA_CTRL_DATA]
514 move.d $r0,[R_ATA_TRANSFER_CNT]
515 move.d $r0,[R_ATA_CONFIG]
517 move.d R_PORT_G_DATA, $r1
518 move.d $r0, [$r1]; assert ATA bus-reset
525 move.d 0x08000000,$r0
530 #ifdef CONFIG_JULIETTE
531 ;; configure external DMA channel 0 before enabling it in genconfig
534 move.d $r0,[R_EXT_DMA_0_ADDR]
535 ; cnt enable, word size, output, stop, size 0
536 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
537 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
538 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
539 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
540 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
541 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
542 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
543 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
544 move.d $r0,[R_EXT_DMA_0_CMD]
546 ;; reset dma4 and wait for completion
548 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
549 move.b $r0,[R_DMA_CH4_CMD]
550 1: move.b [R_DMA_CH4_CMD],$r0
551 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0
552 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
556 ;; reset dma5 and wait for completion
558 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
559 move.b $r0,[R_DMA_CH5_CMD]
560 1: move.b [R_DMA_CH5_CMD],$r0
561 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0
562 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
567 ;; Etrax product HW genconfig setup
570 #if (!defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT0)) \
571 && !defined(CONFIG_DMA_MEMCPY)
572 ; DMA channels 6 and 7 to ser0, kgdb doesnt want DMA
573 or.d IO_STATE (R_GEN_CONFIG, dma7, serial0) \
574 | IO_STATE (R_GEN_CONFIG, dma6, serial0),$r0
576 #if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT1)
577 ; DMA channels 8 and 9 to ser1, kgdb doesnt want DMA
578 or.d IO_STATE (R_GEN_CONFIG, dma9, serial1) \
579 | IO_STATE (R_GEN_CONFIG, dma8, serial1),$r0
581 #ifdef CONFIG_DMA_MEMCPY
582 ; 6/7 memory-memory DMA
583 or.d IO_STATE (R_GEN_CONFIG, dma7, intdma6) \
584 | IO_STATE (R_GEN_CONFIG, dma6, intdma7),$r0
586 #ifdef CONFIG_ETRAX_SERIAL_PORT2
587 ; Enable serial port 2
588 or.w IO_STATE (R_GEN_CONFIG, ser2, select),$r0
589 #if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT2)
590 ; DMA channels 2 and 3 to ser2, kgdb doesnt want DMA
591 or.d IO_STATE (R_GEN_CONFIG, dma3, serial2) \
592 | IO_STATE (R_GEN_CONFIG, dma2, serial2),$r0
595 #if defined(CONFIG_ETRAX_SERIAL_PORT3) || defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
596 ; Enable serial port 3
597 or.w IO_STATE (R_GEN_CONFIG, ser3, select),$r0
598 #if !defined(CONFIG_ETRAX_KGDB) || !defined(CONFIG_ETRAX_DEBUG_PORT3)
599 ; DMA channels 4 and 5 to ser3, kgdb doesnt want DMA
600 or.d IO_STATE (R_GEN_CONFIG, dma5, serial3) \
601 | IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
604 #if defined(CONFIG_ETRAX_PARALLEL_PORT0) || defined(CONFIG_ETRAX_ETHERNET_LPSLAVE)
605 ; parport 0 enabled using DMA 2/3
606 or.w IO_STATE (R_GEN_CONFIG, par0, select),$r0
608 #if defined(CONFIG_ETRAX_PARALLEL_PORT1) || defined(CONFIG_ETRAX_ETHERNET_LPSLAVE)
609 ; parport 1 enabled using DMA 4/5
610 or.w IO_STATE (R_GEN_CONFIG, par1, select),$r0
612 #ifdef CONFIG_ETRAX_IDE
613 ; DMA channels 2 and 3 to ATA, ATA enabled
614 or.d IO_STATE (R_GEN_CONFIG, dma3, ata) \
615 | IO_STATE (R_GEN_CONFIG, dma2, ata) \
616 | IO_STATE (R_GEN_CONFIG, ata, select),$r0
619 #ifdef CONFIG_ETRAX_USB_HOST_PORT1
620 ; Set the USB port 1 enable bit
621 or.d IO_STATE (R_GEN_CONFIG, usb1, select),$r0
623 #ifdef CONFIG_ETRAX_USB_HOST_PORT2
624 ; Set the USB port 2 enable bit
625 or.d IO_STATE (R_GEN_CONFIG, usb2, select),$r0
627 #ifdef CONFIG_ETRAX_USB_HOST
628 ; Connect DMA channels 8 and 9 to USB
629 and.d (~(IO_MASK (R_GEN_CONFIG, dma9) \
630 | IO_MASK (R_GEN_CONFIG, dma8))) \
631 | IO_STATE (R_GEN_CONFIG, dma9, usb) \
632 | IO_STATE (R_GEN_CONFIG, dma8, usb),$r0
635 #ifdef CONFIG_JULIETTE
636 ; DMA channels 4 and 5 to EXTDMA0, for Juliette
637 or.d IO_STATE (R_GEN_CONFIG, dma5, extdma0) \
638 | IO_STATE (R_GEN_CONFIG, dma4, extdma0),$r0
641 #if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT)
642 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
645 #if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT)
646 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
648 #if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT)
649 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
652 #if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT)
653 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
656 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
658 #ifndef CONFIG_SVINTO_SIM
659 move.d $r0,[R_GEN_CONFIG]
663 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
664 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
665 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
670 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
677 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
678 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
679 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
680 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
681 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
682 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
685 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
686 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
687 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
691 ;; setup port PA and PB default initial directions and data
692 ;; including their shadow registers
694 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
695 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
696 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
698 move.b $r0,[port_pa_dir_shadow]
699 move.b $r0,[R_PORT_PA_DIR]
700 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
701 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
702 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
708 move.b $r0,[port_pa_data_shadow]
709 move.b $r0,[R_PORT_PA_DATA]
711 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
712 move.b $r0,[port_pb_config_shadow]
713 move.b $r0,[R_PORT_PB_CONFIG]
714 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
715 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
716 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
718 move.b $r0,[port_pb_dir_shadow]
719 move.b $r0,[R_PORT_PB_DIR]
720 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
721 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
722 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
728 move.b $r0,[port_pb_data_shadow]
729 move.b $r0,[R_PORT_PB_DATA]
732 move.d $r0,[port_pb_i2c_shadow]
733 move.d $r0, [R_PORT_PB_I2C]
736 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10)
737 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
743 #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11)
744 #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
750 move.d $r0,[port_g_data_shadow]
751 move.d $r0,[R_PORT_G_DATA]
753 ;; setup the serial port 0 at 115200 baud for debug purposes
755 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
756 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
757 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
758 move.d $r0,[R_SERIAL0_XOFF]
760 ; 115.2kbaud for both transmit and receive
761 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
762 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
763 move.b $r0,[R_SERIAL0_BAUD]
765 ; Set up and enable the serial0 receiver.
766 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
767 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
768 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
769 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
770 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
771 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
772 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
773 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
774 move.b $r0,[R_SERIAL0_REC_CTRL]
776 ; Set up and enable the serial0 transmitter.
777 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
778 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
779 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
780 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
781 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
782 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
783 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
784 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
785 move.b $r0,[R_SERIAL0_TR_CTRL]
787 ;; setup the serial port 1 at 115200 baud for debug purposes
789 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
790 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
791 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
792 move.d $r0,[R_SERIAL1_XOFF]
794 ; 115.2kbaud for both transmit and receive
795 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
796 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
797 move.b $r0,[R_SERIAL1_BAUD]
799 ; Set up and enable the serial1 receiver.
800 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
801 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
802 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
803 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
804 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
805 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
806 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
807 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
808 move.b $r0,[R_SERIAL1_REC_CTRL]
810 ; Set up and enable the serial1 transmitter.
811 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
812 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
813 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
814 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
815 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
816 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
817 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
818 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
819 move.b $r0,[R_SERIAL1_TR_CTRL]
822 #ifdef CONFIG_ETRAX_SERIAL_PORT3
823 ;; setup the serial port 3 at 115200 baud for debug purposes
825 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
826 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
827 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
828 move.d $r0,[R_SERIAL3_XOFF]
830 ; 115.2kbaud for both transmit and receive
831 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
832 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
833 move.b $r0,[R_SERIAL3_BAUD]
835 ; Set up and enable the serial3 receiver.
836 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
837 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
838 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
839 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
840 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
841 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
842 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
843 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
844 move.b $r0,[R_SERIAL3_REC_CTRL]
846 ; Set up and enable the serial3 transmitter.
847 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
848 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
849 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
850 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
851 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
852 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
853 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
854 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
855 move.b $r0,[R_SERIAL3_TR_CTRL]
858 #endif /* CONFIG_SVINTO_SIM */
860 jump start_kernel ; jump into the C-function start_kernel in init/main.c
872 ;; put some special pages at the beginning of the kernel aligned
873 ;; to page boundaries - the kernel cannot start until after this
875 #ifdef CONFIG_CRIS_LOW_MAP
876 swapper_pg_dir = 0x60002000
878 swapper_pg_dir = 0xc0002000
881 .section ".init.data", "aw"
882 #include "../lib/hw_settings.S"