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[ALSA] emu10k1 - EMU 1212 with 16 capture channels
[linux-2.6/kvm.git] / sound / pci / emu10k1 / emu10k1_main.c
blob72367411ee6bc1aa5c4f0e7bc9aed64570e2ff4c
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <sound/driver.h>
35 #include <linux/delay.h>
36 #include <linux/init.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/slab.h>
40 #include <linux/vmalloc.h>
41 #include <linux/mutex.h>
42
43
44 #include <sound/core.h>
45 #include <sound/emu10k1.h>
46 #include <linux/firmware.h>
47 #include "p16v.h"
48 #include "tina2.h"
49 #include "p17v.h"
50
51
52 #define HANA_FILENAME "emu/hana.fw"
53 #define DOCK_FILENAME "emu/audio_dock.fw"
54
55 MODULE_FIRMWARE(HANA_FILENAME);
56 MODULE_FIRMWARE(DOCK_FILENAME);
57
58
59 /*************************************************************************
60 * EMU10K1 init / done
61 *************************************************************************/
62
63 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
64 {
65 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
66 snd_emu10k1_ptr_write(emu, IP, ch, 0);
67 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
68 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
69 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
70 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
71 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
72
73 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
74 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
75 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
76 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
77 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
78 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
79
80 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
81 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
82 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
83 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
84 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
85 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
86 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
87 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
88
89 /*** these are last so OFF prevents writing ***/
90 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
91 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
92 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
93 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
94 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
95
96 /* Audigy extra stuffs */
97 if (emu->audigy) {
98 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
99 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
100 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
101 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
102 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
103 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
104 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
105 }
106 }
107
108 static unsigned int spi_dac_init[] = {
109 0x00ff,
110 0x02ff,
111 0x0400,
112 0x0520,
113 0x0600,
114 0x08ff,
115 0x0aff,
116 0x0cff,
117 0x0eff,
118 0x10ff,
119 0x1200,
120 0x1400,
121 0x1480,
122 0x1800,
123 0x1aff,
124 0x1cff,
125 0x1e00,
126 0x0530,
127 0x0602,
128 0x0622,
129 0x1400,
130 };
131
132 static unsigned int i2c_adc_init[][2] = {
133 { 0x17, 0x00 }, /* Reset */
134 { 0x07, 0x00 }, /* Timeout */
135 { 0x0b, 0x22 }, /* Interface control */
136 { 0x0c, 0x22 }, /* Master mode control */
137 { 0x0d, 0x08 }, /* Powerdown control */
138 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
139 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
140 { 0x10, 0x7b }, /* ALC Control 1 */
141 { 0x11, 0x00 }, /* ALC Control 2 */
142 { 0x12, 0x32 }, /* ALC Control 3 */
143 { 0x13, 0x00 }, /* Noise gate control */
144 { 0x14, 0xa6 }, /* Limiter control */
145 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
146 };
147
148 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
149 {
150 unsigned int silent_page;
151 int ch;
152 u32 tmp;
153
154 /* disable audio and lock cache */
155 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
156 emu->port + HCFG);
157
158 /* reset recording buffers */
159 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
160 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
161 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
162 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
163 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
164 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
165
166 /* disable channel interrupt */
167 outl(0, emu->port + INTE);
168 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
169 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
170 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
171 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
172
173 if (emu->audigy){
174 /* set SPDIF bypass mode */
175 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
176 /* enable rear left + rear right AC97 slots */
177 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
178 AC97SLOT_REAR_LEFT);
179 }
180
181 /* init envelope engine */
182 for (ch = 0; ch < NUM_G; ch++)
183 snd_emu10k1_voice_init(emu, ch);
184
185 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
186 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
187 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
188
189 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
190 /* Hacks for Alice3 to work independent of haP16V driver */
191 //Setup SRCMulti_I2S SamplingRate
192 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
193 tmp &= 0xfffff1ff;
194 tmp |= (0x2<<9);
195 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
196
197 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
198 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
199 /* Setup SRCMulti Input Audio Enable */
200 /* Use 0xFFFFFFFF to enable P16V sounds. */
201 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
202
203 /* Enabled Phased (8-channel) P16V playback */
204 outl(0x0201, emu->port + HCFG2);
205 /* Set playback routing. */
206 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
207 }
208 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
209 /* Hacks for Alice3 to work independent of haP16V driver */
210 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
211 //Setup SRCMulti_I2S SamplingRate
212 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
213 tmp &= 0xfffff1ff;
214 tmp |= (0x2<<9);
215 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
216
217 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
218 outl(0x600000, emu->port + 0x20);
219 outl(0x14, emu->port + 0x24);
220
221 /* Setup SRCMulti Input Audio Enable */
222 outl(0x7b0000, emu->port + 0x20);
223 outl(0xFF000000, emu->port + 0x24);
224
225 /* Setup SPDIF Out Audio Enable */
226 /* The Audigy 2 Value has a separate SPDIF out,
227 * so no need for a mixer switch
228 */
229 outl(0x7a0000, emu->port + 0x20);
230 outl(0xFF000000, emu->port + 0x24);
231 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
232 outl(tmp, emu->port + A_IOCFG);
233 }
234 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
235 int size, n;
236
237 size = ARRAY_SIZE(spi_dac_init);
238 for (n = 0; n < size; n++)
239 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
240
241 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
242 /* Enable GPIOs
243 * GPIO0: Unknown
244 * GPIO1: Speakers-enabled.
245 * GPIO2: Unknown
246 * GPIO3: Unknown
247 * GPIO4: IEC958 Output on.
248 * GPIO5: Unknown
249 * GPIO6: Unknown
250 * GPIO7: Unknown
251 */
252 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
253
254 }
255 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
256 int size, n;
257
258 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
259 tmp = inl(emu->port + A_IOCFG);
260 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
261 tmp = inl(emu->port + A_IOCFG);
262 size = ARRAY_SIZE(i2c_adc_init);
263 for (n = 0; n < size; n++)
264 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
265 for (n=0; n < 4; n++) {
266 emu->i2c_capture_volume[n][0]= 0xcf;
267 emu->i2c_capture_volume[n][1]= 0xcf;
268 }
269
270 }
271
272
273 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
274 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
275 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
276
277 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
278 for (ch = 0; ch < NUM_G; ch++) {
279 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
280 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
281 }
282
283 if (emu->card_capabilities->emu1010) {
284 outl(HCFG_AUTOMUTE_ASYNC |
285 HCFG_EMU32_SLAVE |
286 HCFG_AUDIOENABLE, emu->port + HCFG);
287 /*
288 * Hokay, setup HCFG
289 * Mute Disable Audio = 0
290 * Lock Tank Memory = 1
291 * Lock Sound Memory = 0
292 * Auto Mute = 1
293 */
294 } else if (emu->audigy) {
295 if (emu->revision == 4) /* audigy2 */
296 outl(HCFG_AUDIOENABLE |
297 HCFG_AC3ENABLE_CDSPDIF |
298 HCFG_AC3ENABLE_GPSPDIF |
299 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
300 else
301 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
302 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
303 * e.g. card_capabilities->joystick */
304 } else if (emu->model == 0x20 ||
305 emu->model == 0xc400 ||
306 (emu->model == 0x21 && emu->revision < 6))
307 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
308 else
309 // With on-chip joystick
310 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
311
312 if (enable_ir) { /* enable IR for SB Live */
313 if (emu->card_capabilities->emu1010) {
314 ; /* Disable all access to A_IOCFG for the emu1010 */
315 } else if (emu->card_capabilities->i2c_adc) {
316 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
317 } else if (emu->audigy) {
318 unsigned int reg = inl(emu->port + A_IOCFG);
319 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
320 udelay(500);
321 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
322 udelay(100);
323 outl(reg, emu->port + A_IOCFG);
324 } else {
325 unsigned int reg = inl(emu->port + HCFG);
326 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
327 udelay(500);
328 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
329 udelay(100);
330 outl(reg, emu->port + HCFG);
331 }
332 }
333
334 if (emu->card_capabilities->emu1010) {
335 ; /* Disable all access to A_IOCFG for the emu1010 */
336 } else if (emu->card_capabilities->i2c_adc) {
337 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
338 } else if (emu->audigy) { /* enable analog output */
339 unsigned int reg = inl(emu->port + A_IOCFG);
340 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
341 }
342
343 return 0;
344 }
345
346 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
347 {
348 /*
349 * Enable the audio bit
350 */
351 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
352
353 /* Enable analog/digital outs on audigy */
354 if (emu->card_capabilities->emu1010) {
355 ; /* Disable all access to A_IOCFG for the emu1010 */
356 } else if (emu->card_capabilities->i2c_adc) {
357 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
358 } else if (emu->audigy) {
359 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
360
361 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
362 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
363 * This has to be done after init ALice3 I2SOut beyond 48KHz.
364 * So, sequence is important. */
365 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
366 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
367 /* Unmute Analog now. */
368 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
369 } else {
370 /* Disable routing from AC97 line out to Front speakers */
371 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
372 }
373 }
374
375 #if 0
376 {
377 unsigned int tmp;
378 /* FIXME: the following routine disables LiveDrive-II !! */
379 // TOSLink detection
380 emu->tos_link = 0;
381 tmp = inl(emu->port + HCFG);
382 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
383 outl(tmp|0x800, emu->port + HCFG);
384 udelay(50);
385 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
386 emu->tos_link = 1;
387 outl(tmp, emu->port + HCFG);
388 }
389 }
390 }
391 #endif
392
393 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
394 }
395
396 int snd_emu10k1_done(struct snd_emu10k1 * emu)
397 {
398 int ch;
399
400 outl(0, emu->port + INTE);
401
402 /*
403 * Shutdown the chip
404 */
405 for (ch = 0; ch < NUM_G; ch++)
406 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
407 for (ch = 0; ch < NUM_G; ch++) {
408 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
409 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
410 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
411 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
412 }
413
414 /* reset recording buffers */
415 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
416 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
417 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
418 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
419 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
420 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
421 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
422 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
423 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
424 if (emu->audigy)
425 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
426 else
427 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
428
429 /* disable channel interrupt */
430 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
431 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
432 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
433 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
434
435 /* disable audio and lock cache */
436 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
437 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
438
439 return 0;
440 }
441
442 /*************************************************************************
443 * ECARD functional implementation
444 *************************************************************************/
445
446 /* In A1 Silicon, these bits are in the HC register */
447 #define HOOKN_BIT (1L << 12)
448 #define HANDN_BIT (1L << 11)
449 #define PULSEN_BIT (1L << 10)
450
451 #define EC_GDI1 (1 << 13)
452 #define EC_GDI0 (1 << 14)
453
454 #define EC_NUM_CONTROL_BITS 20
455
456 #define EC_AC3_DATA_SELN 0x0001L
457 #define EC_EE_DATA_SEL 0x0002L
458 #define EC_EE_CNTRL_SELN 0x0004L
459 #define EC_EECLK 0x0008L
460 #define EC_EECS 0x0010L
461 #define EC_EESDO 0x0020L
462 #define EC_TRIM_CSN 0x0040L
463 #define EC_TRIM_SCLK 0x0080L
464 #define EC_TRIM_SDATA 0x0100L
465 #define EC_TRIM_MUTEN 0x0200L
466 #define EC_ADCCAL 0x0400L
467 #define EC_ADCRSTN 0x0800L
468 #define EC_DACCAL 0x1000L
469 #define EC_DACMUTEN 0x2000L
470 #define EC_LEDN 0x4000L
471
472 #define EC_SPDIF0_SEL_SHIFT 15
473 #define EC_SPDIF1_SEL_SHIFT 17
474 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
475 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
476 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
477 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
478 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
479 * be incremented any time the EEPROM's
480 * format is changed. */
481
482 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
483
484 /* Addresses for special values stored in to EEPROM */
485 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
486 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
487 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
488
489 #define EC_LAST_PROMFILE_ADDR 0x2f
490
491 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
492 * can be up to 30 characters in length
493 * and is stored as a NULL-terminated
494 * ASCII string. Any unused bytes must be
495 * filled with zeros */
496 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
497
498
499 /* Most of this stuff is pretty self-evident. According to the hardware
500 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
501 * offset problem. Weird.
502 */
503 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
504 EC_TRIM_CSN)
505
506
507 #define EC_DEFAULT_ADC_GAIN 0xC4C4
508 #define EC_DEFAULT_SPDIF0_SEL 0x0
509 #define EC_DEFAULT_SPDIF1_SEL 0x4
510
511 /**************************************************************************
512 * @func Clock bits into the Ecard's control latch. The Ecard uses a
513 * control latch will is loaded bit-serially by toggling the Modem control
514 * lines from function 2 on the E8010. This function hides these details
515 * and presents the illusion that we are actually writing to a distinct
516 * register.
517 */
518
519 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
520 {
521 unsigned short count;
522 unsigned int data;
523 unsigned long hc_port;
524 unsigned int hc_value;
525
526 hc_port = emu->port + HCFG;
527 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
528 outl(hc_value, hc_port);
529
530 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
531
532 /* Set up the value */
533 data = ((value & 0x1) ? PULSEN_BIT : 0);
534 value >>= 1;
535
536 outl(hc_value | data, hc_port);
537
538 /* Clock the shift register */
539 outl(hc_value | data | HANDN_BIT, hc_port);
540 outl(hc_value | data, hc_port);
541 }
542
543 /* Latch the bits */
544 outl(hc_value | HOOKN_BIT, hc_port);
545 outl(hc_value, hc_port);
546 }
547
548 /**************************************************************************
549 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
550 * trim value consists of a 16bit value which is composed of two
551 * 8 bit gain/trim values, one for the left channel and one for the
552 * right channel. The following table maps from the Gain/Attenuation
553 * value in decibels into the corresponding bit pattern for a single
554 * channel.
555 */
556
557 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
558 unsigned short gain)
559 {
560 unsigned int bit;
561
562 /* Enable writing to the TRIM registers */
563 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
564
565 /* Do it again to insure that we meet hold time requirements */
566 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
567
568 for (bit = (1 << 15); bit; bit >>= 1) {
569 unsigned int value;
570
571 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
572
573 if (gain & bit)
574 value |= EC_TRIM_SDATA;
575
576 /* Clock the bit */
577 snd_emu10k1_ecard_write(emu, value);
578 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
579 snd_emu10k1_ecard_write(emu, value);
580 }
581
582 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
583 }
584
585 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
586 {
587 unsigned int hc_value;
588
589 /* Set up the initial settings */
590 emu->ecard_ctrl = EC_RAW_RUN_MODE |
591 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
592 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
593
594 /* Step 0: Set the codec type in the hardware control register
595 * and enable audio output */
596 hc_value = inl(emu->port + HCFG);
597 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
598 inl(emu->port + HCFG);
599
600 /* Step 1: Turn off the led and deassert TRIM_CS */
601 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
602
603 /* Step 2: Calibrate the ADC and DAC */
604 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
605
606 /* Step 3: Wait for awhile; XXX We can't get away with this
607 * under a real operating system; we'll need to block and wait that
608 * way. */
609 snd_emu10k1_wait(emu, 48000);
610
611 /* Step 4: Switch off the DAC and ADC calibration. Note
612 * That ADC_CAL is actually an inverted signal, so we assert
613 * it here to stop calibration. */
614 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
615
616 /* Step 4: Switch into run mode */
617 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
618
619 /* Step 5: Set the analog input gain */
620 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
621
622 return 0;
623 }
624
625 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
626 {
627 unsigned long special_port;
628 unsigned int value;
629
630 /* Special initialisation routine
631 * before the rest of the IO-Ports become active.
632 */
633 special_port = emu->port + 0x38;
634 value = inl(special_port);
635 outl(0x00d00000, special_port);
636 value = inl(special_port);
637 outl(0x00d00001, special_port);
638 value = inl(special_port);
639 outl(0x00d0005f, special_port);
640 value = inl(special_port);
641 outl(0x00d0007f, special_port);
642 value = inl(special_port);
643 outl(0x0090007f, special_port);
644 value = inl(special_port);
645
646 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
647 return 0;
648 }
649
650 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
651 {
652 int err;
653 int n, i;
654 int reg;
655 int value;
656 const struct firmware *fw_entry;
657
658 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
659 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
660 return err;
661 }
662 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
663 if (fw_entry->size != 0x133a4) {
664 snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename);
665 return -EINVAL;
666 }
667
668 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
669 /* GPIO7 -> FPGA PGMN
670 * GPIO6 -> FPGA CCLK
671 * GPIO5 -> FPGA DIN
672 * FPGA CONFIG OFF -> FPGA PGMN
673 */
674 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
675 udelay(1);
676 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
677 udelay(100); /* Allow FPGA memory to clean */
678 for(n = 0; n < fw_entry->size; n++) {
679 value=fw_entry->data[n];
680 for(i = 0; i < 8; i++) {
681 reg = 0x80;
682 if (value & 0x1)
683 reg = reg | 0x20;
684 value = value >> 1;
685 outl(reg, emu->port + A_IOCFG);
686 outl(reg | 0x40, emu->port + A_IOCFG);
687 }
688 }
689 /* After programming, set GPIO bit 4 high again. */
690 outl(0x10, emu->port + A_IOCFG);
691
692
693 release_firmware(fw_entry);
694 return 0;
695 }
696
697 /*
698 * EMU-1010 - details found out from this driver, official MS Win drivers,
699 * testing the card:
700 *
701 * Audigy2 (aka Alice2):
702 * ---------------------
703 * * communication over PCI
704 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
705 * to 2 x 16-bit, using internal DSP instructions
706 * * slave mode, clock supplied by HANA
707 * * linked to HANA using:
708 * 32 x 32-bit serial EMU32 output channels
709 * 16 x EMU32 input channels
710 * (?) x I2S I/O channels (?)
711 *
712 * FPGA (aka HANA):
713 * ---------------
714 * * provides all (?) physical inputs and outputs of the card
715 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
716 * * provides clock signal for the card and Alice2
717 * * two crystals - for 44.1kHz and 48kHz multiples
718 * * provides internal routing of signal sources to signal destinations
719 * * inputs/outputs to Alice2 - see above
720 *
721 * Current status of the driver:
722 * ----------------------------
723 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
724 * * PCM device nb. 2:
725 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
726 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
727 */
728 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
729 {
730 unsigned int i;
731 int tmp,tmp2;
732 int reg;
733 int err;
734
735 snd_printk(KERN_INFO "emu1010: Special config.\n");
736 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
737 * Lock Sound Memory Cache, Lock Tank Memory Cache,
738 * Mute all codecs.
739 */
740 outl(0x0005a00c, emu->port + HCFG);
741 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
742 * Lock Tank Memory Cache,
743 * Mute all codecs.
744 */
745 outl(0x0005a004, emu->port + HCFG);
746 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
747 * Mute all codecs.
748 */
749 outl(0x0005a000, emu->port + HCFG);
750 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
751 * Mute all codecs.
752 */
753 outl(0x0005a000, emu->port + HCFG);
754
755 /* Disable 48Volt power to Audio Dock */
756 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
757
758 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
759 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
760 snd_printdd("reg1=0x%x\n",reg);
761 if (reg == 0x55) {
762 /* FPGA netlist already present so clear it */
763 /* Return to programming mode */
764
765 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
766 }
767 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
768 snd_printdd("reg2=0x%x\n",reg);
769 if (reg == 0x55) {
770 /* FPGA failed to return to programming mode */
771 return -ENODEV;
772 }
773 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
774 if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) {
775 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME);
776 return err;
777 }
778
779 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
780 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
781 if (reg != 0x55) {
782 /* FPGA failed to be programmed */
783 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
784 return -ENODEV;
785 }
786
787 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
788 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
789 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
790 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
791 /* Enable 48Volt power to Audio Dock */
792 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
793
794 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
795 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
796 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
797 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
798 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
799 /* ADAT input. */
800 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x01 );
801 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
802 /* Set no attenuation on Audio Dock pads. */
803 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
804 emu->emu1010.adc_pads = 0x00;
805 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
806 /* Unmute Audio dock DACs, Headphone source DAC-4. */
807 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
808 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
809 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
810 /* DAC PADs. */
811 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
812 emu->emu1010.dac_pads = 0x0f;
813 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
814 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
815 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
816 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
817 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
818 /* MIDI routing */
819 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
820 /* Unknown. */
821 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
822 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
823 /* IRQ Enable: All off */
824 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
825
826 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
827 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
828 /* Default WCLK set to 48kHz. */
829 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
830 /* Word Clock source, Internal 48kHz x1 */
831 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
832 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
833 /* Audio Dock LEDs. */
834 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
835
836 #if 0
837 /* For 96kHz */
838 snd_emu1010_fpga_link_dst_src_write(emu,
839 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
840 snd_emu1010_fpga_link_dst_src_write(emu,
841 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
842 snd_emu1010_fpga_link_dst_src_write(emu,
843 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
844 snd_emu1010_fpga_link_dst_src_write(emu,
845 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
846 #endif
847 #if 0
848 /* For 192kHz */
849 snd_emu1010_fpga_link_dst_src_write(emu,
850 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
851 snd_emu1010_fpga_link_dst_src_write(emu,
852 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
853 snd_emu1010_fpga_link_dst_src_write(emu,
854 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
855 snd_emu1010_fpga_link_dst_src_write(emu,
856 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
857 snd_emu1010_fpga_link_dst_src_write(emu,
858 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
859 snd_emu1010_fpga_link_dst_src_write(emu,
860 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
861 snd_emu1010_fpga_link_dst_src_write(emu,
862 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
863 snd_emu1010_fpga_link_dst_src_write(emu,
864 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
865 #endif
866 #if 1
867 /* For 48kHz */
868 snd_emu1010_fpga_link_dst_src_write(emu,
869 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
870 snd_emu1010_fpga_link_dst_src_write(emu,
871 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
872 snd_emu1010_fpga_link_dst_src_write(emu,
873 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
874 snd_emu1010_fpga_link_dst_src_write(emu,
875 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
876 snd_emu1010_fpga_link_dst_src_write(emu,
877 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
878 snd_emu1010_fpga_link_dst_src_write(emu,
879 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
880 snd_emu1010_fpga_link_dst_src_write(emu,
881 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
882 snd_emu1010_fpga_link_dst_src_write(emu,
883 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
884 /* Pavel Hofman - setting defaults for 8 more capture channels
885 * Defaults only, users will set their own values anyways, let's
886 * just copy/paste.
887 */
888
889 snd_emu1010_fpga_link_dst_src_write(emu,
890 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
891 snd_emu1010_fpga_link_dst_src_write(emu,
892 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
893 snd_emu1010_fpga_link_dst_src_write(emu,
894 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
895 snd_emu1010_fpga_link_dst_src_write(emu,
896 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
897 snd_emu1010_fpga_link_dst_src_write(emu,
898 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
899 snd_emu1010_fpga_link_dst_src_write(emu,
900 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
901 snd_emu1010_fpga_link_dst_src_write(emu,
902 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
903 snd_emu1010_fpga_link_dst_src_write(emu,
904 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
905 #endif
906 #if 0
907 /* Original */
908 snd_emu1010_fpga_link_dst_src_write(emu,
909 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
910 snd_emu1010_fpga_link_dst_src_write(emu,
911 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
912 snd_emu1010_fpga_link_dst_src_write(emu,
913 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
914 snd_emu1010_fpga_link_dst_src_write(emu,
915 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
916 snd_emu1010_fpga_link_dst_src_write(emu,
917 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
918 snd_emu1010_fpga_link_dst_src_write(emu,
919 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
920 snd_emu1010_fpga_link_dst_src_write(emu,
921 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
922 snd_emu1010_fpga_link_dst_src_write(emu,
923 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
924 snd_emu1010_fpga_link_dst_src_write(emu,
925 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
926 snd_emu1010_fpga_link_dst_src_write(emu,
927 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
928 snd_emu1010_fpga_link_dst_src_write(emu,
929 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
930 snd_emu1010_fpga_link_dst_src_write(emu,
931 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
932 #endif
933 for (i = 0;i < 0x20; i++ ) {
934 /* AudioDock Elink <- Silence */
935 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
936 }
937 for (i = 0;i < 4; i++) {
938 /* Hana SPDIF Out <- Silence */
939 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
940 }
941 for (i = 0;i < 7; i++) {
942 /* Hamoa DAC <- Silence */
943 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
944 }
945 for (i = 0;i < 7; i++) {
946 /* Hana ADAT Out <- Silence */
947 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
948 }
949 snd_emu1010_fpga_link_dst_src_write(emu,
950 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
951 snd_emu1010_fpga_link_dst_src_write(emu,
952 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
953 snd_emu1010_fpga_link_dst_src_write(emu,
954 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
955 snd_emu1010_fpga_link_dst_src_write(emu,
956 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
961 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
962
963 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
964
965 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
966 * Lock Sound Memory Cache, Lock Tank Memory Cache,
967 * Mute all codecs.
968 */
969 outl(0x0000a000, emu->port + HCFG);
970 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
971 * Lock Sound Memory Cache, Lock Tank Memory Cache,
972 * Un-Mute all codecs.
973 */
974 outl(0x0000a001, emu->port + HCFG);
975
976 /* Initial boot complete. Now patches */
977
978 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
979 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
980 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
981 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
982 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
983 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
984 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
985
986 /* Delay to allow Audio Dock to settle */
987 msleep(100);
988 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
989 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
990 /* FIXME: The loading of this should be able to happen any time,
991 * as the user can plug/unplug it at any time
992 */
993 if (reg & (EMU_HANA_OPTION_DOCK_ONLINE | EMU_HANA_OPTION_DOCK_OFFLINE) ) {
994 /* Audio Dock attached */
995 /* Return to Audio Dock programming mode */
996 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
997 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
998 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
999 return err;
1000 }
1001 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
1002 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
1003 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
1004 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
1005 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
1006 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
1007 if (reg != 0x55) {
1008 /* FPGA failed to be programmed */
1009 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
1010 return 0;
1011 return -ENODEV;
1012 }
1013 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
1014 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
1015 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
1016 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
1017 }
1018 #if 0
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1027 #endif
1028 /* Default outputs */
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1031 emu->emu1010.output_source[0] = 21;
1032 snd_emu1010_fpga_link_dst_src_write(emu,
1033 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1034 emu->emu1010.output_source[1] = 22;
1035 snd_emu1010_fpga_link_dst_src_write(emu,
1036 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1037 emu->emu1010.output_source[2] = 23;
1038 snd_emu1010_fpga_link_dst_src_write(emu,
1039 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1040 emu->emu1010.output_source[3] = 24;
1041 snd_emu1010_fpga_link_dst_src_write(emu,
1042 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1043 emu->emu1010.output_source[4] = 25;
1044 snd_emu1010_fpga_link_dst_src_write(emu,
1045 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1046 emu->emu1010.output_source[5] = 26;
1047 snd_emu1010_fpga_link_dst_src_write(emu,
1048 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1049 emu->emu1010.output_source[6] = 27;
1050 snd_emu1010_fpga_link_dst_src_write(emu,
1051 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1052 emu->emu1010.output_source[7] = 28;
1053 snd_emu1010_fpga_link_dst_src_write(emu,
1054 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1055 emu->emu1010.output_source[8] = 21;
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1058 emu->emu1010.output_source[9] = 22;
1059 snd_emu1010_fpga_link_dst_src_write(emu,
1060 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1061 emu->emu1010.output_source[10] = 21;
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1064 emu->emu1010.output_source[11] = 22;
1065 snd_emu1010_fpga_link_dst_src_write(emu,
1066 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1067 emu->emu1010.output_source[12] = 21;
1068 snd_emu1010_fpga_link_dst_src_write(emu,
1069 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1070 emu->emu1010.output_source[13] = 22;
1071 snd_emu1010_fpga_link_dst_src_write(emu,
1072 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1073 emu->emu1010.output_source[14] = 21;
1074 snd_emu1010_fpga_link_dst_src_write(emu,
1075 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1076 emu->emu1010.output_source[15] = 22;
1077 snd_emu1010_fpga_link_dst_src_write(emu,
1078 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1079 emu->emu1010.output_source[16] = 21;
1080 snd_emu1010_fpga_link_dst_src_write(emu,
1081 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1082 emu->emu1010.output_source[17] = 22;
1083 snd_emu1010_fpga_link_dst_src_write(emu,
1084 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1085 emu->emu1010.output_source[18] = 23;
1086 snd_emu1010_fpga_link_dst_src_write(emu,
1087 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1088 emu->emu1010.output_source[19] = 24;
1089 snd_emu1010_fpga_link_dst_src_write(emu,
1090 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1091 emu->emu1010.output_source[20] = 25;
1092 snd_emu1010_fpga_link_dst_src_write(emu,
1093 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1094 emu->emu1010.output_source[21] = 26;
1095 snd_emu1010_fpga_link_dst_src_write(emu,
1096 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1097 emu->emu1010.output_source[22] = 27;
1098 snd_emu1010_fpga_link_dst_src_write(emu,
1099 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1100 emu->emu1010.output_source[23] = 28;
1101
1102 /* TEMP: Select SPDIF in/out */
1103 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1104
1105 /* TEMP: Select 48kHz SPDIF out */
1106 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1107 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1108 /* Word Clock source, Internal 48kHz x1 */
1109 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1110 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1111 emu->emu1010.internal_clock = 1; /* 48000 */
1112 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1113 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1114 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1115 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1116 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1117
1118 return 0;
1119 }
1120 /*
1121 * Create the EMU10K1 instance
1122 */
1123
1124 #ifdef CONFIG_PM
1125 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1126 static void free_pm_buffer(struct snd_emu10k1 *emu);
1127 #endif
1128
1129 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1130 {
1131 if (emu->port) { /* avoid access to already used hardware */
1132 snd_emu10k1_fx8010_tram_setup(emu, 0);
1133 snd_emu10k1_done(emu);
1134 /* remove reserved page */
1135 if (emu->reserved_page) {
1136 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1137 emu->reserved_page = NULL;
1138 }
1139 snd_emu10k1_free_efx(emu);
1140 }
1141 if (emu->card_capabilities->emu1010) {
1142 /* Disable 48Volt power to Audio Dock */
1143 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
1144 }
1145 if (emu->memhdr)
1146 snd_util_memhdr_free(emu->memhdr);
1147 if (emu->silent_page.area)
1148 snd_dma_free_pages(&emu->silent_page);
1149 if (emu->ptb_pages.area)
1150 snd_dma_free_pages(&emu->ptb_pages);
1151 vfree(emu->page_ptr_table);
1152 vfree(emu->page_addr_table);
1153 #ifdef CONFIG_PM
1154 free_pm_buffer(emu);
1155 #endif
1156 if (emu->irq >= 0)
1157 free_irq(emu->irq, emu);
1158 if (emu->port)
1159 pci_release_regions(emu->pci);
1160 if (emu->card_capabilities->ca0151_chip) /* P16V */
1161 snd_p16v_free(emu);
1162 pci_disable_device(emu->pci);
1163 kfree(emu);
1164 return 0;
1165 }
1166
1167 static int snd_emu10k1_dev_free(struct snd_device *device)
1168 {
1169 struct snd_emu10k1 *emu = device->device_data;
1170 return snd_emu10k1_free(emu);
1171 }
1172
1173 static struct snd_emu_chip_details emu_chip_details[] = {
1174 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1175 /* Tested by James@superbug.co.uk 3rd July 2005 */
1176 /* DSP: CA0108-IAT
1177 * DAC: CS4382-KQ
1178 * ADC: Philips 1361T
1179 * AC97: STAC9750
1180 * CA0151: None
1181 */
1182 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1183 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1184 .id = "Audigy2",
1185 .emu10k2_chip = 1,
1186 .ca0108_chip = 1,
1187 .spk71 = 1,
1188 .ac97_chip = 1} ,
1189 /* Audigy4 (Not PRO) SB0610 */
1190 /* Tested by James@superbug.co.uk 4th April 2006 */
1191 /* A_IOCFG bits
1192 * Output
1193 * 0: ?
1194 * 1: ?
1195 * 2: ?
1196 * 3: 0 - Digital Out, 1 - Line in
1197 * 4: ?
1198 * 5: ?
1199 * 6: ?
1200 * 7: ?
1201 * Input
1202 * 8: ?
1203 * 9: ?
1204 * A: Green jack sense (Front)
1205 * B: ?
1206 * C: Black jack sense (Rear/Side Right)
1207 * D: Yellow jack sense (Center/LFE/Side Left)
1208 * E: ?
1209 * F: ?
1210 *
1211 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1212 * 0 - Digital Out
1213 * 1 - Line in
1214 */
1215 /* Mic input not tested.
1216 * Analog CD input not tested
1217 * Digital Out not tested.
1218 * Line in working.
1219 * Audio output 5.1 working. Side outputs not working.
1220 */
1221 /* DSP: CA10300-IAT LF
1222 * DAC: Cirrus Logic CS4382-KQZ
1223 * ADC: Philips 1361T
1224 * AC97: Sigmatel STAC9750
1225 * CA0151: None
1226 */
1227 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1228 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1229 .id = "Audigy2",
1230 .emu10k2_chip = 1,
1231 .ca0108_chip = 1,
1232 .spk71 = 1,
1233 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1234 .ac97_chip = 1} ,
1235 /* Audigy 2 ZS Notebook Cardbus card.*/
1236 /* Tested by James@superbug.co.uk 6th November 2006 */
1237 /* Audio output 7.1/Headphones working.
1238 * Digital output working. (AC3 not checked, only PCM)
1239 * Audio Mic/Line inputs working.
1240 * Digital input not tested.
1241 */
1242 /* DSP: Tina2
1243 * DAC: Wolfson WM8768/WM8568
1244 * ADC: Wolfson WM8775
1245 * AC97: None
1246 * CA0151: None
1247 */
1248 /* Tested by James@superbug.co.uk 4th April 2006 */
1249 /* A_IOCFG bits
1250 * Output
1251 * 0: Not Used
1252 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1253 * 2: Analog input 0 = line in, 1 = mic in
1254 * 3: Not Used
1255 * 4: Digital output 0 = off, 1 = on.
1256 * 5: Not Used
1257 * 6: Not Used
1258 * 7: Not Used
1259 * Input
1260 * All bits 1 (0x3fxx) means nothing plugged in.
1261 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1262 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1263 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1264 * E-F: Always 0
1265 *
1266 */
1267 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1268 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1269 .id = "Audigy2",
1270 .emu10k2_chip = 1,
1271 .ca0108_chip = 1,
1272 .ca_cardbus_chip = 1,
1273 .spi_dac = 1,
1274 .i2c_adc = 1,
1275 .spk71 = 1} ,
1276 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1277 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1278 .id = "EMU1010",
1279 .emu10k2_chip = 1,
1280 .ca0108_chip = 1,
1281 .ca_cardbus_chip = 1,
1282 .spi_dac = 1,
1283 .i2c_adc = 1,
1284 .spk71 = 1} ,
1285 {.vendor = 0x1102, .device = 0x0008,
1286 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1287 .id = "Audigy2",
1288 .emu10k2_chip = 1,
1289 .ca0108_chip = 1,
1290 .ac97_chip = 1} ,
1291 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
1292 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1293 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1294 .id = "EMU1010",
1295 .emu10k2_chip = 1,
1296 .ca0102_chip = 1,
1297 .spk71 = 1,
1298 .emu1010 = 1} ,
1299 /* Tested by James@superbug.co.uk 3rd July 2005 */
1300 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1301 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1302 .id = "Audigy2",
1303 .emu10k2_chip = 1,
1304 .ca0102_chip = 1,
1305 .ca0151_chip = 1,
1306 .spk71 = 1,
1307 .spdif_bug = 1,
1308 .ac97_chip = 1} ,
1309 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1310 /* The 0x20061102 does have SB0350 written on it
1311 * Just like 0x20021102
1312 */
1313 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1314 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1315 .id = "Audigy2",
1316 .emu10k2_chip = 1,
1317 .ca0102_chip = 1,
1318 .ca0151_chip = 1,
1319 .spk71 = 1,
1320 .spdif_bug = 1,
1321 .ac97_chip = 1} ,
1322 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1323 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1324 .id = "Audigy2",
1325 .emu10k2_chip = 1,
1326 .ca0102_chip = 1,
1327 .ca0151_chip = 1,
1328 .spk71 = 1,
1329 .spdif_bug = 1,
1330 .ac97_chip = 1} ,
1331 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1332 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1333 .id = "Audigy2",
1334 .emu10k2_chip = 1,
1335 .ca0102_chip = 1,
1336 .ca0151_chip = 1,
1337 .spk71 = 1,
1338 .spdif_bug = 1,
1339 .ac97_chip = 1} ,
1340 /* Audigy 2 */
1341 /* Tested by James@superbug.co.uk 3rd July 2005 */
1342 /* DSP: CA0102-IAT
1343 * DAC: CS4382-KQ
1344 * ADC: Philips 1361T
1345 * AC97: STAC9721
1346 * CA0151: Yes
1347 */
1348 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1349 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1350 .id = "Audigy2",
1351 .emu10k2_chip = 1,
1352 .ca0102_chip = 1,
1353 .ca0151_chip = 1,
1354 .spk71 = 1,
1355 .spdif_bug = 1,
1356 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1357 .ac97_chip = 1} ,
1358 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1359 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1360 .id = "Audigy2",
1361 .emu10k2_chip = 1,
1362 .ca0102_chip = 1,
1363 .ca0151_chip = 1,
1364 .spk71 = 1,
1365 .spdif_bug = 1} ,
1366 /* Dell OEM/Creative Labs Audigy 2 ZS */
1367 /* See ALSA bug#1365 */
1368 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1369 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1370 .id = "Audigy2",
1371 .emu10k2_chip = 1,
1372 .ca0102_chip = 1,
1373 .ca0151_chip = 1,
1374 .spk71 = 1,
1375 .spdif_bug = 1,
1376 .ac97_chip = 1} ,
1377 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1378 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1379 .id = "Audigy2",
1380 .emu10k2_chip = 1,
1381 .ca0102_chip = 1,
1382 .ca0151_chip = 1,
1383 .spk71 = 1,
1384 .spdif_bug = 1,
1385 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1386 .ac97_chip = 1} ,
1387 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1388 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1389 .id = "Audigy2",
1390 .emu10k2_chip = 1,
1391 .ca0102_chip = 1,
1392 .ca0151_chip = 1,
1393 .spdif_bug = 1,
1394 .ac97_chip = 1} ,
1395 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1396 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1397 .id = "Audigy",
1398 .emu10k2_chip = 1,
1399 .ca0102_chip = 1,
1400 .ac97_chip = 1} ,
1401 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1402 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1403 .id = "Audigy",
1404 .emu10k2_chip = 1,
1405 .ca0102_chip = 1,
1406 .spdif_bug = 1,
1407 .ac97_chip = 1} ,
1408 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1409 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1410 .id = "Audigy",
1411 .emu10k2_chip = 1,
1412 .ca0102_chip = 1,
1413 .ac97_chip = 1} ,
1414 {.vendor = 0x1102, .device = 0x0004,
1415 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1416 .id = "Audigy",
1417 .emu10k2_chip = 1,
1418 .ca0102_chip = 1,
1419 .ac97_chip = 1} ,
1420 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1421 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1422 .id = "Live",
1423 .emu10k1_chip = 1,
1424 .ac97_chip = 1,
1425 .sblive51 = 1} ,
1426 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1427 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1428 .id = "Live",
1429 .emu10k1_chip = 1,
1430 .ac97_chip = 1,
1431 .sblive51 = 1} ,
1432 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1433 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1434 .id = "Live",
1435 .emu10k1_chip = 1,
1436 .ac97_chip = 1,
1437 .sblive51 = 1} ,
1438 /* Tested by ALSA bug#1680 26th December 2005 */
1439 /* note: It really has SB0220 written on the card. */
1440 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1441 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1442 .id = "Live",
1443 .emu10k1_chip = 1,
1444 .ac97_chip = 1,
1445 .sblive51 = 1} ,
1446 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1447 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1448 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1449 .id = "Live",
1450 .emu10k1_chip = 1,
1451 .ac97_chip = 1,
1452 .sblive51 = 1} ,
1453 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1454 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1455 .id = "Live",
1456 .emu10k1_chip = 1,
1457 .ac97_chip = 1,
1458 .sblive51 = 1} ,
1459 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1460 .driver = "EMU10K1", .name = "SB Live 5.1",
1461 .id = "Live",
1462 .emu10k1_chip = 1,
1463 .ac97_chip = 1,
1464 .sblive51 = 1} ,
1465 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1466 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1467 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1468 .id = "Live",
1469 .emu10k1_chip = 1,
1470 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1471 * share the same IDs!
1472 */
1473 .sblive51 = 1} ,
1474 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1475 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1476 .id = "Live",
1477 .emu10k1_chip = 1,
1478 .ac97_chip = 1,
1479 .sblive51 = 1} ,
1480 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1481 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1482 .id = "Live",
1483 .emu10k1_chip = 1,
1484 .ac97_chip = 1} ,
1485 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1486 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1487 .id = "Live",
1488 .emu10k1_chip = 1,
1489 .ac97_chip = 1,
1490 .sblive51 = 1} ,
1491 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1492 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1493 .id = "Live",
1494 .emu10k1_chip = 1,
1495 .ac97_chip = 1,
1496 .sblive51 = 1} ,
1497 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1498 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1499 .id = "Live",
1500 .emu10k1_chip = 1,
1501 .ac97_chip = 1,
1502 .sblive51 = 1} ,
1503 /* Tested by James@superbug.co.uk 3rd July 2005 */
1504 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1505 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1506 .id = "Live",
1507 .emu10k1_chip = 1,
1508 .ac97_chip = 1,
1509 .sblive51 = 1} ,
1510 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1511 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1512 .id = "Live",
1513 .emu10k1_chip = 1,
1514 .ac97_chip = 1,
1515 .sblive51 = 1} ,
1516 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1517 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1518 .id = "Live",
1519 .emu10k1_chip = 1,
1520 .ac97_chip = 1,
1521 .sblive51 = 1} ,
1522 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1523 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1524 .id = "Live",
1525 .emu10k1_chip = 1,
1526 .ac97_chip = 1,
1527 .sblive51 = 1} ,
1528 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1529 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1530 .id = "APS",
1531 .emu10k1_chip = 1,
1532 .ecard = 1} ,
1533 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1534 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1535 .id = "Live",
1536 .emu10k1_chip = 1,
1537 .ac97_chip = 1,
1538 .sblive51 = 1} ,
1539 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1540 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1541 .id = "Live",
1542 .emu10k1_chip = 1,
1543 .ac97_chip = 1,
1544 .sblive51 = 1} ,
1545 {.vendor = 0x1102, .device = 0x0002,
1546 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1547 .id = "Live",
1548 .emu10k1_chip = 1,
1549 .ac97_chip = 1,
1550 .sblive51 = 1} ,
1551 { } /* terminator */
1552 };
1553
1554 int __devinit snd_emu10k1_create(struct snd_card *card,
1555 struct pci_dev * pci,
1556 unsigned short extin_mask,
1557 unsigned short extout_mask,
1558 long max_cache_bytes,
1559 int enable_ir,
1560 uint subsystem,
1561 struct snd_emu10k1 ** remu)
1562 {
1563 struct snd_emu10k1 *emu;
1564 int idx, err;
1565 int is_audigy;
1566 unsigned int silent_page;
1567 const struct snd_emu_chip_details *c;
1568 static struct snd_device_ops ops = {
1569 .dev_free = snd_emu10k1_dev_free,
1570 };
1571
1572 *remu = NULL;
1573
1574 /* enable PCI device */
1575 if ((err = pci_enable_device(pci)) < 0)
1576 return err;
1577
1578 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1579 if (emu == NULL) {
1580 pci_disable_device(pci);
1581 return -ENOMEM;
1582 }
1583 emu->card = card;
1584 spin_lock_init(&emu->reg_lock);
1585 spin_lock_init(&emu->emu_lock);
1586 spin_lock_init(&emu->voice_lock);
1587 spin_lock_init(&emu->synth_lock);
1588 spin_lock_init(&emu->memblk_lock);
1589 mutex_init(&emu->fx8010.lock);
1590 INIT_LIST_HEAD(&emu->mapped_link_head);
1591 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1592 emu->pci = pci;
1593 emu->irq = -1;
1594 emu->synth = NULL;
1595 emu->get_synth_voice = NULL;
1596 /* read revision & serial */
1597 emu->revision = pci->revision;
1598 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1599 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1600 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1601
1602 for (c = emu_chip_details; c->vendor; c++) {
1603 if (c->vendor == pci->vendor && c->device == pci->device) {
1604 if (subsystem) {
1605 if (c->subsystem && (c->subsystem == subsystem) ) {
1606 break;
1607 } else continue;
1608 } else {
1609 if (c->subsystem && (c->subsystem != emu->serial) )
1610 continue;
1611 if (c->revision && c->revision != emu->revision)
1612 continue;
1613 }
1614 break;
1615 }
1616 }
1617 if (c->vendor == 0) {
1618 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1619 kfree(emu);
1620 pci_disable_device(pci);
1621 return -ENOENT;
1622 }
1623 emu->card_capabilities = c;
1624 if (c->subsystem && !subsystem)
1625 snd_printdd("Sound card name=%s\n", c->name);
1626 else if (subsystem)
1627 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1628 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1629 else
1630 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1631 c->name, pci->vendor, pci->device, emu->serial);
1632
1633 if (!*card->id && c->id) {
1634 int i, n = 0;
1635 strlcpy(card->id, c->id, sizeof(card->id));
1636 for (;;) {
1637 for (i = 0; i < snd_ecards_limit; i++) {
1638 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1639 break;
1640 }
1641 if (i >= snd_ecards_limit)
1642 break;
1643 n++;
1644 if (n >= SNDRV_CARDS)
1645 break;
1646 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1647 }
1648 }
1649
1650 is_audigy = emu->audigy = c->emu10k2_chip;
1651
1652 /* set the DMA transfer mask */
1653 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1654 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1655 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1656 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1657 kfree(emu);
1658 pci_disable_device(pci);
1659 return -ENXIO;
1660 }
1661 if (is_audigy)
1662 emu->gpr_base = A_FXGPREGBASE;
1663 else
1664 emu->gpr_base = FXGPREGBASE;
1665
1666 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1667 kfree(emu);
1668 pci_disable_device(pci);
1669 return err;
1670 }
1671 emu->port = pci_resource_start(pci, 0);
1672
1673 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1674 "EMU10K1", emu)) {
1675 err = -EBUSY;
1676 goto error;
1677 }
1678 emu->irq = pci->irq;
1679
1680 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1681 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1682 32 * 1024, &emu->ptb_pages) < 0) {
1683 err = -ENOMEM;
1684 goto error;
1685 }
1686
1687 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1688 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1689 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1690 err = -ENOMEM;
1691 goto error;
1692 }
1693
1694 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1695 EMUPAGESIZE, &emu->silent_page) < 0) {
1696 err = -ENOMEM;
1697 goto error;
1698 }
1699 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1700 if (emu->memhdr == NULL) {
1701 err = -ENOMEM;
1702 goto error;
1703 }
1704 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1705 sizeof(struct snd_util_memblk);
1706
1707 pci_set_master(pci);
1708
1709 emu->fx8010.fxbus_mask = 0x303f;
1710 if (extin_mask == 0)
1711 extin_mask = 0x3fcf;
1712 if (extout_mask == 0)
1713 extout_mask = 0x7fff;
1714 emu->fx8010.extin_mask = extin_mask;
1715 emu->fx8010.extout_mask = extout_mask;
1716 emu->enable_ir = enable_ir;
1717
1718 if (emu->card_capabilities->ecard) {
1719 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1720 goto error;
1721 } else if (emu->card_capabilities->ca_cardbus_chip) {
1722 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1723 goto error;
1724 } else if (emu->card_capabilities->emu1010) {
1725 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1726 snd_emu10k1_free(emu);
1727 return err;
1728 }
1729 } else {
1730 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1731 does not support this, it shouldn't do any harm */
1732 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1733 }
1734
1735 /* initialize TRAM setup */
1736 emu->fx8010.itram_size = (16 * 1024)/2;
1737 emu->fx8010.etram_pages.area = NULL;
1738 emu->fx8010.etram_pages.bytes = 0;
1739
1740 /*
1741 * Init to 0x02109204 :
1742 * Clock accuracy = 0 (1000ppm)
1743 * Sample Rate = 2 (48kHz)
1744 * Audio Channel = 1 (Left of 2)
1745 * Source Number = 0 (Unspecified)
1746 * Generation Status = 1 (Original for Cat Code 12)
1747 * Cat Code = 12 (Digital Signal Mixer)
1748 * Mode = 0 (Mode 0)
1749 * Emphasis = 0 (None)
1750 * CP = 1 (Copyright unasserted)
1751 * AN = 0 (Audio data)
1752 * P = 0 (Consumer)
1753 */
1754 emu->spdif_bits[0] = emu->spdif_bits[1] =
1755 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1756 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1757 SPCS_GENERATIONSTATUS | 0x00001200 |
1758 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1759
1760 emu->reserved_page = (struct snd_emu10k1_memblk *)
1761 snd_emu10k1_synth_alloc(emu, 4096);
1762 if (emu->reserved_page)
1763 emu->reserved_page->map_locked = 1;
1764
1765 /* Clear silent pages and set up pointers */
1766 memset(emu->silent_page.area, 0, PAGE_SIZE);
1767 silent_page = emu->silent_page.addr << 1;
1768 for (idx = 0; idx < MAXPAGES; idx++)
1769 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1770
1771 /* set up voice indices */
1772 for (idx = 0; idx < NUM_G; idx++) {
1773 emu->voices[idx].emu = emu;
1774 emu->voices[idx].number = idx;
1775 }
1776
1777 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1778 goto error;
1779 #ifdef CONFIG_PM
1780 if ((err = alloc_pm_buffer(emu)) < 0)
1781 goto error;
1782 #endif
1783
1784 /* Initialize the effect engine */
1785 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1786 goto error;
1787 snd_emu10k1_audio_enable(emu);
1788
1789 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1790 goto error;
1791
1792 #ifdef CONFIG_PROC_FS
1793 snd_emu10k1_proc_init(emu);
1794 #endif
1795
1796 snd_card_set_dev(card, &pci->dev);
1797 *remu = emu;
1798 return 0;
1799
1800 error:
1801 snd_emu10k1_free(emu);
1802 return err;
1803 }
1804
1805 #ifdef CONFIG_PM
1806 static unsigned char saved_regs[] = {
1807 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1808 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1809 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1810 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1811 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1812 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1813 0xff /* end */
1814 };
1815 static unsigned char saved_regs_audigy[] = {
1816 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1817 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1818 0xff /* end */
1819 };
1820
1821 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1822 {
1823 int size;
1824
1825 size = ARRAY_SIZE(saved_regs);
1826 if (emu->audigy)
1827 size += ARRAY_SIZE(saved_regs_audigy);
1828 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1829 if (! emu->saved_ptr)
1830 return -ENOMEM;
1831 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1832 return -ENOMEM;
1833 if (emu->card_capabilities->ca0151_chip &&
1834 snd_p16v_alloc_pm_buffer(emu) < 0)
1835 return -ENOMEM;
1836 return 0;
1837 }
1838
1839 static void free_pm_buffer(struct snd_emu10k1 *emu)
1840 {
1841 vfree(emu->saved_ptr);
1842 snd_emu10k1_efx_free_pm_buffer(emu);
1843 if (emu->card_capabilities->ca0151_chip)
1844 snd_p16v_free_pm_buffer(emu);
1845 }
1846
1847 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1848 {
1849 int i;
1850 unsigned char *reg;
1851 unsigned int *val;
1852
1853 val = emu->saved_ptr;
1854 for (reg = saved_regs; *reg != 0xff; reg++)
1855 for (i = 0; i < NUM_G; i++, val++)
1856 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1857 if (emu->audigy) {
1858 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1859 for (i = 0; i < NUM_G; i++, val++)
1860 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1861 }
1862 if (emu->audigy)
1863 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1864 emu->saved_hcfg = inl(emu->port + HCFG);
1865 }
1866
1867 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1868 {
1869 if (emu->card_capabilities->ecard)
1870 snd_emu10k1_ecard_init(emu);
1871 else if (emu->card_capabilities->ca_cardbus_chip)
1872 snd_emu10k1_cardbus_init(emu);
1873 else if (emu->card_capabilities->emu1010)
1874 snd_emu10k1_emu1010_init(emu);
1875 else
1876 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1877 snd_emu10k1_init(emu, emu->enable_ir, 1);
1878 }
1879
1880 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1881 {
1882 int i;
1883 unsigned char *reg;
1884 unsigned int *val;
1885
1886 snd_emu10k1_audio_enable(emu);
1887
1888 /* resore for spdif */
1889 if (emu->audigy)
1890 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1891 outl(emu->saved_hcfg, emu->port + HCFG);
1892
1893 val = emu->saved_ptr;
1894 for (reg = saved_regs; *reg != 0xff; reg++)
1895 for (i = 0; i < NUM_G; i++, val++)
1896 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1897 if (emu->audigy) {
1898 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1899 for (i = 0; i < NUM_G; i++, val++)
1900 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1901 }
1902 }
1903 #endif
kernel-based virtual machine