arch/powerpc/kernel/setup_32.c

   1 /*
   2  * Common prep/pmac/chrp boot and setup code.
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/string.h>
   7 #include <linux/sched.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/reboot.h>
  11 #include <linux/delay.h>
  12 #include <linux/initrd.h>
  13 #include <linux/tty.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/root_dev.h>
  17 #include <linux/cpu.h>
  18 #include <linux/console.h>
  19 #include <linux/lmb.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/prom.h>
  23 #include <asm/processor.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/setup.h>
  26 #include <asm/smp.h>
  27 #include <asm/elf.h>
  28 #include <asm/cputable.h>
  29 #include <asm/bootx.h>
  30 #include <asm/btext.h>
  31 #include <asm/machdep.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/system.h>
  34 #include <asm/pmac_feature.h>
  35 #include <asm/sections.h>
  36 #include <asm/nvram.h>
  37 #include <asm/xmon.h>
  38 #include <asm/time.h>
  39 #include <asm/serial.h>
  40 #include <asm/udbg.h>
  41
  42 #include "setup.h"
  43
  44 #define DBG(fmt...)
  45
  46 extern void bootx_init(unsigned long r4, unsigned long phys);
  47
  48 int boot_cpuid;
  49 EXPORT_SYMBOL_GPL(boot_cpuid);
  50 int boot_cpuid_phys;
  51
  52 int smp_hw_index[NR_CPUS];
  53
  54 unsigned long ISA_DMA_THRESHOLD;
  55 unsigned int DMA_MODE_READ;
  56 unsigned int DMA_MODE_WRITE;
  57
  58 #ifdef CONFIG_VGA_CONSOLE
  59 unsigned long vgacon_remap_base;
  60 EXPORT_SYMBOL(vgacon_remap_base);
  61 #endif
  62
  63 /*
  64  * These are used in binfmt_elf.c to put aux entries on the stack
  65  * for each elf executable being started.
  66  */
  67 int dcache_bsize;
  68 int icache_bsize;
  69 int ucache_bsize;
  70
  71 /*
  72  * We're called here very early in the boot.  We determine the machine
  73  * type and call the appropriate low-level setup functions.
  74  *  -- Cort <cort@fsmlabs.com>
  75  *
  76  * Note that the kernel may be running at an address which is different
  77  * from the address that it was linked at, so we must use RELOC/PTRRELOC
  78  * to access static data (including strings).  -- paulus
  79  */
  80 notrace unsigned long __init early_init(unsigned long dt_ptr)
  81 {
  82         unsigned long offset = reloc_offset();
  83         struct cpu_spec *spec;
  84
  85         /* First zero the BSS -- use memset_io, some platforms don't have
  86          * caches on yet */
  87         memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
  88                         __bss_stop - __bss_start);
  89
  90         /*
  91          * Identify the CPU type and fix up code sections
  92          * that depend on which cpu we have.
  93          */
  94         spec = identify_cpu(offset, mfspr(SPRN_PVR));
  95
  96         do_feature_fixups(spec->cpu_features,
  97                           PTRRELOC(&__start___ftr_fixup),
  98                           PTRRELOC(&__stop___ftr_fixup));
  99
 100         do_lwsync_fixups(spec->cpu_features,
 101                          PTRRELOC(&__start___lwsync_fixup),
 102                          PTRRELOC(&__stop___lwsync_fixup));
 103
 104         return KERNELBASE + offset;
 105 }
 106
 107
 108 /*
 109  * Find out what kind of machine we're on and save any data we need
 110  * from the early boot process (devtree is copied on pmac by prom_init()).
 111  * This is called very early on the boot process, after a minimal
 112  * MMU environment has been set up but before MMU_init is called.
 113  */
 114 notrace void __init machine_init(unsigned long dt_ptr)
 115 {
 116         /* Enable early debugging if any specified (see udbg.h) */
 117         udbg_early_init();
 118
 119         /* Do some early initialization based on the flat device tree */
 120         early_init_devtree(__va(dt_ptr));
 121
 122         probe_machine();
 123
 124 #ifdef CONFIG_6xx
 125         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 126             cpu_has_feature(CPU_FTR_CAN_NAP))
 127                 ppc_md.power_save = ppc6xx_idle;
 128 #endif
 129
 130 #ifdef CONFIG_E500
 131         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 132             cpu_has_feature(CPU_FTR_CAN_NAP))
 133                 ppc_md.power_save = e500_idle;
 134 #endif
 135         if (ppc_md.progress)
 136                 ppc_md.progress("id mach(): done", 0x200);
 137 }
 138
 139 #ifdef CONFIG_BOOKE_WDT
 140 /* Checks wdt=x and wdt_period=xx command-line option */
 141 notrace int __init early_parse_wdt(char *p)
 142 {
 143         if (p && strncmp(p, "0", 1) != 0)
 144                booke_wdt_enabled = 1;
 145
 146         return 0;
 147 }
 148 early_param("wdt", early_parse_wdt);
 149
 150 int __init early_parse_wdt_period (char *p)
 151 {
 152         if (p)
 153                 booke_wdt_period = simple_strtoul(p, NULL, 0);
 154
 155         return 0;
 156 }
 157 early_param("wdt_period", early_parse_wdt_period);
 158 #endif  /* CONFIG_BOOKE_WDT */
 159
 160 /* Checks "l2cr=xxxx" command-line option */
 161 int __init ppc_setup_l2cr(char *str)
 162 {
 163         if (cpu_has_feature(CPU_FTR_L2CR)) {
 164                 unsigned long val = simple_strtoul(str, NULL, 0);
 165                 printk(KERN_INFO "l2cr set to %lx\n", val);
 166                 _set_L2CR(0);           /* force invalidate by disable cache */
 167                 _set_L2CR(val);         /* and enable it */
 168         }
 169         return 1;
 170 }
 171 __setup("l2cr=", ppc_setup_l2cr);
 172
 173 /* Checks "l3cr=xxxx" command-line option */
 174 int __init ppc_setup_l3cr(char *str)
 175 {
 176         if (cpu_has_feature(CPU_FTR_L3CR)) {
 177                 unsigned long val = simple_strtoul(str, NULL, 0);
 178                 printk(KERN_INFO "l3cr set to %lx\n", val);
 179                 _set_L3CR(val);         /* and enable it */
 180         }
 181         return 1;
 182 }
 183 __setup("l3cr=", ppc_setup_l3cr);
 184
 185 #ifdef CONFIG_GENERIC_NVRAM
 186
 187 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
 188 unsigned char nvram_read_byte(int addr)
 189 {
 190         if (ppc_md.nvram_read_val)
 191                 return ppc_md.nvram_read_val(addr);
 192         return 0xff;
 193 }
 194 EXPORT_SYMBOL(nvram_read_byte);
 195
 196 void nvram_write_byte(unsigned char val, int addr)
 197 {
 198         if (ppc_md.nvram_write_val)
 199                 ppc_md.nvram_write_val(addr, val);
 200 }
 201 EXPORT_SYMBOL(nvram_write_byte);
 202
 203 void nvram_sync(void)
 204 {
 205         if (ppc_md.nvram_sync)
 206                 ppc_md.nvram_sync();
 207 }
 208 EXPORT_SYMBOL(nvram_sync);
 209
 210 #endif /* CONFIG_NVRAM */
 211
 212 int __init ppc_init(void)
 213 {
 214         /* clear the progress line */
 215         if (ppc_md.progress)
 216                 ppc_md.progress("             ", 0xffff);
 217
 218         /* call platform init */
 219         if (ppc_md.init != NULL) {
 220                 ppc_md.init();
 221         }
 222         return 0;
 223 }
 224
 225 arch_initcall(ppc_init);
 226
 227 #ifdef CONFIG_IRQSTACKS
 228 static void __init irqstack_early_init(void)
 229 {
 230         unsigned int i;
 231
 232         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 233          * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
 234         for_each_possible_cpu(i) {
 235                 softirq_ctx[i] = (struct thread_info *)
 236                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 237                 hardirq_ctx[i] = (struct thread_info *)
 238                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 239         }
 240 }
 241 #else
 242 #define irqstack_early_init()
 243 #endif
 244
 245 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 246 static void __init exc_lvl_early_init(void)
 247 {
 248         unsigned int i;
 249
 250         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 251          * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
 252         for_each_possible_cpu(i) {
 253                 critirq_ctx[i] = (struct thread_info *)
 254                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 255 #ifdef CONFIG_BOOKE
 256                 dbgirq_ctx[i] = (struct thread_info *)
 257                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 258                 mcheckirq_ctx[i] = (struct thread_info *)
 259                         __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
 260 #endif
 261         }
 262 }
 263 #else
 264 #define exc_lvl_early_init()
 265 #endif
 266
 267 /* Warning, IO base is not yet inited */
 268 void __init setup_arch(char **cmdline_p)
 269 {
 270         *cmdline_p = cmd_line;
 271
 272         /* so udelay does something sensible, assume <= 1000 bogomips */
 273         loops_per_jiffy = 500000000 / HZ;
 274
 275         unflatten_device_tree();
 276         check_for_initrd();
 277
 278         if (ppc_md.init_early)
 279                 ppc_md.init_early();
 280
 281         find_legacy_serial_ports();
 282
 283         smp_setup_cpu_maps();
 284
 285         /* Register early console */
 286         register_early_udbg_console();
 287
 288         xmon_setup();
 289
 290         /*
 291          * Set cache line size based on type of cpu as a default.
 292          * Systems with OF can look in the properties on the cpu node(s)
 293          * for a possibly more accurate value.
 294          */
 295         dcache_bsize = cur_cpu_spec->dcache_bsize;
 296         icache_bsize = cur_cpu_spec->icache_bsize;
 297         ucache_bsize = 0;
 298         if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
 299                 ucache_bsize = icache_bsize = dcache_bsize;
 300
 301         /* reboot on panic */
 302         panic_timeout = 180;
 303
 304         if (ppc_md.panic)
 305                 setup_panic();
 306
 307         init_mm.start_code = (unsigned long)_stext;
 308         init_mm.end_code = (unsigned long) _etext;
 309         init_mm.end_data = (unsigned long) _edata;
 310         init_mm.brk = klimit;
 311
 312         exc_lvl_early_init();
 313
 314         irqstack_early_init();
 315
 316         /* set up the bootmem stuff with available memory */
 317         do_init_bootmem();
 318         if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
 319
 320 #ifdef CONFIG_DUMMY_CONSOLE
 321         conswitchp = &dummy_con;
 322 #endif
 323
 324         if (ppc_md.setup_arch)
 325                 ppc_md.setup_arch();
 326         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 327
 328         paging_init();
 329 }