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iwlwifi: 802.11n spec removes AUTO offset for FAT channel
[linux-2.6/kvm.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
blobbb8f00272af3ef1c2b6e17bcd519dd70401913eb
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-4965.h"
42 #include "iwl-helpers.h"
43
44 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
45
46 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_SISO_##s##M_PLCP, \
49 IWL_RATE_MIMO_##s##M_PLCP, \
50 IWL_RATE_##r##M_IEEE, \
51 IWL_RATE_##ip##M_INDEX, \
52 IWL_RATE_##in##M_INDEX, \
53 IWL_RATE_##rp##M_INDEX, \
54 IWL_RATE_##rn##M_INDEX, \
55 IWL_RATE_##pp##M_INDEX, \
56 IWL_RATE_##np##M_INDEX }
57
58 /*
59 * Parameter order:
60 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
61 *
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
64 *
65 */
66 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
67 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
80 };
81
82 #ifdef CONFIG_IWL4965_HT
83
84 static const u16 default_tid_to_tx_fifo[] = {
85 IWL_TX_FIFO_AC1,
86 IWL_TX_FIFO_AC0,
87 IWL_TX_FIFO_AC0,
88 IWL_TX_FIFO_AC1,
89 IWL_TX_FIFO_AC2,
90 IWL_TX_FIFO_AC2,
91 IWL_TX_FIFO_AC3,
92 IWL_TX_FIFO_AC3,
93 IWL_TX_FIFO_NONE,
94 IWL_TX_FIFO_NONE,
95 IWL_TX_FIFO_NONE,
96 IWL_TX_FIFO_NONE,
97 IWL_TX_FIFO_NONE,
98 IWL_TX_FIFO_NONE,
99 IWL_TX_FIFO_NONE,
100 IWL_TX_FIFO_NONE,
101 IWL_TX_FIFO_AC3
102 };
103
104 #endif /*CONFIG_IWL4965_HT */
105
106 static int is_fat_channel(__le32 rxon_flags)
107 {
108 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
109 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
110 }
111
112 static u8 is_single_stream(struct iwl4965_priv *priv)
113 {
114 #ifdef CONFIG_IWL4965_HT
115 if (!priv->current_ht_config.is_ht ||
116 (priv->current_ht_config.supp_mcs_set[1] == 0) ||
117 (priv->ps_mode == IWL_MIMO_PS_STATIC))
118 return 1;
119 #else
120 return 1;
121 #endif /*CONFIG_IWL4965_HT */
122 return 0;
123 }
124
125 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
126 {
127 int idx = 0;
128
129 /* 4965 HT rate format */
130 if (rate_n_flags & RATE_MCS_HT_MSK) {
131 idx = (rate_n_flags & 0xff);
132
133 if (idx >= IWL_RATE_MIMO_6M_PLCP)
134 idx = idx - IWL_RATE_MIMO_6M_PLCP;
135
136 idx += IWL_FIRST_OFDM_RATE;
137 /* skip 9M not supported in ht*/
138 if (idx >= IWL_RATE_9M_INDEX)
139 idx += 1;
140 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
141 return idx;
142
143 /* 4965 legacy rate format, search for match in table */
144 } else {
145 for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
146 if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
147 return idx;
148 }
149
150 return -1;
151 }
152
153
154 /*
155 * Determine how many receiver/antenna chains to use.
156 * More provides better reception via diversity. Fewer saves power.
157 * MIMO (dual stream) requires at least 2, but works better with 3.
158 * This does not determine *which* chains to use, just how many.
159 */
160 static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
161 u8 *idle_state, u8 *rx_state)
162 {
163 u8 is_single = is_single_stream(priv);
164 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
165
166 /* # of Rx chains to use when expecting MIMO. */
167 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
168 *rx_state = 2;
169 else
170 *rx_state = 3;
171
172 /* # Rx chains when idling and maybe trying to save power */
173 switch (priv->ps_mode) {
174 case IWL_MIMO_PS_STATIC:
175 case IWL_MIMO_PS_DYNAMIC:
176 *idle_state = (is_cam) ? 2 : 1;
177 break;
178 case IWL_MIMO_PS_NONE:
179 *idle_state = (is_cam) ? *rx_state : 1;
180 break;
181 default:
182 *idle_state = 1;
183 break;
184 }
185
186 return 0;
187 }
188
189 int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
190 {
191 int rc;
192 unsigned long flags;
193
194 spin_lock_irqsave(&priv->lock, flags);
195 rc = iwl4965_grab_nic_access(priv);
196 if (rc) {
197 spin_unlock_irqrestore(&priv->lock, flags);
198 return rc;
199 }
200
201 /* stop Rx DMA */
202 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
203 rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
204 (1 << 24), 1000);
205 if (rc < 0)
206 IWL_ERROR("Can't stop Rx DMA.\n");
207
208 iwl4965_release_nic_access(priv);
209 spin_unlock_irqrestore(&priv->lock, flags);
210
211 return 0;
212 }
213
214 u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
215 {
216 int i;
217 int start = 0;
218 int ret = IWL_INVALID_STATION;
219 unsigned long flags;
220 DECLARE_MAC_BUF(mac);
221
222 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
223 (priv->iw_mode == IEEE80211_IF_TYPE_AP))
224 start = IWL_STA_ID;
225
226 if (is_broadcast_ether_addr(addr))
227 return IWL4965_BROADCAST_ID;
228
229 spin_lock_irqsave(&priv->sta_lock, flags);
230 for (i = start; i < priv->hw_setting.max_stations; i++)
231 if ((priv->stations[i].used) &&
232 (!compare_ether_addr
233 (priv->stations[i].sta.sta.addr, addr))) {
234 ret = i;
235 goto out;
236 }
237
238 IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
239 print_mac(mac, addr), priv->num_stations);
240
241 out:
242 spin_unlock_irqrestore(&priv->sta_lock, flags);
243 return ret;
244 }
245
246 static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
247 {
248 int ret;
249 unsigned long flags;
250
251 spin_lock_irqsave(&priv->lock, flags);
252 ret = iwl4965_grab_nic_access(priv);
253 if (ret) {
254 spin_unlock_irqrestore(&priv->lock, flags);
255 return ret;
256 }
257
258 if (!pwr_max) {
259 u32 val;
260
261 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
262 &val);
263
264 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
265 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
266 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
267 ~APMG_PS_CTRL_MSK_PWR_SRC);
268 } else
269 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
270 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
271 ~APMG_PS_CTRL_MSK_PWR_SRC);
272
273 iwl4965_release_nic_access(priv);
274 spin_unlock_irqrestore(&priv->lock, flags);
275
276 return ret;
277 }
278
279 static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
280 {
281 int rc;
282 unsigned long flags;
283 unsigned int rb_size;
284
285 spin_lock_irqsave(&priv->lock, flags);
286 rc = iwl4965_grab_nic_access(priv);
287 if (rc) {
288 spin_unlock_irqrestore(&priv->lock, flags);
289 return rc;
290 }
291
292 if (iwl4965_param_amsdu_size_8K)
293 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
294 else
295 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
296
297 /* Stop Rx DMA */
298 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
299
300 /* Reset driver's Rx queue write index */
301 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
302
303 /* Tell device where to find RBD circular buffer in DRAM */
304 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
305 rxq->dma_addr >> 8);
306
307 /* Tell device where in DRAM to update its Rx status */
308 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
309 (priv->hw_setting.shared_phys +
310 offsetof(struct iwl4965_shared, val0)) >> 4);
311
312 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
313 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
314 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
315 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
316 rb_size |
317 /*0x10 << 4 | */
318 (RX_QUEUE_SIZE_LOG <<
319 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
320
321 /*
322 * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
323 */
324
325 iwl4965_release_nic_access(priv);
326 spin_unlock_irqrestore(&priv->lock, flags);
327
328 return 0;
329 }
330
331 /* Tell 4965 where to find the "keep warm" buffer */
332 static int iwl4965_kw_init(struct iwl4965_priv *priv)
333 {
334 unsigned long flags;
335 int rc;
336
337 spin_lock_irqsave(&priv->lock, flags);
338 rc = iwl4965_grab_nic_access(priv);
339 if (rc)
340 goto out;
341
342 iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
343 priv->kw.dma_addr >> 4);
344 iwl4965_release_nic_access(priv);
345 out:
346 spin_unlock_irqrestore(&priv->lock, flags);
347 return rc;
348 }
349
350 static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
351 {
352 struct pci_dev *dev = priv->pci_dev;
353 struct iwl4965_kw *kw = &priv->kw;
354
355 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
356 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
357 if (!kw->v_addr)
358 return -ENOMEM;
359
360 return 0;
361 }
362
363 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
364 ? # x " " : "")
365
366 /**
367 * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
368 *
369 * Does not set up a command, or touch hardware.
370 */
371 int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv,
372 enum ieee80211_band band, u16 channel,
373 const struct iwl4965_eeprom_channel *eeprom_ch,
374 u8 fat_extension_channel)
375 {
376 struct iwl4965_channel_info *ch_info;
377
378 ch_info = (struct iwl4965_channel_info *)
379 iwl4965_get_channel_info(priv, band, channel);
380
381 if (!is_channel_valid(ch_info))
382 return -1;
383
384 IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
385 " %ddBm): Ad-Hoc %ssupported\n",
386 ch_info->channel,
387 is_channel_a_band(ch_info) ?
388 "5.2" : "2.4",
389 CHECK_AND_PRINT(IBSS),
390 CHECK_AND_PRINT(ACTIVE),
391 CHECK_AND_PRINT(RADAR),
392 CHECK_AND_PRINT(WIDE),
393 CHECK_AND_PRINT(NARROW),
394 CHECK_AND_PRINT(DFS),
395 eeprom_ch->flags,
396 eeprom_ch->max_power_avg,
397 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
398 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
399 "" : "not ");
400
401 ch_info->fat_eeprom = *eeprom_ch;
402 ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
403 ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
404 ch_info->fat_min_power = 0;
405 ch_info->fat_scan_power = eeprom_ch->max_power_avg;
406 ch_info->fat_flags = eeprom_ch->flags;
407 ch_info->fat_extension_channel = fat_extension_channel;
408
409 return 0;
410 }
411
412 /**
413 * iwl4965_kw_free - Free the "keep warm" buffer
414 */
415 static void iwl4965_kw_free(struct iwl4965_priv *priv)
416 {
417 struct pci_dev *dev = priv->pci_dev;
418 struct iwl4965_kw *kw = &priv->kw;
419
420 if (kw->v_addr) {
421 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
422 memset(kw, 0, sizeof(*kw));
423 }
424 }
425
426 /**
427 * iwl4965_txq_ctx_reset - Reset TX queue context
428 * Destroys all DMA structures and initialise them again
429 *
430 * @param priv
431 * @return error code
432 */
433 static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
434 {
435 int rc = 0;
436 int txq_id, slots_num;
437 unsigned long flags;
438
439 iwl4965_kw_free(priv);
440
441 /* Free all tx/cmd queues and keep-warm buffer */
442 iwl4965_hw_txq_ctx_free(priv);
443
444 /* Alloc keep-warm buffer */
445 rc = iwl4965_kw_alloc(priv);
446 if (rc) {
447 IWL_ERROR("Keep Warm allocation failed");
448 goto error_kw;
449 }
450
451 spin_lock_irqsave(&priv->lock, flags);
452
453 rc = iwl4965_grab_nic_access(priv);
454 if (unlikely(rc)) {
455 IWL_ERROR("TX reset failed");
456 spin_unlock_irqrestore(&priv->lock, flags);
457 goto error_reset;
458 }
459
460 /* Turn off all Tx DMA channels */
461 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
462 iwl4965_release_nic_access(priv);
463 spin_unlock_irqrestore(&priv->lock, flags);
464
465 /* Tell 4965 where to find the keep-warm buffer */
466 rc = iwl4965_kw_init(priv);
467 if (rc) {
468 IWL_ERROR("kw_init failed\n");
469 goto error_reset;
470 }
471
472 /* Alloc and init all (default 16) Tx queues,
473 * including the command queue (#4) */
474 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
475 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
476 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
477 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
478 txq_id);
479 if (rc) {
480 IWL_ERROR("Tx %d queue init failed\n", txq_id);
481 goto error;
482 }
483 }
484
485 return rc;
486
487 error:
488 iwl4965_hw_txq_ctx_free(priv);
489 error_reset:
490 iwl4965_kw_free(priv);
491 error_kw:
492 return rc;
493 }
494
495 int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
496 {
497 int rc;
498 unsigned long flags;
499 struct iwl4965_rx_queue *rxq = &priv->rxq;
500 u8 rev_id;
501 u32 val;
502 u8 val_link;
503
504 iwl4965_power_init_handle(priv);
505
506 /* nic_init */
507 spin_lock_irqsave(&priv->lock, flags);
508
509 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
510 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
511
512 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
513 rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
514 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
515 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
516 if (rc < 0) {
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_INFO("Failed to init the card\n");
519 return rc;
520 }
521
522 rc = iwl4965_grab_nic_access(priv);
523 if (rc) {
524 spin_unlock_irqrestore(&priv->lock, flags);
525 return rc;
526 }
527
528 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
529
530 iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
531 APMG_CLK_VAL_DMA_CLK_RQT |
532 APMG_CLK_VAL_BSM_CLK_RQT);
533 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
534
535 udelay(20);
536
537 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
538 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
539
540 iwl4965_release_nic_access(priv);
541 iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
542 spin_unlock_irqrestore(&priv->lock, flags);
543
544 /* Determine HW type */
545 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
546 if (rc)
547 return rc;
548
549 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
550
551 iwl4965_nic_set_pwr_src(priv, 1);
552 spin_lock_irqsave(&priv->lock, flags);
553
554 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
555 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
556 /* Enable No Snoop field */
557 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
558 val & ~(1 << 11));
559 }
560
561 spin_unlock_irqrestore(&priv->lock, flags);
562
563 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
564 IWL_ERROR("Older EEPROM detected! Aborting.\n");
565 return -EINVAL;
566 }
567
568 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
569
570 /* disable L1 entry -- workaround for pre-B1 */
571 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
572
573 spin_lock_irqsave(&priv->lock, flags);
574
575 /* set CSR_HW_CONFIG_REG for uCode use */
576
577 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
578 CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
579 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
580 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
581
582 rc = iwl4965_grab_nic_access(priv);
583 if (rc < 0) {
584 spin_unlock_irqrestore(&priv->lock, flags);
585 IWL_DEBUG_INFO("Failed to init the card\n");
586 return rc;
587 }
588
589 iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
590 iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
591 APMG_PS_CTRL_VAL_RESET_REQ);
592 udelay(5);
593 iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
594 APMG_PS_CTRL_VAL_RESET_REQ);
595
596 iwl4965_release_nic_access(priv);
597 spin_unlock_irqrestore(&priv->lock, flags);
598
599 iwl4965_hw_card_show_info(priv);
600
601 /* end nic_init */
602
603 /* Allocate the RX queue, or reset if it is already allocated */
604 if (!rxq->bd) {
605 rc = iwl4965_rx_queue_alloc(priv);
606 if (rc) {
607 IWL_ERROR("Unable to initialize Rx queue\n");
608 return -ENOMEM;
609 }
610 } else
611 iwl4965_rx_queue_reset(priv, rxq);
612
613 iwl4965_rx_replenish(priv);
614
615 iwl4965_rx_init(priv, rxq);
616
617 spin_lock_irqsave(&priv->lock, flags);
618
619 rxq->need_update = 1;
620 iwl4965_rx_queue_update_write_ptr(priv, rxq);
621
622 spin_unlock_irqrestore(&priv->lock, flags);
623
624 /* Allocate and init all Tx and Command queues */
625 rc = iwl4965_txq_ctx_reset(priv);
626 if (rc)
627 return rc;
628
629 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
630 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
631
632 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
633 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
634
635 set_bit(STATUS_INIT, &priv->status);
636
637 return 0;
638 }
639
640 int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
641 {
642 int rc = 0;
643 u32 reg_val;
644 unsigned long flags;
645
646 spin_lock_irqsave(&priv->lock, flags);
647
648 /* set stop master bit */
649 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
650
651 reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
652
653 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
654 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
655 IWL_DEBUG_INFO("Card in power save, master is already "
656 "stopped\n");
657 else {
658 rc = iwl4965_poll_bit(priv, CSR_RESET,
659 CSR_RESET_REG_FLAG_MASTER_DISABLED,
660 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
661 if (rc < 0) {
662 spin_unlock_irqrestore(&priv->lock, flags);
663 return rc;
664 }
665 }
666
667 spin_unlock_irqrestore(&priv->lock, flags);
668 IWL_DEBUG_INFO("stop master\n");
669
670 return rc;
671 }
672
673 /**
674 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
675 */
676 void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
677 {
678
679 int txq_id;
680 unsigned long flags;
681
682 /* Stop each Tx DMA channel, and wait for it to be idle */
683 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
684 spin_lock_irqsave(&priv->lock, flags);
685 if (iwl4965_grab_nic_access(priv)) {
686 spin_unlock_irqrestore(&priv->lock, flags);
687 continue;
688 }
689
690 iwl4965_write_direct32(priv,
691 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
692 0x0);
693 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
694 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
695 (txq_id), 200);
696 iwl4965_release_nic_access(priv);
697 spin_unlock_irqrestore(&priv->lock, flags);
698 }
699
700 /* Deallocate memory for all Tx queues */
701 iwl4965_hw_txq_ctx_free(priv);
702 }
703
704 int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
705 {
706 int rc = 0;
707 unsigned long flags;
708
709 iwl4965_hw_nic_stop_master(priv);
710
711 spin_lock_irqsave(&priv->lock, flags);
712
713 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
714
715 udelay(10);
716
717 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
718 rc = iwl4965_poll_bit(priv, CSR_RESET,
719 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
720 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
721
722 udelay(10);
723
724 rc = iwl4965_grab_nic_access(priv);
725 if (!rc) {
726 iwl4965_write_prph(priv, APMG_CLK_EN_REG,
727 APMG_CLK_VAL_DMA_CLK_RQT |
728 APMG_CLK_VAL_BSM_CLK_RQT);
729
730 udelay(10);
731
732 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
733 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
734
735 iwl4965_release_nic_access(priv);
736 }
737
738 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
739 wake_up_interruptible(&priv->wait_command_queue);
740
741 spin_unlock_irqrestore(&priv->lock, flags);
742
743 return rc;
744
745 }
746
747 #define REG_RECALIB_PERIOD (60)
748
749 /**
750 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
751 *
752 * This callback is provided in order to queue the statistics_work
753 * in work_queue context (v. softirq)
754 *
755 * This timer function is continually reset to execute within
756 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
757 * was received. We need to ensure we receive the statistics in order
758 * to update the temperature used for calibrating the TXPOWER. However,
759 * we can't send the statistics command from softirq context (which
760 * is the context which timers run at) so we have to queue off the
761 * statistics_work to actually send the command to the hardware.
762 */
763 static void iwl4965_bg_statistics_periodic(unsigned long data)
764 {
765 struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
766
767 queue_work(priv->workqueue, &priv->statistics_work);
768 }
769
770 /**
771 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
772 *
773 * This is queued by iwl4965_bg_statistics_periodic.
774 */
775 static void iwl4965_bg_statistics_work(struct work_struct *work)
776 {
777 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
778 statistics_work);
779
780 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
781 return;
782
783 mutex_lock(&priv->mutex);
784 iwl4965_send_statistics_request(priv);
785 mutex_unlock(&priv->mutex);
786 }
787
788 #define CT_LIMIT_CONST 259
789 #define TM_CT_KILL_THRESHOLD 110
790
791 void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
792 {
793 struct iwl4965_ct_kill_config cmd;
794 u32 R1, R2, R3;
795 u32 temp_th;
796 u32 crit_temperature;
797 unsigned long flags;
798 int rc = 0;
799
800 spin_lock_irqsave(&priv->lock, flags);
801 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
802 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
803 spin_unlock_irqrestore(&priv->lock, flags);
804
805 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
806 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
807 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
808 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
809 } else {
810 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
811 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
812 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
813 }
814
815 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
816
817 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
818 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
819 rc = iwl4965_send_cmd_pdu(priv,
820 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
821 if (rc)
822 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
823 else
824 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
825 }
826
827 #ifdef CONFIG_IWL4965_SENSITIVITY
828
829 /* "false alarms" are signals that our DSP tries to lock onto,
830 * but then determines that they are either noise, or transmissions
831 * from a distant wireless network (also "noise", really) that get
832 * "stepped on" by stronger transmissions within our own network.
833 * This algorithm attempts to set a sensitivity level that is high
834 * enough to receive all of our own network traffic, but not so
835 * high that our DSP gets too busy trying to lock onto non-network
836 * activity/noise. */
837 static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
838 u32 norm_fa,
839 u32 rx_enable_time,
840 struct statistics_general_data *rx_info)
841 {
842 u32 max_nrg_cck = 0;
843 int i = 0;
844 u8 max_silence_rssi = 0;
845 u32 silence_ref = 0;
846 u8 silence_rssi_a = 0;
847 u8 silence_rssi_b = 0;
848 u8 silence_rssi_c = 0;
849 u32 val;
850
851 /* "false_alarms" values below are cross-multiplications to assess the
852 * numbers of false alarms within the measured period of actual Rx
853 * (Rx is off when we're txing), vs the min/max expected false alarms
854 * (some should be expected if rx is sensitive enough) in a
855 * hypothetical listening period of 200 time units (TU), 204.8 msec:
856 *
857 * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
858 *
859 * */
860 u32 false_alarms = norm_fa * 200 * 1024;
861 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
862 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
863 struct iwl4965_sensitivity_data *data = NULL;
864
865 data = &(priv->sensitivity_data);
866
867 data->nrg_auto_corr_silence_diff = 0;
868
869 /* Find max silence rssi among all 3 receivers.
870 * This is background noise, which may include transmissions from other
871 * networks, measured during silence before our network's beacon */
872 silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
873 ALL_BAND_FILTER) >> 8);
874 silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
875 ALL_BAND_FILTER) >> 8);
876 silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
877 ALL_BAND_FILTER) >> 8);
878
879 val = max(silence_rssi_b, silence_rssi_c);
880 max_silence_rssi = max(silence_rssi_a, (u8) val);
881
882 /* Store silence rssi in 20-beacon history table */
883 data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
884 data->nrg_silence_idx++;
885 if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
886 data->nrg_silence_idx = 0;
887
888 /* Find max silence rssi across 20 beacon history */
889 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
890 val = data->nrg_silence_rssi[i];
891 silence_ref = max(silence_ref, val);
892 }
893 IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
894 silence_rssi_a, silence_rssi_b, silence_rssi_c,
895 silence_ref);
896
897 /* Find max rx energy (min value!) among all 3 receivers,
898 * measured during beacon frame.
899 * Save it in 10-beacon history table. */
900 i = data->nrg_energy_idx;
901 val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
902 data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
903
904 data->nrg_energy_idx++;
905 if (data->nrg_energy_idx >= 10)
906 data->nrg_energy_idx = 0;
907
908 /* Find min rx energy (max value) across 10 beacon history.
909 * This is the minimum signal level that we want to receive well.
910 * Add backoff (margin so we don't miss slightly lower energy frames).
911 * This establishes an upper bound (min value) for energy threshold. */
912 max_nrg_cck = data->nrg_value[0];
913 for (i = 1; i < 10; i++)
914 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
915 max_nrg_cck += 6;
916
917 IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
918 rx_info->beacon_energy_a, rx_info->beacon_energy_b,
919 rx_info->beacon_energy_c, max_nrg_cck - 6);
920
921 /* Count number of consecutive beacons with fewer-than-desired
922 * false alarms. */
923 if (false_alarms < min_false_alarms)
924 data->num_in_cck_no_fa++;
925 else
926 data->num_in_cck_no_fa = 0;
927 IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
928 data->num_in_cck_no_fa);
929
930 /* If we got too many false alarms this time, reduce sensitivity */
931 if (false_alarms > max_false_alarms) {
932 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
933 false_alarms, max_false_alarms);
934 IWL_DEBUG_CALIB("... reducing sensitivity\n");
935 data->nrg_curr_state = IWL_FA_TOO_MANY;
936
937 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
938 /* Store for "fewer than desired" on later beacon */
939 data->nrg_silence_ref = silence_ref;
940
941 /* increase energy threshold (reduce nrg value)
942 * to decrease sensitivity */
943 if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
944 data->nrg_th_cck = data->nrg_th_cck
945 - NRG_STEP_CCK;
946 }
947
948 /* increase auto_corr values to decrease sensitivity */
949 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
950 data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
951 else {
952 val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
953 data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
954 }
955 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
956 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
957
958 /* Else if we got fewer than desired, increase sensitivity */
959 } else if (false_alarms < min_false_alarms) {
960 data->nrg_curr_state = IWL_FA_TOO_FEW;
961
962 /* Compare silence level with silence level for most recent
963 * healthy number or too many false alarms */
964 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
965 (s32)silence_ref;
966
967 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
968 false_alarms, min_false_alarms,
969 data->nrg_auto_corr_silence_diff);
970
971 /* Increase value to increase sensitivity, but only if:
972 * 1a) previous beacon did *not* have *too many* false alarms
973 * 1b) AND there's a significant difference in Rx levels
974 * from a previous beacon with too many, or healthy # FAs
975 * OR 2) We've seen a lot of beacons (100) with too few
976 * false alarms */
977 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
978 ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
979 (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
980
981 IWL_DEBUG_CALIB("... increasing sensitivity\n");
982 /* Increase nrg value to increase sensitivity */
983 val = data->nrg_th_cck + NRG_STEP_CCK;
984 data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
985
986 /* Decrease auto_corr values to increase sensitivity */
987 val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
988 data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
989
990 val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
991 data->auto_corr_cck_mrc =
992 max((u32)AUTO_CORR_MIN_CCK_MRC, val);
993
994 } else
995 IWL_DEBUG_CALIB("... but not changing sensitivity\n");
996
997 /* Else we got a healthy number of false alarms, keep status quo */
998 } else {
999 IWL_DEBUG_CALIB(" FA in safe zone\n");
1000 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
1001
1002 /* Store for use in "fewer than desired" with later beacon */
1003 data->nrg_silence_ref = silence_ref;
1004
1005 /* If previous beacon had too many false alarms,
1006 * give it some extra margin by reducing sensitivity again
1007 * (but don't go below measured energy of desired Rx) */
1008 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
1009 IWL_DEBUG_CALIB("... increasing margin\n");
1010 data->nrg_th_cck -= NRG_MARGIN;
1011 }
1012 }
1013
1014 /* Make sure the energy threshold does not go above the measured
1015 * energy of the desired Rx signals (reduced by backoff margin),
1016 * or else we might start missing Rx frames.
1017 * Lower value is higher energy, so we use max()!
1018 */
1019 data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
1020 IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
1021
1022 data->nrg_prev_state = data->nrg_curr_state;
1023
1024 return 0;
1025 }
1026
1027
1028 static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
1029 u32 norm_fa,
1030 u32 rx_enable_time)
1031 {
1032 u32 val;
1033 u32 false_alarms = norm_fa * 200 * 1024;
1034 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
1035 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
1036 struct iwl4965_sensitivity_data *data = NULL;
1037
1038 data = &(priv->sensitivity_data);
1039
1040 /* If we got too many false alarms this time, reduce sensitivity */
1041 if (false_alarms > max_false_alarms) {
1042
1043 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
1044 false_alarms, max_false_alarms);
1045
1046 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
1047 data->auto_corr_ofdm =
1048 min((u32)AUTO_CORR_MAX_OFDM, val);
1049
1050 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
1051 data->auto_corr_ofdm_mrc =
1052 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
1053
1054 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
1055 data->auto_corr_ofdm_x1 =
1056 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
1057
1058 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
1059 data->auto_corr_ofdm_mrc_x1 =
1060 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
1061 }
1062
1063 /* Else if we got fewer than desired, increase sensitivity */
1064 else if (false_alarms < min_false_alarms) {
1065
1066 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
1067 false_alarms, min_false_alarms);
1068
1069 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
1070 data->auto_corr_ofdm =
1071 max((u32)AUTO_CORR_MIN_OFDM, val);
1072
1073 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
1074 data->auto_corr_ofdm_mrc =
1075 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
1076
1077 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1078 data->auto_corr_ofdm_x1 =
1079 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1080
1081 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1082 data->auto_corr_ofdm_mrc_x1 =
1083 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1084 }
1085
1086 else
1087 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1088 min_false_alarms, false_alarms, max_false_alarms);
1089
1090 return 0;
1091 }
1092
1093 static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
1094 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1095 {
1096 /* We didn't cache the SKB; let the caller free it */
1097 return 1;
1098 }
1099
1100 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1101 static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
1102 {
1103 int rc = 0;
1104 struct iwl4965_sensitivity_cmd cmd ;
1105 struct iwl4965_sensitivity_data *data = NULL;
1106 struct iwl4965_host_cmd cmd_out = {
1107 .id = SENSITIVITY_CMD,
1108 .len = sizeof(struct iwl4965_sensitivity_cmd),
1109 .meta.flags = flags,
1110 .data = &cmd,
1111 };
1112
1113 data = &(priv->sensitivity_data);
1114
1115 memset(&cmd, 0, sizeof(cmd));
1116
1117 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1118 cpu_to_le16((u16)data->auto_corr_ofdm);
1119 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1120 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1121 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1122 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1123 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1124 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1125
1126 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1127 cpu_to_le16((u16)data->auto_corr_cck);
1128 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1129 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1130
1131 cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1132 cpu_to_le16((u16)data->nrg_th_cck);
1133 cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1134 cpu_to_le16((u16)data->nrg_th_ofdm);
1135
1136 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1137 __constant_cpu_to_le16(190);
1138 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1139 __constant_cpu_to_le16(390);
1140 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1141 __constant_cpu_to_le16(62);
1142
1143 IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1144 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1145 data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1146 data->nrg_th_ofdm);
1147
1148 IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1149 data->auto_corr_cck, data->auto_corr_cck_mrc,
1150 data->nrg_th_cck);
1151
1152 /* Update uCode's "work" table, and copy it to DSP */
1153 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1154
1155 if (flags & CMD_ASYNC)
1156 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1157
1158 /* Don't send command to uCode if nothing has changed */
1159 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1160 sizeof(u16)*HD_TABLE_SIZE)) {
1161 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1162 return 0;
1163 }
1164
1165 /* Copy table for comparison next time */
1166 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1167 sizeof(u16)*HD_TABLE_SIZE);
1168
1169 rc = iwl4965_send_cmd(priv, &cmd_out);
1170 if (!rc) {
1171 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1172 return rc;
1173 }
1174
1175 return 0;
1176 }
1177
1178 void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
1179 {
1180 int rc = 0;
1181 int i;
1182 struct iwl4965_sensitivity_data *data = NULL;
1183
1184 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1185
1186 if (force)
1187 memset(&(priv->sensitivity_tbl[0]), 0,
1188 sizeof(u16)*HD_TABLE_SIZE);
1189
1190 /* Clear driver's sensitivity algo data */
1191 data = &(priv->sensitivity_data);
1192 memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1193
1194 data->num_in_cck_no_fa = 0;
1195 data->nrg_curr_state = IWL_FA_TOO_MANY;
1196 data->nrg_prev_state = IWL_FA_TOO_MANY;
1197 data->nrg_silence_ref = 0;
1198 data->nrg_silence_idx = 0;
1199 data->nrg_energy_idx = 0;
1200
1201 for (i = 0; i < 10; i++)
1202 data->nrg_value[i] = 0;
1203
1204 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1205 data->nrg_silence_rssi[i] = 0;
1206
1207 data->auto_corr_ofdm = 90;
1208 data->auto_corr_ofdm_mrc = 170;
1209 data->auto_corr_ofdm_x1 = 105;
1210 data->auto_corr_ofdm_mrc_x1 = 220;
1211 data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1212 data->auto_corr_cck_mrc = 200;
1213 data->nrg_th_cck = 100;
1214 data->nrg_th_ofdm = 100;
1215
1216 data->last_bad_plcp_cnt_ofdm = 0;
1217 data->last_fa_cnt_ofdm = 0;
1218 data->last_bad_plcp_cnt_cck = 0;
1219 data->last_fa_cnt_cck = 0;
1220
1221 /* Clear prior Sensitivity command data to force send to uCode */
1222 if (force)
1223 memset(&(priv->sensitivity_tbl[0]), 0,
1224 sizeof(u16)*HD_TABLE_SIZE);
1225
1226 rc |= iwl4965_sensitivity_write(priv, flags);
1227 IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
1228
1229 return;
1230 }
1231
1232
1233 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1234 * Called after every association, but this runs only once!
1235 * ... once chain noise is calibrated the first time, it's good forever. */
1236 void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
1237 {
1238 struct iwl4965_chain_noise_data *data = NULL;
1239 int rc = 0;
1240
1241 data = &(priv->chain_noise_data);
1242 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1243 struct iwl4965_calibration_cmd cmd;
1244
1245 memset(&cmd, 0, sizeof(cmd));
1246 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1247 cmd.diff_gain_a = 0;
1248 cmd.diff_gain_b = 0;
1249 cmd.diff_gain_c = 0;
1250 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1251 sizeof(cmd), &cmd);
1252 msleep(4);
1253 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1254 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1255 }
1256 return;
1257 }
1258
1259 /*
1260 * Accumulate 20 beacons of signal and noise statistics for each of
1261 * 3 receivers/antennas/rx-chains, then figure out:
1262 * 1) Which antennas are connected.
1263 * 2) Differential rx gain settings to balance the 3 receivers.
1264 */
1265 static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
1266 struct iwl4965_notif_statistics *stat_resp)
1267 {
1268 struct iwl4965_chain_noise_data *data = NULL;
1269 int rc = 0;
1270
1271 u32 chain_noise_a;
1272 u32 chain_noise_b;
1273 u32 chain_noise_c;
1274 u32 chain_sig_a;
1275 u32 chain_sig_b;
1276 u32 chain_sig_c;
1277 u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1278 u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1279 u32 max_average_sig;
1280 u16 max_average_sig_antenna_i;
1281 u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1282 u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1283 u16 i = 0;
1284 u16 chan_num = INITIALIZATION_VALUE;
1285 u32 band = INITIALIZATION_VALUE;
1286 u32 active_chains = 0;
1287 unsigned long flags;
1288 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1289
1290 data = &(priv->chain_noise_data);
1291
1292 /* Accumulate just the first 20 beacons after the first association,
1293 * then we're done forever. */
1294 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1295 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1296 IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1297 return;
1298 }
1299
1300 spin_lock_irqsave(&priv->lock, flags);
1301 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1302 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1303 spin_unlock_irqrestore(&priv->lock, flags);
1304 return;
1305 }
1306
1307 band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1308 chan_num = le16_to_cpu(priv->staging_rxon.channel);
1309
1310 /* Make sure we accumulate data for just the associated channel
1311 * (even if scanning). */
1312 if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1313 ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1314 (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1315 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1316 chan_num, band);
1317 spin_unlock_irqrestore(&priv->lock, flags);
1318 return;
1319 }
1320
1321 /* Accumulate beacon statistics values across 20 beacons */
1322 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1323 IN_BAND_FILTER;
1324 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1325 IN_BAND_FILTER;
1326 chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1327 IN_BAND_FILTER;
1328
1329 chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1330 chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1331 chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1332
1333 spin_unlock_irqrestore(&priv->lock, flags);
1334
1335 data->beacon_count++;
1336
1337 data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1338 data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1339 data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1340
1341 data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1342 data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1343 data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1344
1345 IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1346 data->beacon_count);
1347 IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1348 chain_sig_a, chain_sig_b, chain_sig_c);
1349 IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1350 chain_noise_a, chain_noise_b, chain_noise_c);
1351
1352 /* If this is the 20th beacon, determine:
1353 * 1) Disconnected antennas (using signal strengths)
1354 * 2) Differential gain (using silence noise) to balance receivers */
1355 if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1356
1357 /* Analyze signal for disconnected antenna */
1358 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1359 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1360 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1361
1362 if (average_sig[0] >= average_sig[1]) {
1363 max_average_sig = average_sig[0];
1364 max_average_sig_antenna_i = 0;
1365 active_chains = (1 << max_average_sig_antenna_i);
1366 } else {
1367 max_average_sig = average_sig[1];
1368 max_average_sig_antenna_i = 1;
1369 active_chains = (1 << max_average_sig_antenna_i);
1370 }
1371
1372 if (average_sig[2] >= max_average_sig) {
1373 max_average_sig = average_sig[2];
1374 max_average_sig_antenna_i = 2;
1375 active_chains = (1 << max_average_sig_antenna_i);
1376 }
1377
1378 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1379 average_sig[0], average_sig[1], average_sig[2]);
1380 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1381 max_average_sig, max_average_sig_antenna_i);
1382
1383 /* Compare signal strengths for all 3 receivers. */
1384 for (i = 0; i < NUM_RX_CHAINS; i++) {
1385 if (i != max_average_sig_antenna_i) {
1386 s32 rssi_delta = (max_average_sig -
1387 average_sig[i]);
1388
1389 /* If signal is very weak, compared with
1390 * strongest, mark it as disconnected. */
1391 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1392 data->disconn_array[i] = 1;
1393 else
1394 active_chains |= (1 << i);
1395 IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
1396 "disconn_array[i] = %d\n",
1397 i, rssi_delta, data->disconn_array[i]);
1398 }
1399 }
1400
1401 /*If both chains A & B are disconnected -
1402 * connect B and leave A as is */
1403 if (data->disconn_array[CHAIN_A] &&
1404 data->disconn_array[CHAIN_B]) {
1405 data->disconn_array[CHAIN_B] = 0;
1406 active_chains |= (1 << CHAIN_B);
1407 IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1408 "W/A - declare B as connected\n");
1409 }
1410
1411 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1412 active_chains);
1413
1414 /* Save for use within RXON, TX, SCAN commands, etc. */
1415 priv->valid_antenna = active_chains;
1416
1417 /* Analyze noise for rx balance */
1418 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1419 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1420 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1421
1422 for (i = 0; i < NUM_RX_CHAINS; i++) {
1423 if (!(data->disconn_array[i]) &&
1424 (average_noise[i] <= min_average_noise)) {
1425 /* This means that chain i is active and has
1426 * lower noise values so far: */
1427 min_average_noise = average_noise[i];
1428 min_average_noise_antenna_i = i;
1429 }
1430 }
1431
1432 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1433
1434 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1435 average_noise[0], average_noise[1],
1436 average_noise[2]);
1437
1438 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1439 min_average_noise, min_average_noise_antenna_i);
1440
1441 for (i = 0; i < NUM_RX_CHAINS; i++) {
1442 s32 delta_g = 0;
1443
1444 if (!(data->disconn_array[i]) &&
1445 (data->delta_gain_code[i] ==
1446 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1447 delta_g = average_noise[i] - min_average_noise;
1448 data->delta_gain_code[i] = (u8)((delta_g *
1449 10) / 15);
1450 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1451 data->delta_gain_code[i])
1452 data->delta_gain_code[i] =
1453 CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1454
1455 data->delta_gain_code[i] =
1456 (data->delta_gain_code[i] | (1 << 2));
1457 } else
1458 data->delta_gain_code[i] = 0;
1459 }
1460 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1461 data->delta_gain_code[0],
1462 data->delta_gain_code[1],
1463 data->delta_gain_code[2]);
1464
1465 /* Differential gain gets sent to uCode only once */
1466 if (!data->radio_write) {
1467 struct iwl4965_calibration_cmd cmd;
1468 data->radio_write = 1;
1469
1470 memset(&cmd, 0, sizeof(cmd));
1471 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1472 cmd.diff_gain_a = data->delta_gain_code[0];
1473 cmd.diff_gain_b = data->delta_gain_code[1];
1474 cmd.diff_gain_c = data->delta_gain_code[2];
1475 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1476 sizeof(cmd), &cmd);
1477 if (rc)
1478 IWL_DEBUG_CALIB("fail sending cmd "
1479 "REPLY_PHY_CALIBRATION_CMD \n");
1480
1481 /* TODO we might want recalculate
1482 * rx_chain in rxon cmd */
1483
1484 /* Mark so we run this algo only once! */
1485 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1486 }
1487 data->chain_noise_a = 0;
1488 data->chain_noise_b = 0;
1489 data->chain_noise_c = 0;
1490 data->chain_signal_a = 0;
1491 data->chain_signal_b = 0;
1492 data->chain_signal_c = 0;
1493 data->beacon_count = 0;
1494 }
1495 return;
1496 }
1497
1498 static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
1499 struct iwl4965_notif_statistics *resp)
1500 {
1501 int rc = 0;
1502 u32 rx_enable_time;
1503 u32 fa_cck;
1504 u32 fa_ofdm;
1505 u32 bad_plcp_cck;
1506 u32 bad_plcp_ofdm;
1507 u32 norm_fa_ofdm;
1508 u32 norm_fa_cck;
1509 struct iwl4965_sensitivity_data *data = NULL;
1510 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1511 struct statistics_rx *statistics = &(resp->rx);
1512 unsigned long flags;
1513 struct statistics_general_data statis;
1514
1515 data = &(priv->sensitivity_data);
1516
1517 if (!iwl4965_is_associated(priv)) {
1518 IWL_DEBUG_CALIB("<< - not associated\n");
1519 return;
1520 }
1521
1522 spin_lock_irqsave(&priv->lock, flags);
1523 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1524 IWL_DEBUG_CALIB("<< invalid data.\n");
1525 spin_unlock_irqrestore(&priv->lock, flags);
1526 return;
1527 }
1528
1529 /* Extract Statistics: */
1530 rx_enable_time = le32_to_cpu(rx_info->channel_load);
1531 fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1532 fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1533 bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1534 bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1535
1536 statis.beacon_silence_rssi_a =
1537 le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1538 statis.beacon_silence_rssi_b =
1539 le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1540 statis.beacon_silence_rssi_c =
1541 le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1542 statis.beacon_energy_a =
1543 le32_to_cpu(statistics->general.beacon_energy_a);
1544 statis.beacon_energy_b =
1545 le32_to_cpu(statistics->general.beacon_energy_b);
1546 statis.beacon_energy_c =
1547 le32_to_cpu(statistics->general.beacon_energy_c);
1548
1549 spin_unlock_irqrestore(&priv->lock, flags);
1550
1551 IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1552
1553 if (!rx_enable_time) {
1554 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1555 return;
1556 }
1557
1558 /* These statistics increase monotonically, and do not reset
1559 * at each beacon. Calculate difference from last value, or just
1560 * use the new statistics value if it has reset or wrapped around. */
1561 if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1562 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1563 else {
1564 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1565 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1566 }
1567
1568 if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1569 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1570 else {
1571 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1572 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1573 }
1574
1575 if (data->last_fa_cnt_ofdm > fa_ofdm)
1576 data->last_fa_cnt_ofdm = fa_ofdm;
1577 else {
1578 fa_ofdm -= data->last_fa_cnt_ofdm;
1579 data->last_fa_cnt_ofdm += fa_ofdm;
1580 }
1581
1582 if (data->last_fa_cnt_cck > fa_cck)
1583 data->last_fa_cnt_cck = fa_cck;
1584 else {
1585 fa_cck -= data->last_fa_cnt_cck;
1586 data->last_fa_cnt_cck += fa_cck;
1587 }
1588
1589 /* Total aborted signal locks */
1590 norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1591 norm_fa_cck = fa_cck + bad_plcp_cck;
1592
1593 IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
1594 bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1595
1596 iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1597 iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1598 rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
1599
1600 return;
1601 }
1602
1603 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1604 {
1605 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1606 sensitivity_work);
1607
1608 mutex_lock(&priv->mutex);
1609
1610 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1611 test_bit(STATUS_SCANNING, &priv->status)) {
1612 mutex_unlock(&priv->mutex);
1613 return;
1614 }
1615
1616 if (priv->start_calib) {
1617 iwl4965_noise_calibration(priv, &priv->statistics);
1618
1619 if (priv->sensitivity_data.state ==
1620 IWL_SENS_CALIB_NEED_REINIT) {
1621 iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1622 priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1623 } else
1624 iwl4965_sensitivity_calibration(priv,
1625 &priv->statistics);
1626 }
1627
1628 mutex_unlock(&priv->mutex);
1629 return;
1630 }
1631 #endif /*CONFIG_IWL4965_SENSITIVITY*/
1632
1633 static void iwl4965_bg_txpower_work(struct work_struct *work)
1634 {
1635 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1636 txpower_work);
1637
1638 /* If a scan happened to start before we got here
1639 * then just return; the statistics notification will
1640 * kick off another scheduled work to compensate for
1641 * any temperature delta we missed here. */
1642 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1643 test_bit(STATUS_SCANNING, &priv->status))
1644 return;
1645
1646 mutex_lock(&priv->mutex);
1647
1648 /* Regardless of if we are assocaited, we must reconfigure the
1649 * TX power since frames can be sent on non-radar channels while
1650 * not associated */
1651 iwl4965_hw_reg_send_txpower(priv);
1652
1653 /* Update last_temperature to keep is_calib_needed from running
1654 * when it isn't needed... */
1655 priv->last_temperature = priv->temperature;
1656
1657 mutex_unlock(&priv->mutex);
1658 }
1659
1660 /*
1661 * Acquire priv->lock before calling this function !
1662 */
1663 static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
1664 {
1665 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
1666 (index & 0xff) | (txq_id << 8));
1667 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1668 }
1669
1670 /**
1671 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1672 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1673 * @scd_retry: (1) Indicates queue will be used in aggregation mode
1674 *
1675 * NOTE: Acquire priv->lock before calling this function !
1676 */
1677 static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
1678 struct iwl4965_tx_queue *txq,
1679 int tx_fifo_id, int scd_retry)
1680 {
1681 int txq_id = txq->q.id;
1682
1683 /* Find out whether to activate Tx queue */
1684 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1685
1686 /* Set up and activate */
1687 iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1688 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1689 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1690 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1691 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1692 SCD_QUEUE_STTS_REG_MSK);
1693
1694 txq->sched_retry = scd_retry;
1695
1696 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1697 active ? "Activate" : "Deactivate",
1698 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1699 }
1700
1701 static const u16 default_queue_to_tx_fifo[] = {
1702 IWL_TX_FIFO_AC3,
1703 IWL_TX_FIFO_AC2,
1704 IWL_TX_FIFO_AC1,
1705 IWL_TX_FIFO_AC0,
1706 IWL_CMD_FIFO_NUM,
1707 IWL_TX_FIFO_HCCA_1,
1708 IWL_TX_FIFO_HCCA_2
1709 };
1710
1711 static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
1712 {
1713 set_bit(txq_id, &priv->txq_ctx_active_msk);
1714 }
1715
1716 static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
1717 {
1718 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1719 }
1720
1721 int iwl4965_alive_notify(struct iwl4965_priv *priv)
1722 {
1723 u32 a;
1724 int i = 0;
1725 unsigned long flags;
1726 int rc;
1727
1728 spin_lock_irqsave(&priv->lock, flags);
1729
1730 #ifdef CONFIG_IWL4965_SENSITIVITY
1731 memset(&(priv->sensitivity_data), 0,
1732 sizeof(struct iwl4965_sensitivity_data));
1733 memset(&(priv->chain_noise_data), 0,
1734 sizeof(struct iwl4965_chain_noise_data));
1735 for (i = 0; i < NUM_RX_CHAINS; i++)
1736 priv->chain_noise_data.delta_gain_code[i] =
1737 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1738 #endif /* CONFIG_IWL4965_SENSITIVITY*/
1739 rc = iwl4965_grab_nic_access(priv);
1740 if (rc) {
1741 spin_unlock_irqrestore(&priv->lock, flags);
1742 return rc;
1743 }
1744
1745 /* Clear 4965's internal Tx Scheduler data base */
1746 priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1747 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1748 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1749 iwl4965_write_targ_mem(priv, a, 0);
1750 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1751 iwl4965_write_targ_mem(priv, a, 0);
1752 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1753 iwl4965_write_targ_mem(priv, a, 0);
1754
1755 /* Tel 4965 where to find Tx byte count tables */
1756 iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1757 (priv->hw_setting.shared_phys +
1758 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1759
1760 /* Disable chain mode for all queues */
1761 iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1762
1763 /* Initialize each Tx queue (including the command queue) */
1764 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1765
1766 /* TFD circular buffer read/write indexes */
1767 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1768 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1769
1770 /* Max Tx Window size for Scheduler-ACK mode */
1771 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1772 SCD_CONTEXT_QUEUE_OFFSET(i),
1773 (SCD_WIN_SIZE <<
1774 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1775 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1776
1777 /* Frame limit */
1778 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1779 SCD_CONTEXT_QUEUE_OFFSET(i) +
1780 sizeof(u32),
1781 (SCD_FRAME_LIMIT <<
1782 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1783 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1784
1785 }
1786 iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1787 (1 << priv->hw_setting.max_txq_num) - 1);
1788
1789 /* Activate all Tx DMA/FIFO channels */
1790 iwl4965_write_prph(priv, KDR_SCD_TXFACT,
1791 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1792
1793 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1794
1795 /* Map each Tx/cmd queue to its corresponding fifo */
1796 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1797 int ac = default_queue_to_tx_fifo[i];
1798 iwl4965_txq_ctx_activate(priv, i);
1799 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1800 }
1801
1802 iwl4965_release_nic_access(priv);
1803 spin_unlock_irqrestore(&priv->lock, flags);
1804
1805 return 0;
1806 }
1807
1808 /**
1809 * iwl4965_hw_set_hw_setting
1810 *
1811 * Called when initializing driver
1812 */
1813 int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
1814 {
1815 /* Allocate area for Tx byte count tables and Rx queue status */
1816 priv->hw_setting.shared_virt =
1817 pci_alloc_consistent(priv->pci_dev,
1818 sizeof(struct iwl4965_shared),
1819 &priv->hw_setting.shared_phys);
1820
1821 if (!priv->hw_setting.shared_virt)
1822 return -1;
1823
1824 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1825
1826 priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
1827 priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1828 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1829 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1830 if (iwl4965_param_amsdu_size_8K)
1831 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1832 else
1833 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1834 priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
1835 priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1836 priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1837
1838 priv->hw_setting.tx_ant_num = 2;
1839
1840 return 0;
1841 }
1842
1843 /**
1844 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1845 *
1846 * Destroy all TX DMA queues and structures
1847 */
1848 void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
1849 {
1850 int txq_id;
1851
1852 /* Tx queues */
1853 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1854 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1855
1856 /* Keep-warm buffer */
1857 iwl4965_kw_free(priv);
1858 }
1859
1860 /**
1861 * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1862 *
1863 * Does NOT advance any TFD circular buffer read/write indexes
1864 * Does NOT free the TFD itself (which is within circular buffer)
1865 */
1866 int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
1867 {
1868 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1869 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1870 struct pci_dev *dev = priv->pci_dev;
1871 int i;
1872 int counter = 0;
1873 int index, is_odd;
1874
1875 /* Host command buffers stay mapped in memory, nothing to clean */
1876 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1877 return 0;
1878
1879 /* Sanity check on number of chunks */
1880 counter = IWL_GET_BITS(*bd, num_tbs);
1881 if (counter > MAX_NUM_OF_TBS) {
1882 IWL_ERROR("Too many chunks: %i\n", counter);
1883 /* @todo issue fatal error, it is quite serious situation */
1884 return 0;
1885 }
1886
1887 /* Unmap chunks, if any.
1888 * TFD info for odd chunks is different format than for even chunks. */
1889 for (i = 0; i < counter; i++) {
1890 index = i / 2;
1891 is_odd = i & 0x1;
1892
1893 if (is_odd)
1894 pci_unmap_single(
1895 dev,
1896 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1897 (IWL_GET_BITS(bd->pa[index],
1898 tb2_addr_hi20) << 16),
1899 IWL_GET_BITS(bd->pa[index], tb2_len),
1900 PCI_DMA_TODEVICE);
1901
1902 else if (i > 0)
1903 pci_unmap_single(dev,
1904 le32_to_cpu(bd->pa[index].tb1_addr),
1905 IWL_GET_BITS(bd->pa[index], tb1_len),
1906 PCI_DMA_TODEVICE);
1907
1908 /* Free SKB, if any, for this chunk */
1909 if (txq->txb[txq->q.read_ptr].skb[i]) {
1910 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1911
1912 dev_kfree_skb(skb);
1913 txq->txb[txq->q.read_ptr].skb[i] = NULL;
1914 }
1915 }
1916 return 0;
1917 }
1918
1919 int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
1920 {
1921 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1922 return -EINVAL;
1923 }
1924
1925 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1926 {
1927 s32 sign = 1;
1928
1929 if (num < 0) {
1930 sign = -sign;
1931 num = -num;
1932 }
1933 if (denom < 0) {
1934 sign = -sign;
1935 denom = -denom;
1936 }
1937 *res = 1;
1938 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1939
1940 return 1;
1941 }
1942
1943 /**
1944 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1945 *
1946 * Determines power supply voltage compensation for txpower calculations.
1947 * Returns number of 1/2-dB steps to subtract from gain table index,
1948 * to compensate for difference between power supply voltage during
1949 * factory measurements, vs. current power supply voltage.
1950 *
1951 * Voltage indication is higher for lower voltage.
1952 * Lower voltage requires more gain (lower gain table index).
1953 */
1954 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1955 s32 current_voltage)
1956 {
1957 s32 comp = 0;
1958
1959 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1960 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1961 return 0;
1962
1963 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1964 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1965
1966 if (current_voltage > eeprom_voltage)
1967 comp *= 2;
1968 if ((comp < -2) || (comp > 2))
1969 comp = 0;
1970
1971 return comp;
1972 }
1973
1974 static const struct iwl4965_channel_info *
1975 iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv,
1976 enum ieee80211_band band, u16 channel)
1977 {
1978 const struct iwl4965_channel_info *ch_info;
1979
1980 ch_info = iwl4965_get_channel_info(priv, band, channel);
1981
1982 if (!is_channel_valid(ch_info))
1983 return NULL;
1984
1985 return ch_info;
1986 }
1987
1988 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1989 {
1990 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1991 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1992 return CALIB_CH_GROUP_5;
1993
1994 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1995 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1996 return CALIB_CH_GROUP_1;
1997
1998 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1999 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
2000 return CALIB_CH_GROUP_2;
2001
2002 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
2003 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
2004 return CALIB_CH_GROUP_3;
2005
2006 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
2007 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
2008 return CALIB_CH_GROUP_4;
2009
2010 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
2011 return -1;
2012 }
2013
2014 static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
2015 {
2016 s32 b = -1;
2017
2018 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
2019 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
2020 continue;
2021
2022 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
2023 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
2024 break;
2025 }
2026
2027 return b;
2028 }
2029
2030 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
2031 {
2032 s32 val;
2033
2034 if (x2 == x1)
2035 return y1;
2036 else {
2037 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
2038 return val + y2;
2039 }
2040 }
2041
2042 /**
2043 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
2044 *
2045 * Interpolates factory measurements from the two sample channels within a
2046 * sub-band, to apply to channel of interest. Interpolation is proportional to
2047 * differences in channel frequencies, which is proportional to differences
2048 * in channel number.
2049 */
2050 static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
2051 struct iwl4965_eeprom_calib_ch_info *chan_info)
2052 {
2053 s32 s = -1;
2054 u32 c;
2055 u32 m;
2056 const struct iwl4965_eeprom_calib_measure *m1;
2057 const struct iwl4965_eeprom_calib_measure *m2;
2058 struct iwl4965_eeprom_calib_measure *omeas;
2059 u32 ch_i1;
2060 u32 ch_i2;
2061
2062 s = iwl4965_get_sub_band(priv, channel);
2063 if (s >= EEPROM_TX_POWER_BANDS) {
2064 IWL_ERROR("Tx Power can not find channel %d ", channel);
2065 return -1;
2066 }
2067
2068 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
2069 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
2070 chan_info->ch_num = (u8) channel;
2071
2072 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
2073 channel, s, ch_i1, ch_i2);
2074
2075 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
2076 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
2077 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
2078 measurements[c][m]);
2079 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
2080 measurements[c][m]);
2081 omeas = &(chan_info->measurements[c][m]);
2082
2083 omeas->actual_pow =
2084 (u8) iwl4965_interpolate_value(channel, ch_i1,
2085 m1->actual_pow,
2086 ch_i2,
2087 m2->actual_pow);
2088 omeas->gain_idx =
2089 (u8) iwl4965_interpolate_value(channel, ch_i1,
2090 m1->gain_idx, ch_i2,
2091 m2->gain_idx);
2092 omeas->temperature =
2093 (u8) iwl4965_interpolate_value(channel, ch_i1,
2094 m1->temperature,
2095 ch_i2,
2096 m2->temperature);
2097 omeas->pa_det =
2098 (s8) iwl4965_interpolate_value(channel, ch_i1,
2099 m1->pa_det, ch_i2,
2100 m2->pa_det);
2101
2102 IWL_DEBUG_TXPOWER
2103 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
2104 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
2105 IWL_DEBUG_TXPOWER
2106 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
2107 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
2108 IWL_DEBUG_TXPOWER
2109 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
2110 m1->pa_det, m2->pa_det, omeas->pa_det);
2111 IWL_DEBUG_TXPOWER
2112 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
2113 m1->temperature, m2->temperature,
2114 omeas->temperature);
2115 }
2116 }
2117
2118 return 0;
2119 }
2120
2121 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
2122 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
2123 static s32 back_off_table[] = {
2124 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
2125 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
2126 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
2127 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
2128 10 /* CCK */
2129 };
2130
2131 /* Thermal compensation values for txpower for various frequency ranges ...
2132 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2133 static struct iwl4965_txpower_comp_entry {
2134 s32 degrees_per_05db_a;
2135 s32 degrees_per_05db_a_denom;
2136 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2137 {9, 2}, /* group 0 5.2, ch 34-43 */
2138 {4, 1}, /* group 1 5.2, ch 44-70 */
2139 {4, 1}, /* group 2 5.2, ch 71-124 */
2140 {4, 1}, /* group 3 5.2, ch 125-200 */
2141 {3, 1} /* group 4 2.4, ch all */
2142 };
2143
2144 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2145 {
2146 if (!band) {
2147 if ((rate_power_index & 7) <= 4)
2148 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2149 }
2150 return MIN_TX_GAIN_INDEX;
2151 }
2152
2153 struct gain_entry {
2154 u8 dsp;
2155 u8 radio;
2156 };
2157
2158 static const struct gain_entry gain_table[2][108] = {
2159 /* 5.2GHz power gain index table */
2160 {
2161 {123, 0x3F}, /* highest txpower */
2162 {117, 0x3F},
2163 {110, 0x3F},
2164 {104, 0x3F},
2165 {98, 0x3F},
2166 {110, 0x3E},
2167 {104, 0x3E},
2168 {98, 0x3E},
2169 {110, 0x3D},
2170 {104, 0x3D},
2171 {98, 0x3D},
2172 {110, 0x3C},
2173 {104, 0x3C},
2174 {98, 0x3C},
2175 {110, 0x3B},
2176 {104, 0x3B},
2177 {98, 0x3B},
2178 {110, 0x3A},
2179 {104, 0x3A},
2180 {98, 0x3A},
2181 {110, 0x39},
2182 {104, 0x39},
2183 {98, 0x39},
2184 {110, 0x38},
2185 {104, 0x38},
2186 {98, 0x38},
2187 {110, 0x37},
2188 {104, 0x37},
2189 {98, 0x37},
2190 {110, 0x36},
2191 {104, 0x36},
2192 {98, 0x36},
2193 {110, 0x35},
2194 {104, 0x35},
2195 {98, 0x35},
2196 {110, 0x34},
2197 {104, 0x34},
2198 {98, 0x34},
2199 {110, 0x33},
2200 {104, 0x33},
2201 {98, 0x33},
2202 {110, 0x32},
2203 {104, 0x32},
2204 {98, 0x32},
2205 {110, 0x31},
2206 {104, 0x31},
2207 {98, 0x31},
2208 {110, 0x30},
2209 {104, 0x30},
2210 {98, 0x30},
2211 {110, 0x25},
2212 {104, 0x25},
2213 {98, 0x25},
2214 {110, 0x24},
2215 {104, 0x24},
2216 {98, 0x24},
2217 {110, 0x23},
2218 {104, 0x23},
2219 {98, 0x23},
2220 {110, 0x22},
2221 {104, 0x18},
2222 {98, 0x18},
2223 {110, 0x17},
2224 {104, 0x17},
2225 {98, 0x17},
2226 {110, 0x16},
2227 {104, 0x16},
2228 {98, 0x16},
2229 {110, 0x15},
2230 {104, 0x15},
2231 {98, 0x15},
2232 {110, 0x14},
2233 {104, 0x14},
2234 {98, 0x14},
2235 {110, 0x13},
2236 {104, 0x13},
2237 {98, 0x13},
2238 {110, 0x12},
2239 {104, 0x08},
2240 {98, 0x08},
2241 {110, 0x07},
2242 {104, 0x07},
2243 {98, 0x07},
2244 {110, 0x06},
2245 {104, 0x06},
2246 {98, 0x06},
2247 {110, 0x05},
2248 {104, 0x05},
2249 {98, 0x05},
2250 {110, 0x04},
2251 {104, 0x04},
2252 {98, 0x04},
2253 {110, 0x03},
2254 {104, 0x03},
2255 {98, 0x03},
2256 {110, 0x02},
2257 {104, 0x02},
2258 {98, 0x02},
2259 {110, 0x01},
2260 {104, 0x01},
2261 {98, 0x01},
2262 {110, 0x00},
2263 {104, 0x00},
2264 {98, 0x00},
2265 {93, 0x00},
2266 {88, 0x00},
2267 {83, 0x00},
2268 {78, 0x00},
2269 },
2270 /* 2.4GHz power gain index table */
2271 {
2272 {110, 0x3f}, /* highest txpower */
2273 {104, 0x3f},
2274 {98, 0x3f},
2275 {110, 0x3e},
2276 {104, 0x3e},
2277 {98, 0x3e},
2278 {110, 0x3d},
2279 {104, 0x3d},
2280 {98, 0x3d},
2281 {110, 0x3c},
2282 {104, 0x3c},
2283 {98, 0x3c},
2284 {110, 0x3b},
2285 {104, 0x3b},
2286 {98, 0x3b},
2287 {110, 0x3a},
2288 {104, 0x3a},
2289 {98, 0x3a},
2290 {110, 0x39},
2291 {104, 0x39},
2292 {98, 0x39},
2293 {110, 0x38},
2294 {104, 0x38},
2295 {98, 0x38},
2296 {110, 0x37},
2297 {104, 0x37},
2298 {98, 0x37},
2299 {110, 0x36},
2300 {104, 0x36},
2301 {98, 0x36},
2302 {110, 0x35},
2303 {104, 0x35},
2304 {98, 0x35},
2305 {110, 0x34},
2306 {104, 0x34},
2307 {98, 0x34},
2308 {110, 0x33},
2309 {104, 0x33},
2310 {98, 0x33},
2311 {110, 0x32},
2312 {104, 0x32},
2313 {98, 0x32},
2314 {110, 0x31},
2315 {104, 0x31},
2316 {98, 0x31},
2317 {110, 0x30},
2318 {104, 0x30},
2319 {98, 0x30},
2320 {110, 0x6},
2321 {104, 0x6},
2322 {98, 0x6},
2323 {110, 0x5},
2324 {104, 0x5},
2325 {98, 0x5},
2326 {110, 0x4},
2327 {104, 0x4},
2328 {98, 0x4},
2329 {110, 0x3},
2330 {104, 0x3},
2331 {98, 0x3},
2332 {110, 0x2},
2333 {104, 0x2},
2334 {98, 0x2},
2335 {110, 0x1},
2336 {104, 0x1},
2337 {98, 0x1},
2338 {110, 0x0},
2339 {104, 0x0},
2340 {98, 0x0},
2341 {97, 0},
2342 {96, 0},
2343 {95, 0},
2344 {94, 0},
2345 {93, 0},
2346 {92, 0},
2347 {91, 0},
2348 {90, 0},
2349 {89, 0},
2350 {88, 0},
2351 {87, 0},
2352 {86, 0},
2353 {85, 0},
2354 {84, 0},
2355 {83, 0},
2356 {82, 0},
2357 {81, 0},
2358 {80, 0},
2359 {79, 0},
2360 {78, 0},
2361 {77, 0},
2362 {76, 0},
2363 {75, 0},
2364 {74, 0},
2365 {73, 0},
2366 {72, 0},
2367 {71, 0},
2368 {70, 0},
2369 {69, 0},
2370 {68, 0},
2371 {67, 0},
2372 {66, 0},
2373 {65, 0},
2374 {64, 0},
2375 {63, 0},
2376 {62, 0},
2377 {61, 0},
2378 {60, 0},
2379 {59, 0},
2380 }
2381 };
2382
2383 static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
2384 u8 is_fat, u8 ctrl_chan_high,
2385 struct iwl4965_tx_power_db *tx_power_tbl)
2386 {
2387 u8 saturation_power;
2388 s32 target_power;
2389 s32 user_target_power;
2390 s32 power_limit;
2391 s32 current_temp;
2392 s32 reg_limit;
2393 s32 current_regulatory;
2394 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2395 int i;
2396 int c;
2397 const struct iwl4965_channel_info *ch_info = NULL;
2398 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2399 const struct iwl4965_eeprom_calib_measure *measurement;
2400 s16 voltage;
2401 s32 init_voltage;
2402 s32 voltage_compensation;
2403 s32 degrees_per_05db_num;
2404 s32 degrees_per_05db_denom;
2405 s32 factory_temp;
2406 s32 temperature_comp[2];
2407 s32 factory_gain_index[2];
2408 s32 factory_actual_pwr[2];
2409 s32 power_index;
2410
2411 /* Sanity check requested level (dBm) */
2412 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2413 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2414 priv->user_txpower_limit);
2415 return -EINVAL;
2416 }
2417 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2418 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2419 priv->user_txpower_limit);
2420 return -EINVAL;
2421 }
2422
2423 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2424 * are used for indexing into txpower table) */
2425 user_target_power = 2 * priv->user_txpower_limit;
2426
2427 /* Get current (RXON) channel, band, width */
2428 ch_info =
2429 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
2430
2431 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2432 is_fat);
2433
2434 if (!ch_info)
2435 return -EINVAL;
2436
2437 /* get txatten group, used to select 1) thermal txpower adjustment
2438 * and 2) mimo txpower balance between Tx chains. */
2439 txatten_grp = iwl4965_get_tx_atten_grp(channel);
2440 if (txatten_grp < 0)
2441 return -EINVAL;
2442
2443 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2444 channel, txatten_grp);
2445
2446 if (is_fat) {
2447 if (ctrl_chan_high)
2448 channel -= 2;
2449 else
2450 channel += 2;
2451 }
2452
2453 /* hardware txpower limits ...
2454 * saturation (clipping distortion) txpowers are in half-dBm */
2455 if (band)
2456 saturation_power = priv->eeprom.calib_info.saturation_power24;
2457 else
2458 saturation_power = priv->eeprom.calib_info.saturation_power52;
2459
2460 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2461 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2462 if (band)
2463 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2464 else
2465 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2466 }
2467
2468 /* regulatory txpower limits ... reg_limit values are in half-dBm,
2469 * max_power_avg values are in dBm, convert * 2 */
2470 if (is_fat)
2471 reg_limit = ch_info->fat_max_power_avg * 2;
2472 else
2473 reg_limit = ch_info->max_power_avg * 2;
2474
2475 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2476 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2477 if (band)
2478 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2479 else
2480 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2481 }
2482
2483 /* Interpolate txpower calibration values for this channel,
2484 * based on factory calibration tests on spaced channels. */
2485 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2486
2487 /* calculate tx gain adjustment based on power supply voltage */
2488 voltage = priv->eeprom.calib_info.voltage;
2489 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2490 voltage_compensation =
2491 iwl4965_get_voltage_compensation(voltage, init_voltage);
2492
2493 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2494 init_voltage,
2495 voltage, voltage_compensation);
2496
2497 /* get current temperature (Celsius) */
2498 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2499 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2500 current_temp = KELVIN_TO_CELSIUS(current_temp);
2501
2502 /* select thermal txpower adjustment params, based on channel group
2503 * (same frequency group used for mimo txatten adjustment) */
2504 degrees_per_05db_num =
2505 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2506 degrees_per_05db_denom =
2507 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2508
2509 /* get per-chain txpower values from factory measurements */
2510 for (c = 0; c < 2; c++) {
2511 measurement = &ch_eeprom_info.measurements[c][1];
2512
2513 /* txgain adjustment (in half-dB steps) based on difference
2514 * between factory and current temperature */
2515 factory_temp = measurement->temperature;
2516 iwl4965_math_div_round((current_temp - factory_temp) *
2517 degrees_per_05db_denom,
2518 degrees_per_05db_num,
2519 &temperature_comp[c]);
2520
2521 factory_gain_index[c] = measurement->gain_idx;
2522 factory_actual_pwr[c] = measurement->actual_pow;
2523
2524 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2525 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2526 "curr tmp %d, comp %d steps\n",
2527 factory_temp, current_temp,
2528 temperature_comp[c]);
2529
2530 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2531 factory_gain_index[c],
2532 factory_actual_pwr[c]);
2533 }
2534
2535 /* for each of 33 bit-rates (including 1 for CCK) */
2536 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2537 u8 is_mimo_rate;
2538 union iwl4965_tx_power_dual_stream tx_power;
2539
2540 /* for mimo, reduce each chain's txpower by half
2541 * (3dB, 6 steps), so total output power is regulatory
2542 * compliant. */
2543 if (i & 0x8) {
2544 current_regulatory = reg_limit -
2545 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2546 is_mimo_rate = 1;
2547 } else {
2548 current_regulatory = reg_limit;
2549 is_mimo_rate = 0;
2550 }
2551
2552 /* find txpower limit, either hardware or regulatory */
2553 power_limit = saturation_power - back_off_table[i];
2554 if (power_limit > current_regulatory)
2555 power_limit = current_regulatory;
2556
2557 /* reduce user's txpower request if necessary
2558 * for this rate on this channel */
2559 target_power = user_target_power;
2560 if (target_power > power_limit)
2561 target_power = power_limit;
2562
2563 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2564 i, saturation_power - back_off_table[i],
2565 current_regulatory, user_target_power,
2566 target_power);
2567
2568 /* for each of 2 Tx chains (radio transmitters) */
2569 for (c = 0; c < 2; c++) {
2570 s32 atten_value;
2571
2572 if (is_mimo_rate)
2573 atten_value =
2574 (s32)le32_to_cpu(priv->card_alive_init.
2575 tx_atten[txatten_grp][c]);
2576 else
2577 atten_value = 0;
2578
2579 /* calculate index; higher index means lower txpower */
2580 power_index = (u8) (factory_gain_index[c] -
2581 (target_power -
2582 factory_actual_pwr[c]) -
2583 temperature_comp[c] -
2584 voltage_compensation +
2585 atten_value);
2586
2587 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2588 power_index); */
2589
2590 if (power_index < get_min_power_index(i, band))
2591 power_index = get_min_power_index(i, band);
2592
2593 /* adjust 5 GHz index to support negative indexes */
2594 if (!band)
2595 power_index += 9;
2596
2597 /* CCK, rate 32, reduce txpower for CCK */
2598 if (i == POWER_TABLE_CCK_ENTRY)
2599 power_index +=
2600 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2601
2602 /* stay within the table! */
2603 if (power_index > 107) {
2604 IWL_WARNING("txpower index %d > 107\n",
2605 power_index);
2606 power_index = 107;
2607 }
2608 if (power_index < 0) {
2609 IWL_WARNING("txpower index %d < 0\n",
2610 power_index);
2611 power_index = 0;
2612 }
2613
2614 /* fill txpower command for this rate/chain */
2615 tx_power.s.radio_tx_gain[c] =
2616 gain_table[band][power_index].radio;
2617 tx_power.s.dsp_predis_atten[c] =
2618 gain_table[band][power_index].dsp;
2619
2620 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2621 "gain 0x%02x dsp %d\n",
2622 c, atten_value, power_index,
2623 tx_power.s.radio_tx_gain[c],
2624 tx_power.s.dsp_predis_atten[c]);
2625 }/* for each chain */
2626
2627 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2628
2629 }/* for each rate */
2630
2631 return 0;
2632 }
2633
2634 /**
2635 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2636 *
2637 * Uses the active RXON for channel, band, and characteristics (fat, high)
2638 * The power limit is taken from priv->user_txpower_limit.
2639 */
2640 int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
2641 {
2642 struct iwl4965_txpowertable_cmd cmd = { 0 };
2643 int rc = 0;
2644 u8 band = 0;
2645 u8 is_fat = 0;
2646 u8 ctrl_chan_high = 0;
2647
2648 if (test_bit(STATUS_SCANNING, &priv->status)) {
2649 /* If this gets hit a lot, switch it to a BUG() and catch
2650 * the stack trace to find out who is calling this during
2651 * a scan. */
2652 IWL_WARNING("TX Power requested while scanning!\n");
2653 return -EAGAIN;
2654 }
2655
2656 band = priv->band == IEEE80211_BAND_2GHZ;
2657
2658 is_fat = is_fat_channel(priv->active_rxon.flags);
2659
2660 if (is_fat &&
2661 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2662 ctrl_chan_high = 1;
2663
2664 cmd.band = band;
2665 cmd.channel = priv->active_rxon.channel;
2666
2667 rc = iwl4965_fill_txpower_tbl(priv, band,
2668 le16_to_cpu(priv->active_rxon.channel),
2669 is_fat, ctrl_chan_high, &cmd.tx_power);
2670 if (rc)
2671 return rc;
2672
2673 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2674 return rc;
2675 }
2676
2677 int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
2678 {
2679 int rc;
2680 u8 band = 0;
2681 u8 is_fat = 0;
2682 u8 ctrl_chan_high = 0;
2683 struct iwl4965_channel_switch_cmd cmd = { 0 };
2684 const struct iwl4965_channel_info *ch_info;
2685
2686 band = priv->band == IEEE80211_BAND_2GHZ;
2687
2688 ch_info = iwl4965_get_channel_info(priv, priv->band, channel);
2689
2690 is_fat = is_fat_channel(priv->staging_rxon.flags);
2691
2692 if (is_fat &&
2693 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2694 ctrl_chan_high = 1;
2695
2696 cmd.band = band;
2697 cmd.expect_beacon = 0;
2698 cmd.channel = cpu_to_le16(channel);
2699 cmd.rxon_flags = priv->active_rxon.flags;
2700 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2701 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2702 if (ch_info)
2703 cmd.expect_beacon = is_channel_radar(ch_info);
2704 else
2705 cmd.expect_beacon = 1;
2706
2707 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2708 ctrl_chan_high, &cmd.tx_power);
2709 if (rc) {
2710 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2711 return rc;
2712 }
2713
2714 rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2715 return rc;
2716 }
2717
2718 #define RTS_HCCA_RETRY_LIMIT 3
2719 #define RTS_DFAULT_RETRY_LIMIT 60
2720
2721 void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
2722 struct iwl4965_cmd *cmd,
2723 struct ieee80211_tx_control *ctrl,
2724 struct ieee80211_hdr *hdr, int sta_id,
2725 int is_hcca)
2726 {
2727 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
2728 u8 rts_retry_limit = 0;
2729 u8 data_retry_limit = 0;
2730 u16 fc = le16_to_cpu(hdr->frame_control);
2731 u8 rate_plcp;
2732 u16 rate_flags = 0;
2733 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
2734
2735 rate_plcp = iwl4965_rates[rate_idx].plcp;
2736
2737 rts_retry_limit = (is_hcca) ?
2738 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2739
2740 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
2741 rate_flags |= RATE_MCS_CCK_MSK;
2742
2743
2744 if (ieee80211_is_probe_response(fc)) {
2745 data_retry_limit = 3;
2746 if (data_retry_limit < rts_retry_limit)
2747 rts_retry_limit = data_retry_limit;
2748 } else
2749 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2750
2751 if (priv->data_retry_limit != -1)
2752 data_retry_limit = priv->data_retry_limit;
2753
2754
2755 if (ieee80211_is_data(fc)) {
2756 tx->initial_rate_index = 0;
2757 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
2758 } else {
2759 switch (fc & IEEE80211_FCTL_STYPE) {
2760 case IEEE80211_STYPE_AUTH:
2761 case IEEE80211_STYPE_DEAUTH:
2762 case IEEE80211_STYPE_ASSOC_REQ:
2763 case IEEE80211_STYPE_REASSOC_REQ:
2764 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
2765 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2766 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
2767 }
2768 break;
2769 default:
2770 break;
2771 }
2772
2773 /* Alternate between antenna A and B for successive frames */
2774 if (priv->use_ant_b_for_management_frame) {
2775 priv->use_ant_b_for_management_frame = 0;
2776 rate_flags |= RATE_MCS_ANT_B_MSK;
2777 } else {
2778 priv->use_ant_b_for_management_frame = 1;
2779 rate_flags |= RATE_MCS_ANT_A_MSK;
2780 }
2781 }
2782
2783 tx->rts_retry_limit = rts_retry_limit;
2784 tx->data_retry_limit = data_retry_limit;
2785 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2786 }
2787
2788 int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
2789 {
2790 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2791
2792 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2793 }
2794
2795 int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
2796 {
2797 return priv->temperature;
2798 }
2799
2800 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
2801 struct iwl4965_frame *frame, u8 rate)
2802 {
2803 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2804 unsigned int frame_size;
2805
2806 tx_beacon_cmd = &frame->u.beacon;
2807 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2808
2809 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2810 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2811
2812 frame_size = iwl4965_fill_beacon_frame(priv,
2813 tx_beacon_cmd->frame,
2814 iwl4965_broadcast_addr,
2815 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2816
2817 BUG_ON(frame_size > MAX_MPDU_SIZE);
2818 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2819
2820 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2821 tx_beacon_cmd->tx.rate_n_flags =
2822 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2823 else
2824 tx_beacon_cmd->tx.rate_n_flags =
2825 iwl4965_hw_set_rate_n_flags(rate, 0);
2826
2827 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2828 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2829 return (sizeof(*tx_beacon_cmd) + frame_size);
2830 }
2831
2832 /*
2833 * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2834 * given Tx queue, and enable the DMA channel used for that queue.
2835 *
2836 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2837 * channels supported in hardware.
2838 */
2839 int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
2840 {
2841 int rc;
2842 unsigned long flags;
2843 int txq_id = txq->q.id;
2844
2845 spin_lock_irqsave(&priv->lock, flags);
2846 rc = iwl4965_grab_nic_access(priv);
2847 if (rc) {
2848 spin_unlock_irqrestore(&priv->lock, flags);
2849 return rc;
2850 }
2851
2852 /* Circular buffer (TFD queue in DRAM) physical base address */
2853 iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2854 txq->q.dma_addr >> 8);
2855
2856 /* Enable DMA channel, using same id as for TFD queue */
2857 iwl4965_write_direct32(
2858 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2859 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2860 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2861 iwl4965_release_nic_access(priv);
2862 spin_unlock_irqrestore(&priv->lock, flags);
2863
2864 return 0;
2865 }
2866
2867 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
2868 dma_addr_t addr, u16 len)
2869 {
2870 int index, is_odd;
2871 struct iwl4965_tfd_frame *tfd = ptr;
2872 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2873
2874 /* Each TFD can point to a maximum 20 Tx buffers */
2875 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2876 IWL_ERROR("Error can not send more than %d chunks\n",
2877 MAX_NUM_OF_TBS);
2878 return -EINVAL;
2879 }
2880
2881 index = num_tbs / 2;
2882 is_odd = num_tbs & 0x1;
2883
2884 if (!is_odd) {
2885 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2886 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2887 iwl_get_dma_hi_address(addr));
2888 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2889 } else {
2890 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2891 (u32) (addr & 0xffff));
2892 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2893 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2894 }
2895
2896 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2897
2898 return 0;
2899 }
2900
2901 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
2902 {
2903 u16 hw_version = priv->eeprom.board_revision_4965;
2904
2905 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2906 ((hw_version >> 8) & 0x0F),
2907 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2908
2909 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2910 priv->eeprom.board_pba_number_4965);
2911 }
2912
2913 #define IWL_TX_CRC_SIZE 4
2914 #define IWL_TX_DELIMITER_SIZE 4
2915
2916 /**
2917 * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
2918 */
2919 int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
2920 struct iwl4965_tx_queue *txq, u16 byte_cnt)
2921 {
2922 int len;
2923 int txq_id = txq->q.id;
2924 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2925
2926 if (txq->need_update == 0)
2927 return 0;
2928
2929 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2930
2931 /* Set up byte count within first 256 entries */
2932 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2933 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2934
2935 /* If within first 64 entries, duplicate at end */
2936 if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
2937 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2938 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
2939 byte_cnt, len);
2940
2941 return 0;
2942 }
2943
2944 /**
2945 * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2946 *
2947 * Selects how many and which Rx receivers/antennas/chains to use.
2948 * This should not be used for scan command ... it puts data in wrong place.
2949 */
2950 void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
2951 {
2952 u8 is_single = is_single_stream(priv);
2953 u8 idle_state, rx_state;
2954
2955 priv->staging_rxon.rx_chain = 0;
2956 rx_state = idle_state = 3;
2957
2958 /* Tell uCode which antennas are actually connected.
2959 * Before first association, we assume all antennas are connected.
2960 * Just after first association, iwl4965_noise_calibration()
2961 * checks which antennas actually *are* connected. */
2962 priv->staging_rxon.rx_chain |=
2963 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2964
2965 /* How many receivers should we use? */
2966 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2967 priv->staging_rxon.rx_chain |=
2968 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2969 priv->staging_rxon.rx_chain |=
2970 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2971
2972 if (!is_single && (rx_state >= 2) &&
2973 !test_bit(STATUS_POWER_PMI, &priv->status))
2974 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2975 else
2976 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2977
2978 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2979 }
2980
2981 /**
2982 * sign_extend - Sign extend a value using specified bit as sign-bit
2983 *
2984 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2985 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2986 *
2987 * @param oper value to sign extend
2988 * @param index 0 based bit index (0<=index<32) to sign bit
2989 */
2990 static s32 sign_extend(u32 oper, int index)
2991 {
2992 u8 shift = 31 - index;
2993
2994 return (s32)(oper << shift) >> shift;
2995 }
2996
2997 /**
2998 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2999 * @statistics: Provides the temperature reading from the uCode
3000 *
3001 * A return of <0 indicates bogus data in the statistics
3002 */
3003 int iwl4965_get_temperature(const struct iwl4965_priv *priv)
3004 {
3005 s32 temperature;
3006 s32 vt;
3007 s32 R1, R2, R3;
3008 u32 R4;
3009
3010 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
3011 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
3012 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
3013 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
3014 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
3015 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
3016 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
3017 } else {
3018 IWL_DEBUG_TEMP("Running temperature calibration\n");
3019 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
3020 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
3021 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
3022 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
3023 }
3024
3025 /*
3026 * Temperature is only 23 bits, so sign extend out to 32.
3027 *
3028 * NOTE If we haven't received a statistics notification yet
3029 * with an updated temperature, use R4 provided to us in the
3030 * "initialize" ALIVE response.
3031 */
3032 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
3033 vt = sign_extend(R4, 23);
3034 else
3035 vt = sign_extend(
3036 le32_to_cpu(priv->statistics.general.temperature), 23);
3037
3038 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
3039 R1, R2, R3, vt);
3040
3041 if (R3 == R1) {
3042 IWL_ERROR("Calibration conflict R1 == R3\n");
3043 return -1;
3044 }
3045
3046 /* Calculate temperature in degrees Kelvin, adjust by 97%.
3047 * Add offset to center the adjustment around 0 degrees Centigrade. */
3048 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
3049 temperature /= (R3 - R1);
3050 temperature = (temperature * 97) / 100 +
3051 TEMPERATURE_CALIB_KELVIN_OFFSET;
3052
3053 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
3054 KELVIN_TO_CELSIUS(temperature));
3055
3056 return temperature;
3057 }
3058
3059 /* Adjust Txpower only if temperature variance is greater than threshold. */
3060 #define IWL_TEMPERATURE_THRESHOLD 3
3061
3062 /**
3063 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
3064 *
3065 * If the temperature changed has changed sufficiently, then a recalibration
3066 * is needed.
3067 *
3068 * Assumes caller will replace priv->last_temperature once calibration
3069 * executed.
3070 */
3071 static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
3072 {
3073 int temp_diff;
3074
3075 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
3076 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
3077 return 0;
3078 }
3079
3080 temp_diff = priv->temperature - priv->last_temperature;
3081
3082 /* get absolute value */
3083 if (temp_diff < 0) {
3084 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
3085 temp_diff = -temp_diff;
3086 } else if (temp_diff == 0)
3087 IWL_DEBUG_POWER("Same temp, \n");
3088 else
3089 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
3090
3091 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
3092 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
3093 return 0;
3094 }
3095
3096 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
3097
3098 return 1;
3099 }
3100
3101 /* Calculate noise level, based on measurements during network silence just
3102 * before arriving beacon. This measurement can be done only if we know
3103 * exactly when to expect beacons, therefore only when we're associated. */
3104 static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
3105 {
3106 struct statistics_rx_non_phy *rx_info
3107 = &(priv->statistics.rx.general);
3108 int num_active_rx = 0;
3109 int total_silence = 0;
3110 int bcn_silence_a =
3111 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
3112 int bcn_silence_b =
3113 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
3114 int bcn_silence_c =
3115 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
3116
3117 if (bcn_silence_a) {
3118 total_silence += bcn_silence_a;
3119 num_active_rx++;
3120 }
3121 if (bcn_silence_b) {
3122 total_silence += bcn_silence_b;
3123 num_active_rx++;
3124 }
3125 if (bcn_silence_c) {
3126 total_silence += bcn_silence_c;
3127 num_active_rx++;
3128 }
3129
3130 /* Average among active antennas */
3131 if (num_active_rx)
3132 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
3133 else
3134 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3135
3136 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
3137 bcn_silence_a, bcn_silence_b, bcn_silence_c,
3138 priv->last_rx_noise);
3139 }
3140
3141 void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3142 {
3143 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3144 int change;
3145 s32 temp;
3146
3147 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
3148 (int)sizeof(priv->statistics), pkt->len);
3149
3150 change = ((priv->statistics.general.temperature !=
3151 pkt->u.stats.general.temperature) ||
3152 ((priv->statistics.flag &
3153 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
3154 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
3155
3156 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
3157
3158 set_bit(STATUS_STATISTICS, &priv->status);
3159
3160 /* Reschedule the statistics timer to occur in
3161 * REG_RECALIB_PERIOD seconds to ensure we get a
3162 * thermal update even if the uCode doesn't give
3163 * us one */
3164 mod_timer(&priv->statistics_periodic, jiffies +
3165 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
3166
3167 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3168 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
3169 iwl4965_rx_calc_noise(priv);
3170 #ifdef CONFIG_IWL4965_SENSITIVITY
3171 queue_work(priv->workqueue, &priv->sensitivity_work);
3172 #endif
3173 }
3174
3175 /* If the hardware hasn't reported a change in
3176 * temperature then don't bother computing a
3177 * calibrated temperature value */
3178 if (!change)
3179 return;
3180
3181 temp = iwl4965_get_temperature(priv);
3182 if (temp < 0)
3183 return;
3184
3185 if (priv->temperature != temp) {
3186 if (priv->temperature)
3187 IWL_DEBUG_TEMP("Temperature changed "
3188 "from %dC to %dC\n",
3189 KELVIN_TO_CELSIUS(priv->temperature),
3190 KELVIN_TO_CELSIUS(temp));
3191 else
3192 IWL_DEBUG_TEMP("Temperature "
3193 "initialized to %dC\n",
3194 KELVIN_TO_CELSIUS(temp));
3195 }
3196
3197 priv->temperature = temp;
3198 set_bit(STATUS_TEMPERATURE, &priv->status);
3199
3200 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3201 iwl4965_is_temp_calib_needed(priv))
3202 queue_work(priv->workqueue, &priv->txpower_work);
3203 }
3204
3205 static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
3206 struct sk_buff *skb,
3207 struct iwl4965_rx_phy_res *rx_start,
3208 struct ieee80211_rx_status *stats,
3209 u32 ampdu_status)
3210 {
3211 s8 signal = stats->ssi;
3212 s8 noise = 0;
3213 int rate = stats->rate_idx;
3214 u64 tsf = stats->mactime;
3215 __le16 phy_flags_hw = rx_start->phy_flags;
3216 struct iwl4965_rt_rx_hdr {
3217 struct ieee80211_radiotap_header rt_hdr;
3218 __le64 rt_tsf; /* TSF */
3219 u8 rt_flags; /* radiotap packet flags */
3220 u8 rt_rate; /* rate in 500kb/s */
3221 __le16 rt_channelMHz; /* channel in MHz */
3222 __le16 rt_chbitmask; /* channel bitfield */
3223 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
3224 s8 rt_dbmnoise;
3225 u8 rt_antenna; /* antenna number */
3226 } __attribute__ ((packed)) *iwl4965_rt;
3227
3228 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
3229 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
3230 if (net_ratelimit())
3231 printk(KERN_ERR "not enough headroom [%d] for "
3232 "radiotap head [%zd]\n",
3233 skb_headroom(skb), sizeof(*iwl4965_rt));
3234 return;
3235 }
3236
3237 /* put radiotap header in front of 802.11 header and data */
3238 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
3239
3240 /* initialise radiotap header */
3241 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3242 iwl4965_rt->rt_hdr.it_pad = 0;
3243
3244 /* total header + data */
3245 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
3246 &iwl4965_rt->rt_hdr.it_len);
3247
3248 /* Indicate all the fields we add to the radiotap header */
3249 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3250 (1 << IEEE80211_RADIOTAP_FLAGS) |
3251 (1 << IEEE80211_RADIOTAP_RATE) |
3252 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3253 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3254 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3255 (1 << IEEE80211_RADIOTAP_ANTENNA)),
3256 &iwl4965_rt->rt_hdr.it_present);
3257
3258 /* Zero the flags, we'll add to them as we go */
3259 iwl4965_rt->rt_flags = 0;
3260
3261 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
3262
3263 iwl4965_rt->rt_dbmsignal = signal;
3264 iwl4965_rt->rt_dbmnoise = noise;
3265
3266 /* Convert the channel frequency and set the flags */
3267 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
3268 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3269 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3270 IEEE80211_CHAN_5GHZ),
3271 &iwl4965_rt->rt_chbitmask);
3272 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3273 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
3274 IEEE80211_CHAN_2GHZ),
3275 &iwl4965_rt->rt_chbitmask);
3276 else /* 802.11g */
3277 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3278 IEEE80211_CHAN_2GHZ),
3279 &iwl4965_rt->rt_chbitmask);
3280
3281 if (rate == -1)
3282 iwl4965_rt->rt_rate = 0;
3283 else
3284 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
3285
3286 /*
3287 * "antenna number"
3288 *
3289 * It seems that the antenna field in the phy flags value
3290 * is actually a bitfield. This is undefined by radiotap,
3291 * it wants an actual antenna number but I always get "7"
3292 * for most legacy frames I receive indicating that the
3293 * same frame was received on all three RX chains.
3294 *
3295 * I think this field should be removed in favour of a
3296 * new 802.11n radiotap field "RX chains" that is defined
3297 * as a bitmask.
3298 */
3299 iwl4965_rt->rt_antenna =
3300 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3301
3302 /* set the preamble flag if appropriate */
3303 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3304 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3305
3306 stats->flag |= RX_FLAG_RADIOTAP;
3307 }
3308
3309 static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
3310 int include_phy,
3311 struct iwl4965_rx_mem_buffer *rxb,
3312 struct ieee80211_rx_status *stats)
3313 {
3314 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3315 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3316 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3317 struct ieee80211_hdr *hdr;
3318 u16 len;
3319 __le32 *rx_end;
3320 unsigned int skblen;
3321 u32 ampdu_status;
3322
3323 if (!include_phy && priv->last_phy_res[0])
3324 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3325
3326 if (!rx_start) {
3327 IWL_ERROR("MPDU frame without a PHY data\n");
3328 return;
3329 }
3330 if (include_phy) {
3331 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3332 rx_start->cfg_phy_cnt);
3333
3334 len = le16_to_cpu(rx_start->byte_count);
3335
3336 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3337 sizeof(struct iwl4965_rx_phy_res) +
3338 rx_start->cfg_phy_cnt + len);
3339
3340 } else {
3341 struct iwl4965_rx_mpdu_res_start *amsdu =
3342 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3343
3344 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3345 sizeof(struct iwl4965_rx_mpdu_res_start));
3346 len = le16_to_cpu(amsdu->byte_count);
3347 rx_start->byte_count = amsdu->byte_count;
3348 rx_end = (__le32 *) (((u8 *) hdr) + len);
3349 }
3350 if (len > priv->hw_setting.max_pkt_size || len < 16) {
3351 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
3352 return;
3353 }
3354
3355 ampdu_status = le32_to_cpu(*rx_end);
3356 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3357
3358 /* start from MAC */
3359 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3360 skb_put(rxb->skb, len); /* end where data ends */
3361
3362 /* We only process data packets if the interface is open */
3363 if (unlikely(!priv->is_open)) {
3364 IWL_DEBUG_DROP_LIMIT
3365 ("Dropping packet while interface is not open.\n");
3366 return;
3367 }
3368
3369 stats->flag = 0;
3370 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3371
3372 if (iwl4965_param_hwcrypto)
3373 iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3374
3375 if (priv->add_radiotap)
3376 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
3377
3378 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3379 priv->alloc_rxb_skb--;
3380 rxb->skb = NULL;
3381 #ifdef LED
3382 priv->led_packets += len;
3383 iwl4965_setup_activity_timer(priv);
3384 #endif
3385 }
3386
3387 /* Calc max signal level (dBm) among 3 possible receivers */
3388 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3389 {
3390 /* data from PHY/DSP regarding signal strength, etc.,
3391 * contents are always there, not configurable by host. */
3392 struct iwl4965_rx_non_cfg_phy *ncphy =
3393 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3394 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3395 >> IWL_AGC_DB_POS;
3396
3397 u32 valid_antennae =
3398 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3399 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3400 u8 max_rssi = 0;
3401 u32 i;
3402
3403 /* Find max rssi among 3 possible receivers.
3404 * These values are measured by the digital signal processor (DSP).
3405 * They should stay fairly constant even as the signal strength varies,
3406 * if the radio's automatic gain control (AGC) is working right.
3407 * AGC value (see below) will provide the "interesting" info. */
3408 for (i = 0; i < 3; i++)
3409 if (valid_antennae & (1 << i))
3410 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3411
3412 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3413 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3414 max_rssi, agc);
3415
3416 /* dBm = max_rssi dB - agc dB - constant.
3417 * Higher AGC (higher radio gain) means lower signal. */
3418 return (max_rssi - agc - IWL_RSSI_OFFSET);
3419 }
3420
3421 #ifdef CONFIG_IWL4965_HT
3422
3423 /* Parsed Information Elements */
3424 struct ieee802_11_elems {
3425 u8 *ds_params;
3426 u8 ds_params_len;
3427 u8 *tim;
3428 u8 tim_len;
3429 u8 *ibss_params;
3430 u8 ibss_params_len;
3431 u8 *erp_info;
3432 u8 erp_info_len;
3433 u8 *ht_cap_param;
3434 u8 ht_cap_param_len;
3435 u8 *ht_extra_param;
3436 u8 ht_extra_param_len;
3437 };
3438
3439 static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3440 {
3441 size_t left = len;
3442 u8 *pos = start;
3443 int unknown = 0;
3444
3445 memset(elems, 0, sizeof(*elems));
3446
3447 while (left >= 2) {
3448 u8 id, elen;
3449
3450 id = *pos++;
3451 elen = *pos++;
3452 left -= 2;
3453
3454 if (elen > left)
3455 return -1;
3456
3457 switch (id) {
3458 case WLAN_EID_DS_PARAMS:
3459 elems->ds_params = pos;
3460 elems->ds_params_len = elen;
3461 break;
3462 case WLAN_EID_TIM:
3463 elems->tim = pos;
3464 elems->tim_len = elen;
3465 break;
3466 case WLAN_EID_IBSS_PARAMS:
3467 elems->ibss_params = pos;
3468 elems->ibss_params_len = elen;
3469 break;
3470 case WLAN_EID_ERP_INFO:
3471 elems->erp_info = pos;
3472 elems->erp_info_len = elen;
3473 break;
3474 case WLAN_EID_HT_CAPABILITY:
3475 elems->ht_cap_param = pos;
3476 elems->ht_cap_param_len = elen;
3477 break;
3478 case WLAN_EID_HT_EXTRA_INFO:
3479 elems->ht_extra_param = pos;
3480 elems->ht_extra_param_len = elen;
3481 break;
3482 default:
3483 unknown++;
3484 break;
3485 }
3486
3487 left -= elen;
3488 pos += elen;
3489 }
3490
3491 return 0;
3492 }
3493
3494 void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
3495 enum ieee80211_band band)
3496 {
3497 ht_info->cap = 0;
3498 memset(ht_info->supp_mcs_set, 0, 16);
3499
3500 ht_info->ht_supported = 1;
3501
3502 if (band == IEEE80211_BAND_5GHZ) {
3503 ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
3504 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
3505 ht_info->supp_mcs_set[4] = 0x01;
3506 }
3507 ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
3508 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
3509 ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
3510 (IWL_MIMO_PS_NONE << 2));
3511 if (iwl4965_param_amsdu_size_8K) {
3512 printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
3513 ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
3514 }
3515
3516 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3517 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3518
3519 ht_info->supp_mcs_set[0] = 0xFF;
3520 ht_info->supp_mcs_set[1] = 0xFF;
3521 }
3522 #endif /* CONFIG_IWL4965_HT */
3523
3524 static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
3525 {
3526 unsigned long flags;
3527
3528 spin_lock_irqsave(&priv->sta_lock, flags);
3529 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3530 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3531 priv->stations[sta_id].sta.sta.modify_mask = 0;
3532 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3533 spin_unlock_irqrestore(&priv->sta_lock, flags);
3534
3535 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3536 }
3537
3538 static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
3539 {
3540 /* FIXME: need locking over ps_status ??? */
3541 u8 sta_id = iwl4965_hw_find_station(priv, addr);
3542
3543 if (sta_id != IWL_INVALID_STATION) {
3544 u8 sta_awake = priv->stations[sta_id].
3545 ps_status == STA_PS_STATUS_WAKE;
3546
3547 if (sta_awake && ps_bit)
3548 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3549 else if (!sta_awake && !ps_bit) {
3550 iwl4965_sta_modify_ps_wake(priv, sta_id);
3551 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3552 }
3553 }
3554 }
3555 #ifdef CONFIG_IWL4965_DEBUG
3556
3557 /**
3558 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
3559 *
3560 * You may hack this function to show different aspects of received frames,
3561 * including selective frame dumps.
3562 * group100 parameter selects whether to show 1 out of 100 good frames.
3563 *
3564 * TODO: This was originally written for 3945, need to audit for
3565 * proper operation with 4965.
3566 */
3567 static void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
3568 struct iwl4965_rx_packet *pkt,
3569 struct ieee80211_hdr *header, int group100)
3570 {
3571 u32 to_us;
3572 u32 print_summary = 0;
3573 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
3574 u32 hundred = 0;
3575 u32 dataframe = 0;
3576 u16 fc;
3577 u16 seq_ctl;
3578 u16 channel;
3579 u16 phy_flags;
3580 int rate_sym;
3581 u16 length;
3582 u16 status;
3583 u16 bcn_tmr;
3584 u32 tsf_low;
3585 u64 tsf;
3586 u8 rssi;
3587 u8 agc;
3588 u16 sig_avg;
3589 u16 noise_diff;
3590 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
3591 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
3592 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
3593 u8 *data = IWL_RX_DATA(pkt);
3594
3595 if (likely(!(iwl4965_debug_level & IWL_DL_RX)))
3596 return;
3597
3598 /* MAC header */
3599 fc = le16_to_cpu(header->frame_control);
3600 seq_ctl = le16_to_cpu(header->seq_ctrl);
3601
3602 /* metadata */
3603 channel = le16_to_cpu(rx_hdr->channel);
3604 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
3605 rate_sym = rx_hdr->rate;
3606 length = le16_to_cpu(rx_hdr->len);
3607
3608 /* end-of-frame status and timestamp */
3609 status = le32_to_cpu(rx_end->status);
3610 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
3611 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
3612 tsf = le64_to_cpu(rx_end->timestamp);
3613
3614 /* signal statistics */
3615 rssi = rx_stats->rssi;
3616 agc = rx_stats->agc;
3617 sig_avg = le16_to_cpu(rx_stats->sig_avg);
3618 noise_diff = le16_to_cpu(rx_stats->noise_diff);
3619
3620 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
3621
3622 /* if data frame is to us and all is good,
3623 * (optionally) print summary for only 1 out of every 100 */
3624 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
3625 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
3626 dataframe = 1;
3627 if (!group100)
3628 print_summary = 1; /* print each frame */
3629 else if (priv->framecnt_to_us < 100) {
3630 priv->framecnt_to_us++;
3631 print_summary = 0;
3632 } else {
3633 priv->framecnt_to_us = 0;
3634 print_summary = 1;
3635 hundred = 1;
3636 }
3637 } else {
3638 /* print summary for all other frames */
3639 print_summary = 1;
3640 }
3641
3642 if (print_summary) {
3643 char *title;
3644 int rate_idx;
3645 u32 bitrate;
3646
3647 if (hundred)
3648 title = "100Frames";
3649 else if (fc & IEEE80211_FCTL_RETRY)
3650 title = "Retry";
3651 else if (ieee80211_is_assoc_response(fc))
3652 title = "AscRsp";
3653 else if (ieee80211_is_reassoc_response(fc))
3654 title = "RasRsp";
3655 else if (ieee80211_is_probe_response(fc)) {
3656 title = "PrbRsp";
3657 print_dump = 1; /* dump frame contents */
3658 } else if (ieee80211_is_beacon(fc)) {
3659 title = "Beacon";
3660 print_dump = 1; /* dump frame contents */
3661 } else if (ieee80211_is_atim(fc))
3662 title = "ATIM";
3663 else if (ieee80211_is_auth(fc))
3664 title = "Auth";
3665 else if (ieee80211_is_deauth(fc))
3666 title = "DeAuth";
3667 else if (ieee80211_is_disassoc(fc))
3668 title = "DisAssoc";
3669 else
3670 title = "Frame";
3671
3672 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
3673 if (unlikely(rate_idx == -1))
3674 bitrate = 0;
3675 else
3676 bitrate = iwl4965_rates[rate_idx].ieee / 2;
3677
3678 /* print frame summary.
3679 * MAC addresses show just the last byte (for brevity),
3680 * but you can hack it to show more, if you'd like to. */
3681 if (dataframe)
3682 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
3683 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
3684 title, fc, header->addr1[5],
3685 length, rssi, channel, bitrate);
3686 else {
3687 /* src/dst addresses assume managed mode */
3688 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
3689 "src=0x%02x, rssi=%u, tim=%lu usec, "
3690 "phy=0x%02x, chnl=%d\n",
3691 title, fc, header->addr1[5],
3692 header->addr3[5], rssi,
3693 tsf_low - priv->scan_start_tsf,
3694 phy_flags, channel);
3695 }
3696 }
3697 if (print_dump)
3698 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
3699 }
3700 #else
3701 static inline void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
3702 struct iwl4965_rx_packet *pkt,
3703 struct ieee80211_hdr *header,
3704 int group100)
3705 {
3706 }
3707 #endif
3708
3709
3710 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
3711
3712 /* Called for REPLY_4965_RX (legacy ABG frames), or
3713 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3714 static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
3715 struct iwl4965_rx_mem_buffer *rxb)
3716 {
3717 struct ieee80211_hdr *header;
3718 struct ieee80211_rx_status rx_status;
3719 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3720 /* Use phy data (Rx signal strength, etc.) contained within
3721 * this rx packet for legacy frames,
3722 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3723 int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
3724 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3725 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3726 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3727 __le32 *rx_end;
3728 unsigned int len = 0;
3729 u16 fc;
3730 u8 network_packet;
3731
3732 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
3733 rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel));
3734 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3735 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
3736 rx_status.rate_idx = iwl4965_hwrate_to_plcp_idx(
3737 le32_to_cpu(rx_start->rate_n_flags));
3738
3739 if (rx_status.band == IEEE80211_BAND_5GHZ)
3740 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
3741
3742 rx_status.antenna = 0;
3743 rx_status.flag = 0;
3744
3745 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3746 IWL_DEBUG_DROP
3747 ("dsp size out of range [0,20]: "
3748 "%d/n", rx_start->cfg_phy_cnt);
3749 return;
3750 }
3751
3752 if (!include_phy) {
3753 if (priv->last_phy_res[0])
3754 rx_start = (struct iwl4965_rx_phy_res *)
3755 &priv->last_phy_res[1];
3756 else
3757 rx_start = NULL;
3758 }
3759
3760 if (!rx_start) {
3761 IWL_ERROR("MPDU frame without a PHY data\n");
3762 return;
3763 }
3764
3765 if (include_phy) {
3766 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3767 + rx_start->cfg_phy_cnt);
3768
3769 len = le16_to_cpu(rx_start->byte_count);
3770 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
3771 sizeof(struct iwl4965_rx_phy_res) + len);
3772 } else {
3773 struct iwl4965_rx_mpdu_res_start *amsdu =
3774 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3775
3776 header = (void *)(pkt->u.raw +
3777 sizeof(struct iwl4965_rx_mpdu_res_start));
3778 len = le16_to_cpu(amsdu->byte_count);
3779 rx_end = (__le32 *) (pkt->u.raw +
3780 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3781 }
3782
3783 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3784 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3785 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3786 le32_to_cpu(*rx_end));
3787 return;
3788 }
3789
3790 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3791
3792 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3793 rx_status.ssi = iwl4965_calc_rssi(rx_start);
3794
3795 /* Meaningful noise values are available only from beacon statistics,
3796 * which are gathered only when associated, and indicate noise
3797 * only for the associated network channel ...
3798 * Ignore these noise values while scanning (other channels) */
3799 if (iwl4965_is_associated(priv) &&
3800 !test_bit(STATUS_SCANNING, &priv->status)) {
3801 rx_status.noise = priv->last_rx_noise;
3802 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
3803 rx_status.noise);
3804 } else {
3805 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3806 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
3807 }
3808
3809 /* Reset beacon noise level if not associated. */
3810 if (!iwl4965_is_associated(priv))
3811 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3812
3813 /* Set "1" to report good data frames in groups of 100 */
3814 /* FIXME: need to optimze the call: */
3815 iwl4965_dbg_report_frame(priv, pkt, header, 1);
3816
3817 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
3818 rx_status.ssi, rx_status.noise, rx_status.signal,
3819 rx_status.mactime);
3820
3821 network_packet = iwl4965_is_network_packet(priv, header);
3822 if (network_packet) {
3823 priv->last_rx_rssi = rx_status.ssi;
3824 priv->last_beacon_time = priv->ucode_beacon_time;
3825 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3826 }
3827
3828 fc = le16_to_cpu(header->frame_control);
3829 switch (fc & IEEE80211_FCTL_FTYPE) {
3830 case IEEE80211_FTYPE_MGMT:
3831
3832 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3833 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3834 header->addr2);
3835 switch (fc & IEEE80211_FCTL_STYPE) {
3836 case IEEE80211_STYPE_PROBE_RESP:
3837 case IEEE80211_STYPE_BEACON:
3838 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
3839 !compare_ether_addr(header->addr2, priv->bssid)) ||
3840 (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
3841 !compare_ether_addr(header->addr3, priv->bssid))) {
3842 struct ieee80211_mgmt *mgmt =
3843 (struct ieee80211_mgmt *)header;
3844 u64 timestamp =
3845 le64_to_cpu(mgmt->u.beacon.timestamp);
3846
3847 priv->timestamp0 = timestamp & 0xFFFFFFFF;
3848 priv->timestamp1 =
3849 (timestamp >> 32) & 0xFFFFFFFF;
3850 priv->beacon_int = le16_to_cpu(
3851 mgmt->u.beacon.beacon_int);
3852 if (priv->call_post_assoc_from_beacon &&
3853 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
3854 priv->call_post_assoc_from_beacon = 0;
3855 queue_work(priv->workqueue,
3856 &priv->post_associate.work);
3857 }
3858 }
3859 break;
3860
3861 case IEEE80211_STYPE_ACTION:
3862 break;
3863
3864 /*
3865 * TODO: Use the new callback function from
3866 * mac80211 instead of sniffing these packets.
3867 */
3868 case IEEE80211_STYPE_ASSOC_RESP:
3869 case IEEE80211_STYPE_REASSOC_RESP:
3870 if (network_packet) {
3871 #ifdef CONFIG_IWL4965_HT
3872 u8 *pos = NULL;
3873 struct ieee802_11_elems elems;
3874 #endif /*CONFIG_IWL4965_HT */
3875 struct ieee80211_mgmt *mgnt =
3876 (struct ieee80211_mgmt *)header;
3877
3878 /* We have just associated, give some
3879 * time for the 4-way handshake if
3880 * any. Don't start scan too early. */
3881 priv->next_scan_jiffies = jiffies +
3882 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
3883
3884 priv->assoc_id = (~((1 << 15) | (1 << 14))
3885 & le16_to_cpu(mgnt->u.assoc_resp.aid));
3886 priv->assoc_capability =
3887 le16_to_cpu(
3888 mgnt->u.assoc_resp.capab_info);
3889 #ifdef CONFIG_IWL4965_HT
3890 pos = mgnt->u.assoc_resp.variable;
3891 if (!parse_elems(pos,
3892 len - (pos - (u8 *) mgnt),
3893 &elems)) {
3894 if (elems.ht_extra_param &&
3895 elems.ht_cap_param)
3896 break;
3897 }
3898 #endif /*CONFIG_IWL4965_HT */
3899 /* assoc_id is 0 no association */
3900 if (!priv->assoc_id)
3901 break;
3902 if (priv->beacon_int)
3903 queue_work(priv->workqueue,
3904 &priv->post_associate.work);
3905 else
3906 priv->call_post_assoc_from_beacon = 1;
3907 }
3908
3909 break;
3910
3911 case IEEE80211_STYPE_PROBE_REQ:
3912 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
3913 !iwl4965_is_associated(priv)) {
3914 DECLARE_MAC_BUF(mac1);
3915 DECLARE_MAC_BUF(mac2);
3916 DECLARE_MAC_BUF(mac3);
3917
3918 IWL_DEBUG_DROP("Dropping (non network): "
3919 "%s, %s, %s\n",
3920 print_mac(mac1, header->addr1),
3921 print_mac(mac2, header->addr2),
3922 print_mac(mac3, header->addr3));
3923 return;
3924 }
3925 }
3926 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
3927 break;
3928
3929 case IEEE80211_FTYPE_CTL:
3930 #ifdef CONFIG_IWL4965_HT
3931 switch (fc & IEEE80211_FCTL_STYPE) {
3932 case IEEE80211_STYPE_BACK_REQ:
3933 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3934 iwl4965_handle_data_packet(priv, 0, include_phy,
3935 rxb, &rx_status);
3936 break;
3937 default:
3938 break;
3939 }
3940 #endif
3941 break;
3942
3943 case IEEE80211_FTYPE_DATA: {
3944 DECLARE_MAC_BUF(mac1);
3945 DECLARE_MAC_BUF(mac2);
3946 DECLARE_MAC_BUF(mac3);
3947
3948 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3949 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3950 header->addr2);
3951
3952 if (unlikely(!network_packet))
3953 IWL_DEBUG_DROP("Dropping (non network): "
3954 "%s, %s, %s\n",
3955 print_mac(mac1, header->addr1),
3956 print_mac(mac2, header->addr2),
3957 print_mac(mac3, header->addr3));
3958 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3959 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3960 print_mac(mac1, header->addr1),
3961 print_mac(mac2, header->addr2),
3962 print_mac(mac3, header->addr3));
3963 else
3964 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3965 &rx_status);
3966 break;
3967 }
3968 default:
3969 break;
3970
3971 }
3972 }
3973
3974 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3975 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3976 static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
3977 struct iwl4965_rx_mem_buffer *rxb)
3978 {
3979 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3980 priv->last_phy_res[0] = 1;
3981 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3982 sizeof(struct iwl4965_rx_phy_res));
3983 }
3984
3985 static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
3986 struct iwl4965_rx_mem_buffer *rxb)
3987
3988 {
3989 #ifdef CONFIG_IWL4965_SENSITIVITY
3990 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3991 struct iwl4965_missed_beacon_notif *missed_beacon;
3992
3993 missed_beacon = &pkt->u.missed_beacon;
3994 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3995 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3996 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3997 le32_to_cpu(missed_beacon->total_missed_becons),
3998 le32_to_cpu(missed_beacon->num_recvd_beacons),
3999 le32_to_cpu(missed_beacon->num_expected_beacons));
4000 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
4001 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
4002 queue_work(priv->workqueue, &priv->sensitivity_work);
4003 }
4004 #endif /*CONFIG_IWL4965_SENSITIVITY*/
4005 }
4006
4007 #ifdef CONFIG_IWL4965_HT
4008
4009 /**
4010 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
4011 */
4012 static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
4013 int sta_id, int tid)
4014 {
4015 unsigned long flags;
4016
4017 /* Remove "disable" flag, to enable Tx for this TID */
4018 spin_lock_irqsave(&priv->sta_lock, flags);
4019 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
4020 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
4021 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4022 spin_unlock_irqrestore(&priv->sta_lock, flags);
4023
4024 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4025 }
4026
4027 /**
4028 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
4029 *
4030 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
4031 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
4032 */
4033 static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
4034 struct iwl4965_ht_agg *agg,
4035 struct iwl4965_compressed_ba_resp*
4036 ba_resp)
4037
4038 {
4039 int i, sh, ack;
4040 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
4041 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4042 u64 bitmap;
4043 int successes = 0;
4044 struct ieee80211_tx_status *tx_status;
4045
4046 if (unlikely(!agg->wait_for_ba)) {
4047 IWL_ERROR("Received BA when not expected\n");
4048 return -EINVAL;
4049 }
4050
4051 /* Mark that the expected block-ack response arrived */
4052 agg->wait_for_ba = 0;
4053 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
4054
4055 /* Calculate shift to align block-ack bits with our Tx window bits */
4056 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
4057 if (sh < 0) /* tbw something is wrong with indices */
4058 sh += 0x100;
4059
4060 /* don't use 64-bit values for now */
4061 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
4062
4063 if (agg->frame_count > (64 - sh)) {
4064 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
4065 return -1;
4066 }
4067
4068 /* check for success or failure according to the
4069 * transmitted bitmap and block-ack bitmap */
4070 bitmap &= agg->bitmap;
4071
4072 /* For each frame attempted in aggregation,
4073 * update driver's record of tx frame's status. */
4074 for (i = 0; i < agg->frame_count ; i++) {
4075 ack = bitmap & (1 << i);
4076 successes += !!ack;
4077 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
4078 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
4079 agg->start_idx + i);
4080 }
4081
4082 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
4083 tx_status->flags = IEEE80211_TX_STATUS_ACK;
4084 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
4085 tx_status->ampdu_ack_map = successes;
4086 tx_status->ampdu_ack_len = agg->frame_count;
4087 /* FIXME Wrong rate
4088 tx_status->control.tx_rate = agg->rate_n_flags;
4089 */
4090
4091 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", bitmap);
4092
4093 return 0;
4094 }
4095
4096 /**
4097 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
4098 */
4099 static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
4100 u16 txq_id)
4101 {
4102 /* Simply stop the queue, but don't change any configuration;
4103 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
4104 iwl4965_write_prph(priv,
4105 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
4106 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
4107 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
4108 }
4109
4110 /**
4111 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4112 */
4113 static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
4114 u16 ssn_idx, u8 tx_fifo)
4115 {
4116 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
4117 IWL_WARNING("queue number too small: %d, must be > %d\n",
4118 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4119 return -EINVAL;
4120 }
4121
4122 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4123
4124 iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4125
4126 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4127 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4128 /* supposes that ssn_idx is valid (!= 0xFFF) */
4129 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4130
4131 iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4132 iwl4965_txq_ctx_deactivate(priv, txq_id);
4133 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
4134
4135 return 0;
4136 }
4137
4138 int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
4139 u8 tid, int txq_id)
4140 {
4141 struct iwl4965_queue *q = &priv->txq[txq_id].q;
4142 u8 *addr = priv->stations[sta_id].sta.sta.addr;
4143 struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
4144
4145 switch (priv->stations[sta_id].tid[tid].agg.state) {
4146 case IWL_EMPTYING_HW_QUEUE_DELBA:
4147 /* We are reclaiming the last packet of the */
4148 /* aggregated HW queue */
4149 if (txq_id == tid_data->agg.txq_id &&
4150 q->read_ptr == q->write_ptr) {
4151 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
4152 int tx_fifo = default_tid_to_tx_fifo[tid];
4153 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
4154 iwl4965_tx_queue_agg_disable(priv, txq_id,
4155 ssn, tx_fifo);
4156 tid_data->agg.state = IWL_AGG_OFF;
4157 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
4158 }
4159 break;
4160 case IWL_EMPTYING_HW_QUEUE_ADDBA:
4161 /* We are reclaiming the last packet of the queue */
4162 if (tid_data->tfds_in_queue == 0) {
4163 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
4164 tid_data->agg.state = IWL_AGG_ON;
4165 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
4166 }
4167 break;
4168 }
4169 return 0;
4170 }
4171
4172 /**
4173 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
4174 * @index -- current index
4175 * @n_bd -- total number of entries in queue (s/b power of 2)
4176 */
4177 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
4178 {
4179 return (index == 0) ? n_bd - 1 : index - 1;
4180 }
4181
4182 /**
4183 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
4184 *
4185 * Handles block-acknowledge notification from device, which reports success
4186 * of frames sent via aggregation.
4187 */
4188 static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
4189 struct iwl4965_rx_mem_buffer *rxb)
4190 {
4191 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4192 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4193 int index;
4194 struct iwl4965_tx_queue *txq = NULL;
4195 struct iwl4965_ht_agg *agg;
4196 DECLARE_MAC_BUF(mac);
4197
4198 /* "flow" corresponds to Tx queue */
4199 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4200
4201 /* "ssn" is start of block-ack Tx window, corresponds to index
4202 * (in Tx queue's circular buffer) of first TFD/frame in window */
4203 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4204
4205 if (scd_flow >= ARRAY_SIZE(priv->txq)) {
4206 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
4207 return;
4208 }
4209
4210 txq = &priv->txq[scd_flow];
4211 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4212
4213 /* Find index just before block-ack window */
4214 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4215
4216 /* TODO: Need to get this copy more safely - now good for debug */
4217
4218 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
4219 "sta_id = %d\n",
4220 agg->wait_for_ba,
4221 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
4222 ba_resp->sta_id);
4223 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
4224 "%d, scd_ssn = %d\n",
4225 ba_resp->tid,
4226 ba_resp->seq_ctl,
4227 ba_resp->bitmap,
4228 ba_resp->scd_flow,
4229 ba_resp->scd_ssn);
4230 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
4231 agg->start_idx,
4232 agg->bitmap);
4233
4234 /* Update driver's record of ACK vs. not for each frame in window */
4235 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4236
4237 /* Release all TFDs before the SSN, i.e. all TFDs in front of
4238 * block-ack window (we assume that they've been successfully
4239 * transmitted ... if not, it's too late anyway). */
4240 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
4241 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
4242 priv->stations[ba_resp->sta_id].
4243 tid[ba_resp->tid].tfds_in_queue -= freed;
4244 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
4245 priv->mac80211_registered &&
4246 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
4247 ieee80211_wake_queue(priv->hw, scd_flow);
4248 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
4249 ba_resp->tid, scd_flow);
4250 }
4251 }
4252
4253 /**
4254 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
4255 */
4256 static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
4257 u16 txq_id)
4258 {
4259 u32 tbl_dw_addr;
4260 u32 tbl_dw;
4261 u16 scd_q2ratid;
4262
4263 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
4264
4265 tbl_dw_addr = priv->scd_base_addr +
4266 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4267
4268 tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
4269
4270 if (txq_id & 0x1)
4271 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4272 else
4273 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4274
4275 iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4276
4277 return 0;
4278 }
4279
4280
4281 /**
4282 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
4283 *
4284 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
4285 * i.e. it must be one of the higher queues used for aggregation
4286 */
4287 static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
4288 int tx_fifo, int sta_id, int tid,
4289 u16 ssn_idx)
4290 {
4291 unsigned long flags;
4292 int rc;
4293 u16 ra_tid;
4294
4295 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
4296 IWL_WARNING("queue number too small: %d, must be > %d\n",
4297 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4298
4299 ra_tid = BUILD_RAxTID(sta_id, tid);
4300
4301 /* Modify device's station table to Tx this TID */
4302 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4303
4304 spin_lock_irqsave(&priv->lock, flags);
4305 rc = iwl4965_grab_nic_access(priv);
4306 if (rc) {
4307 spin_unlock_irqrestore(&priv->lock, flags);
4308 return rc;
4309 }
4310
4311 /* Stop this Tx queue before configuring it */
4312 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4313
4314 /* Map receiver-address / traffic-ID to this queue */
4315 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4316
4317 /* Set this queue as a chain-building queue */
4318 iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4319
4320 /* Place first TFD at index corresponding to start sequence number.
4321 * Assumes that ssn_idx is valid (!= 0xFFF) */
4322 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4323 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4324 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4325
4326 /* Set up Tx window size and frame limit for this queue */
4327 iwl4965_write_targ_mem(priv,
4328 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4329 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4330 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4331
4332 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
4333 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4334 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4335 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4336
4337 iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4338
4339 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
4340 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4341
4342 iwl4965_release_nic_access(priv);
4343 spin_unlock_irqrestore(&priv->lock, flags);
4344
4345 return 0;
4346 }
4347
4348 #endif /* CONFIG_IWL4965_HT */
4349
4350 /**
4351 * iwl4965_add_station - Initialize a station's hardware rate table
4352 *
4353 * The uCode's station table contains a table of fallback rates
4354 * for automatic fallback during transmission.
4355 *
4356 * NOTE: This sets up a default set of values. These will be replaced later
4357 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
4358 * rc80211_simple.
4359 *
4360 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
4361 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
4362 * which requires station table entry to exist).
4363 */
4364 void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
4365 {
4366 int i, r;
4367 struct iwl4965_link_quality_cmd link_cmd = {
4368 .reserved1 = 0,
4369 };
4370 u16 rate_flags;
4371
4372 /* Set up the rate scaling to start at selected rate, fall back
4373 * all the way down to 1M in IEEE order, and then spin on 1M */
4374 if (is_ap)
4375 r = IWL_RATE_54M_INDEX;
4376 else if (priv->band == IEEE80211_BAND_5GHZ)
4377 r = IWL_RATE_6M_INDEX;
4378 else
4379 r = IWL_RATE_1M_INDEX;
4380
4381 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
4382 rate_flags = 0;
4383 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
4384 rate_flags |= RATE_MCS_CCK_MSK;
4385
4386 /* Use Tx antenna B only */
4387 rate_flags |= RATE_MCS_ANT_B_MSK;
4388 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4389
4390 link_cmd.rs_table[i].rate_n_flags =
4391 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
4392 r = iwl4965_get_prev_ieee_rate(r);
4393 }
4394
4395 link_cmd.general_params.single_stream_ant_msk = 2;
4396 link_cmd.general_params.dual_stream_ant_msk = 3;
4397 link_cmd.agg_params.agg_dis_start_th = 3;
4398 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
4399
4400 /* Update the rate scaling for control frame Tx to AP */
4401 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
4402
4403 iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4404 &link_cmd);
4405 }
4406
4407 #ifdef CONFIG_IWL4965_HT
4408
4409 static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv,
4410 enum ieee80211_band band,
4411 u16 channel, u8 extension_chan_offset)
4412 {
4413 const struct iwl4965_channel_info *ch_info;
4414
4415 ch_info = iwl4965_get_channel_info(priv, band, channel);
4416 if (!is_channel_valid(ch_info))
4417 return 0;
4418
4419 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)
4420 return 0;
4421
4422 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
4423 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
4424 return 1;
4425
4426 return 0;
4427 }
4428
4429 static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
4430 struct ieee80211_ht_info *sta_ht_inf)
4431 {
4432 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
4433
4434 if ((!iwl_ht_conf->is_ht) ||
4435 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
4436 (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE))
4437 return 0;
4438
4439 if (sta_ht_inf) {
4440 if ((!sta_ht_inf->ht_supported) ||
4441 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
4442 return 0;
4443 }
4444
4445 return (iwl4965_is_channel_extension(priv, priv->band,
4446 iwl_ht_conf->control_channel,
4447 iwl_ht_conf->extension_chan_offset));
4448 }
4449
4450 void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
4451 {
4452 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
4453 u32 val;
4454
4455 if (!ht_info->is_ht)
4456 return;
4457
4458 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
4459 if (iwl4965_is_fat_tx_allowed(priv, NULL))
4460 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4461 else
4462 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
4463 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
4464
4465 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
4466 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
4467 le16_to_cpu(rxon->channel),
4468 ht_info->control_channel);
4469 rxon->channel = cpu_to_le16(ht_info->control_channel);
4470 return;
4471 }
4472
4473 /* Note: control channel is opposite of extension channel */
4474 switch (ht_info->extension_chan_offset) {
4475 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
4476 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
4477 break;
4478 case IWL_EXT_CHANNEL_OFFSET_BELOW:
4479 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
4480 break;
4481 case IWL_EXT_CHANNEL_OFFSET_NONE:
4482 default:
4483 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4484 break;
4485 }
4486
4487 val = ht_info->ht_protection;
4488
4489 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4490
4491 iwl4965_set_rxon_chain(priv);
4492
4493 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4494 "rxon flags 0x%X operation mode :0x%X "
4495 "extension channel offset 0x%x "
4496 "control chan %d\n",
4497 ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
4498 le32_to_cpu(rxon->flags), ht_info->ht_protection,
4499 ht_info->extension_chan_offset,
4500 ht_info->control_channel);
4501 return;
4502 }
4503
4504 void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
4505 struct ieee80211_ht_info *sta_ht_inf)
4506 {
4507 __le32 sta_flags;
4508 u8 mimo_ps_mode;
4509
4510 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
4511 goto done;
4512
4513 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
4514
4515 sta_flags = priv->stations[index].sta.station_flags;
4516
4517 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
4518
4519 switch (mimo_ps_mode) {
4520 case WLAN_HT_CAP_MIMO_PS_STATIC:
4521 sta_flags |= STA_FLG_MIMO_DIS_MSK;
4522 break;
4523 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
4524 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4525 break;
4526 case WLAN_HT_CAP_MIMO_PS_DISABLED:
4527 break;
4528 default:
4529 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
4530 break;
4531 }
4532
4533 sta_flags |= cpu_to_le32(
4534 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4535
4536 sta_flags |= cpu_to_le32(
4537 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4538
4539 if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
4540 sta_flags |= STA_FLG_FAT_EN_MSK;
4541 else
4542 sta_flags &= ~STA_FLG_FAT_EN_MSK;
4543
4544 priv->stations[index].sta.station_flags = sta_flags;
4545 done:
4546 return;
4547 }
4548
4549 static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
4550 int sta_id, int tid, u16 ssn)
4551 {
4552 unsigned long flags;
4553
4554 spin_lock_irqsave(&priv->sta_lock, flags);
4555 priv->stations[sta_id].sta.station_flags_msk = 0;
4556 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4557 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4558 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4559 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4560 spin_unlock_irqrestore(&priv->sta_lock, flags);
4561
4562 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4563 }
4564
4565 static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
4566 int sta_id, int tid)
4567 {
4568 unsigned long flags;
4569
4570 spin_lock_irqsave(&priv->sta_lock, flags);
4571 priv->stations[sta_id].sta.station_flags_msk = 0;
4572 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4573 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4574 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4575 spin_unlock_irqrestore(&priv->sta_lock, flags);
4576
4577 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4578 }
4579
4580 /*
4581 * Find first available (lowest unused) Tx Queue, mark it "active".
4582 * Called only when finding queue for aggregation.
4583 * Should never return anything < 7, because they should already
4584 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
4585 */
4586 static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
4587 {
4588 int txq_id;
4589
4590 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
4591 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4592 return txq_id;
4593 return -1;
4594 }
4595
4596 static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
4597 u16 tid, u16 *start_seq_num)
4598 {
4599 struct iwl4965_priv *priv = hw->priv;
4600 int sta_id;
4601 int tx_fifo;
4602 int txq_id;
4603 int ssn = -1;
4604 int rc = 0;
4605 unsigned long flags;
4606 struct iwl4965_tid_data *tid_data;
4607 DECLARE_MAC_BUF(mac);
4608
4609 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4610 tx_fifo = default_tid_to_tx_fifo[tid];
4611 else
4612 return -EINVAL;
4613
4614 IWL_WARNING("%s on da = %s tid = %d\n",
4615 __func__, print_mac(mac, da), tid);
4616
4617 sta_id = iwl4965_hw_find_station(priv, da);
4618 if (sta_id == IWL_INVALID_STATION)
4619 return -ENXIO;
4620
4621 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
4622 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
4623 return -ENXIO;
4624 }
4625
4626 txq_id = iwl4965_txq_ctx_activate_free(priv);
4627 if (txq_id == -1)
4628 return -ENXIO;
4629
4630 spin_lock_irqsave(&priv->sta_lock, flags);
4631 tid_data = &priv->stations[sta_id].tid[tid];
4632 ssn = SEQ_TO_SN(tid_data->seq_number);
4633 tid_data->agg.txq_id = txq_id;
4634 spin_unlock_irqrestore(&priv->sta_lock, flags);
4635
4636 *start_seq_num = ssn;
4637 rc = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4638 sta_id, tid, ssn);
4639 if (rc)
4640 return rc;
4641
4642 rc = 0;
4643 if (tid_data->tfds_in_queue == 0) {
4644 printk(KERN_ERR "HW queue is empty\n");
4645 tid_data->agg.state = IWL_AGG_ON;
4646 ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
4647 } else {
4648 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
4649 tid_data->tfds_in_queue);
4650 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
4651 }
4652 return rc;
4653 }
4654
4655 static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
4656 u16 tid)
4657 {
4658
4659 struct iwl4965_priv *priv = hw->priv;
4660 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4661 struct iwl4965_tid_data *tid_data;
4662 int rc, write_ptr, read_ptr;
4663 unsigned long flags;
4664 DECLARE_MAC_BUF(mac);
4665
4666 if (!da) {
4667 IWL_ERROR("da = NULL\n");
4668 return -EINVAL;
4669 }
4670
4671 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4672 tx_fifo_id = default_tid_to_tx_fifo[tid];
4673 else
4674 return -EINVAL;
4675
4676 sta_id = iwl4965_hw_find_station(priv, da);
4677
4678 if (sta_id == IWL_INVALID_STATION)
4679 return -ENXIO;
4680
4681 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
4682 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
4683
4684 tid_data = &priv->stations[sta_id].tid[tid];
4685 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4686 txq_id = tid_data->agg.txq_id;
4687 write_ptr = priv->txq[txq_id].q.write_ptr;
4688 read_ptr = priv->txq[txq_id].q.read_ptr;
4689
4690 /* The queue is not empty */
4691 if (write_ptr != read_ptr) {
4692 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
4693 priv->stations[sta_id].tid[tid].agg.state =
4694 IWL_EMPTYING_HW_QUEUE_DELBA;
4695 return 0;
4696 }
4697
4698 IWL_DEBUG_HT("HW queue empty\n");;
4699 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
4700
4701 spin_lock_irqsave(&priv->lock, flags);
4702 rc = iwl4965_grab_nic_access(priv);
4703 if (rc) {
4704 spin_unlock_irqrestore(&priv->lock, flags);
4705 return rc;
4706 }
4707 rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4708 iwl4965_release_nic_access(priv);
4709 spin_unlock_irqrestore(&priv->lock, flags);
4710
4711 if (rc)
4712 return rc;
4713
4714 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
4715
4716 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4717 print_mac(mac, da), tid);
4718
4719 return 0;
4720 }
4721
4722 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
4723 enum ieee80211_ampdu_mlme_action action,
4724 const u8 *addr, u16 tid, u16 *ssn)
4725 {
4726 struct iwl4965_priv *priv = hw->priv;
4727 int sta_id;
4728 DECLARE_MAC_BUF(mac);
4729
4730 IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
4731 print_mac(mac, addr), tid);
4732 sta_id = iwl4965_hw_find_station(priv, addr);
4733 switch (action) {
4734 case IEEE80211_AMPDU_RX_START:
4735 IWL_DEBUG_HT("start Rx\n");
4736 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
4737 break;
4738 case IEEE80211_AMPDU_RX_STOP:
4739 IWL_DEBUG_HT("stop Rx\n");
4740 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4741 break;
4742 case IEEE80211_AMPDU_TX_START:
4743 IWL_DEBUG_HT("start Tx\n");
4744 return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
4745 case IEEE80211_AMPDU_TX_STOP:
4746 IWL_DEBUG_HT("stop Tx\n");
4747 return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
4748 default:
4749 IWL_DEBUG_HT("unknown\n");
4750 return -EINVAL;
4751 break;
4752 }
4753 return 0;
4754 }
4755
4756 #endif /* CONFIG_IWL4965_HT */
4757
4758 /* Set up 4965-specific Rx frame reply handlers */
4759 void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
4760 {
4761 /* Legacy Rx frames */
4762 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
4763
4764 /* High-throughput (HT) Rx frames */
4765 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4766 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4767
4768 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4769 iwl4965_rx_missed_beacon_notif;
4770
4771 #ifdef CONFIG_IWL4965_HT
4772 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4773 #endif /* CONFIG_IWL4965_HT */
4774 }
4775
4776 void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
4777 {
4778 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4779 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
4780 #ifdef CONFIG_IWL4965_SENSITIVITY
4781 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4782 #endif
4783 init_timer(&priv->statistics_periodic);
4784 priv->statistics_periodic.data = (unsigned long)priv;
4785 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4786 }
4787
4788 void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
4789 {
4790 del_timer_sync(&priv->statistics_periodic);
4791
4792 cancel_delayed_work(&priv->init_alive_start);
4793 }
4794
4795 struct pci_device_id iwl4965_hw_card_ids[] = {
4796 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
4797 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
4798 {0}
4799 };
4800
4801 /*
4802 * The device's EEPROM semaphore prevents conflicts between driver and uCode
4803 * when accessing the EEPROM; each access is a series of pulses to/from the
4804 * EEPROM chip, not a single event, so even reads could conflict if they
4805 * weren't arbitrated by the semaphore.
4806 */
4807 int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
4808 {
4809 u16 count;
4810 int rc;
4811
4812 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
4813 /* Request semaphore */
4814 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
4815 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4816
4817 /* See if we got it */
4818 rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
4819 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4820 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4821 EEPROM_SEM_TIMEOUT);
4822 if (rc >= 0) {
4823 IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
4824 count+1);
4825 return rc;
4826 }
4827 }
4828
4829 return rc;
4830 }
4831
4832 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
kernel-based virtual machine