xen: clarify locking used when pinning a pagetable.
[linux-2.6/kvm.git] / arch / x86 / xen / mmu.c
blobd3752b6ce6e67d3579b8b44de28647cae24560bb
1 /*
2 * Xen mmu operations
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/bug.h>
45 #include <asm/pgtable.h>
46 #include <asm/tlbflush.h>
47 #include <asm/fixmap.h>
48 #include <asm/mmu_context.h>
49 #include <asm/paravirt.h>
50 #include <asm/linkage.h>
52 #include <asm/xen/hypercall.h>
53 #include <asm/xen/hypervisor.h>
55 #include <xen/page.h>
56 #include <xen/interface/xen.h>
58 #include "multicalls.h"
59 #include "mmu.h"
62 * Just beyond the highest usermode address. STACK_TOP_MAX has a
63 * redzone above it, so round it up to a PGD boundary.
65 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
68 #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
69 #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
71 /* Placeholder for holes in the address space */
72 static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
73 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
75 /* Array of pointers to pages containing p2m entries */
76 static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
77 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
79 /* Arrays of p2m arrays expressed in mfns used for save/restore */
80 static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
82 static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
83 __page_aligned_bss;
85 static inline unsigned p2m_top_index(unsigned long pfn)
87 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
88 return pfn / P2M_ENTRIES_PER_PAGE;
91 static inline unsigned p2m_index(unsigned long pfn)
93 return pfn % P2M_ENTRIES_PER_PAGE;
96 /* Build the parallel p2m_top_mfn structures */
97 void xen_setup_mfn_list_list(void)
99 unsigned pfn, idx;
101 for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
102 unsigned topidx = p2m_top_index(pfn);
104 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
107 for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
108 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
109 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
112 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
114 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
115 virt_to_mfn(p2m_top_mfn_list);
116 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
119 /* Set up p2m_top to point to the domain-builder provided p2m pages */
120 void __init xen_build_dynamic_phys_to_machine(void)
122 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
123 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
124 unsigned pfn;
126 for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
127 unsigned topidx = p2m_top_index(pfn);
129 p2m_top[topidx] = &mfn_list[pfn];
133 unsigned long get_phys_to_machine(unsigned long pfn)
135 unsigned topidx, idx;
137 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
138 return INVALID_P2M_ENTRY;
140 topidx = p2m_top_index(pfn);
141 idx = p2m_index(pfn);
142 return p2m_top[topidx][idx];
144 EXPORT_SYMBOL_GPL(get_phys_to_machine);
146 static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
148 unsigned long *p;
149 unsigned i;
151 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
152 BUG_ON(p == NULL);
154 for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
155 p[i] = INVALID_P2M_ENTRY;
157 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
158 free_page((unsigned long)p);
159 else
160 *mfnp = virt_to_mfn(p);
163 void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
165 unsigned topidx, idx;
167 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
168 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
169 return;
172 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
173 BUG_ON(mfn != INVALID_P2M_ENTRY);
174 return;
177 topidx = p2m_top_index(pfn);
178 if (p2m_top[topidx] == p2m_missing) {
179 /* no need to allocate a page to store an invalid entry */
180 if (mfn == INVALID_P2M_ENTRY)
181 return;
182 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
185 idx = p2m_index(pfn);
186 p2m_top[topidx][idx] = mfn;
189 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
191 unsigned long address = (unsigned long)vaddr;
192 unsigned int level;
193 pte_t *pte = lookup_address(address, &level);
194 unsigned offset = address & ~PAGE_MASK;
196 BUG_ON(pte == NULL);
198 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
201 void make_lowmem_page_readonly(void *vaddr)
203 pte_t *pte, ptev;
204 unsigned long address = (unsigned long)vaddr;
205 unsigned int level;
207 pte = lookup_address(address, &level);
208 BUG_ON(pte == NULL);
210 ptev = pte_wrprotect(*pte);
212 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
213 BUG();
216 void make_lowmem_page_readwrite(void *vaddr)
218 pte_t *pte, ptev;
219 unsigned long address = (unsigned long)vaddr;
220 unsigned int level;
222 pte = lookup_address(address, &level);
223 BUG_ON(pte == NULL);
225 ptev = pte_mkwrite(*pte);
227 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
228 BUG();
232 static bool page_pinned(void *ptr)
234 struct page *page = virt_to_page(ptr);
236 return PagePinned(page);
239 static void extend_mmu_update(const struct mmu_update *update)
241 struct multicall_space mcs;
242 struct mmu_update *u;
244 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
246 if (mcs.mc != NULL)
247 mcs.mc->args[1]++;
248 else {
249 mcs = __xen_mc_entry(sizeof(*u));
250 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
253 u = mcs.args;
254 *u = *update;
257 void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
259 struct mmu_update u;
261 preempt_disable();
263 xen_mc_batch();
265 /* ptr may be ioremapped for 64-bit pagetable setup */
266 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
267 u.val = pmd_val_ma(val);
268 extend_mmu_update(&u);
270 xen_mc_issue(PARAVIRT_LAZY_MMU);
272 preempt_enable();
275 void xen_set_pmd(pmd_t *ptr, pmd_t val)
277 /* If page is not pinned, we can just update the entry
278 directly */
279 if (!page_pinned(ptr)) {
280 *ptr = val;
281 return;
284 xen_set_pmd_hyper(ptr, val);
288 * Associate a virtual page frame with a given physical page frame
289 * and protection flags for that frame.
291 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
293 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
296 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
297 pte_t *ptep, pte_t pteval)
299 /* updates to init_mm may be done without lock */
300 if (mm == &init_mm)
301 preempt_disable();
303 if (mm == current->mm || mm == &init_mm) {
304 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
305 struct multicall_space mcs;
306 mcs = xen_mc_entry(0);
308 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
309 xen_mc_issue(PARAVIRT_LAZY_MMU);
310 goto out;
311 } else
312 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
313 goto out;
315 xen_set_pte(ptep, pteval);
317 out:
318 if (mm == &init_mm)
319 preempt_enable();
322 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
324 /* Just return the pte as-is. We preserve the bits on commit */
325 return *ptep;
328 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
329 pte_t *ptep, pte_t pte)
331 struct mmu_update u;
333 xen_mc_batch();
335 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
336 u.val = pte_val_ma(pte);
337 extend_mmu_update(&u);
339 xen_mc_issue(PARAVIRT_LAZY_MMU);
342 /* Assume pteval_t is equivalent to all the other *val_t types. */
343 static pteval_t pte_mfn_to_pfn(pteval_t val)
345 if (val & _PAGE_PRESENT) {
346 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
347 pteval_t flags = val & PTE_FLAGS_MASK;
348 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
351 return val;
354 static pteval_t pte_pfn_to_mfn(pteval_t val)
356 if (val & _PAGE_PRESENT) {
357 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
358 pteval_t flags = val & PTE_FLAGS_MASK;
359 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
362 return val;
365 pteval_t xen_pte_val(pte_t pte)
367 return pte_mfn_to_pfn(pte.pte);
370 pgdval_t xen_pgd_val(pgd_t pgd)
372 return pte_mfn_to_pfn(pgd.pgd);
375 pte_t xen_make_pte(pteval_t pte)
377 pte = pte_pfn_to_mfn(pte);
378 return native_make_pte(pte);
381 pgd_t xen_make_pgd(pgdval_t pgd)
383 pgd = pte_pfn_to_mfn(pgd);
384 return native_make_pgd(pgd);
387 pmdval_t xen_pmd_val(pmd_t pmd)
389 return pte_mfn_to_pfn(pmd.pmd);
392 void xen_set_pud_hyper(pud_t *ptr, pud_t val)
394 struct mmu_update u;
396 preempt_disable();
398 xen_mc_batch();
400 /* ptr may be ioremapped for 64-bit pagetable setup */
401 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
402 u.val = pud_val_ma(val);
403 extend_mmu_update(&u);
405 xen_mc_issue(PARAVIRT_LAZY_MMU);
407 preempt_enable();
410 void xen_set_pud(pud_t *ptr, pud_t val)
412 /* If page is not pinned, we can just update the entry
413 directly */
414 if (!page_pinned(ptr)) {
415 *ptr = val;
416 return;
419 xen_set_pud_hyper(ptr, val);
422 void xen_set_pte(pte_t *ptep, pte_t pte)
424 #ifdef CONFIG_X86_PAE
425 ptep->pte_high = pte.pte_high;
426 smp_wmb();
427 ptep->pte_low = pte.pte_low;
428 #else
429 *ptep = pte;
430 #endif
433 #ifdef CONFIG_X86_PAE
434 void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
436 set_64bit((u64 *)ptep, native_pte_val(pte));
439 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
441 ptep->pte_low = 0;
442 smp_wmb(); /* make sure low gets written first */
443 ptep->pte_high = 0;
446 void xen_pmd_clear(pmd_t *pmdp)
448 set_pmd(pmdp, __pmd(0));
450 #endif /* CONFIG_X86_PAE */
452 pmd_t xen_make_pmd(pmdval_t pmd)
454 pmd = pte_pfn_to_mfn(pmd);
455 return native_make_pmd(pmd);
458 #if PAGETABLE_LEVELS == 4
459 pudval_t xen_pud_val(pud_t pud)
461 return pte_mfn_to_pfn(pud.pud);
464 pud_t xen_make_pud(pudval_t pud)
466 pud = pte_pfn_to_mfn(pud);
468 return native_make_pud(pud);
471 pgd_t *xen_get_user_pgd(pgd_t *pgd)
473 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
474 unsigned offset = pgd - pgd_page;
475 pgd_t *user_ptr = NULL;
477 if (offset < pgd_index(USER_LIMIT)) {
478 struct page *page = virt_to_page(pgd_page);
479 user_ptr = (pgd_t *)page->private;
480 if (user_ptr)
481 user_ptr += offset;
484 return user_ptr;
487 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
489 struct mmu_update u;
491 u.ptr = virt_to_machine(ptr).maddr;
492 u.val = pgd_val_ma(val);
493 extend_mmu_update(&u);
497 * Raw hypercall-based set_pgd, intended for in early boot before
498 * there's a page structure. This implies:
499 * 1. The only existing pagetable is the kernel's
500 * 2. It is always pinned
501 * 3. It has no user pagetable attached to it
503 void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
505 preempt_disable();
507 xen_mc_batch();
509 __xen_set_pgd_hyper(ptr, val);
511 xen_mc_issue(PARAVIRT_LAZY_MMU);
513 preempt_enable();
516 void xen_set_pgd(pgd_t *ptr, pgd_t val)
518 pgd_t *user_ptr = xen_get_user_pgd(ptr);
520 /* If page is not pinned, we can just update the entry
521 directly */
522 if (!page_pinned(ptr)) {
523 *ptr = val;
524 if (user_ptr) {
525 WARN_ON(page_pinned(user_ptr));
526 *user_ptr = val;
528 return;
531 /* If it's pinned, then we can at least batch the kernel and
532 user updates together. */
533 xen_mc_batch();
535 __xen_set_pgd_hyper(ptr, val);
536 if (user_ptr)
537 __xen_set_pgd_hyper(user_ptr, val);
539 xen_mc_issue(PARAVIRT_LAZY_MMU);
541 #endif /* PAGETABLE_LEVELS == 4 */
544 * (Yet another) pagetable walker. This one is intended for pinning a
545 * pagetable. This means that it walks a pagetable and calls the
546 * callback function on each page it finds making up the page table,
547 * at every level. It walks the entire pagetable, but it only bothers
548 * pinning pte pages which are below limit. In the normal case this
549 * will be STACK_TOP_MAX, but at boot we need to pin up to
550 * FIXADDR_TOP.
552 * For 32-bit the important bit is that we don't pin beyond there,
553 * because then we start getting into Xen's ptes.
555 * For 64-bit, we must skip the Xen hole in the middle of the address
556 * space, just after the big x86-64 virtual hole.
558 static int pgd_walk(pgd_t *pgd, int (*func)(struct page *, enum pt_level),
559 unsigned long limit)
561 int flush = 0;
562 unsigned hole_low, hole_high;
563 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
564 unsigned pgdidx, pudidx, pmdidx;
566 /* The limit is the last byte to be touched */
567 limit--;
568 BUG_ON(limit >= FIXADDR_TOP);
570 if (xen_feature(XENFEAT_auto_translated_physmap))
571 return 0;
574 * 64-bit has a great big hole in the middle of the address
575 * space, which contains the Xen mappings. On 32-bit these
576 * will end up making a zero-sized hole and so is a no-op.
578 hole_low = pgd_index(USER_LIMIT);
579 hole_high = pgd_index(PAGE_OFFSET);
581 pgdidx_limit = pgd_index(limit);
582 #if PTRS_PER_PUD > 1
583 pudidx_limit = pud_index(limit);
584 #else
585 pudidx_limit = 0;
586 #endif
587 #if PTRS_PER_PMD > 1
588 pmdidx_limit = pmd_index(limit);
589 #else
590 pmdidx_limit = 0;
591 #endif
593 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
594 pud_t *pud;
596 if (pgdidx >= hole_low && pgdidx < hole_high)
597 continue;
599 if (!pgd_val(pgd[pgdidx]))
600 continue;
602 pud = pud_offset(&pgd[pgdidx], 0);
604 if (PTRS_PER_PUD > 1) /* not folded */
605 flush |= (*func)(virt_to_page(pud), PT_PUD);
607 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
608 pmd_t *pmd;
610 if (pgdidx == pgdidx_limit &&
611 pudidx > pudidx_limit)
612 goto out;
614 if (pud_none(pud[pudidx]))
615 continue;
617 pmd = pmd_offset(&pud[pudidx], 0);
619 if (PTRS_PER_PMD > 1) /* not folded */
620 flush |= (*func)(virt_to_page(pmd), PT_PMD);
622 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
623 struct page *pte;
625 if (pgdidx == pgdidx_limit &&
626 pudidx == pudidx_limit &&
627 pmdidx > pmdidx_limit)
628 goto out;
630 if (pmd_none(pmd[pmdidx]))
631 continue;
633 pte = pmd_page(pmd[pmdidx]);
634 flush |= (*func)(pte, PT_PTE);
639 out:
640 /* Do the top level last, so that the callbacks can use it as
641 a cue to do final things like tlb flushes. */
642 flush |= (*func)(virt_to_page(pgd), PT_PGD);
644 return flush;
647 static spinlock_t *lock_pte(struct page *page)
649 spinlock_t *ptl = NULL;
651 #if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
652 ptl = __pte_lockptr(page);
653 spin_lock(ptl);
654 #endif
656 return ptl;
659 static void do_unlock(void *v)
661 spinlock_t *ptl = v;
662 spin_unlock(ptl);
665 static void xen_do_pin(unsigned level, unsigned long pfn)
667 struct mmuext_op *op;
668 struct multicall_space mcs;
670 mcs = __xen_mc_entry(sizeof(*op));
671 op = mcs.args;
672 op->cmd = level;
673 op->arg1.mfn = pfn_to_mfn(pfn);
674 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
677 static int pin_page(struct page *page, enum pt_level level)
679 unsigned pgfl = TestSetPagePinned(page);
680 int flush;
682 if (pgfl)
683 flush = 0; /* already pinned */
684 else if (PageHighMem(page))
685 /* kmaps need flushing if we found an unpinned
686 highpage */
687 flush = 1;
688 else {
689 void *pt = lowmem_page_address(page);
690 unsigned long pfn = page_to_pfn(page);
691 struct multicall_space mcs = __xen_mc_entry(0);
692 spinlock_t *ptl;
694 flush = 0;
697 * We need to hold the pagetable lock between the time
698 * we make the pagetable RO and when we actually pin
699 * it. If we don't, then other users may come in and
700 * attempt to update the pagetable by writing it,
701 * which will fail because the memory is RO but not
702 * pinned, so Xen won't do the trap'n'emulate.
704 * If we're using split pte locks, we can't hold the
705 * entire pagetable's worth of locks during the
706 * traverse, because we may wrap the preempt count (8
707 * bits). The solution is to mark RO and pin each PTE
708 * page while holding the lock. This means the number
709 * of locks we end up holding is never more than a
710 * batch size (~32 entries, at present).
712 * If we're not using split pte locks, we needn't pin
713 * the PTE pages independently, because we're
714 * protected by the overall pagetable lock.
716 ptl = NULL;
717 if (level == PT_PTE)
718 ptl = lock_pte(page);
720 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
721 pfn_pte(pfn, PAGE_KERNEL_RO),
722 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
724 if (ptl) {
725 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
727 /* Queue a deferred unlock for when this batch
728 is completed. */
729 xen_mc_callback(do_unlock, ptl);
733 return flush;
736 /* This is called just after a mm has been created, but it has not
737 been used yet. We need to make sure that its pagetable is all
738 read-only, and can be pinned. */
739 void xen_pgd_pin(pgd_t *pgd)
741 xen_mc_batch();
743 if (pgd_walk(pgd, pin_page, USER_LIMIT)) {
744 /* re-enable interrupts for kmap_flush_unused */
745 xen_mc_issue(0);
746 kmap_flush_unused();
747 xen_mc_batch();
750 #ifdef CONFIG_X86_64
752 pgd_t *user_pgd = xen_get_user_pgd(pgd);
754 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
756 if (user_pgd) {
757 pin_page(virt_to_page(user_pgd), PT_PGD);
758 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd)));
761 #else /* CONFIG_X86_32 */
762 #ifdef CONFIG_X86_PAE
763 /* Need to make sure unshared kernel PMD is pinnable */
764 pin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
765 #endif
766 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
767 #endif /* CONFIG_X86_64 */
768 xen_mc_issue(0);
772 * On save, we need to pin all pagetables to make sure they get their
773 * mfns turned into pfns. Search the list for any unpinned pgds and pin
774 * them (unpinned pgds are not currently in use, probably because the
775 * process is under construction or destruction).
777 void xen_mm_pin_all(void)
779 unsigned long flags;
780 struct page *page;
782 spin_lock_irqsave(&pgd_lock, flags);
784 list_for_each_entry(page, &pgd_list, lru) {
785 if (!PagePinned(page)) {
786 xen_pgd_pin((pgd_t *)page_address(page));
787 SetPageSavePinned(page);
791 spin_unlock_irqrestore(&pgd_lock, flags);
795 * The init_mm pagetable is really pinned as soon as its created, but
796 * that's before we have page structures to store the bits. So do all
797 * the book-keeping now.
799 static __init int mark_pinned(struct page *page, enum pt_level level)
801 SetPagePinned(page);
802 return 0;
805 void __init xen_mark_init_mm_pinned(void)
807 pgd_walk(init_mm.pgd, mark_pinned, FIXADDR_TOP);
810 static int unpin_page(struct page *page, enum pt_level level)
812 unsigned pgfl = TestClearPagePinned(page);
814 if (pgfl && !PageHighMem(page)) {
815 void *pt = lowmem_page_address(page);
816 unsigned long pfn = page_to_pfn(page);
817 spinlock_t *ptl = NULL;
818 struct multicall_space mcs;
821 * Do the converse to pin_page. If we're using split
822 * pte locks, we must be holding the lock for while
823 * the pte page is unpinned but still RO to prevent
824 * concurrent updates from seeing it in this
825 * partially-pinned state.
827 if (level == PT_PTE) {
828 ptl = lock_pte(page);
830 if (ptl)
831 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
834 mcs = __xen_mc_entry(0);
836 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
837 pfn_pte(pfn, PAGE_KERNEL),
838 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
840 if (ptl) {
841 /* unlock when batch completed */
842 xen_mc_callback(do_unlock, ptl);
846 return 0; /* never need to flush on unpin */
849 /* Release a pagetables pages back as normal RW */
850 static void xen_pgd_unpin(pgd_t *pgd)
852 xen_mc_batch();
854 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
856 #ifdef CONFIG_X86_64
858 pgd_t *user_pgd = xen_get_user_pgd(pgd);
860 if (user_pgd) {
861 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd)));
862 unpin_page(virt_to_page(user_pgd), PT_PGD);
865 #endif
867 #ifdef CONFIG_X86_PAE
868 /* Need to make sure unshared kernel PMD is unpinned */
869 unpin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
870 #endif
872 pgd_walk(pgd, unpin_page, USER_LIMIT);
874 xen_mc_issue(0);
878 * On resume, undo any pinning done at save, so that the rest of the
879 * kernel doesn't see any unexpected pinned pagetables.
881 void xen_mm_unpin_all(void)
883 unsigned long flags;
884 struct page *page;
886 spin_lock_irqsave(&pgd_lock, flags);
888 list_for_each_entry(page, &pgd_list, lru) {
889 if (PageSavePinned(page)) {
890 BUG_ON(!PagePinned(page));
891 xen_pgd_unpin((pgd_t *)page_address(page));
892 ClearPageSavePinned(page);
896 spin_unlock_irqrestore(&pgd_lock, flags);
899 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
901 spin_lock(&next->page_table_lock);
902 xen_pgd_pin(next->pgd);
903 spin_unlock(&next->page_table_lock);
906 void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
908 spin_lock(&mm->page_table_lock);
909 xen_pgd_pin(mm->pgd);
910 spin_unlock(&mm->page_table_lock);
914 #ifdef CONFIG_SMP
915 /* Another cpu may still have their %cr3 pointing at the pagetable, so
916 we need to repoint it somewhere else before we can unpin it. */
917 static void drop_other_mm_ref(void *info)
919 struct mm_struct *mm = info;
920 struct mm_struct *active_mm;
922 #ifdef CONFIG_X86_64
923 active_mm = read_pda(active_mm);
924 #else
925 active_mm = __get_cpu_var(cpu_tlbstate).active_mm;
926 #endif
928 if (active_mm == mm)
929 leave_mm(smp_processor_id());
931 /* If this cpu still has a stale cr3 reference, then make sure
932 it has been flushed. */
933 if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
934 load_cr3(swapper_pg_dir);
935 arch_flush_lazy_cpu_mode();
939 static void drop_mm_ref(struct mm_struct *mm)
941 cpumask_t mask;
942 unsigned cpu;
944 if (current->active_mm == mm) {
945 if (current->mm == mm)
946 load_cr3(swapper_pg_dir);
947 else
948 leave_mm(smp_processor_id());
949 arch_flush_lazy_cpu_mode();
952 /* Get the "official" set of cpus referring to our pagetable. */
953 mask = mm->cpu_vm_mask;
955 /* It's possible that a vcpu may have a stale reference to our
956 cr3, because its in lazy mode, and it hasn't yet flushed
957 its set of pending hypercalls yet. In this case, we can
958 look at its actual current cr3 value, and force it to flush
959 if needed. */
960 for_each_online_cpu(cpu) {
961 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
962 cpu_set(cpu, mask);
965 if (!cpus_empty(mask))
966 smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
968 #else
969 static void drop_mm_ref(struct mm_struct *mm)
971 if (current->active_mm == mm)
972 load_cr3(swapper_pg_dir);
974 #endif
977 * While a process runs, Xen pins its pagetables, which means that the
978 * hypervisor forces it to be read-only, and it controls all updates
979 * to it. This means that all pagetable updates have to go via the
980 * hypervisor, which is moderately expensive.
982 * Since we're pulling the pagetable down, we switch to use init_mm,
983 * unpin old process pagetable and mark it all read-write, which
984 * allows further operations on it to be simple memory accesses.
986 * The only subtle point is that another CPU may be still using the
987 * pagetable because of lazy tlb flushing. This means we need need to
988 * switch all CPUs off this pagetable before we can unpin it.
990 void xen_exit_mmap(struct mm_struct *mm)
992 get_cpu(); /* make sure we don't move around */
993 drop_mm_ref(mm);
994 put_cpu();
996 spin_lock(&mm->page_table_lock);
998 /* pgd may not be pinned in the error exit path of execve */
999 if (page_pinned(mm->pgd))
1000 xen_pgd_unpin(mm->pgd);
1002 spin_unlock(&mm->page_table_lock);