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iwl3945: Remove power related definitions from 3945 code
[linux-2.6/kvm.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobaac8825237f442dfbb0a8eaeab4f5698b06dd450
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-3945-core.h"
52 #include "iwl-commands.h"
53 #include "iwl-3945.h"
54 #include "iwl-3945-fh.h"
55 #include "iwl-helpers.h"
56
57 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /* module parameters */
67 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69 static int iwl3945_param_disable; /* def: 0 = enable radio */
70 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
71 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 */
77
78 #define DRV_DESCRIPTION \
79 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
80
81 #ifdef CONFIG_IWL3945_DEBUG
82 #define VD "d"
83 #else
84 #define VD
85 #endif
86
87 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
88 #define VS "s"
89 #else
90 #define VS
91 #endif
92
93 #define IWLWIFI_VERSION "1.2.26k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
95 #define DRV_AUTHOR "<ilw@linux.intel.com>"
96 #define DRV_VERSION IWLWIFI_VERSION
97
98
99 MODULE_DESCRIPTION(DRV_DESCRIPTION);
100 MODULE_VERSION(DRV_VERSION);
101 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
102 MODULE_LICENSE("GPL");
103
104 static const struct ieee80211_supported_band *iwl3945_get_band(
105 struct iwl3945_priv *priv, enum ieee80211_band band)
106 {
107 return priv->hw->wiphy->bands[band];
108 }
109
110 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
111 * DMA services
112 *
113 * Theory of operation
114 *
115 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
116 * of buffer descriptors, each of which points to one or more data buffers for
117 * the device to read from or fill. Driver and device exchange status of each
118 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
119 * entries in each circular buffer, to protect against confusing empty and full
120 * queue states.
121 *
122 * The device reads or writes the data in the queues via the device's several
123 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
124 *
125 * For Tx queue, there are low mark and high mark limits. If, after queuing
126 * the packet for Tx, free space become < low mark, Tx queue stopped. When
127 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
128 * Tx queue resumed.
129 *
130 * The 3945 operates with six queues: One receive queue, one transmit queue
131 * (#4) for sending commands to the device firmware, and four transmit queues
132 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
133 ***************************************************/
134
135 int iwl3945_queue_space(const struct iwl3945_queue *q)
136 {
137 int s = q->read_ptr - q->write_ptr;
138
139 if (q->read_ptr > q->write_ptr)
140 s -= q->n_bd;
141
142 if (s <= 0)
143 s += q->n_window;
144 /* keep some reserve to not confuse empty and full situations */
145 s -= 2;
146 if (s < 0)
147 s = 0;
148 return s;
149 }
150
151 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
152 {
153 return q->write_ptr > q->read_ptr ?
154 (i >= q->read_ptr && i < q->write_ptr) :
155 !(i < q->read_ptr && i >= q->write_ptr);
156 }
157
158
159 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
160 {
161 /* This is for scan command, the big buffer at end of command array */
162 if (is_huge)
163 return q->n_window; /* must be power of 2 */
164
165 /* Otherwise, use normal size buffers */
166 return index & (q->n_window - 1);
167 }
168
169 /**
170 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
171 */
172 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
173 int count, int slots_num, u32 id)
174 {
175 q->n_bd = count;
176 q->n_window = slots_num;
177 q->id = id;
178
179 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
180 * and iwl_queue_dec_wrap are broken. */
181 BUG_ON(!is_power_of_2(count));
182
183 /* slots_num must be power-of-two size, otherwise
184 * get_cmd_index is broken. */
185 BUG_ON(!is_power_of_2(slots_num));
186
187 q->low_mark = q->n_window / 4;
188 if (q->low_mark < 4)
189 q->low_mark = 4;
190
191 q->high_mark = q->n_window / 8;
192 if (q->high_mark < 2)
193 q->high_mark = 2;
194
195 q->write_ptr = q->read_ptr = 0;
196
197 return 0;
198 }
199
200 /**
201 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
202 */
203 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
204 struct iwl3945_tx_queue *txq, u32 id)
205 {
206 struct pci_dev *dev = priv->pci_dev;
207
208 /* Driver private data, only for Tx (not command) queues,
209 * not shared with device. */
210 if (id != IWL_CMD_QUEUE_NUM) {
211 txq->txb = kmalloc(sizeof(txq->txb[0]) *
212 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
213 if (!txq->txb) {
214 IWL_ERROR("kmalloc for auxiliary BD "
215 "structures failed\n");
216 goto error;
217 }
218 } else
219 txq->txb = NULL;
220
221 /* Circular buffer of transmit frame descriptors (TFDs),
222 * shared with device */
223 txq->bd = pci_alloc_consistent(dev,
224 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
225 &txq->q.dma_addr);
226
227 if (!txq->bd) {
228 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
229 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
230 goto error;
231 }
232 txq->q.id = id;
233
234 return 0;
235
236 error:
237 kfree(txq->txb);
238 txq->txb = NULL;
239
240 return -ENOMEM;
241 }
242
243 /**
244 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
245 */
246 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
247 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
248 {
249 struct pci_dev *dev = priv->pci_dev;
250 int len;
251 int rc = 0;
252
253 /*
254 * Alloc buffer array for commands (Tx or other types of commands).
255 * For the command queue (#4), allocate command space + one big
256 * command for scan, since scan command is very huge; the system will
257 * not have two scans at the same time, so only one is needed.
258 * For data Tx queues (all other queues), no super-size command
259 * space is needed.
260 */
261 len = sizeof(struct iwl3945_cmd) * slots_num;
262 if (txq_id == IWL_CMD_QUEUE_NUM)
263 len += IWL_MAX_SCAN_SIZE;
264 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
265 if (!txq->cmd)
266 return -ENOMEM;
267
268 /* Alloc driver data array and TFD circular buffer */
269 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
270 if (rc) {
271 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
272
273 return -ENOMEM;
274 }
275 txq->need_update = 0;
276
277 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
278 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
279 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
280
281 /* Initialize queue high/low-water, head/tail indexes */
282 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
283
284 /* Tell device where to find queue, enable DMA channel. */
285 iwl3945_hw_tx_queue_init(priv, txq);
286
287 return 0;
288 }
289
290 /**
291 * iwl3945_tx_queue_free - Deallocate DMA queue.
292 * @txq: Transmit queue to deallocate.
293 *
294 * Empty queue by removing and destroying all BD's.
295 * Free all buffers.
296 * 0-fill, but do not free "txq" descriptor structure.
297 */
298 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
299 {
300 struct iwl3945_queue *q = &txq->q;
301 struct pci_dev *dev = priv->pci_dev;
302 int len;
303
304 if (q->n_bd == 0)
305 return;
306
307 /* first, empty all BD's */
308 for (; q->write_ptr != q->read_ptr;
309 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
310 iwl3945_hw_txq_free_tfd(priv, txq);
311
312 len = sizeof(struct iwl3945_cmd) * q->n_window;
313 if (q->id == IWL_CMD_QUEUE_NUM)
314 len += IWL_MAX_SCAN_SIZE;
315
316 /* De-alloc array of command/tx buffers */
317 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
318
319 /* De-alloc circular buffer of TFDs */
320 if (txq->q.n_bd)
321 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
322 txq->q.n_bd, txq->bd, txq->q.dma_addr);
323
324 /* De-alloc array of per-TFD driver data */
325 kfree(txq->txb);
326 txq->txb = NULL;
327
328 /* 0-fill queue descriptor structure */
329 memset(txq, 0, sizeof(*txq));
330 }
331
332 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
333
334 /*************** STATION TABLE MANAGEMENT ****
335 * mac80211 should be examined to determine if sta_info is duplicating
336 * the functionality provided here
337 */
338
339 /**************************************************************/
340 #if 0 /* temporary disable till we add real remove station */
341 /**
342 * iwl3945_remove_station - Remove driver's knowledge of station.
343 *
344 * NOTE: This does not remove station from device's station table.
345 */
346 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
347 {
348 int index = IWL_INVALID_STATION;
349 int i;
350 unsigned long flags;
351
352 spin_lock_irqsave(&priv->sta_lock, flags);
353
354 if (is_ap)
355 index = IWL_AP_ID;
356 else if (is_broadcast_ether_addr(addr))
357 index = priv->hw_setting.bcast_sta_id;
358 else
359 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
360 if (priv->stations[i].used &&
361 !compare_ether_addr(priv->stations[i].sta.sta.addr,
362 addr)) {
363 index = i;
364 break;
365 }
366
367 if (unlikely(index == IWL_INVALID_STATION))
368 goto out;
369
370 if (priv->stations[index].used) {
371 priv->stations[index].used = 0;
372 priv->num_stations--;
373 }
374
375 BUG_ON(priv->num_stations < 0);
376
377 out:
378 spin_unlock_irqrestore(&priv->sta_lock, flags);
379 return 0;
380 }
381 #endif
382
383 /**
384 * iwl3945_clear_stations_table - Clear the driver's station table
385 *
386 * NOTE: This does not clear or otherwise alter the device's station table.
387 */
388 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
389 {
390 unsigned long flags;
391
392 spin_lock_irqsave(&priv->sta_lock, flags);
393
394 priv->num_stations = 0;
395 memset(priv->stations, 0, sizeof(priv->stations));
396
397 spin_unlock_irqrestore(&priv->sta_lock, flags);
398 }
399
400 /**
401 * iwl3945_add_station - Add station to station tables in driver and device
402 */
403 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
404 {
405 int i;
406 int index = IWL_INVALID_STATION;
407 struct iwl3945_station_entry *station;
408 unsigned long flags_spin;
409 u8 rate;
410
411 spin_lock_irqsave(&priv->sta_lock, flags_spin);
412 if (is_ap)
413 index = IWL_AP_ID;
414 else if (is_broadcast_ether_addr(addr))
415 index = priv->hw_setting.bcast_sta_id;
416 else
417 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
418 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
419 addr)) {
420 index = i;
421 break;
422 }
423
424 if (!priv->stations[i].used &&
425 index == IWL_INVALID_STATION)
426 index = i;
427 }
428
429 /* These two conditions has the same outcome but keep them separate
430 since they have different meaning */
431 if (unlikely(index == IWL_INVALID_STATION)) {
432 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
433 return index;
434 }
435
436 if (priv->stations[index].used &&
437 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
438 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
439 return index;
440 }
441
442 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
443 station = &priv->stations[index];
444 station->used = 1;
445 priv->num_stations++;
446
447 /* Set up the REPLY_ADD_STA command to send to device */
448 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
449 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
450 station->sta.mode = 0;
451 station->sta.sta.sta_id = index;
452 station->sta.station_flags = 0;
453
454 if (priv->band == IEEE80211_BAND_5GHZ)
455 rate = IWL_RATE_6M_PLCP;
456 else
457 rate = IWL_RATE_1M_PLCP;
458
459 /* Turn on both antennas for the station... */
460 station->sta.rate_n_flags =
461 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
462
463 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
464
465 /* Add station to device's station table */
466 iwl3945_send_add_station(priv, &station->sta, flags);
467 return index;
468
469 }
470
471 /*************** DRIVER STATUS FUNCTIONS *****/
472
473 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
474 {
475 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
476 * set but EXIT_PENDING is not */
477 return test_bit(STATUS_READY, &priv->status) &&
478 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
479 !test_bit(STATUS_EXIT_PENDING, &priv->status);
480 }
481
482 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
483 {
484 return test_bit(STATUS_ALIVE, &priv->status);
485 }
486
487 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
488 {
489 return test_bit(STATUS_INIT, &priv->status);
490 }
491
492 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
493 {
494 return test_bit(STATUS_RF_KILL_SW, &priv->status);
495 }
496
497 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
498 {
499 return test_bit(STATUS_RF_KILL_HW, &priv->status);
500 }
501
502 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
503 {
504 return iwl3945_is_rfkill_hw(priv) ||
505 iwl3945_is_rfkill_sw(priv);
506 }
507
508 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
509 {
510
511 if (iwl3945_is_rfkill(priv))
512 return 0;
513
514 return iwl3945_is_ready(priv);
515 }
516
517 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
518
519 #define IWL_CMD(x) case x: return #x
520
521 static const char *get_cmd_string(u8 cmd)
522 {
523 switch (cmd) {
524 IWL_CMD(REPLY_ALIVE);
525 IWL_CMD(REPLY_ERROR);
526 IWL_CMD(REPLY_RXON);
527 IWL_CMD(REPLY_RXON_ASSOC);
528 IWL_CMD(REPLY_QOS_PARAM);
529 IWL_CMD(REPLY_RXON_TIMING);
530 IWL_CMD(REPLY_ADD_STA);
531 IWL_CMD(REPLY_REMOVE_STA);
532 IWL_CMD(REPLY_REMOVE_ALL_STA);
533 IWL_CMD(REPLY_3945_RX);
534 IWL_CMD(REPLY_TX);
535 IWL_CMD(REPLY_RATE_SCALE);
536 IWL_CMD(REPLY_LEDS_CMD);
537 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
538 IWL_CMD(RADAR_NOTIFICATION);
539 IWL_CMD(REPLY_QUIET_CMD);
540 IWL_CMD(REPLY_CHANNEL_SWITCH);
541 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
542 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
543 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
544 IWL_CMD(POWER_TABLE_CMD);
545 IWL_CMD(PM_SLEEP_NOTIFICATION);
546 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
547 IWL_CMD(REPLY_SCAN_CMD);
548 IWL_CMD(REPLY_SCAN_ABORT_CMD);
549 IWL_CMD(SCAN_START_NOTIFICATION);
550 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
551 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
552 IWL_CMD(BEACON_NOTIFICATION);
553 IWL_CMD(REPLY_TX_BEACON);
554 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
555 IWL_CMD(QUIET_NOTIFICATION);
556 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
557 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
558 IWL_CMD(REPLY_BT_CONFIG);
559 IWL_CMD(REPLY_STATISTICS_CMD);
560 IWL_CMD(STATISTICS_NOTIFICATION);
561 IWL_CMD(REPLY_CARD_STATE_CMD);
562 IWL_CMD(CARD_STATE_NOTIFICATION);
563 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
564 default:
565 return "UNKNOWN";
566
567 }
568 }
569
570 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
571
572 /**
573 * iwl3945_enqueue_hcmd - enqueue a uCode command
574 * @priv: device private data point
575 * @cmd: a point to the ucode command structure
576 *
577 * The function returns < 0 values to indicate the operation is
578 * failed. On success, it turns the index (> 0) of command in the
579 * command queue.
580 */
581 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
582 {
583 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
584 struct iwl3945_queue *q = &txq->q;
585 struct iwl3945_tfd_frame *tfd;
586 u32 *control_flags;
587 struct iwl3945_cmd *out_cmd;
588 u32 idx;
589 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
590 dma_addr_t phys_addr;
591 int pad;
592 u16 count;
593 int ret;
594 unsigned long flags;
595
596 /* If any of the command structures end up being larger than
597 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
598 * we will need to increase the size of the TFD entries */
599 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
600 !(cmd->meta.flags & CMD_SIZE_HUGE));
601
602
603 if (iwl3945_is_rfkill(priv)) {
604 IWL_DEBUG_INFO("Not sending command - RF KILL");
605 return -EIO;
606 }
607
608 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
609 IWL_ERROR("No space for Tx\n");
610 return -ENOSPC;
611 }
612
613 spin_lock_irqsave(&priv->hcmd_lock, flags);
614
615 tfd = &txq->bd[q->write_ptr];
616 memset(tfd, 0, sizeof(*tfd));
617
618 control_flags = (u32 *) tfd;
619
620 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
621 out_cmd = &txq->cmd[idx];
622
623 out_cmd->hdr.cmd = cmd->id;
624 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
625 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
626
627 /* At this point, the out_cmd now has all of the incoming cmd
628 * information */
629
630 out_cmd->hdr.flags = 0;
631 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
632 INDEX_TO_SEQ(q->write_ptr));
633 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
634 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
635
636 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
637 offsetof(struct iwl3945_cmd, hdr);
638 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
639
640 pad = U32_PAD(cmd->len);
641 count = TFD_CTL_COUNT_GET(*control_flags);
642 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
643
644 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
645 "%d bytes at %d[%d]:%d\n",
646 get_cmd_string(out_cmd->hdr.cmd),
647 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
648 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
649
650 txq->need_update = 1;
651
652 /* Increment and update queue's write index */
653 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
654 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
655
656 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
657 return ret ? ret : idx;
658 }
659
660 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
661 {
662 int ret;
663
664 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
665
666 /* An asynchronous command can not expect an SKB to be set. */
667 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
668
669 /* An asynchronous command MUST have a callback. */
670 BUG_ON(!cmd->meta.u.callback);
671
672 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
673 return -EBUSY;
674
675 ret = iwl3945_enqueue_hcmd(priv, cmd);
676 if (ret < 0) {
677 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
678 get_cmd_string(cmd->id), ret);
679 return ret;
680 }
681 return 0;
682 }
683
684 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
685 {
686 int cmd_idx;
687 int ret;
688
689 BUG_ON(cmd->meta.flags & CMD_ASYNC);
690
691 /* A synchronous command can not have a callback set. */
692 BUG_ON(cmd->meta.u.callback != NULL);
693
694 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
695 IWL_ERROR("Error sending %s: Already sending a host command\n",
696 get_cmd_string(cmd->id));
697 ret = -EBUSY;
698 goto out;
699 }
700
701 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
702
703 if (cmd->meta.flags & CMD_WANT_SKB)
704 cmd->meta.source = &cmd->meta;
705
706 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
707 if (cmd_idx < 0) {
708 ret = cmd_idx;
709 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
710 get_cmd_string(cmd->id), ret);
711 goto out;
712 }
713
714 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
715 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
716 HOST_COMPLETE_TIMEOUT);
717 if (!ret) {
718 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
719 IWL_ERROR("Error sending %s: time out after %dms.\n",
720 get_cmd_string(cmd->id),
721 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
722
723 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
724 ret = -ETIMEDOUT;
725 goto cancel;
726 }
727 }
728
729 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
730 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
731 get_cmd_string(cmd->id));
732 ret = -ECANCELED;
733 goto fail;
734 }
735 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
736 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
737 get_cmd_string(cmd->id));
738 ret = -EIO;
739 goto fail;
740 }
741 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
742 IWL_ERROR("Error: Response NULL in '%s'\n",
743 get_cmd_string(cmd->id));
744 ret = -EIO;
745 goto cancel;
746 }
747
748 ret = 0;
749 goto out;
750
751 cancel:
752 if (cmd->meta.flags & CMD_WANT_SKB) {
753 struct iwl3945_cmd *qcmd;
754
755 /* Cancel the CMD_WANT_SKB flag for the cmd in the
756 * TX cmd queue. Otherwise in case the cmd comes
757 * in later, it will possibly set an invalid
758 * address (cmd->meta.source). */
759 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
760 qcmd->meta.flags &= ~CMD_WANT_SKB;
761 }
762 fail:
763 if (cmd->meta.u.skb) {
764 dev_kfree_skb_any(cmd->meta.u.skb);
765 cmd->meta.u.skb = NULL;
766 }
767 out:
768 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
769 return ret;
770 }
771
772 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
773 {
774 if (cmd->meta.flags & CMD_ASYNC)
775 return iwl3945_send_cmd_async(priv, cmd);
776
777 return iwl3945_send_cmd_sync(priv, cmd);
778 }
779
780 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
781 {
782 struct iwl3945_host_cmd cmd = {
783 .id = id,
784 .len = len,
785 .data = data,
786 };
787
788 return iwl3945_send_cmd_sync(priv, &cmd);
789 }
790
791 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
792 {
793 struct iwl3945_host_cmd cmd = {
794 .id = id,
795 .len = sizeof(val),
796 .data = &val,
797 };
798
799 return iwl3945_send_cmd_sync(priv, &cmd);
800 }
801
802 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
803 {
804 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
805 }
806
807 /**
808 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
809 * @band: 2.4 or 5 GHz band
810 * @channel: Any channel valid for the requested band
811
812 * In addition to setting the staging RXON, priv->band is also set.
813 *
814 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
815 * in the staging RXON flag structure based on the band
816 */
817 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
818 enum ieee80211_band band,
819 u16 channel)
820 {
821 if (!iwl3945_get_channel_info(priv, band, channel)) {
822 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
823 channel, band);
824 return -EINVAL;
825 }
826
827 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
828 (priv->band == band))
829 return 0;
830
831 priv->staging_rxon.channel = cpu_to_le16(channel);
832 if (band == IEEE80211_BAND_5GHZ)
833 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
834 else
835 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
836
837 priv->band = band;
838
839 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
840
841 return 0;
842 }
843
844 /**
845 * iwl3945_check_rxon_cmd - validate RXON structure is valid
846 *
847 * NOTE: This is really only useful during development and can eventually
848 * be #ifdef'd out once the driver is stable and folks aren't actively
849 * making changes
850 */
851 static int iwl3945_check_rxon_cmd(struct iwl3945_priv *priv)
852 {
853 int error = 0;
854 int counter = 1;
855 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
856
857 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
858 error |= le32_to_cpu(rxon->flags &
859 (RXON_FLG_TGJ_NARROW_BAND_MSK |
860 RXON_FLG_RADAR_DETECT_MSK));
861 if (error)
862 IWL_WARNING("check 24G fields %d | %d\n",
863 counter++, error);
864 } else {
865 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
866 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
867 if (error)
868 IWL_WARNING("check 52 fields %d | %d\n",
869 counter++, error);
870 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
871 if (error)
872 IWL_WARNING("check 52 CCK %d | %d\n",
873 counter++, error);
874 }
875 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
876 if (error)
877 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
878
879 /* make sure basic rates 6Mbps and 1Mbps are supported */
880 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
881 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
882 if (error)
883 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
884
885 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
886 if (error)
887 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
888
889 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
890 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
891 if (error)
892 IWL_WARNING("check CCK and short slot %d | %d\n",
893 counter++, error);
894
895 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
896 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
897 if (error)
898 IWL_WARNING("check CCK & auto detect %d | %d\n",
899 counter++, error);
900
901 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
902 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
903 if (error)
904 IWL_WARNING("check TGG and auto detect %d | %d\n",
905 counter++, error);
906
907 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
908 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
909 RXON_FLG_ANT_A_MSK)) == 0);
910 if (error)
911 IWL_WARNING("check antenna %d %d\n", counter++, error);
912
913 if (error)
914 IWL_WARNING("Tuning to channel %d\n",
915 le16_to_cpu(rxon->channel));
916
917 if (error) {
918 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
919 return -1;
920 }
921 return 0;
922 }
923
924 /**
925 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
926 * @priv: staging_rxon is compared to active_rxon
927 *
928 * If the RXON structure is changing enough to require a new tune,
929 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
930 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
931 */
932 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
933 {
934
935 /* These items are only settable from the full RXON command */
936 if (!(iwl3945_is_associated(priv)) ||
937 compare_ether_addr(priv->staging_rxon.bssid_addr,
938 priv->active_rxon.bssid_addr) ||
939 compare_ether_addr(priv->staging_rxon.node_addr,
940 priv->active_rxon.node_addr) ||
941 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
942 priv->active_rxon.wlap_bssid_addr) ||
943 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
944 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
945 (priv->staging_rxon.air_propagation !=
946 priv->active_rxon.air_propagation) ||
947 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
948 return 1;
949
950 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
951 * be updated with the RXON_ASSOC command -- however only some
952 * flag transitions are allowed using RXON_ASSOC */
953
954 /* Check if we are not switching bands */
955 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
956 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
957 return 1;
958
959 /* Check if we are switching association toggle */
960 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
961 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
962 return 1;
963
964 return 0;
965 }
966
967 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
968 {
969 int rc = 0;
970 struct iwl_rx_packet *res = NULL;
971 struct iwl3945_rxon_assoc_cmd rxon_assoc;
972 struct iwl3945_host_cmd cmd = {
973 .id = REPLY_RXON_ASSOC,
974 .len = sizeof(rxon_assoc),
975 .meta.flags = CMD_WANT_SKB,
976 .data = &rxon_assoc,
977 };
978 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
979 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
980
981 if ((rxon1->flags == rxon2->flags) &&
982 (rxon1->filter_flags == rxon2->filter_flags) &&
983 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
984 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
985 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
986 return 0;
987 }
988
989 rxon_assoc.flags = priv->staging_rxon.flags;
990 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
991 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
992 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
993 rxon_assoc.reserved = 0;
994
995 rc = iwl3945_send_cmd_sync(priv, &cmd);
996 if (rc)
997 return rc;
998
999 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1000 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1001 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1002 rc = -EIO;
1003 }
1004
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1007
1008 return rc;
1009 }
1010
1011 /**
1012 * iwl3945_commit_rxon - commit staging_rxon to hardware
1013 *
1014 * The RXON command in staging_rxon is committed to the hardware and
1015 * the active_rxon structure is updated with the new data. This
1016 * function correctly transitions out of the RXON_ASSOC_MSK state if
1017 * a HW tune is required based on the RXON structure changes.
1018 */
1019 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1020 {
1021 /* cast away the const for active_rxon in this function */
1022 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1023 int rc = 0;
1024
1025 if (!iwl3945_is_alive(priv))
1026 return -1;
1027
1028 /* always get timestamp with Rx frame */
1029 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1030
1031 /* select antenna */
1032 priv->staging_rxon.flags &=
1033 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1034 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1035
1036 rc = iwl3945_check_rxon_cmd(priv);
1037 if (rc) {
1038 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1039 return -EINVAL;
1040 }
1041
1042 /* If we don't need to send a full RXON, we can use
1043 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1044 * and other flags for the current radio configuration. */
1045 if (!iwl3945_full_rxon_required(priv)) {
1046 rc = iwl3945_send_rxon_assoc(priv);
1047 if (rc) {
1048 IWL_ERROR("Error setting RXON_ASSOC "
1049 "configuration (%d).\n", rc);
1050 return rc;
1051 }
1052
1053 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1054
1055 return 0;
1056 }
1057
1058 /* If we are currently associated and the new config requires
1059 * an RXON_ASSOC and the new config wants the associated mask enabled,
1060 * we must clear the associated from the active configuration
1061 * before we apply the new config */
1062 if (iwl3945_is_associated(priv) &&
1063 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1064 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1065 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1066
1067 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1068 sizeof(struct iwl3945_rxon_cmd),
1069 &priv->active_rxon);
1070
1071 /* If the mask clearing failed then we set
1072 * active_rxon back to what it was previously */
1073 if (rc) {
1074 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1075 IWL_ERROR("Error clearing ASSOC_MSK on current "
1076 "configuration (%d).\n", rc);
1077 return rc;
1078 }
1079 }
1080
1081 IWL_DEBUG_INFO("Sending RXON\n"
1082 "* with%s RXON_FILTER_ASSOC_MSK\n"
1083 "* channel = %d\n"
1084 "* bssid = %pM\n",
1085 ((priv->staging_rxon.filter_flags &
1086 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1087 le16_to_cpu(priv->staging_rxon.channel),
1088 priv->staging_rxon.bssid_addr);
1089
1090 /* Apply the new configuration */
1091 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1092 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1093 if (rc) {
1094 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1095 return rc;
1096 }
1097
1098 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1099
1100 iwl3945_clear_stations_table(priv);
1101
1102 /* If we issue a new RXON command which required a tune then we must
1103 * send a new TXPOWER command or we won't be able to Tx any frames */
1104 rc = iwl3945_hw_reg_send_txpower(priv);
1105 if (rc) {
1106 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1107 return rc;
1108 }
1109
1110 /* Add the broadcast address so we can send broadcast frames */
1111 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1112 IWL_INVALID_STATION) {
1113 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1114 return -EIO;
1115 }
1116
1117 /* If we have set the ASSOC_MSK and we are in BSS mode then
1118 * add the IWL_AP_ID to the station rate table */
1119 if (iwl3945_is_associated(priv) &&
1120 (priv->iw_mode == NL80211_IFTYPE_STATION))
1121 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1122 == IWL_INVALID_STATION) {
1123 IWL_ERROR("Error adding AP address for transmit.\n");
1124 return -EIO;
1125 }
1126
1127 /* Init the hardware's rate fallback order based on the band */
1128 rc = iwl3945_init_hw_rate_table(priv);
1129 if (rc) {
1130 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1131 return -EIO;
1132 }
1133
1134 return 0;
1135 }
1136
1137 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1138 {
1139 struct iwl_bt_cmd bt_cmd = {
1140 .flags = 3,
1141 .lead_time = 0xAA,
1142 .max_kill = 1,
1143 .kill_ack_mask = 0,
1144 .kill_cts_mask = 0,
1145 };
1146
1147 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1148 sizeof(bt_cmd), &bt_cmd);
1149 }
1150
1151 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1152 {
1153 int rc = 0;
1154 struct iwl_rx_packet *res;
1155 struct iwl3945_host_cmd cmd = {
1156 .id = REPLY_SCAN_ABORT_CMD,
1157 .meta.flags = CMD_WANT_SKB,
1158 };
1159
1160 /* If there isn't a scan actively going on in the hardware
1161 * then we are in between scan bands and not actually
1162 * actively scanning, so don't send the abort command */
1163 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1164 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1165 return 0;
1166 }
1167
1168 rc = iwl3945_send_cmd_sync(priv, &cmd);
1169 if (rc) {
1170 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1171 return rc;
1172 }
1173
1174 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1175 if (res->u.status != CAN_ABORT_STATUS) {
1176 /* The scan abort will return 1 for success or
1177 * 2 for "failure". A failure condition can be
1178 * due to simply not being in an active scan which
1179 * can occur if we send the scan abort before we
1180 * the microcode has notified us that a scan is
1181 * completed. */
1182 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1183 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1184 clear_bit(STATUS_SCAN_HW, &priv->status);
1185 }
1186
1187 dev_kfree_skb_any(cmd.meta.u.skb);
1188
1189 return rc;
1190 }
1191
1192 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1193 struct iwl3945_cmd *cmd,
1194 struct sk_buff *skb)
1195 {
1196 return 1;
1197 }
1198
1199 /*
1200 * CARD_STATE_CMD
1201 *
1202 * Use: Sets the device's internal card state to enable, disable, or halt
1203 *
1204 * When in the 'enable' state the card operates as normal.
1205 * When in the 'disable' state, the card enters into a low power mode.
1206 * When in the 'halt' state, the card is shut down and must be fully
1207 * restarted to come back on.
1208 */
1209 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1210 {
1211 struct iwl3945_host_cmd cmd = {
1212 .id = REPLY_CARD_STATE_CMD,
1213 .len = sizeof(u32),
1214 .data = &flags,
1215 .meta.flags = meta_flag,
1216 };
1217
1218 if (meta_flag & CMD_ASYNC)
1219 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1220
1221 return iwl3945_send_cmd(priv, &cmd);
1222 }
1223
1224 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1225 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1226 {
1227 struct iwl_rx_packet *res = NULL;
1228
1229 if (!skb) {
1230 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1231 return 1;
1232 }
1233
1234 res = (struct iwl_rx_packet *)skb->data;
1235 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1236 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1237 res->hdr.flags);
1238 return 1;
1239 }
1240
1241 switch (res->u.add_sta.status) {
1242 case ADD_STA_SUCCESS_MSK:
1243 break;
1244 default:
1245 break;
1246 }
1247
1248 /* We didn't cache the SKB; let the caller free it */
1249 return 1;
1250 }
1251
1252 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1253 struct iwl3945_addsta_cmd *sta, u8 flags)
1254 {
1255 struct iwl_rx_packet *res = NULL;
1256 int rc = 0;
1257 struct iwl3945_host_cmd cmd = {
1258 .id = REPLY_ADD_STA,
1259 .len = sizeof(struct iwl3945_addsta_cmd),
1260 .meta.flags = flags,
1261 .data = sta,
1262 };
1263
1264 if (flags & CMD_ASYNC)
1265 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1266 else
1267 cmd.meta.flags |= CMD_WANT_SKB;
1268
1269 rc = iwl3945_send_cmd(priv, &cmd);
1270
1271 if (rc || (flags & CMD_ASYNC))
1272 return rc;
1273
1274 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1275 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1276 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1277 res->hdr.flags);
1278 rc = -EIO;
1279 }
1280
1281 if (rc == 0) {
1282 switch (res->u.add_sta.status) {
1283 case ADD_STA_SUCCESS_MSK:
1284 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1285 break;
1286 default:
1287 rc = -EIO;
1288 IWL_WARNING("REPLY_ADD_STA failed\n");
1289 break;
1290 }
1291 }
1292
1293 priv->alloc_rxb_skb--;
1294 dev_kfree_skb_any(cmd.meta.u.skb);
1295
1296 return rc;
1297 }
1298
1299 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1300 struct ieee80211_key_conf *keyconf,
1301 u8 sta_id)
1302 {
1303 unsigned long flags;
1304 __le16 key_flags = 0;
1305
1306 switch (keyconf->alg) {
1307 case ALG_CCMP:
1308 key_flags |= STA_KEY_FLG_CCMP;
1309 key_flags |= cpu_to_le16(
1310 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1311 key_flags &= ~STA_KEY_FLG_INVALID;
1312 break;
1313 case ALG_TKIP:
1314 case ALG_WEP:
1315 default:
1316 return -EINVAL;
1317 }
1318 spin_lock_irqsave(&priv->sta_lock, flags);
1319 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1320 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1321 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1322 keyconf->keylen);
1323
1324 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1325 keyconf->keylen);
1326 priv->stations[sta_id].sta.key.key_flags = key_flags;
1327 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1328 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1329
1330 spin_unlock_irqrestore(&priv->sta_lock, flags);
1331
1332 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1333 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1334 return 0;
1335 }
1336
1337 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1338 {
1339 unsigned long flags;
1340
1341 spin_lock_irqsave(&priv->sta_lock, flags);
1342 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1343 memset(&priv->stations[sta_id].sta.key, 0,
1344 sizeof(struct iwl4965_keyinfo));
1345 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1346 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1347 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1348 spin_unlock_irqrestore(&priv->sta_lock, flags);
1349
1350 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1351 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1352 return 0;
1353 }
1354
1355 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1356 {
1357 struct list_head *element;
1358
1359 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1360 priv->frames_count);
1361
1362 while (!list_empty(&priv->free_frames)) {
1363 element = priv->free_frames.next;
1364 list_del(element);
1365 kfree(list_entry(element, struct iwl3945_frame, list));
1366 priv->frames_count--;
1367 }
1368
1369 if (priv->frames_count) {
1370 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1371 priv->frames_count);
1372 priv->frames_count = 0;
1373 }
1374 }
1375
1376 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1377 {
1378 struct iwl3945_frame *frame;
1379 struct list_head *element;
1380 if (list_empty(&priv->free_frames)) {
1381 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1382 if (!frame) {
1383 IWL_ERROR("Could not allocate frame!\n");
1384 return NULL;
1385 }
1386
1387 priv->frames_count++;
1388 return frame;
1389 }
1390
1391 element = priv->free_frames.next;
1392 list_del(element);
1393 return list_entry(element, struct iwl3945_frame, list);
1394 }
1395
1396 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1397 {
1398 memset(frame, 0, sizeof(*frame));
1399 list_add(&frame->list, &priv->free_frames);
1400 }
1401
1402 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1403 struct ieee80211_hdr *hdr,
1404 int left)
1405 {
1406
1407 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1408 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1409 (priv->iw_mode != NL80211_IFTYPE_AP)))
1410 return 0;
1411
1412 if (priv->ibss_beacon->len > left)
1413 return 0;
1414
1415 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1416
1417 return priv->ibss_beacon->len;
1418 }
1419
1420 static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv)
1421 {
1422 u8 i;
1423 int rate_mask;
1424
1425 /* Set rate mask*/
1426 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1427 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1428 else
1429 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1430
1431 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1432 i = iwl3945_rates[i].next_ieee) {
1433 if (rate_mask & (1 << i))
1434 return iwl3945_rates[i].plcp;
1435 }
1436
1437 /* No valid rate was found. Assign the lowest one */
1438 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1439 return IWL_RATE_1M_PLCP;
1440 else
1441 return IWL_RATE_6M_PLCP;
1442 }
1443
1444 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1445 {
1446 struct iwl3945_frame *frame;
1447 unsigned int frame_size;
1448 int rc;
1449 u8 rate;
1450
1451 frame = iwl3945_get_free_frame(priv);
1452
1453 if (!frame) {
1454 IWL_ERROR("Could not obtain free frame buffer for beacon "
1455 "command.\n");
1456 return -ENOMEM;
1457 }
1458
1459 rate = iwl3945_rate_get_lowest_plcp(priv);
1460
1461 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1462
1463 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1464 &frame->u.cmd[0]);
1465
1466 iwl3945_free_frame(priv, frame);
1467
1468 return rc;
1469 }
1470
1471 /******************************************************************************
1472 *
1473 * EEPROM related functions
1474 *
1475 ******************************************************************************/
1476
1477 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1478 {
1479 memcpy(mac, priv->eeprom.mac_address, 6);
1480 }
1481
1482 /*
1483 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1484 * embedded controller) as EEPROM reader; each read is a series of pulses
1485 * to/from the EEPROM chip, not a single event, so even reads could conflict
1486 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1487 * simply claims ownership, which should be safe when this function is called
1488 * (i.e. before loading uCode!).
1489 */
1490 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1491 {
1492 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1493 return 0;
1494 }
1495
1496 /**
1497 * iwl3945_eeprom_init - read EEPROM contents
1498 *
1499 * Load the EEPROM contents from adapter into priv->eeprom
1500 *
1501 * NOTE: This routine uses the non-debug IO access functions.
1502 */
1503 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1504 {
1505 u16 *e = (u16 *)&priv->eeprom;
1506 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1507 int sz = sizeof(priv->eeprom);
1508 int ret;
1509 u16 addr;
1510
1511 /* The EEPROM structure has several padding buffers within it
1512 * and when adding new EEPROM maps is subject to programmer errors
1513 * which may be very difficult to identify without explicitly
1514 * checking the resulting size of the eeprom map. */
1515 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1516
1517 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1518 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1519 return -ENOENT;
1520 }
1521
1522 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1523 ret = iwl3945_eeprom_acquire_semaphore(priv);
1524 if (ret < 0) {
1525 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1526 return -ENOENT;
1527 }
1528
1529 /* eeprom is an array of 16bit values */
1530 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1531 u32 r;
1532
1533 _iwl3945_write32(priv, CSR_EEPROM_REG,
1534 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1535 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1536 ret = iwl3945_poll_direct_bit(priv, CSR_EEPROM_REG,
1537 CSR_EEPROM_REG_READ_VALID_MSK,
1538 IWL_EEPROM_ACCESS_TIMEOUT);
1539 if (ret < 0) {
1540 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1541 return ret;
1542 }
1543
1544 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1545 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1546 }
1547
1548 return 0;
1549 }
1550
1551 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1552 {
1553 if (priv->hw_setting.shared_virt)
1554 pci_free_consistent(priv->pci_dev,
1555 sizeof(struct iwl3945_shared),
1556 priv->hw_setting.shared_virt,
1557 priv->hw_setting.shared_phys);
1558 }
1559
1560 /**
1561 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1562 *
1563 * return : set the bit for each supported rate insert in ie
1564 */
1565 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1566 u16 basic_rate, int *left)
1567 {
1568 u16 ret_rates = 0, bit;
1569 int i;
1570 u8 *cnt = ie;
1571 u8 *rates = ie + 1;
1572
1573 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1574 if (bit & supported_rate) {
1575 ret_rates |= bit;
1576 rates[*cnt] = iwl3945_rates[i].ieee |
1577 ((bit & basic_rate) ? 0x80 : 0x00);
1578 (*cnt)++;
1579 (*left)--;
1580 if ((*left <= 0) ||
1581 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1582 break;
1583 }
1584 }
1585
1586 return ret_rates;
1587 }
1588
1589 /**
1590 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1591 */
1592 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1593 struct ieee80211_mgmt *frame,
1594 int left)
1595 {
1596 int len = 0;
1597 u8 *pos = NULL;
1598 u16 active_rates, ret_rates, cck_rates;
1599
1600 /* Make sure there is enough space for the probe request,
1601 * two mandatory IEs and the data */
1602 left -= 24;
1603 if (left < 0)
1604 return 0;
1605 len += 24;
1606
1607 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1608 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1609 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1610 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1611 frame->seq_ctrl = 0;
1612
1613 /* fill in our indirect SSID IE */
1614 /* ...next IE... */
1615
1616 left -= 2;
1617 if (left < 0)
1618 return 0;
1619 len += 2;
1620 pos = &(frame->u.probe_req.variable[0]);
1621 *pos++ = WLAN_EID_SSID;
1622 *pos++ = 0;
1623
1624 /* fill in supported rate */
1625 /* ...next IE... */
1626 left -= 2;
1627 if (left < 0)
1628 return 0;
1629
1630 /* ... fill it in... */
1631 *pos++ = WLAN_EID_SUPP_RATES;
1632 *pos = 0;
1633
1634 priv->active_rate = priv->rates_mask;
1635 active_rates = priv->active_rate;
1636 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1637
1638 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1639 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1640 priv->active_rate_basic, &left);
1641 active_rates &= ~ret_rates;
1642
1643 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1644 priv->active_rate_basic, &left);
1645 active_rates &= ~ret_rates;
1646
1647 len += 2 + *pos;
1648 pos += (*pos) + 1;
1649 if (active_rates == 0)
1650 goto fill_end;
1651
1652 /* fill in supported extended rate */
1653 /* ...next IE... */
1654 left -= 2;
1655 if (left < 0)
1656 return 0;
1657 /* ... fill it in... */
1658 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1659 *pos = 0;
1660 iwl3945_supported_rate_to_ie(pos, active_rates,
1661 priv->active_rate_basic, &left);
1662 if (*pos > 0)
1663 len += 2 + *pos;
1664
1665 fill_end:
1666 return (u16)len;
1667 }
1668
1669 /*
1670 * QoS support
1671 */
1672 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1673 struct iwl_qosparam_cmd *qos)
1674 {
1675
1676 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1677 sizeof(struct iwl_qosparam_cmd), qos);
1678 }
1679
1680 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1681 {
1682 u16 cw_min = 15;
1683 u16 cw_max = 1023;
1684 u8 aifs = 2;
1685 u8 is_legacy = 0;
1686 unsigned long flags;
1687 int i;
1688
1689 spin_lock_irqsave(&priv->lock, flags);
1690 priv->qos_data.qos_active = 0;
1691
1692 /* QoS always active in AP and ADHOC mode
1693 * In STA mode wait for association
1694 */
1695 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1696 priv->iw_mode == NL80211_IFTYPE_AP)
1697 priv->qos_data.qos_active = 1;
1698 else
1699 priv->qos_data.qos_active = 0;
1700
1701
1702 /* check for legacy mode */
1703 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1704 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1705 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1706 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1707 cw_min = 31;
1708 is_legacy = 1;
1709 }
1710
1711 if (priv->qos_data.qos_active)
1712 aifs = 3;
1713
1714 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1715 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1716 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1717 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1718 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1719
1720 if (priv->qos_data.qos_active) {
1721 i = 1;
1722 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1723 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1724 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1725 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1726 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1727
1728 i = 2;
1729 priv->qos_data.def_qos_parm.ac[i].cw_min =
1730 cpu_to_le16((cw_min + 1) / 2 - 1);
1731 priv->qos_data.def_qos_parm.ac[i].cw_max =
1732 cpu_to_le16(cw_max);
1733 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1734 if (is_legacy)
1735 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1736 cpu_to_le16(6016);
1737 else
1738 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1739 cpu_to_le16(3008);
1740 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1741
1742 i = 3;
1743 priv->qos_data.def_qos_parm.ac[i].cw_min =
1744 cpu_to_le16((cw_min + 1) / 4 - 1);
1745 priv->qos_data.def_qos_parm.ac[i].cw_max =
1746 cpu_to_le16((cw_max + 1) / 2 - 1);
1747 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1748 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1749 if (is_legacy)
1750 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1751 cpu_to_le16(3264);
1752 else
1753 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1754 cpu_to_le16(1504);
1755 } else {
1756 for (i = 1; i < 4; i++) {
1757 priv->qos_data.def_qos_parm.ac[i].cw_min =
1758 cpu_to_le16(cw_min);
1759 priv->qos_data.def_qos_parm.ac[i].cw_max =
1760 cpu_to_le16(cw_max);
1761 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1762 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1763 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1764 }
1765 }
1766 IWL_DEBUG_QOS("set QoS to default \n");
1767
1768 spin_unlock_irqrestore(&priv->lock, flags);
1769 }
1770
1771 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1772 {
1773 unsigned long flags;
1774
1775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1776 return;
1777
1778 spin_lock_irqsave(&priv->lock, flags);
1779 priv->qos_data.def_qos_parm.qos_flags = 0;
1780
1781 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1782 !priv->qos_data.qos_cap.q_AP.txop_request)
1783 priv->qos_data.def_qos_parm.qos_flags |=
1784 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1785
1786 if (priv->qos_data.qos_active)
1787 priv->qos_data.def_qos_parm.qos_flags |=
1788 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1789
1790 spin_unlock_irqrestore(&priv->lock, flags);
1791
1792 if (force || iwl3945_is_associated(priv)) {
1793 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1794 priv->qos_data.qos_active);
1795
1796 iwl3945_send_qos_params_command(priv,
1797 &(priv->qos_data.def_qos_parm));
1798 }
1799 }
1800
1801 /*
1802 * Power management (not Tx power!) functions
1803 */
1804 #define MSEC_TO_USEC 1024
1805
1806
1807 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1808 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1809 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1810 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1811 __constant_cpu_to_le32(X1), \
1812 __constant_cpu_to_le32(X2), \
1813 __constant_cpu_to_le32(X3), \
1814 __constant_cpu_to_le32(X4)}
1815
1816 /* default power management (not Tx power) table values */
1817 /* for TIM 0-10 */
1818 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1819 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1820 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1821 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1822 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1823 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1824 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1825 };
1826
1827 /* for TIM > 10 */
1828 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1829 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1830 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1831 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1832 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1833 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1834 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1835 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1836 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1837 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1838 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1839 };
1840
1841 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1842 {
1843 int rc = 0, i;
1844 struct iwl3945_power_mgr *pow_data;
1845 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1846 u16 pci_pm;
1847
1848 IWL_DEBUG_POWER("Initialize power \n");
1849
1850 pow_data = &(priv->power_data);
1851
1852 memset(pow_data, 0, sizeof(*pow_data));
1853
1854 pow_data->active_index = IWL_POWER_RANGE_0;
1855 pow_data->dtim_val = 0xffff;
1856
1857 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1858 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1859
1860 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1861 if (rc != 0)
1862 return 0;
1863 else {
1864 struct iwl_powertable_cmd *cmd;
1865
1866 IWL_DEBUG_POWER("adjust power command flags\n");
1867
1868 for (i = 0; i < IWL39_POWER_AC; i++) {
1869 cmd = &pow_data->pwr_range_0[i].cmd;
1870
1871 if (pci_pm & 0x1)
1872 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1873 else
1874 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1875 }
1876 }
1877 return rc;
1878 }
1879
1880 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1881 struct iwl_powertable_cmd *cmd, u32 mode)
1882 {
1883 int rc = 0, i;
1884 u8 skip;
1885 u32 max_sleep = 0;
1886 struct iwl_power_vec_entry *range;
1887 u8 period = 0;
1888 struct iwl3945_power_mgr *pow_data;
1889
1890 if (mode > IWL_POWER_INDEX_5) {
1891 IWL_DEBUG_POWER("Error invalid power mode \n");
1892 return -1;
1893 }
1894 pow_data = &(priv->power_data);
1895
1896 if (pow_data->active_index == IWL_POWER_RANGE_0)
1897 range = &pow_data->pwr_range_0[0];
1898 else
1899 range = &pow_data->pwr_range_1[1];
1900
1901 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1902
1903 #ifdef IWL_MAC80211_DISABLE
1904 if (priv->assoc_network != NULL) {
1905 unsigned long flags;
1906
1907 period = priv->assoc_network->tim.tim_period;
1908 }
1909 #endif /*IWL_MAC80211_DISABLE */
1910 skip = range[mode].no_dtim;
1911
1912 if (period == 0) {
1913 period = 1;
1914 skip = 0;
1915 }
1916
1917 if (skip == 0) {
1918 max_sleep = period;
1919 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1920 } else {
1921 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1922 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1923 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1924 }
1925
1926 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1927 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1928 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1929 }
1930
1931 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1932 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1933 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1934 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1935 le32_to_cpu(cmd->sleep_interval[0]),
1936 le32_to_cpu(cmd->sleep_interval[1]),
1937 le32_to_cpu(cmd->sleep_interval[2]),
1938 le32_to_cpu(cmd->sleep_interval[3]),
1939 le32_to_cpu(cmd->sleep_interval[4]));
1940
1941 return rc;
1942 }
1943
1944 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
1945 {
1946 u32 uninitialized_var(final_mode);
1947 int rc;
1948 struct iwl_powertable_cmd cmd;
1949
1950 /* If on battery, set to 3,
1951 * if plugged into AC power, set to CAM ("continuously aware mode"),
1952 * else user level */
1953 switch (mode) {
1954 case IWL39_POWER_BATTERY:
1955 final_mode = IWL_POWER_INDEX_3;
1956 break;
1957 case IWL39_POWER_AC:
1958 final_mode = IWL_POWER_MODE_CAM;
1959 break;
1960 default:
1961 final_mode = mode;
1962 break;
1963 }
1964
1965 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1966
1967 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1968 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1969 sizeof(struct iwl3945_powertable_cmd), &cmd);
1970
1971 if (final_mode == IWL_POWER_MODE_CAM)
1972 clear_bit(STATUS_POWER_PMI, &priv->status);
1973 else
1974 set_bit(STATUS_POWER_PMI, &priv->status);
1975
1976 return rc;
1977 }
1978
1979 /**
1980 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1981 *
1982 * NOTE: priv->mutex is not required before calling this function
1983 */
1984 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
1985 {
1986 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1987 clear_bit(STATUS_SCANNING, &priv->status);
1988 return 0;
1989 }
1990
1991 if (test_bit(STATUS_SCANNING, &priv->status)) {
1992 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1993 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1994 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1995 queue_work(priv->workqueue, &priv->abort_scan);
1996
1997 } else
1998 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1999
2000 return test_bit(STATUS_SCANNING, &priv->status);
2001 }
2002
2003 return 0;
2004 }
2005
2006 /**
2007 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2008 * @ms: amount of time to wait (in milliseconds) for scan to abort
2009 *
2010 * NOTE: priv->mutex must be held before calling this function
2011 */
2012 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2013 {
2014 unsigned long now = jiffies;
2015 int ret;
2016
2017 ret = iwl3945_scan_cancel(priv);
2018 if (ret && ms) {
2019 mutex_unlock(&priv->mutex);
2020 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2021 test_bit(STATUS_SCANNING, &priv->status))
2022 msleep(1);
2023 mutex_lock(&priv->mutex);
2024
2025 return test_bit(STATUS_SCANNING, &priv->status);
2026 }
2027
2028 return ret;
2029 }
2030
2031 #define MAX_UCODE_BEACON_INTERVAL 1024
2032 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2033
2034 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2035 {
2036 u16 new_val = 0;
2037 u16 beacon_factor = 0;
2038
2039 beacon_factor =
2040 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2041 / MAX_UCODE_BEACON_INTERVAL;
2042 new_val = beacon_val / beacon_factor;
2043
2044 return cpu_to_le16(new_val);
2045 }
2046
2047 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2048 {
2049 u64 interval_tm_unit;
2050 u64 tsf, result;
2051 unsigned long flags;
2052 struct ieee80211_conf *conf = NULL;
2053 u16 beacon_int = 0;
2054
2055 conf = ieee80211_get_hw_conf(priv->hw);
2056
2057 spin_lock_irqsave(&priv->lock, flags);
2058 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
2059 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2060
2061 tsf = priv->timestamp;
2062
2063 beacon_int = priv->beacon_int;
2064 spin_unlock_irqrestore(&priv->lock, flags);
2065
2066 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
2067 if (beacon_int == 0) {
2068 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2069 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2070 } else {
2071 priv->rxon_timing.beacon_interval =
2072 cpu_to_le16(beacon_int);
2073 priv->rxon_timing.beacon_interval =
2074 iwl3945_adjust_beacon_interval(
2075 le16_to_cpu(priv->rxon_timing.beacon_interval));
2076 }
2077
2078 priv->rxon_timing.atim_window = 0;
2079 } else {
2080 priv->rxon_timing.beacon_interval =
2081 iwl3945_adjust_beacon_interval(conf->beacon_int);
2082 /* TODO: we need to get atim_window from upper stack
2083 * for now we set to 0 */
2084 priv->rxon_timing.atim_window = 0;
2085 }
2086
2087 interval_tm_unit =
2088 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2089 result = do_div(tsf, interval_tm_unit);
2090 priv->rxon_timing.beacon_init_val =
2091 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2092
2093 IWL_DEBUG_ASSOC
2094 ("beacon interval %d beacon timer %d beacon tim %d\n",
2095 le16_to_cpu(priv->rxon_timing.beacon_interval),
2096 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2097 le16_to_cpu(priv->rxon_timing.atim_window));
2098 }
2099
2100 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2101 {
2102 if (!iwl3945_is_ready_rf(priv)) {
2103 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2104 return -EIO;
2105 }
2106
2107 if (test_bit(STATUS_SCANNING, &priv->status)) {
2108 IWL_DEBUG_SCAN("Scan already in progress.\n");
2109 return -EAGAIN;
2110 }
2111
2112 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2113 IWL_DEBUG_SCAN("Scan request while abort pending. "
2114 "Queuing.\n");
2115 return -EAGAIN;
2116 }
2117
2118 IWL_DEBUG_INFO("Starting scan...\n");
2119 if (priv->cfg->sku & IWL_SKU_G)
2120 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2121 if (priv->cfg->sku & IWL_SKU_A)
2122 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2123 set_bit(STATUS_SCANNING, &priv->status);
2124 priv->scan_start = jiffies;
2125 priv->scan_pass_start = priv->scan_start;
2126
2127 queue_work(priv->workqueue, &priv->request_scan);
2128
2129 return 0;
2130 }
2131
2132 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2133 {
2134 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2135
2136 if (hw_decrypt)
2137 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2138 else
2139 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2140
2141 return 0;
2142 }
2143
2144 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2145 enum ieee80211_band band)
2146 {
2147 if (band == IEEE80211_BAND_5GHZ) {
2148 priv->staging_rxon.flags &=
2149 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2150 | RXON_FLG_CCK_MSK);
2151 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2152 } else {
2153 /* Copied from iwl3945_bg_post_associate() */
2154 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2155 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2156 else
2157 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2158
2159 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2160 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2161
2162 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2163 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2164 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2165 }
2166 }
2167
2168 /*
2169 * initialize rxon structure with default values from eeprom
2170 */
2171 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv,
2172 int mode)
2173 {
2174 const struct iwl3945_channel_info *ch_info;
2175
2176 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2177
2178 switch (mode) {
2179 case NL80211_IFTYPE_AP:
2180 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2181 break;
2182
2183 case NL80211_IFTYPE_STATION:
2184 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2185 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2186 break;
2187
2188 case NL80211_IFTYPE_ADHOC:
2189 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2190 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2191 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2192 RXON_FILTER_ACCEPT_GRP_MSK;
2193 break;
2194
2195 case NL80211_IFTYPE_MONITOR:
2196 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2197 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2198 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2199 break;
2200 default:
2201 IWL_ERROR("Unsupported interface type %d\n", mode);
2202 break;
2203 }
2204
2205 #if 0
2206 /* TODO: Figure out when short_preamble would be set and cache from
2207 * that */
2208 if (!hw_to_local(priv->hw)->short_preamble)
2209 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2210 else
2211 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2212 #endif
2213
2214 ch_info = iwl3945_get_channel_info(priv, priv->band,
2215 le16_to_cpu(priv->active_rxon.channel));
2216
2217 if (!ch_info)
2218 ch_info = &priv->channel_info[0];
2219
2220 /*
2221 * in some case A channels are all non IBSS
2222 * in this case force B/G channel
2223 */
2224 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2225 ch_info = &priv->channel_info[0];
2226
2227 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2228 if (is_channel_a_band(ch_info))
2229 priv->band = IEEE80211_BAND_5GHZ;
2230 else
2231 priv->band = IEEE80211_BAND_2GHZ;
2232
2233 iwl3945_set_flags_for_phymode(priv, priv->band);
2234
2235 priv->staging_rxon.ofdm_basic_rates =
2236 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2237 priv->staging_rxon.cck_basic_rates =
2238 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2239 }
2240
2241 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2242 {
2243 if (mode == NL80211_IFTYPE_ADHOC) {
2244 const struct iwl3945_channel_info *ch_info;
2245
2246 ch_info = iwl3945_get_channel_info(priv,
2247 priv->band,
2248 le16_to_cpu(priv->staging_rxon.channel));
2249
2250 if (!ch_info || !is_channel_ibss(ch_info)) {
2251 IWL_ERROR("channel %d not IBSS channel\n",
2252 le16_to_cpu(priv->staging_rxon.channel));
2253 return -EINVAL;
2254 }
2255 }
2256
2257 iwl3945_connection_init_rx_config(priv, mode);
2258 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2259
2260 iwl3945_clear_stations_table(priv);
2261
2262 /* don't commit rxon if rf-kill is on*/
2263 if (!iwl3945_is_ready_rf(priv))
2264 return -EAGAIN;
2265
2266 cancel_delayed_work(&priv->scan_check);
2267 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2268 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2269 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2270 return -EAGAIN;
2271 }
2272
2273 iwl3945_commit_rxon(priv);
2274
2275 return 0;
2276 }
2277
2278 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2279 struct ieee80211_tx_info *info,
2280 struct iwl3945_cmd *cmd,
2281 struct sk_buff *skb_frag,
2282 int last_frag)
2283 {
2284 struct iwl3945_hw_key *keyinfo =
2285 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2286
2287 switch (keyinfo->alg) {
2288 case ALG_CCMP:
2289 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2290 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2291 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2292 break;
2293
2294 case ALG_TKIP:
2295 #if 0
2296 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2297
2298 if (last_frag)
2299 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2300 8);
2301 else
2302 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2303 #endif
2304 break;
2305
2306 case ALG_WEP:
2307 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2308 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2309
2310 if (keyinfo->keylen == 13)
2311 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2312
2313 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2314
2315 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2316 "with key %d\n", info->control.hw_key->hw_key_idx);
2317 break;
2318
2319 default:
2320 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2321 break;
2322 }
2323 }
2324
2325 /*
2326 * handle build REPLY_TX command notification.
2327 */
2328 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2329 struct iwl3945_cmd *cmd,
2330 struct ieee80211_tx_info *info,
2331 struct ieee80211_hdr *hdr,
2332 int is_unicast, u8 std_id)
2333 {
2334 __le16 fc = hdr->frame_control;
2335 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2336 u8 rc_flags = info->control.rates[0].flags;
2337
2338 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2339 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2340 tx_flags |= TX_CMD_FLG_ACK_MSK;
2341 if (ieee80211_is_mgmt(fc))
2342 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2343 if (ieee80211_is_probe_resp(fc) &&
2344 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2345 tx_flags |= TX_CMD_FLG_TSF_MSK;
2346 } else {
2347 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2348 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2349 }
2350
2351 cmd->cmd.tx.sta_id = std_id;
2352 if (ieee80211_has_morefrags(fc))
2353 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2354
2355 if (ieee80211_is_data_qos(fc)) {
2356 u8 *qc = ieee80211_get_qos_ctl(hdr);
2357 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2358 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2359 } else {
2360 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2361 }
2362
2363 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2364 tx_flags |= TX_CMD_FLG_RTS_MSK;
2365 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2366 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2367 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2368 tx_flags |= TX_CMD_FLG_CTS_MSK;
2369 }
2370
2371 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2372 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2373
2374 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2375 if (ieee80211_is_mgmt(fc)) {
2376 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2377 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2378 else
2379 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2380 } else {
2381 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2382 #ifdef CONFIG_IWL3945_LEDS
2383 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2384 #endif
2385 }
2386
2387 cmd->cmd.tx.driver_txop = 0;
2388 cmd->cmd.tx.tx_flags = tx_flags;
2389 cmd->cmd.tx.next_frame_len = 0;
2390 }
2391
2392 /**
2393 * iwl3945_get_sta_id - Find station's index within station table
2394 */
2395 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2396 {
2397 int sta_id;
2398 u16 fc = le16_to_cpu(hdr->frame_control);
2399
2400 /* If this frame is broadcast or management, use broadcast station id */
2401 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2402 is_multicast_ether_addr(hdr->addr1))
2403 return priv->hw_setting.bcast_sta_id;
2404
2405 switch (priv->iw_mode) {
2406
2407 /* If we are a client station in a BSS network, use the special
2408 * AP station entry (that's the only station we communicate with) */
2409 case NL80211_IFTYPE_STATION:
2410 return IWL_AP_ID;
2411
2412 /* If we are an AP, then find the station, or use BCAST */
2413 case NL80211_IFTYPE_AP:
2414 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2415 if (sta_id != IWL_INVALID_STATION)
2416 return sta_id;
2417 return priv->hw_setting.bcast_sta_id;
2418
2419 /* If this frame is going out to an IBSS network, find the station,
2420 * or create a new station table entry */
2421 case NL80211_IFTYPE_ADHOC: {
2422 /* Create new station table entry */
2423 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2424 if (sta_id != IWL_INVALID_STATION)
2425 return sta_id;
2426
2427 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2428
2429 if (sta_id != IWL_INVALID_STATION)
2430 return sta_id;
2431
2432 IWL_DEBUG_DROP("Station %pM not in station map. "
2433 "Defaulting to broadcast...\n",
2434 hdr->addr1);
2435 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2436 return priv->hw_setting.bcast_sta_id;
2437 }
2438 /* If we are in monitor mode, use BCAST. This is required for
2439 * packet injection. */
2440 case NL80211_IFTYPE_MONITOR:
2441 return priv->hw_setting.bcast_sta_id;
2442
2443 default:
2444 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2445 return priv->hw_setting.bcast_sta_id;
2446 }
2447 }
2448
2449 /*
2450 * start REPLY_TX command process
2451 */
2452 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2453 {
2454 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2455 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2456 struct iwl3945_tfd_frame *tfd;
2457 u32 *control_flags;
2458 int txq_id = skb_get_queue_mapping(skb);
2459 struct iwl3945_tx_queue *txq = NULL;
2460 struct iwl3945_queue *q = NULL;
2461 dma_addr_t phys_addr;
2462 dma_addr_t txcmd_phys;
2463 struct iwl3945_cmd *out_cmd = NULL;
2464 u16 len, idx, len_org, hdr_len;
2465 u8 id;
2466 u8 unicast;
2467 u8 sta_id;
2468 u8 tid = 0;
2469 u16 seq_number = 0;
2470 __le16 fc;
2471 u8 wait_write_ptr = 0;
2472 u8 *qc = NULL;
2473 unsigned long flags;
2474 int rc;
2475
2476 spin_lock_irqsave(&priv->lock, flags);
2477 if (iwl3945_is_rfkill(priv)) {
2478 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2479 goto drop_unlock;
2480 }
2481
2482 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2483 IWL_ERROR("ERROR: No TX rate available.\n");
2484 goto drop_unlock;
2485 }
2486
2487 unicast = !is_multicast_ether_addr(hdr->addr1);
2488 id = 0;
2489
2490 fc = hdr->frame_control;
2491
2492 #ifdef CONFIG_IWL3945_DEBUG
2493 if (ieee80211_is_auth(fc))
2494 IWL_DEBUG_TX("Sending AUTH frame\n");
2495 else if (ieee80211_is_assoc_req(fc))
2496 IWL_DEBUG_TX("Sending ASSOC frame\n");
2497 else if (ieee80211_is_reassoc_req(fc))
2498 IWL_DEBUG_TX("Sending REASSOC frame\n");
2499 #endif
2500
2501 /* drop all data frame if we are not associated */
2502 if (ieee80211_is_data(fc) &&
2503 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2504 (!iwl3945_is_associated(priv) ||
2505 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2506 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2507 goto drop_unlock;
2508 }
2509
2510 spin_unlock_irqrestore(&priv->lock, flags);
2511
2512 hdr_len = ieee80211_hdrlen(fc);
2513
2514 /* Find (or create) index into station table for destination station */
2515 sta_id = iwl3945_get_sta_id(priv, hdr);
2516 if (sta_id == IWL_INVALID_STATION) {
2517 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2518 hdr->addr1);
2519 goto drop;
2520 }
2521
2522 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2523
2524 if (ieee80211_is_data_qos(fc)) {
2525 qc = ieee80211_get_qos_ctl(hdr);
2526 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2527 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2528 IEEE80211_SCTL_SEQ;
2529 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2530 (hdr->seq_ctrl &
2531 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2532 seq_number += 0x10;
2533 }
2534
2535 /* Descriptor for chosen Tx queue */
2536 txq = &priv->txq[txq_id];
2537 q = &txq->q;
2538
2539 spin_lock_irqsave(&priv->lock, flags);
2540
2541 /* Set up first empty TFD within this queue's circular TFD buffer */
2542 tfd = &txq->bd[q->write_ptr];
2543 memset(tfd, 0, sizeof(*tfd));
2544 control_flags = (u32 *) tfd;
2545 idx = get_cmd_index(q, q->write_ptr, 0);
2546
2547 /* Set up driver data for this TFD */
2548 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2549 txq->txb[q->write_ptr].skb[0] = skb;
2550
2551 /* Init first empty entry in queue's array of Tx/cmd buffers */
2552 out_cmd = &txq->cmd[idx];
2553 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2554 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2555
2556 /*
2557 * Set up the Tx-command (not MAC!) header.
2558 * Store the chosen Tx queue and TFD index within the sequence field;
2559 * after Tx, uCode's Tx response will return this value so driver can
2560 * locate the frame within the tx queue and do post-tx processing.
2561 */
2562 out_cmd->hdr.cmd = REPLY_TX;
2563 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2564 INDEX_TO_SEQ(q->write_ptr)));
2565
2566 /* Copy MAC header from skb into command buffer */
2567 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2568
2569 /*
2570 * Use the first empty entry in this queue's command buffer array
2571 * to contain the Tx command and MAC header concatenated together
2572 * (payload data will be in another buffer).
2573 * Size of this varies, due to varying MAC header length.
2574 * If end is not dword aligned, we'll have 2 extra bytes at the end
2575 * of the MAC header (device reads on dword boundaries).
2576 * We'll tell device about this padding later.
2577 */
2578 len = priv->hw_setting.tx_cmd_len +
2579 sizeof(struct iwl_cmd_header) + hdr_len;
2580
2581 len_org = len;
2582 len = (len + 3) & ~3;
2583
2584 if (len_org != len)
2585 len_org = 1;
2586 else
2587 len_org = 0;
2588
2589 /* Physical address of this Tx command's header (not MAC header!),
2590 * within command buffer array. */
2591 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2592 offsetof(struct iwl3945_cmd, hdr);
2593
2594 /* Add buffer containing Tx command and MAC(!) header to TFD's
2595 * first entry */
2596 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2597
2598 if (info->control.hw_key)
2599 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2600
2601 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2602 * if any (802.11 null frames have no payload). */
2603 len = skb->len - hdr_len;
2604 if (len) {
2605 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2606 len, PCI_DMA_TODEVICE);
2607 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2608 }
2609
2610 if (!len)
2611 /* If there is no payload, then we use only one Tx buffer */
2612 *control_flags = TFD_CTL_COUNT_SET(1);
2613 else
2614 /* Else use 2 buffers.
2615 * Tell 3945 about any padding after MAC header */
2616 *control_flags = TFD_CTL_COUNT_SET(2) |
2617 TFD_CTL_PAD_SET(U32_PAD(len));
2618
2619 /* Total # bytes to be transmitted */
2620 len = (u16)skb->len;
2621 out_cmd->cmd.tx.len = cpu_to_le16(len);
2622
2623 /* TODO need this for burst mode later on */
2624 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2625
2626 /* set is_hcca to 0; it probably will never be implemented */
2627 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2628
2629 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2630 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2631
2632 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2633 txq->need_update = 1;
2634 if (qc)
2635 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2636 } else {
2637 wait_write_ptr = 1;
2638 txq->need_update = 0;
2639 }
2640
2641 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2642 sizeof(out_cmd->cmd.tx));
2643
2644 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2645 ieee80211_hdrlen(fc));
2646
2647 /* Tell device the write index *just past* this latest filled TFD */
2648 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2649 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2650 spin_unlock_irqrestore(&priv->lock, flags);
2651
2652 if (rc)
2653 return rc;
2654
2655 if ((iwl3945_queue_space(q) < q->high_mark)
2656 && priv->mac80211_registered) {
2657 if (wait_write_ptr) {
2658 spin_lock_irqsave(&priv->lock, flags);
2659 txq->need_update = 1;
2660 iwl3945_tx_queue_update_write_ptr(priv, txq);
2661 spin_unlock_irqrestore(&priv->lock, flags);
2662 }
2663
2664 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2665 }
2666
2667 return 0;
2668
2669 drop_unlock:
2670 spin_unlock_irqrestore(&priv->lock, flags);
2671 drop:
2672 return -1;
2673 }
2674
2675 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2676 {
2677 const struct ieee80211_supported_band *sband = NULL;
2678 struct ieee80211_rate *rate;
2679 int i;
2680
2681 sband = iwl3945_get_band(priv, priv->band);
2682 if (!sband) {
2683 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2684 return;
2685 }
2686
2687 priv->active_rate = 0;
2688 priv->active_rate_basic = 0;
2689
2690 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2691 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2692
2693 for (i = 0; i < sband->n_bitrates; i++) {
2694 rate = &sband->bitrates[i];
2695 if ((rate->hw_value < IWL_RATE_COUNT) &&
2696 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2697 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2698 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2699 priv->active_rate |= (1 << rate->hw_value);
2700 }
2701 }
2702
2703 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2704 priv->active_rate, priv->active_rate_basic);
2705
2706 /*
2707 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2708 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2709 * OFDM
2710 */
2711 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2712 priv->staging_rxon.cck_basic_rates =
2713 ((priv->active_rate_basic &
2714 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2715 else
2716 priv->staging_rxon.cck_basic_rates =
2717 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2718
2719 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2720 priv->staging_rxon.ofdm_basic_rates =
2721 ((priv->active_rate_basic &
2722 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2723 IWL_FIRST_OFDM_RATE) & 0xFF;
2724 else
2725 priv->staging_rxon.ofdm_basic_rates =
2726 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2727 }
2728
2729 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2730 {
2731 unsigned long flags;
2732
2733 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2734 return;
2735
2736 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2737 disable_radio ? "OFF" : "ON");
2738
2739 if (disable_radio) {
2740 iwl3945_scan_cancel(priv);
2741 /* FIXME: This is a workaround for AP */
2742 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2743 spin_lock_irqsave(&priv->lock, flags);
2744 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2745 CSR_UCODE_SW_BIT_RFKILL);
2746 spin_unlock_irqrestore(&priv->lock, flags);
2747 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2748 set_bit(STATUS_RF_KILL_SW, &priv->status);
2749 }
2750 return;
2751 }
2752
2753 spin_lock_irqsave(&priv->lock, flags);
2754 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2755
2756 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2757 spin_unlock_irqrestore(&priv->lock, flags);
2758
2759 /* wake up ucode */
2760 msleep(10);
2761
2762 spin_lock_irqsave(&priv->lock, flags);
2763 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2764 if (!iwl3945_grab_nic_access(priv))
2765 iwl3945_release_nic_access(priv);
2766 spin_unlock_irqrestore(&priv->lock, flags);
2767
2768 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2769 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2770 "disabled by HW switch\n");
2771 return;
2772 }
2773
2774 if (priv->is_open)
2775 queue_work(priv->workqueue, &priv->restart);
2776 return;
2777 }
2778
2779 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2780 u32 decrypt_res, struct ieee80211_rx_status *stats)
2781 {
2782 u16 fc =
2783 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2784
2785 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2786 return;
2787
2788 if (!(fc & IEEE80211_FCTL_PROTECTED))
2789 return;
2790
2791 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2792 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2793 case RX_RES_STATUS_SEC_TYPE_TKIP:
2794 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2795 RX_RES_STATUS_BAD_ICV_MIC)
2796 stats->flag |= RX_FLAG_MMIC_ERROR;
2797 case RX_RES_STATUS_SEC_TYPE_WEP:
2798 case RX_RES_STATUS_SEC_TYPE_CCMP:
2799 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2800 RX_RES_STATUS_DECRYPT_OK) {
2801 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2802 stats->flag |= RX_FLAG_DECRYPTED;
2803 }
2804 break;
2805
2806 default:
2807 break;
2808 }
2809 }
2810
2811 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2812
2813 #include "iwl-spectrum.h"
2814
2815 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2816 #define BEACON_TIME_MASK_HIGH 0xFF000000
2817 #define TIME_UNIT 1024
2818
2819 /*
2820 * extended beacon time format
2821 * time in usec will be changed into a 32-bit value in 8:24 format
2822 * the high 1 byte is the beacon counts
2823 * the lower 3 bytes is the time in usec within one beacon interval
2824 */
2825
2826 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2827 {
2828 u32 quot;
2829 u32 rem;
2830 u32 interval = beacon_interval * 1024;
2831
2832 if (!interval || !usec)
2833 return 0;
2834
2835 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2836 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2837
2838 return (quot << 24) + rem;
2839 }
2840
2841 /* base is usually what we get from ucode with each received frame,
2842 * the same as HW timer counter counting down
2843 */
2844
2845 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2846 {
2847 u32 base_low = base & BEACON_TIME_MASK_LOW;
2848 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2849 u32 interval = beacon_interval * TIME_UNIT;
2850 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2851 (addon & BEACON_TIME_MASK_HIGH);
2852
2853 if (base_low > addon_low)
2854 res += base_low - addon_low;
2855 else if (base_low < addon_low) {
2856 res += interval + base_low - addon_low;
2857 res += (1 << 24);
2858 } else
2859 res += (1 << 24);
2860
2861 return cpu_to_le32(res);
2862 }
2863
2864 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2865 struct ieee80211_measurement_params *params,
2866 u8 type)
2867 {
2868 struct iwl_spectrum_cmd spectrum;
2869 struct iwl_rx_packet *res;
2870 struct iwl3945_host_cmd cmd = {
2871 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2872 .data = (void *)&spectrum,
2873 .meta.flags = CMD_WANT_SKB,
2874 };
2875 u32 add_time = le64_to_cpu(params->start_time);
2876 int rc;
2877 int spectrum_resp_status;
2878 int duration = le16_to_cpu(params->duration);
2879
2880 if (iwl3945_is_associated(priv))
2881 add_time =
2882 iwl3945_usecs_to_beacons(
2883 le64_to_cpu(params->start_time) - priv->last_tsf,
2884 le16_to_cpu(priv->rxon_timing.beacon_interval));
2885
2886 memset(&spectrum, 0, sizeof(spectrum));
2887
2888 spectrum.channel_count = cpu_to_le16(1);
2889 spectrum.flags =
2890 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2891 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2892 cmd.len = sizeof(spectrum);
2893 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2894
2895 if (iwl3945_is_associated(priv))
2896 spectrum.start_time =
2897 iwl3945_add_beacon_time(priv->last_beacon_time,
2898 add_time,
2899 le16_to_cpu(priv->rxon_timing.beacon_interval));
2900 else
2901 spectrum.start_time = 0;
2902
2903 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2904 spectrum.channels[0].channel = params->channel;
2905 spectrum.channels[0].type = type;
2906 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2907 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2908 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2909
2910 rc = iwl3945_send_cmd_sync(priv, &cmd);
2911 if (rc)
2912 return rc;
2913
2914 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2915 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2916 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2917 rc = -EIO;
2918 }
2919
2920 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2921 switch (spectrum_resp_status) {
2922 case 0: /* Command will be handled */
2923 if (res->u.spectrum.id != 0xff) {
2924 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2925 res->u.spectrum.id);
2926 priv->measurement_status &= ~MEASUREMENT_READY;
2927 }
2928 priv->measurement_status |= MEASUREMENT_ACTIVE;
2929 rc = 0;
2930 break;
2931
2932 case 1: /* Command will not be handled */
2933 rc = -EAGAIN;
2934 break;
2935 }
2936
2937 dev_kfree_skb_any(cmd.meta.u.skb);
2938
2939 return rc;
2940 }
2941 #endif
2942
2943 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
2944 struct iwl3945_rx_mem_buffer *rxb)
2945 {
2946 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2947 struct iwl_alive_resp *palive;
2948 struct delayed_work *pwork;
2949
2950 palive = &pkt->u.alive_frame;
2951
2952 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2953 "0x%01X 0x%01X\n",
2954 palive->is_valid, palive->ver_type,
2955 palive->ver_subtype);
2956
2957 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2958 IWL_DEBUG_INFO("Initialization Alive received.\n");
2959 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2960 sizeof(struct iwl_alive_resp));
2961 pwork = &priv->init_alive_start;
2962 } else {
2963 IWL_DEBUG_INFO("Runtime Alive received.\n");
2964 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2965 sizeof(struct iwl_alive_resp));
2966 pwork = &priv->alive_start;
2967 iwl3945_disable_events(priv);
2968 }
2969
2970 /* We delay the ALIVE response by 5ms to
2971 * give the HW RF Kill time to activate... */
2972 if (palive->is_valid == UCODE_VALID_OK)
2973 queue_delayed_work(priv->workqueue, pwork,
2974 msecs_to_jiffies(5));
2975 else
2976 IWL_WARNING("uCode did not respond OK.\n");
2977 }
2978
2979 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
2980 struct iwl3945_rx_mem_buffer *rxb)
2981 {
2982 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2983
2984 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2985 return;
2986 }
2987
2988 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
2989 struct iwl3945_rx_mem_buffer *rxb)
2990 {
2991 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2992
2993 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2994 "seq 0x%04X ser 0x%08X\n",
2995 le32_to_cpu(pkt->u.err_resp.error_type),
2996 get_cmd_string(pkt->u.err_resp.cmd_id),
2997 pkt->u.err_resp.cmd_id,
2998 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2999 le32_to_cpu(pkt->u.err_resp.error_info));
3000 }
3001
3002 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3003
3004 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3005 {
3006 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3007 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3008 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
3009 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3010 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3011 rxon->channel = csa->channel;
3012 priv->staging_rxon.channel = csa->channel;
3013 }
3014
3015 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3016 struct iwl3945_rx_mem_buffer *rxb)
3017 {
3018 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3019 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3020 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
3021
3022 if (!report->state) {
3023 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3024 "Spectrum Measure Notification: Start\n");
3025 return;
3026 }
3027
3028 memcpy(&priv->measure_report, report, sizeof(*report));
3029 priv->measurement_status |= MEASUREMENT_READY;
3030 #endif
3031 }
3032
3033 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3034 struct iwl3945_rx_mem_buffer *rxb)
3035 {
3036 #ifdef CONFIG_IWL3945_DEBUG
3037 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3038 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
3039 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3040 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3041 #endif
3042 }
3043
3044 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3045 struct iwl3945_rx_mem_buffer *rxb)
3046 {
3047 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3048 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3049 "notification for %s:\n",
3050 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3051 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
3052 le32_to_cpu(pkt->len));
3053 }
3054
3055 static void iwl3945_bg_beacon_update(struct work_struct *work)
3056 {
3057 struct iwl3945_priv *priv =
3058 container_of(work, struct iwl3945_priv, beacon_update);
3059 struct sk_buff *beacon;
3060
3061 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3062 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3063
3064 if (!beacon) {
3065 IWL_ERROR("update beacon failed\n");
3066 return;
3067 }
3068
3069 mutex_lock(&priv->mutex);
3070 /* new beacon skb is allocated every time; dispose previous.*/
3071 if (priv->ibss_beacon)
3072 dev_kfree_skb(priv->ibss_beacon);
3073
3074 priv->ibss_beacon = beacon;
3075 mutex_unlock(&priv->mutex);
3076
3077 iwl3945_send_beacon_cmd(priv);
3078 }
3079
3080 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3081 struct iwl3945_rx_mem_buffer *rxb)
3082 {
3083 #ifdef CONFIG_IWL3945_DEBUG
3084 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3085 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3086 u8 rate = beacon->beacon_notify_hdr.rate;
3087
3088 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3089 "tsf %d %d rate %d\n",
3090 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3091 beacon->beacon_notify_hdr.failure_frame,
3092 le32_to_cpu(beacon->ibss_mgr_status),
3093 le32_to_cpu(beacon->high_tsf),
3094 le32_to_cpu(beacon->low_tsf), rate);
3095 #endif
3096
3097 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3098 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3099 queue_work(priv->workqueue, &priv->beacon_update);
3100 }
3101
3102 /* Service response to REPLY_SCAN_CMD (0x80) */
3103 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3104 struct iwl3945_rx_mem_buffer *rxb)
3105 {
3106 #ifdef CONFIG_IWL3945_DEBUG
3107 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3108 struct iwl_scanreq_notification *notif =
3109 (struct iwl_scanreq_notification *)pkt->u.raw;
3110
3111 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3112 #endif
3113 }
3114
3115 /* Service SCAN_START_NOTIFICATION (0x82) */
3116 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3117 struct iwl3945_rx_mem_buffer *rxb)
3118 {
3119 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3120 struct iwl_scanstart_notification *notif =
3121 (struct iwl_scanstart_notification *)pkt->u.raw;
3122 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3123 IWL_DEBUG_SCAN("Scan start: "
3124 "%d [802.11%s] "
3125 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3126 notif->channel,
3127 notif->band ? "bg" : "a",
3128 notif->tsf_high,
3129 notif->tsf_low, notif->status, notif->beacon_timer);
3130 }
3131
3132 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3133 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3134 struct iwl3945_rx_mem_buffer *rxb)
3135 {
3136 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3137 struct iwl_scanresults_notification *notif =
3138 (struct iwl_scanresults_notification *)pkt->u.raw;
3139
3140 IWL_DEBUG_SCAN("Scan ch.res: "
3141 "%d [802.11%s] "
3142 "(TSF: 0x%08X:%08X) - %d "
3143 "elapsed=%lu usec (%dms since last)\n",
3144 notif->channel,
3145 notif->band ? "bg" : "a",
3146 le32_to_cpu(notif->tsf_high),
3147 le32_to_cpu(notif->tsf_low),
3148 le32_to_cpu(notif->statistics[0]),
3149 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3150 jiffies_to_msecs(elapsed_jiffies
3151 (priv->last_scan_jiffies, jiffies)));
3152
3153 priv->last_scan_jiffies = jiffies;
3154 priv->next_scan_jiffies = 0;
3155 }
3156
3157 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3158 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3159 struct iwl3945_rx_mem_buffer *rxb)
3160 {
3161 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3162 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3163
3164 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3165 scan_notif->scanned_channels,
3166 scan_notif->tsf_low,
3167 scan_notif->tsf_high, scan_notif->status);
3168
3169 /* The HW is no longer scanning */
3170 clear_bit(STATUS_SCAN_HW, &priv->status);
3171
3172 /* The scan completion notification came in, so kill that timer... */
3173 cancel_delayed_work(&priv->scan_check);
3174
3175 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3176 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3177 "2.4" : "5.2",
3178 jiffies_to_msecs(elapsed_jiffies
3179 (priv->scan_pass_start, jiffies)));
3180
3181 /* Remove this scanned band from the list of pending
3182 * bands to scan, band G precedes A in order of scanning
3183 * as seen in iwl3945_bg_request_scan */
3184 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3185 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3186 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3187 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3188
3189 /* If a request to abort was given, or the scan did not succeed
3190 * then we reset the scan state machine and terminate,
3191 * re-queuing another scan if one has been requested */
3192 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3193 IWL_DEBUG_INFO("Aborted scan completed.\n");
3194 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3195 } else {
3196 /* If there are more bands on this scan pass reschedule */
3197 if (priv->scan_bands > 0)
3198 goto reschedule;
3199 }
3200
3201 priv->last_scan_jiffies = jiffies;
3202 priv->next_scan_jiffies = 0;
3203 IWL_DEBUG_INFO("Setting scan to off\n");
3204
3205 clear_bit(STATUS_SCANNING, &priv->status);
3206
3207 IWL_DEBUG_INFO("Scan took %dms\n",
3208 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3209
3210 queue_work(priv->workqueue, &priv->scan_completed);
3211
3212 return;
3213
3214 reschedule:
3215 priv->scan_pass_start = jiffies;
3216 queue_work(priv->workqueue, &priv->request_scan);
3217 }
3218
3219 /* Handle notification from uCode that card's power state is changing
3220 * due to software, hardware, or critical temperature RFKILL */
3221 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3222 struct iwl3945_rx_mem_buffer *rxb)
3223 {
3224 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3225 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3226 unsigned long status = priv->status;
3227
3228 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3229 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3230 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3231
3232 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3233 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3234
3235 if (flags & HW_CARD_DISABLED)
3236 set_bit(STATUS_RF_KILL_HW, &priv->status);
3237 else
3238 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3239
3240
3241 if (flags & SW_CARD_DISABLED)
3242 set_bit(STATUS_RF_KILL_SW, &priv->status);
3243 else
3244 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3245
3246 iwl3945_scan_cancel(priv);
3247
3248 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3249 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3250 (test_bit(STATUS_RF_KILL_SW, &status) !=
3251 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3252 queue_work(priv->workqueue, &priv->rf_kill);
3253 else
3254 wake_up_interruptible(&priv->wait_command_queue);
3255 }
3256
3257 /**
3258 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3259 *
3260 * Setup the RX handlers for each of the reply types sent from the uCode
3261 * to the host.
3262 *
3263 * This function chains into the hardware specific files for them to setup
3264 * any hardware specific handlers as well.
3265 */
3266 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3267 {
3268 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3269 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3270 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3271 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3272 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3273 iwl3945_rx_spectrum_measure_notif;
3274 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3275 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3276 iwl3945_rx_pm_debug_statistics_notif;
3277 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3278
3279 /*
3280 * The same handler is used for both the REPLY to a discrete
3281 * statistics request from the host as well as for the periodic
3282 * statistics notifications (after received beacons) from the uCode.
3283 */
3284 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3285 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3286
3287 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3288 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3289 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3290 iwl3945_rx_scan_results_notif;
3291 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3292 iwl3945_rx_scan_complete_notif;
3293 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3294
3295 /* Set up hardware specific Rx handlers */
3296 iwl3945_hw_rx_handler_setup(priv);
3297 }
3298
3299 /**
3300 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3301 * When FW advances 'R' index, all entries between old and new 'R' index
3302 * need to be reclaimed.
3303 */
3304 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3305 int txq_id, int index)
3306 {
3307 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3308 struct iwl3945_queue *q = &txq->q;
3309 int nfreed = 0;
3310
3311 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3312 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3313 "is out of range [0-%d] %d %d.\n", txq_id,
3314 index, q->n_bd, q->write_ptr, q->read_ptr);
3315 return;
3316 }
3317
3318 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3319 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3320 if (nfreed > 1) {
3321 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3322 q->write_ptr, q->read_ptr);
3323 queue_work(priv->workqueue, &priv->restart);
3324 break;
3325 }
3326 nfreed++;
3327 }
3328 }
3329
3330
3331 /**
3332 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3333 * @rxb: Rx buffer to reclaim
3334 *
3335 * If an Rx buffer has an async callback associated with it the callback
3336 * will be executed. The attached skb (if present) will only be freed
3337 * if the callback returns 1
3338 */
3339 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3340 struct iwl3945_rx_mem_buffer *rxb)
3341 {
3342 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3343 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3344 int txq_id = SEQ_TO_QUEUE(sequence);
3345 int index = SEQ_TO_INDEX(sequence);
3346 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3347 int cmd_index;
3348 struct iwl3945_cmd *cmd;
3349
3350 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3351
3352 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3353 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3354
3355 /* Input error checking is done when commands are added to queue. */
3356 if (cmd->meta.flags & CMD_WANT_SKB) {
3357 cmd->meta.source->u.skb = rxb->skb;
3358 rxb->skb = NULL;
3359 } else if (cmd->meta.u.callback &&
3360 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3361 rxb->skb = NULL;
3362
3363 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3364
3365 if (!(cmd->meta.flags & CMD_ASYNC)) {
3366 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3367 wake_up_interruptible(&priv->wait_command_queue);
3368 }
3369 }
3370
3371 /************************** RX-FUNCTIONS ****************************/
3372 /*
3373 * Rx theory of operation
3374 *
3375 * The host allocates 32 DMA target addresses and passes the host address
3376 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3377 * 0 to 31
3378 *
3379 * Rx Queue Indexes
3380 * The host/firmware share two index registers for managing the Rx buffers.
3381 *
3382 * The READ index maps to the first position that the firmware may be writing
3383 * to -- the driver can read up to (but not including) this position and get
3384 * good data.
3385 * The READ index is managed by the firmware once the card is enabled.
3386 *
3387 * The WRITE index maps to the last position the driver has read from -- the
3388 * position preceding WRITE is the last slot the firmware can place a packet.
3389 *
3390 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3391 * WRITE = READ.
3392 *
3393 * During initialization, the host sets up the READ queue position to the first
3394 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3395 *
3396 * When the firmware places a packet in a buffer, it will advance the READ index
3397 * and fire the RX interrupt. The driver can then query the READ index and
3398 * process as many packets as possible, moving the WRITE index forward as it
3399 * resets the Rx queue buffers with new memory.
3400 *
3401 * The management in the driver is as follows:
3402 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3403 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3404 * to replenish the iwl->rxq->rx_free.
3405 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3406 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3407 * 'processed' and 'read' driver indexes as well)
3408 * + A received packet is processed and handed to the kernel network stack,
3409 * detached from the iwl->rxq. The driver 'processed' index is updated.
3410 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3411 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3412 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3413 * were enough free buffers and RX_STALLED is set it is cleared.
3414 *
3415 *
3416 * Driver sequence:
3417 *
3418 * iwl3945_rx_queue_alloc() Allocates rx_free
3419 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3420 * iwl3945_rx_queue_restock
3421 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3422 * queue, updates firmware pointers, and updates
3423 * the WRITE index. If insufficient rx_free buffers
3424 * are available, schedules iwl3945_rx_replenish
3425 *
3426 * -- enable interrupts --
3427 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3428 * READ INDEX, detaching the SKB from the pool.
3429 * Moves the packet buffer from queue to rx_used.
3430 * Calls iwl3945_rx_queue_restock to refill any empty
3431 * slots.
3432 * ...
3433 *
3434 */
3435
3436 /**
3437 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3438 */
3439 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3440 {
3441 int s = q->read - q->write;
3442 if (s <= 0)
3443 s += RX_QUEUE_SIZE;
3444 /* keep some buffer to not confuse full and empty queue */
3445 s -= 2;
3446 if (s < 0)
3447 s = 0;
3448 return s;
3449 }
3450
3451 /**
3452 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3453 */
3454 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3455 {
3456 u32 reg = 0;
3457 int rc = 0;
3458 unsigned long flags;
3459
3460 spin_lock_irqsave(&q->lock, flags);
3461
3462 if (q->need_update == 0)
3463 goto exit_unlock;
3464
3465 /* If power-saving is in use, make sure device is awake */
3466 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3467 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3468
3469 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3470 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3471 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3472 goto exit_unlock;
3473 }
3474
3475 rc = iwl3945_grab_nic_access(priv);
3476 if (rc)
3477 goto exit_unlock;
3478
3479 /* Device expects a multiple of 8 */
3480 iwl3945_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3481 q->write & ~0x7);
3482 iwl3945_release_nic_access(priv);
3483
3484 /* Else device is assumed to be awake */
3485 } else
3486 /* Device expects a multiple of 8 */
3487 iwl3945_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3488
3489
3490 q->need_update = 0;
3491
3492 exit_unlock:
3493 spin_unlock_irqrestore(&q->lock, flags);
3494 return rc;
3495 }
3496
3497 /**
3498 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3499 */
3500 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3501 dma_addr_t dma_addr)
3502 {
3503 return cpu_to_le32((u32)dma_addr);
3504 }
3505
3506 /**
3507 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3508 *
3509 * If there are slots in the RX queue that need to be restocked,
3510 * and we have free pre-allocated buffers, fill the ranks as much
3511 * as we can, pulling from rx_free.
3512 *
3513 * This moves the 'write' index forward to catch up with 'processed', and
3514 * also updates the memory address in the firmware to reference the new
3515 * target buffer.
3516 */
3517 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3518 {
3519 struct iwl3945_rx_queue *rxq = &priv->rxq;
3520 struct list_head *element;
3521 struct iwl3945_rx_mem_buffer *rxb;
3522 unsigned long flags;
3523 int write, rc;
3524
3525 spin_lock_irqsave(&rxq->lock, flags);
3526 write = rxq->write & ~0x7;
3527 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3528 /* Get next free Rx buffer, remove from free list */
3529 element = rxq->rx_free.next;
3530 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3531 list_del(element);
3532
3533 /* Point to Rx buffer via next RBD in circular buffer */
3534 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3535 rxq->queue[rxq->write] = rxb;
3536 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3537 rxq->free_count--;
3538 }
3539 spin_unlock_irqrestore(&rxq->lock, flags);
3540 /* If the pre-allocated buffer pool is dropping low, schedule to
3541 * refill it */
3542 if (rxq->free_count <= RX_LOW_WATERMARK)
3543 queue_work(priv->workqueue, &priv->rx_replenish);
3544
3545
3546 /* If we've added more space for the firmware to place data, tell it.
3547 * Increment device's write pointer in multiples of 8. */
3548 if ((write != (rxq->write & ~0x7))
3549 || (abs(rxq->write - rxq->read) > 7)) {
3550 spin_lock_irqsave(&rxq->lock, flags);
3551 rxq->need_update = 1;
3552 spin_unlock_irqrestore(&rxq->lock, flags);
3553 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3554 if (rc)
3555 return rc;
3556 }
3557
3558 return 0;
3559 }
3560
3561 /**
3562 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3563 *
3564 * When moving to rx_free an SKB is allocated for the slot.
3565 *
3566 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3567 * This is called as a scheduled work item (except for during initialization)
3568 */
3569 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3570 {
3571 struct iwl3945_rx_queue *rxq = &priv->rxq;
3572 struct list_head *element;
3573 struct iwl3945_rx_mem_buffer *rxb;
3574 unsigned long flags;
3575 spin_lock_irqsave(&rxq->lock, flags);
3576 while (!list_empty(&rxq->rx_used)) {
3577 element = rxq->rx_used.next;
3578 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3579
3580 /* Alloc a new receive buffer */
3581 rxb->skb =
3582 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3583 if (!rxb->skb) {
3584 if (net_ratelimit())
3585 printk(KERN_CRIT DRV_NAME
3586 ": Can not allocate SKB buffers\n");
3587 /* We don't reschedule replenish work here -- we will
3588 * call the restock method and if it still needs
3589 * more buffers it will schedule replenish */
3590 break;
3591 }
3592
3593 /* If radiotap head is required, reserve some headroom here.
3594 * The physical head count is a variable rx_stats->phy_count.
3595 * We reserve 4 bytes here. Plus these extra bytes, the
3596 * headroom of the physical head should be enough for the
3597 * radiotap head that iwl3945 supported. See iwl3945_rt.
3598 */
3599 skb_reserve(rxb->skb, 4);
3600
3601 priv->alloc_rxb_skb++;
3602 list_del(element);
3603
3604 /* Get physical address of RB/SKB */
3605 rxb->dma_addr =
3606 pci_map_single(priv->pci_dev, rxb->skb->data,
3607 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3608 list_add_tail(&rxb->list, &rxq->rx_free);
3609 rxq->free_count++;
3610 }
3611 spin_unlock_irqrestore(&rxq->lock, flags);
3612 }
3613
3614 /*
3615 * this should be called while priv->lock is locked
3616 */
3617 static void __iwl3945_rx_replenish(void *data)
3618 {
3619 struct iwl3945_priv *priv = data;
3620
3621 iwl3945_rx_allocate(priv);
3622 iwl3945_rx_queue_restock(priv);
3623 }
3624
3625
3626 void iwl3945_rx_replenish(void *data)
3627 {
3628 struct iwl3945_priv *priv = data;
3629 unsigned long flags;
3630
3631 iwl3945_rx_allocate(priv);
3632
3633 spin_lock_irqsave(&priv->lock, flags);
3634 iwl3945_rx_queue_restock(priv);
3635 spin_unlock_irqrestore(&priv->lock, flags);
3636 }
3637
3638 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3639 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3640 * This free routine walks the list of POOL entries and if SKB is set to
3641 * non NULL it is unmapped and freed
3642 */
3643 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3644 {
3645 int i;
3646 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3647 if (rxq->pool[i].skb != NULL) {
3648 pci_unmap_single(priv->pci_dev,
3649 rxq->pool[i].dma_addr,
3650 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3651 dev_kfree_skb(rxq->pool[i].skb);
3652 }
3653 }
3654
3655 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3656 rxq->dma_addr);
3657 rxq->bd = NULL;
3658 }
3659
3660 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3661 {
3662 struct iwl3945_rx_queue *rxq = &priv->rxq;
3663 struct pci_dev *dev = priv->pci_dev;
3664 int i;
3665
3666 spin_lock_init(&rxq->lock);
3667 INIT_LIST_HEAD(&rxq->rx_free);
3668 INIT_LIST_HEAD(&rxq->rx_used);
3669
3670 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3671 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3672 if (!rxq->bd)
3673 return -ENOMEM;
3674
3675 /* Fill the rx_used queue with _all_ of the Rx buffers */
3676 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3677 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3678
3679 /* Set us so that we have processed and used all buffers, but have
3680 * not restocked the Rx queue with fresh buffers */
3681 rxq->read = rxq->write = 0;
3682 rxq->free_count = 0;
3683 rxq->need_update = 0;
3684 return 0;
3685 }
3686
3687 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3688 {
3689 unsigned long flags;
3690 int i;
3691 spin_lock_irqsave(&rxq->lock, flags);
3692 INIT_LIST_HEAD(&rxq->rx_free);
3693 INIT_LIST_HEAD(&rxq->rx_used);
3694 /* Fill the rx_used queue with _all_ of the Rx buffers */
3695 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3696 /* In the reset function, these buffers may have been allocated
3697 * to an SKB, so we need to unmap and free potential storage */
3698 if (rxq->pool[i].skb != NULL) {
3699 pci_unmap_single(priv->pci_dev,
3700 rxq->pool[i].dma_addr,
3701 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3702 priv->alloc_rxb_skb--;
3703 dev_kfree_skb(rxq->pool[i].skb);
3704 rxq->pool[i].skb = NULL;
3705 }
3706 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3707 }
3708
3709 /* Set us so that we have processed and used all buffers, but have
3710 * not restocked the Rx queue with fresh buffers */
3711 rxq->read = rxq->write = 0;
3712 rxq->free_count = 0;
3713 spin_unlock_irqrestore(&rxq->lock, flags);
3714 }
3715
3716 /* Convert linear signal-to-noise ratio into dB */
3717 static u8 ratio2dB[100] = {
3718 /* 0 1 2 3 4 5 6 7 8 9 */
3719 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3720 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3721 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3722 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3723 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3724 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3725 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3726 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3727 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3728 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3729 };
3730
3731 /* Calculates a relative dB value from a ratio of linear
3732 * (i.e. not dB) signal levels.
3733 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3734 int iwl3945_calc_db_from_ratio(int sig_ratio)
3735 {
3736 /* 1000:1 or higher just report as 60 dB */
3737 if (sig_ratio >= 1000)
3738 return 60;
3739
3740 /* 100:1 or higher, divide by 10 and use table,
3741 * add 20 dB to make up for divide by 10 */
3742 if (sig_ratio >= 100)
3743 return 20 + (int)ratio2dB[sig_ratio/10];
3744
3745 /* We shouldn't see this */
3746 if (sig_ratio < 1)
3747 return 0;
3748
3749 /* Use table for ratios 1:1 - 99:1 */
3750 return (int)ratio2dB[sig_ratio];
3751 }
3752
3753 #define PERFECT_RSSI (-20) /* dBm */
3754 #define WORST_RSSI (-95) /* dBm */
3755 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3756
3757 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3758 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3759 * about formulas used below. */
3760 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3761 {
3762 int sig_qual;
3763 int degradation = PERFECT_RSSI - rssi_dbm;
3764
3765 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3766 * as indicator; formula is (signal dbm - noise dbm).
3767 * SNR at or above 40 is a great signal (100%).
3768 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3769 * Weakest usable signal is usually 10 - 15 dB SNR. */
3770 if (noise_dbm) {
3771 if (rssi_dbm - noise_dbm >= 40)
3772 return 100;
3773 else if (rssi_dbm < noise_dbm)
3774 return 0;
3775 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3776
3777 /* Else use just the signal level.
3778 * This formula is a least squares fit of data points collected and
3779 * compared with a reference system that had a percentage (%) display
3780 * for signal quality. */
3781 } else
3782 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3783 (15 * RSSI_RANGE + 62 * degradation)) /
3784 (RSSI_RANGE * RSSI_RANGE);
3785
3786 if (sig_qual > 100)
3787 sig_qual = 100;
3788 else if (sig_qual < 1)
3789 sig_qual = 0;
3790
3791 return sig_qual;
3792 }
3793
3794 /**
3795 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3796 *
3797 * Uses the priv->rx_handlers callback function array to invoke
3798 * the appropriate handlers, including command responses,
3799 * frame-received notifications, and other notifications.
3800 */
3801 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3802 {
3803 struct iwl3945_rx_mem_buffer *rxb;
3804 struct iwl_rx_packet *pkt;
3805 struct iwl3945_rx_queue *rxq = &priv->rxq;
3806 u32 r, i;
3807 int reclaim;
3808 unsigned long flags;
3809 u8 fill_rx = 0;
3810 u32 count = 8;
3811
3812 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3813 * buffer that the driver may process (last buffer filled by ucode). */
3814 r = iwl3945_hw_get_rx_read(priv);
3815 i = rxq->read;
3816
3817 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3818 fill_rx = 1;
3819 /* Rx interrupt, but nothing sent from uCode */
3820 if (i == r)
3821 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3822
3823 while (i != r) {
3824 rxb = rxq->queue[i];
3825
3826 /* If an RXB doesn't have a Rx queue slot associated with it,
3827 * then a bug has been introduced in the queue refilling
3828 * routines -- catch it here */
3829 BUG_ON(rxb == NULL);
3830
3831 rxq->queue[i] = NULL;
3832
3833 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3834 IWL_RX_BUF_SIZE,
3835 PCI_DMA_FROMDEVICE);
3836 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3837
3838 /* Reclaim a command buffer only if this packet is a response
3839 * to a (driver-originated) command.
3840 * If the packet (e.g. Rx frame) originated from uCode,
3841 * there is no command buffer to reclaim.
3842 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3843 * but apparently a few don't get set; catch them here. */
3844 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3845 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3846 (pkt->hdr.cmd != REPLY_TX);
3847
3848 /* Based on type of command response or notification,
3849 * handle those that need handling via function in
3850 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3851 if (priv->rx_handlers[pkt->hdr.cmd]) {
3852 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3853 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3854 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3855 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3856 } else {
3857 /* No handling needed */
3858 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3859 "r %d i %d No handler needed for %s, 0x%02x\n",
3860 r, i, get_cmd_string(pkt->hdr.cmd),
3861 pkt->hdr.cmd);
3862 }
3863
3864 if (reclaim) {
3865 /* Invoke any callbacks, transfer the skb to caller, and
3866 * fire off the (possibly) blocking iwl3945_send_cmd()
3867 * as we reclaim the driver command queue */
3868 if (rxb && rxb->skb)
3869 iwl3945_tx_cmd_complete(priv, rxb);
3870 else
3871 IWL_WARNING("Claim null rxb?\n");
3872 }
3873
3874 /* For now we just don't re-use anything. We can tweak this
3875 * later to try and re-use notification packets and SKBs that
3876 * fail to Rx correctly */
3877 if (rxb->skb != NULL) {
3878 priv->alloc_rxb_skb--;
3879 dev_kfree_skb_any(rxb->skb);
3880 rxb->skb = NULL;
3881 }
3882
3883 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3884 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3885 spin_lock_irqsave(&rxq->lock, flags);
3886 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3887 spin_unlock_irqrestore(&rxq->lock, flags);
3888 i = (i + 1) & RX_QUEUE_MASK;
3889 /* If there are a lot of unused frames,
3890 * restock the Rx queue so ucode won't assert. */
3891 if (fill_rx) {
3892 count++;
3893 if (count >= 8) {
3894 priv->rxq.read = i;
3895 __iwl3945_rx_replenish(priv);
3896 count = 0;
3897 }
3898 }
3899 }
3900
3901 /* Backtrack one entry */
3902 priv->rxq.read = i;
3903 iwl3945_rx_queue_restock(priv);
3904 }
3905
3906 /**
3907 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3908 */
3909 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3910 struct iwl3945_tx_queue *txq)
3911 {
3912 u32 reg = 0;
3913 int rc = 0;
3914 int txq_id = txq->q.id;
3915
3916 if (txq->need_update == 0)
3917 return rc;
3918
3919 /* if we're trying to save power */
3920 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3921 /* wake up nic if it's powered down ...
3922 * uCode will wake up, and interrupt us again, so next
3923 * time we'll skip this part. */
3924 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3925
3926 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3927 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3928 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3929 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3930 return rc;
3931 }
3932
3933 /* restore this queue's parameters in nic hardware. */
3934 rc = iwl3945_grab_nic_access(priv);
3935 if (rc)
3936 return rc;
3937 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
3938 txq->q.write_ptr | (txq_id << 8));
3939 iwl3945_release_nic_access(priv);
3940
3941 /* else not in power-save mode, uCode will never sleep when we're
3942 * trying to tx (during RFKILL, we're not trying to tx). */
3943 } else
3944 iwl3945_write32(priv, HBUS_TARG_WRPTR,
3945 txq->q.write_ptr | (txq_id << 8));
3946
3947 txq->need_update = 0;
3948
3949 return rc;
3950 }
3951
3952 #ifdef CONFIG_IWL3945_DEBUG
3953 static void iwl3945_print_rx_config_cmd(struct iwl3945_priv *priv,
3954 struct iwl3945_rxon_cmd *rxon)
3955 {
3956 IWL_DEBUG_RADIO("RX CONFIG:\n");
3957 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3958 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3959 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3960 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3961 le32_to_cpu(rxon->filter_flags));
3962 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3963 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3964 rxon->ofdm_basic_rates);
3965 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3966 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3967 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3968 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3969 }
3970 #endif
3971
3972 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
3973 {
3974 IWL_DEBUG_ISR("Enabling interrupts\n");
3975 set_bit(STATUS_INT_ENABLED, &priv->status);
3976 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3977 }
3978
3979
3980 /* call this function to flush any scheduled tasklet */
3981 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
3982 {
3983 /* wait to make sure we flush pending tasklet*/
3984 synchronize_irq(priv->pci_dev->irq);
3985 tasklet_kill(&priv->irq_tasklet);
3986 }
3987
3988
3989 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
3990 {
3991 clear_bit(STATUS_INT_ENABLED, &priv->status);
3992
3993 /* disable interrupts from uCode/NIC to host */
3994 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
3995
3996 /* acknowledge/clear/reset any interrupts still pending
3997 * from uCode or flow handler (Rx/Tx DMA) */
3998 iwl3945_write32(priv, CSR_INT, 0xffffffff);
3999 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4000 IWL_DEBUG_ISR("Disabled interrupts\n");
4001 }
4002
4003 static const char *desc_lookup(int i)
4004 {
4005 switch (i) {
4006 case 1:
4007 return "FAIL";
4008 case 2:
4009 return "BAD_PARAM";
4010 case 3:
4011 return "BAD_CHECKSUM";
4012 case 4:
4013 return "NMI_INTERRUPT";
4014 case 5:
4015 return "SYSASSERT";
4016 case 6:
4017 return "FATAL_ERROR";
4018 }
4019
4020 return "UNKNOWN";
4021 }
4022
4023 #define ERROR_START_OFFSET (1 * sizeof(u32))
4024 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4025
4026 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4027 {
4028 u32 i;
4029 u32 desc, time, count, base, data1;
4030 u32 blink1, blink2, ilink1, ilink2;
4031 int rc;
4032
4033 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4034
4035 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4036 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4037 return;
4038 }
4039
4040 rc = iwl3945_grab_nic_access(priv);
4041 if (rc) {
4042 IWL_WARNING("Can not read from adapter at this time.\n");
4043 return;
4044 }
4045
4046 count = iwl3945_read_targ_mem(priv, base);
4047
4048 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4049 IWL_ERROR("Start IWL Error Log Dump:\n");
4050 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4051 }
4052
4053 IWL_ERROR("Desc Time asrtPC blink2 "
4054 "ilink1 nmiPC Line\n");
4055 for (i = ERROR_START_OFFSET;
4056 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4057 i += ERROR_ELEM_SIZE) {
4058 desc = iwl3945_read_targ_mem(priv, base + i);
4059 time =
4060 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4061 blink1 =
4062 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4063 blink2 =
4064 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4065 ilink1 =
4066 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4067 ilink2 =
4068 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4069 data1 =
4070 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4071
4072 IWL_ERROR
4073 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4074 desc_lookup(desc), desc, time, blink1, blink2,
4075 ilink1, ilink2, data1);
4076 }
4077
4078 iwl3945_release_nic_access(priv);
4079
4080 }
4081
4082 #define EVENT_START_OFFSET (6 * sizeof(u32))
4083
4084 /**
4085 * iwl3945_print_event_log - Dump error event log to syslog
4086 *
4087 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4088 */
4089 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4090 u32 num_events, u32 mode)
4091 {
4092 u32 i;
4093 u32 base; /* SRAM byte address of event log header */
4094 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4095 u32 ptr; /* SRAM byte address of log data */
4096 u32 ev, time, data; /* event log data */
4097
4098 if (num_events == 0)
4099 return;
4100
4101 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4102
4103 if (mode == 0)
4104 event_size = 2 * sizeof(u32);
4105 else
4106 event_size = 3 * sizeof(u32);
4107
4108 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4109
4110 /* "time" is actually "data" for mode 0 (no timestamp).
4111 * place event id # at far right for easier visual parsing. */
4112 for (i = 0; i < num_events; i++) {
4113 ev = iwl3945_read_targ_mem(priv, ptr);
4114 ptr += sizeof(u32);
4115 time = iwl3945_read_targ_mem(priv, ptr);
4116 ptr += sizeof(u32);
4117 if (mode == 0)
4118 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4119 else {
4120 data = iwl3945_read_targ_mem(priv, ptr);
4121 ptr += sizeof(u32);
4122 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4123 }
4124 }
4125 }
4126
4127 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4128 {
4129 int rc;
4130 u32 base; /* SRAM byte address of event log header */
4131 u32 capacity; /* event log capacity in # entries */
4132 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4133 u32 num_wraps; /* # times uCode wrapped to top of log */
4134 u32 next_entry; /* index of next entry to be written by uCode */
4135 u32 size; /* # entries that we'll print */
4136
4137 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4138 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4139 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4140 return;
4141 }
4142
4143 rc = iwl3945_grab_nic_access(priv);
4144 if (rc) {
4145 IWL_WARNING("Can not read from adapter at this time.\n");
4146 return;
4147 }
4148
4149 /* event log header */
4150 capacity = iwl3945_read_targ_mem(priv, base);
4151 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4152 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4153 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4154
4155 size = num_wraps ? capacity : next_entry;
4156
4157 /* bail out if nothing in log */
4158 if (size == 0) {
4159 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4160 iwl3945_release_nic_access(priv);
4161 return;
4162 }
4163
4164 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4165 size, num_wraps);
4166
4167 /* if uCode has wrapped back to top of log, start at the oldest entry,
4168 * i.e the next one that uCode would fill. */
4169 if (num_wraps)
4170 iwl3945_print_event_log(priv, next_entry,
4171 capacity - next_entry, mode);
4172
4173 /* (then/else) start at top of log */
4174 iwl3945_print_event_log(priv, 0, next_entry, mode);
4175
4176 iwl3945_release_nic_access(priv);
4177 }
4178
4179 /**
4180 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4181 */
4182 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4183 {
4184 /* Set the FW error flag -- cleared on iwl3945_down */
4185 set_bit(STATUS_FW_ERROR, &priv->status);
4186
4187 /* Cancel currently queued command. */
4188 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4189
4190 #ifdef CONFIG_IWL3945_DEBUG
4191 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4192 iwl3945_dump_nic_error_log(priv);
4193 iwl3945_dump_nic_event_log(priv);
4194 iwl3945_print_rx_config_cmd(priv, &priv->staging_rxon);
4195 }
4196 #endif
4197
4198 wake_up_interruptible(&priv->wait_command_queue);
4199
4200 /* Keep the restart process from trying to send host
4201 * commands by clearing the INIT status bit */
4202 clear_bit(STATUS_READY, &priv->status);
4203
4204 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4205 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4206 "Restarting adapter due to uCode error.\n");
4207
4208 if (iwl3945_is_associated(priv)) {
4209 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4210 sizeof(priv->recovery_rxon));
4211 priv->error_recovering = 1;
4212 }
4213 queue_work(priv->workqueue, &priv->restart);
4214 }
4215 }
4216
4217 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4218 {
4219 unsigned long flags;
4220
4221 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4222 sizeof(priv->staging_rxon));
4223 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4224 iwl3945_commit_rxon(priv);
4225
4226 iwl3945_add_station(priv, priv->bssid, 1, 0);
4227
4228 spin_lock_irqsave(&priv->lock, flags);
4229 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4230 priv->error_recovering = 0;
4231 spin_unlock_irqrestore(&priv->lock, flags);
4232 }
4233
4234 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4235 {
4236 u32 inta, handled = 0;
4237 u32 inta_fh;
4238 unsigned long flags;
4239 #ifdef CONFIG_IWL3945_DEBUG
4240 u32 inta_mask;
4241 #endif
4242
4243 spin_lock_irqsave(&priv->lock, flags);
4244
4245 /* Ack/clear/reset pending uCode interrupts.
4246 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4247 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4248 inta = iwl3945_read32(priv, CSR_INT);
4249 iwl3945_write32(priv, CSR_INT, inta);
4250
4251 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4252 * Any new interrupts that happen after this, either while we're
4253 * in this tasklet, or later, will show up in next ISR/tasklet. */
4254 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4255 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4256
4257 #ifdef CONFIG_IWL3945_DEBUG
4258 if (priv->debug_level & IWL_DL_ISR) {
4259 /* just for debug */
4260 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4261 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4262 inta, inta_mask, inta_fh);
4263 }
4264 #endif
4265
4266 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4267 * atomic, make sure that inta covers all the interrupts that
4268 * we've discovered, even if FH interrupt came in just after
4269 * reading CSR_INT. */
4270 if (inta_fh & CSR39_FH_INT_RX_MASK)
4271 inta |= CSR_INT_BIT_FH_RX;
4272 if (inta_fh & CSR39_FH_INT_TX_MASK)
4273 inta |= CSR_INT_BIT_FH_TX;
4274
4275 /* Now service all interrupt bits discovered above. */
4276 if (inta & CSR_INT_BIT_HW_ERR) {
4277 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4278
4279 /* Tell the device to stop sending interrupts */
4280 iwl3945_disable_interrupts(priv);
4281
4282 iwl3945_irq_handle_error(priv);
4283
4284 handled |= CSR_INT_BIT_HW_ERR;
4285
4286 spin_unlock_irqrestore(&priv->lock, flags);
4287
4288 return;
4289 }
4290
4291 #ifdef CONFIG_IWL3945_DEBUG
4292 if (priv->debug_level & (IWL_DL_ISR)) {
4293 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4294 if (inta & CSR_INT_BIT_SCD)
4295 IWL_DEBUG_ISR("Scheduler finished to transmit "
4296 "the frame/frames.\n");
4297
4298 /* Alive notification via Rx interrupt will do the real work */
4299 if (inta & CSR_INT_BIT_ALIVE)
4300 IWL_DEBUG_ISR("Alive interrupt\n");
4301 }
4302 #endif
4303 /* Safely ignore these bits for debug checks below */
4304 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4305
4306 /* Error detected by uCode */
4307 if (inta & CSR_INT_BIT_SW_ERR) {
4308 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4309 inta);
4310 iwl3945_irq_handle_error(priv);
4311 handled |= CSR_INT_BIT_SW_ERR;
4312 }
4313
4314 /* uCode wakes up after power-down sleep */
4315 if (inta & CSR_INT_BIT_WAKEUP) {
4316 IWL_DEBUG_ISR("Wakeup interrupt\n");
4317 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4318 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4319 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4320 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4321 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4322 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4323 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4324
4325 handled |= CSR_INT_BIT_WAKEUP;
4326 }
4327
4328 /* All uCode command responses, including Tx command responses,
4329 * Rx "responses" (frame-received notification), and other
4330 * notifications from uCode come through here*/
4331 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4332 iwl3945_rx_handle(priv);
4333 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4334 }
4335
4336 if (inta & CSR_INT_BIT_FH_TX) {
4337 IWL_DEBUG_ISR("Tx interrupt\n");
4338
4339 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4340 if (!iwl3945_grab_nic_access(priv)) {
4341 iwl3945_write_direct32(priv, FH39_TCSR_CREDIT
4342 (FH39_SRVC_CHNL), 0x0);
4343 iwl3945_release_nic_access(priv);
4344 }
4345 handled |= CSR_INT_BIT_FH_TX;
4346 }
4347
4348 if (inta & ~handled)
4349 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4350
4351 if (inta & ~CSR_INI_SET_MASK) {
4352 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4353 inta & ~CSR_INI_SET_MASK);
4354 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4355 }
4356
4357 /* Re-enable all interrupts */
4358 /* only Re-enable if disabled by irq */
4359 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4360 iwl3945_enable_interrupts(priv);
4361
4362 #ifdef CONFIG_IWL3945_DEBUG
4363 if (priv->debug_level & (IWL_DL_ISR)) {
4364 inta = iwl3945_read32(priv, CSR_INT);
4365 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4366 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4367 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4368 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4369 }
4370 #endif
4371 spin_unlock_irqrestore(&priv->lock, flags);
4372 }
4373
4374 static irqreturn_t iwl3945_isr(int irq, void *data)
4375 {
4376 struct iwl3945_priv *priv = data;
4377 u32 inta, inta_mask;
4378 u32 inta_fh;
4379 if (!priv)
4380 return IRQ_NONE;
4381
4382 spin_lock(&priv->lock);
4383
4384 /* Disable (but don't clear!) interrupts here to avoid
4385 * back-to-back ISRs and sporadic interrupts from our NIC.
4386 * If we have something to service, the tasklet will re-enable ints.
4387 * If we *don't* have something, we'll re-enable before leaving here. */
4388 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4389 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4390
4391 /* Discover which interrupts are active/pending */
4392 inta = iwl3945_read32(priv, CSR_INT);
4393 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4394
4395 /* Ignore interrupt if there's nothing in NIC to service.
4396 * This may be due to IRQ shared with another device,
4397 * or due to sporadic interrupts thrown from our NIC. */
4398 if (!inta && !inta_fh) {
4399 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4400 goto none;
4401 }
4402
4403 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4404 /* Hardware disappeared */
4405 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
4406 goto unplugged;
4407 }
4408
4409 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4410 inta, inta_mask, inta_fh);
4411
4412 inta &= ~CSR_INT_BIT_SCD;
4413
4414 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4415 if (likely(inta || inta_fh))
4416 tasklet_schedule(&priv->irq_tasklet);
4417 unplugged:
4418 spin_unlock(&priv->lock);
4419
4420 return IRQ_HANDLED;
4421
4422 none:
4423 /* re-enable interrupts here since we don't have anything to service. */
4424 /* only Re-enable if disabled by irq */
4425 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4426 iwl3945_enable_interrupts(priv);
4427 spin_unlock(&priv->lock);
4428 return IRQ_NONE;
4429 }
4430
4431 /************************** EEPROM BANDS ****************************
4432 *
4433 * The iwl3945_eeprom_band definitions below provide the mapping from the
4434 * EEPROM contents to the specific channel number supported for each
4435 * band.
4436 *
4437 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4438 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4439 * The specific geography and calibration information for that channel
4440 * is contained in the eeprom map itself.
4441 *
4442 * During init, we copy the eeprom information and channel map
4443 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4444 *
4445 * channel_map_24/52 provides the index in the channel_info array for a
4446 * given channel. We have to have two separate maps as there is channel
4447 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4448 * band_2
4449 *
4450 * A value of 0xff stored in the channel_map indicates that the channel
4451 * is not supported by the hardware at all.
4452 *
4453 * A value of 0xfe in the channel_map indicates that the channel is not
4454 * valid for Tx with the current hardware. This means that
4455 * while the system can tune and receive on a given channel, it may not
4456 * be able to associate or transmit any frames on that
4457 * channel. There is no corresponding channel information for that
4458 * entry.
4459 *
4460 *********************************************************************/
4461
4462 /* 2.4 GHz */
4463 static const u8 iwl3945_eeprom_band_1[14] = {
4464 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4465 };
4466
4467 /* 5.2 GHz bands */
4468 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4469 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4470 };
4471
4472 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4473 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4474 };
4475
4476 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4477 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4478 };
4479
4480 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4481 145, 149, 153, 157, 161, 165
4482 };
4483
4484 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4485 int *eeprom_ch_count,
4486 const struct iwl_eeprom_channel
4487 **eeprom_ch_info,
4488 const u8 **eeprom_ch_index)
4489 {
4490 switch (band) {
4491 case 1: /* 2.4GHz band */
4492 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4493 *eeprom_ch_info = priv->eeprom.band_1_channels;
4494 *eeprom_ch_index = iwl3945_eeprom_band_1;
4495 break;
4496 case 2: /* 4.9GHz band */
4497 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4498 *eeprom_ch_info = priv->eeprom.band_2_channels;
4499 *eeprom_ch_index = iwl3945_eeprom_band_2;
4500 break;
4501 case 3: /* 5.2GHz band */
4502 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4503 *eeprom_ch_info = priv->eeprom.band_3_channels;
4504 *eeprom_ch_index = iwl3945_eeprom_band_3;
4505 break;
4506 case 4: /* 5.5GHz band */
4507 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4508 *eeprom_ch_info = priv->eeprom.band_4_channels;
4509 *eeprom_ch_index = iwl3945_eeprom_band_4;
4510 break;
4511 case 5: /* 5.7GHz band */
4512 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4513 *eeprom_ch_info = priv->eeprom.band_5_channels;
4514 *eeprom_ch_index = iwl3945_eeprom_band_5;
4515 break;
4516 default:
4517 BUG();
4518 return;
4519 }
4520 }
4521
4522 /**
4523 * iwl3945_get_channel_info - Find driver's private channel info
4524 *
4525 * Based on band and channel number.
4526 */
4527 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4528 enum ieee80211_band band, u16 channel)
4529 {
4530 int i;
4531
4532 switch (band) {
4533 case IEEE80211_BAND_5GHZ:
4534 for (i = 14; i < priv->channel_count; i++) {
4535 if (priv->channel_info[i].channel == channel)
4536 return &priv->channel_info[i];
4537 }
4538 break;
4539
4540 case IEEE80211_BAND_2GHZ:
4541 if (channel >= 1 && channel <= 14)
4542 return &priv->channel_info[channel - 1];
4543 break;
4544 case IEEE80211_NUM_BANDS:
4545 WARN_ON(1);
4546 }
4547
4548 return NULL;
4549 }
4550
4551 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4552 ? # x " " : "")
4553
4554 /**
4555 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4556 */
4557 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4558 {
4559 int eeprom_ch_count = 0;
4560 const u8 *eeprom_ch_index = NULL;
4561 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4562 int band, ch;
4563 struct iwl3945_channel_info *ch_info;
4564
4565 if (priv->channel_count) {
4566 IWL_DEBUG_INFO("Channel map already initialized.\n");
4567 return 0;
4568 }
4569
4570 if (priv->eeprom.version < 0x2f) {
4571 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4572 priv->eeprom.version);
4573 return -EINVAL;
4574 }
4575
4576 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4577
4578 priv->channel_count =
4579 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4580 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4581 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4582 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4583 ARRAY_SIZE(iwl3945_eeprom_band_5);
4584
4585 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4586
4587 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4588 priv->channel_count, GFP_KERNEL);
4589 if (!priv->channel_info) {
4590 IWL_ERROR("Could not allocate channel_info\n");
4591 priv->channel_count = 0;
4592 return -ENOMEM;
4593 }
4594
4595 ch_info = priv->channel_info;
4596
4597 /* Loop through the 5 EEPROM bands adding them in order to the
4598 * channel map we maintain (that contains additional information than
4599 * what just in the EEPROM) */
4600 for (band = 1; band <= 5; band++) {
4601
4602 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4603 &eeprom_ch_info, &eeprom_ch_index);
4604
4605 /* Loop through each band adding each of the channels */
4606 for (ch = 0; ch < eeprom_ch_count; ch++) {
4607 ch_info->channel = eeprom_ch_index[ch];
4608 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4609 IEEE80211_BAND_5GHZ;
4610
4611 /* permanently store EEPROM's channel regulatory flags
4612 * and max power in channel info database. */
4613 ch_info->eeprom = eeprom_ch_info[ch];
4614
4615 /* Copy the run-time flags so they are there even on
4616 * invalid channels */
4617 ch_info->flags = eeprom_ch_info[ch].flags;
4618
4619 if (!(is_channel_valid(ch_info))) {
4620 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4621 "No traffic\n",
4622 ch_info->channel,
4623 ch_info->flags,
4624 is_channel_a_band(ch_info) ?
4625 "5.2" : "2.4");
4626 ch_info++;
4627 continue;
4628 }
4629
4630 /* Initialize regulatory-based run-time data */
4631 ch_info->max_power_avg = ch_info->curr_txpow =
4632 eeprom_ch_info[ch].max_power_avg;
4633 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4634 ch_info->min_power = 0;
4635
4636 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4637 " %ddBm): Ad-Hoc %ssupported\n",
4638 ch_info->channel,
4639 is_channel_a_band(ch_info) ?
4640 "5.2" : "2.4",
4641 CHECK_AND_PRINT(VALID),
4642 CHECK_AND_PRINT(IBSS),
4643 CHECK_AND_PRINT(ACTIVE),
4644 CHECK_AND_PRINT(RADAR),
4645 CHECK_AND_PRINT(WIDE),
4646 CHECK_AND_PRINT(DFS),
4647 eeprom_ch_info[ch].flags,
4648 eeprom_ch_info[ch].max_power_avg,
4649 ((eeprom_ch_info[ch].
4650 flags & EEPROM_CHANNEL_IBSS)
4651 && !(eeprom_ch_info[ch].
4652 flags & EEPROM_CHANNEL_RADAR))
4653 ? "" : "not ");
4654
4655 /* Set the user_txpower_limit to the highest power
4656 * supported by any channel */
4657 if (eeprom_ch_info[ch].max_power_avg >
4658 priv->user_txpower_limit)
4659 priv->user_txpower_limit =
4660 eeprom_ch_info[ch].max_power_avg;
4661
4662 ch_info++;
4663 }
4664 }
4665
4666 /* Set up txpower settings in driver for all channels */
4667 if (iwl3945_txpower_set_from_eeprom(priv))
4668 return -EIO;
4669
4670 return 0;
4671 }
4672
4673 /*
4674 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4675 */
4676 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4677 {
4678 kfree(priv->channel_info);
4679 priv->channel_count = 0;
4680 }
4681
4682 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4683 * sending probe req. This should be set long enough to hear probe responses
4684 * from more than one AP. */
4685 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4686 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4687
4688 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4689 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4690
4691 /* For faster active scanning, scan will move to the next channel if fewer than
4692 * PLCP_QUIET_THRESH packets are heard on this channel within
4693 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4694 * time if it's a quiet channel (nothing responded to our probe, and there's
4695 * no other traffic).
4696 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4697 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4698 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4699
4700 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4701 * Must be set longer than active dwell time.
4702 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4703 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4704 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4705 #define IWL_PASSIVE_DWELL_BASE (100)
4706 #define IWL_CHANNEL_TUNE_TIME 5
4707
4708 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4709
4710 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4711 enum ieee80211_band band,
4712 u8 n_probes)
4713 {
4714 if (band == IEEE80211_BAND_5GHZ)
4715 return IWL_ACTIVE_DWELL_TIME_52 +
4716 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4717 else
4718 return IWL_ACTIVE_DWELL_TIME_24 +
4719 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4720 }
4721
4722 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4723 enum ieee80211_band band)
4724 {
4725 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4726 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4727 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4728
4729 if (iwl3945_is_associated(priv)) {
4730 /* If we're associated, we clamp the maximum passive
4731 * dwell time to be 98% of the beacon interval (minus
4732 * 2 * channel tune time) */
4733 passive = priv->beacon_int;
4734 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4735 passive = IWL_PASSIVE_DWELL_BASE;
4736 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4737 }
4738
4739 return passive;
4740 }
4741
4742 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4743 enum ieee80211_band band,
4744 u8 is_active, u8 n_probes,
4745 struct iwl3945_scan_channel *scan_ch)
4746 {
4747 const struct ieee80211_channel *channels = NULL;
4748 const struct ieee80211_supported_band *sband;
4749 const struct iwl3945_channel_info *ch_info;
4750 u16 passive_dwell = 0;
4751 u16 active_dwell = 0;
4752 int added, i;
4753
4754 sband = iwl3945_get_band(priv, band);
4755 if (!sband)
4756 return 0;
4757
4758 channels = sband->channels;
4759
4760 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4761 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4762
4763 if (passive_dwell <= active_dwell)
4764 passive_dwell = active_dwell + 1;
4765
4766 for (i = 0, added = 0; i < sband->n_channels; i++) {
4767 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4768 continue;
4769
4770 scan_ch->channel = channels[i].hw_value;
4771
4772 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4773 if (!is_channel_valid(ch_info)) {
4774 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4775 scan_ch->channel);
4776 continue;
4777 }
4778
4779 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4780 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4781 /* If passive , set up for auto-switch
4782 * and use long active_dwell time.
4783 */
4784 if (!is_active || is_channel_passive(ch_info) ||
4785 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4786 scan_ch->type = 0; /* passive */
4787 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4788 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4789 } else {
4790 scan_ch->type = 1; /* active */
4791 }
4792
4793 /* Set direct probe bits. These may be used both for active
4794 * scan channels (probes gets sent right away),
4795 * or for passive channels (probes get se sent only after
4796 * hearing clear Rx packet).*/
4797 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4798 if (n_probes)
4799 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4800 } else {
4801 /* uCode v1 does not allow setting direct probe bits on
4802 * passive channel. */
4803 if ((scan_ch->type & 1) && n_probes)
4804 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4805 }
4806
4807 /* Set txpower levels to defaults */
4808 scan_ch->tpc.dsp_atten = 110;
4809 /* scan_pwr_info->tpc.dsp_atten; */
4810
4811 /*scan_pwr_info->tpc.tx_gain; */
4812 if (band == IEEE80211_BAND_5GHZ)
4813 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4814 else {
4815 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4816 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4817 * power level:
4818 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4819 */
4820 }
4821
4822 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4823 scan_ch->channel,
4824 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4825 (scan_ch->type & 1) ?
4826 active_dwell : passive_dwell);
4827
4828 scan_ch++;
4829 added++;
4830 }
4831
4832 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4833 return added;
4834 }
4835
4836 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4837 struct ieee80211_rate *rates)
4838 {
4839 int i;
4840
4841 for (i = 0; i < IWL_RATE_COUNT; i++) {
4842 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4843 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4844 rates[i].hw_value_short = i;
4845 rates[i].flags = 0;
4846 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4847 /*
4848 * If CCK != 1M then set short preamble rate flag.
4849 */
4850 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4851 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4852 }
4853 }
4854 }
4855
4856 /**
4857 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4858 */
4859 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4860 {
4861 struct iwl3945_channel_info *ch;
4862 struct ieee80211_supported_band *sband;
4863 struct ieee80211_channel *channels;
4864 struct ieee80211_channel *geo_ch;
4865 struct ieee80211_rate *rates;
4866 int i = 0;
4867
4868 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4869 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4870 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4871 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4872 return 0;
4873 }
4874
4875 channels = kzalloc(sizeof(struct ieee80211_channel) *
4876 priv->channel_count, GFP_KERNEL);
4877 if (!channels)
4878 return -ENOMEM;
4879
4880 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4881 GFP_KERNEL);
4882 if (!rates) {
4883 kfree(channels);
4884 return -ENOMEM;
4885 }
4886
4887 /* 5.2GHz channels start after the 2.4GHz channels */
4888 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4889 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4890 /* just OFDM */
4891 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4892 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4893
4894 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4895 sband->channels = channels;
4896 /* OFDM & CCK */
4897 sband->bitrates = rates;
4898 sband->n_bitrates = IWL_RATE_COUNT;
4899
4900 priv->ieee_channels = channels;
4901 priv->ieee_rates = rates;
4902
4903 iwl3945_init_hw_rates(priv, rates);
4904
4905 for (i = 0; i < priv->channel_count; i++) {
4906 ch = &priv->channel_info[i];
4907
4908 /* FIXME: might be removed if scan is OK*/
4909 if (!is_channel_valid(ch))
4910 continue;
4911
4912 if (is_channel_a_band(ch))
4913 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4914 else
4915 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4916
4917 geo_ch = &sband->channels[sband->n_channels++];
4918
4919 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4920 geo_ch->max_power = ch->max_power_avg;
4921 geo_ch->max_antenna_gain = 0xff;
4922 geo_ch->hw_value = ch->channel;
4923
4924 if (is_channel_valid(ch)) {
4925 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4926 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4927
4928 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4929 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4930
4931 if (ch->flags & EEPROM_CHANNEL_RADAR)
4932 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4933
4934 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4935 priv->max_channel_txpower_limit =
4936 ch->max_power_avg;
4937 } else {
4938 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4939 }
4940
4941 /* Save flags for reg domain usage */
4942 geo_ch->orig_flags = geo_ch->flags;
4943
4944 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4945 ch->channel, geo_ch->center_freq,
4946 is_channel_a_band(ch) ? "5.2" : "2.4",
4947 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4948 "restricted" : "valid",
4949 geo_ch->flags);
4950 }
4951
4952 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4953 priv->cfg->sku & IWL_SKU_A) {
4954 printk(KERN_INFO DRV_NAME
4955 ": Incorrectly detected BG card as ABG. Please send "
4956 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4957 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4958 priv->cfg->sku &= ~IWL_SKU_A;
4959 }
4960
4961 printk(KERN_INFO DRV_NAME
4962 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4963 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4964 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4965
4966 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4967 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4968 &priv->bands[IEEE80211_BAND_2GHZ];
4969 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4970 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4971 &priv->bands[IEEE80211_BAND_5GHZ];
4972
4973 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4974
4975 return 0;
4976 }
4977
4978 /*
4979 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4980 */
4981 static void iwl3945_free_geos(struct iwl3945_priv *priv)
4982 {
4983 kfree(priv->ieee_channels);
4984 kfree(priv->ieee_rates);
4985 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4986 }
4987
4988 /******************************************************************************
4989 *
4990 * uCode download functions
4991 *
4992 ******************************************************************************/
4993
4994 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
4995 {
4996 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4997 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4998 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4999 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5000 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5001 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5002 }
5003
5004 /**
5005 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5006 * looking at all data.
5007 */
5008 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len)
5009 {
5010 u32 val;
5011 u32 save_len = len;
5012 int rc = 0;
5013 u32 errcnt;
5014
5015 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5016
5017 rc = iwl3945_grab_nic_access(priv);
5018 if (rc)
5019 return rc;
5020
5021 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5022 IWL39_RTC_INST_LOWER_BOUND);
5023
5024 errcnt = 0;
5025 for (; len > 0; len -= sizeof(u32), image++) {
5026 /* read data comes through single port, auto-incr addr */
5027 /* NOTE: Use the debugless read so we don't flood kernel log
5028 * if IWL_DL_IO is set */
5029 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5030 if (val != le32_to_cpu(*image)) {
5031 IWL_ERROR("uCode INST section is invalid at "
5032 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5033 save_len - len, val, le32_to_cpu(*image));
5034 rc = -EIO;
5035 errcnt++;
5036 if (errcnt >= 20)
5037 break;
5038 }
5039 }
5040
5041 iwl3945_release_nic_access(priv);
5042
5043 if (!errcnt)
5044 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5045
5046 return rc;
5047 }
5048
5049
5050 /**
5051 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5052 * using sample data 100 bytes apart. If these sample points are good,
5053 * it's a pretty good bet that everything between them is good, too.
5054 */
5055 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5056 {
5057 u32 val;
5058 int rc = 0;
5059 u32 errcnt = 0;
5060 u32 i;
5061
5062 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5063
5064 rc = iwl3945_grab_nic_access(priv);
5065 if (rc)
5066 return rc;
5067
5068 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5069 /* read data comes through single port, auto-incr addr */
5070 /* NOTE: Use the debugless read so we don't flood kernel log
5071 * if IWL_DL_IO is set */
5072 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5073 i + IWL39_RTC_INST_LOWER_BOUND);
5074 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5075 if (val != le32_to_cpu(*image)) {
5076 #if 0 /* Enable this if you want to see details */
5077 IWL_ERROR("uCode INST section is invalid at "
5078 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5079 i, val, *image);
5080 #endif
5081 rc = -EIO;
5082 errcnt++;
5083 if (errcnt >= 3)
5084 break;
5085 }
5086 }
5087
5088 iwl3945_release_nic_access(priv);
5089
5090 return rc;
5091 }
5092
5093
5094 /**
5095 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5096 * and verify its contents
5097 */
5098 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5099 {
5100 __le32 *image;
5101 u32 len;
5102 int rc = 0;
5103
5104 /* Try bootstrap */
5105 image = (__le32 *)priv->ucode_boot.v_addr;
5106 len = priv->ucode_boot.len;
5107 rc = iwl3945_verify_inst_sparse(priv, image, len);
5108 if (rc == 0) {
5109 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5110 return 0;
5111 }
5112
5113 /* Try initialize */
5114 image = (__le32 *)priv->ucode_init.v_addr;
5115 len = priv->ucode_init.len;
5116 rc = iwl3945_verify_inst_sparse(priv, image, len);
5117 if (rc == 0) {
5118 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5119 return 0;
5120 }
5121
5122 /* Try runtime/protocol */
5123 image = (__le32 *)priv->ucode_code.v_addr;
5124 len = priv->ucode_code.len;
5125 rc = iwl3945_verify_inst_sparse(priv, image, len);
5126 if (rc == 0) {
5127 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5128 return 0;
5129 }
5130
5131 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5132
5133 /* Since nothing seems to match, show first several data entries in
5134 * instruction SRAM, so maybe visual inspection will give a clue.
5135 * Selection of bootstrap image (vs. other images) is arbitrary. */
5136 image = (__le32 *)priv->ucode_boot.v_addr;
5137 len = priv->ucode_boot.len;
5138 rc = iwl3945_verify_inst_full(priv, image, len);
5139
5140 return rc;
5141 }
5142
5143
5144 /* check contents of special bootstrap uCode SRAM */
5145 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5146 {
5147 __le32 *image = priv->ucode_boot.v_addr;
5148 u32 len = priv->ucode_boot.len;
5149 u32 reg;
5150 u32 val;
5151
5152 IWL_DEBUG_INFO("Begin verify bsm\n");
5153
5154 /* verify BSM SRAM contents */
5155 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5156 for (reg = BSM_SRAM_LOWER_BOUND;
5157 reg < BSM_SRAM_LOWER_BOUND + len;
5158 reg += sizeof(u32), image++) {
5159 val = iwl3945_read_prph(priv, reg);
5160 if (val != le32_to_cpu(*image)) {
5161 IWL_ERROR("BSM uCode verification failed at "
5162 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5163 BSM_SRAM_LOWER_BOUND,
5164 reg - BSM_SRAM_LOWER_BOUND, len,
5165 val, le32_to_cpu(*image));
5166 return -EIO;
5167 }
5168 }
5169
5170 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5171
5172 return 0;
5173 }
5174
5175 /**
5176 * iwl3945_load_bsm - Load bootstrap instructions
5177 *
5178 * BSM operation:
5179 *
5180 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5181 * in special SRAM that does not power down during RFKILL. When powering back
5182 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5183 * the bootstrap program into the on-board processor, and starts it.
5184 *
5185 * The bootstrap program loads (via DMA) instructions and data for a new
5186 * program from host DRAM locations indicated by the host driver in the
5187 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5188 * automatically.
5189 *
5190 * When initializing the NIC, the host driver points the BSM to the
5191 * "initialize" uCode image. This uCode sets up some internal data, then
5192 * notifies host via "initialize alive" that it is complete.
5193 *
5194 * The host then replaces the BSM_DRAM_* pointer values to point to the
5195 * normal runtime uCode instructions and a backup uCode data cache buffer
5196 * (filled initially with starting data values for the on-board processor),
5197 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5198 * which begins normal operation.
5199 *
5200 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5201 * the backup data cache in DRAM before SRAM is powered down.
5202 *
5203 * When powering back up, the BSM loads the bootstrap program. This reloads
5204 * the runtime uCode instructions and the backup data cache into SRAM,
5205 * and re-launches the runtime uCode from where it left off.
5206 */
5207 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5208 {
5209 __le32 *image = priv->ucode_boot.v_addr;
5210 u32 len = priv->ucode_boot.len;
5211 dma_addr_t pinst;
5212 dma_addr_t pdata;
5213 u32 inst_len;
5214 u32 data_len;
5215 int rc;
5216 int i;
5217 u32 done;
5218 u32 reg_offset;
5219
5220 IWL_DEBUG_INFO("Begin load bsm\n");
5221
5222 /* make sure bootstrap program is no larger than BSM's SRAM size */
5223 if (len > IWL39_MAX_BSM_SIZE)
5224 return -EINVAL;
5225
5226 /* Tell bootstrap uCode where to find the "Initialize" uCode
5227 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5228 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5229 * after the "initialize" uCode has run, to point to
5230 * runtime/protocol instructions and backup data cache. */
5231 pinst = priv->ucode_init.p_addr;
5232 pdata = priv->ucode_init_data.p_addr;
5233 inst_len = priv->ucode_init.len;
5234 data_len = priv->ucode_init_data.len;
5235
5236 rc = iwl3945_grab_nic_access(priv);
5237 if (rc)
5238 return rc;
5239
5240 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5241 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5242 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5243 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5244
5245 /* Fill BSM memory with bootstrap instructions */
5246 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5247 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5248 reg_offset += sizeof(u32), image++)
5249 _iwl3945_write_prph(priv, reg_offset,
5250 le32_to_cpu(*image));
5251
5252 rc = iwl3945_verify_bsm(priv);
5253 if (rc) {
5254 iwl3945_release_nic_access(priv);
5255 return rc;
5256 }
5257
5258 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5259 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5260 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5261 IWL39_RTC_INST_LOWER_BOUND);
5262 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5263
5264 /* Load bootstrap code into instruction SRAM now,
5265 * to prepare to load "initialize" uCode */
5266 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5267 BSM_WR_CTRL_REG_BIT_START);
5268
5269 /* Wait for load of bootstrap uCode to finish */
5270 for (i = 0; i < 100; i++) {
5271 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5272 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5273 break;
5274 udelay(10);
5275 }
5276 if (i < 100)
5277 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5278 else {
5279 IWL_ERROR("BSM write did not complete!\n");
5280 return -EIO;
5281 }
5282
5283 /* Enable future boot loads whenever power management unit triggers it
5284 * (e.g. when powering back up after power-save shutdown) */
5285 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5286 BSM_WR_CTRL_REG_BIT_START_EN);
5287
5288 iwl3945_release_nic_access(priv);
5289
5290 return 0;
5291 }
5292
5293 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5294 {
5295 /* Remove all resets to allow NIC to operate */
5296 iwl3945_write32(priv, CSR_RESET, 0);
5297 }
5298
5299 /**
5300 * iwl3945_read_ucode - Read uCode images from disk file.
5301 *
5302 * Copy into buffers for card to fetch via bus-mastering
5303 */
5304 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5305 {
5306 struct iwl3945_ucode *ucode;
5307 int ret = -EINVAL, index;
5308 const struct firmware *ucode_raw;
5309 /* firmware file name contains uCode/driver compatibility version */
5310 const char *name_pre = priv->cfg->fw_name_pre;
5311 const unsigned int api_max = priv->cfg->ucode_api_max;
5312 const unsigned int api_min = priv->cfg->ucode_api_min;
5313 char buf[25];
5314 u8 *src;
5315 size_t len;
5316 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5317
5318 /* Ask kernel firmware_class module to get the boot firmware off disk.
5319 * request_firmware() is synchronous, file is in memory on return. */
5320 for (index = api_max; index >= api_min; index--) {
5321 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5322 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5323 if (ret < 0) {
5324 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5325 buf, ret);
5326 if (ret == -ENOENT)
5327 continue;
5328 else
5329 goto error;
5330 } else {
5331 if (index < api_max)
5332 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
5333 buf, api_max);
5334 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5335 buf, ucode_raw->size);
5336 break;
5337 }
5338 }
5339
5340 if (ret < 0)
5341 goto error;
5342
5343 /* Make sure that we got at least our header! */
5344 if (ucode_raw->size < sizeof(*ucode)) {
5345 IWL_ERROR("File size way too small!\n");
5346 ret = -EINVAL;
5347 goto err_release;
5348 }
5349
5350 /* Data from ucode file: header followed by uCode images */
5351 ucode = (void *)ucode_raw->data;
5352
5353 priv->ucode_ver = le32_to_cpu(ucode->ver);
5354 api_ver = IWL_UCODE_API(priv->ucode_ver);
5355 inst_size = le32_to_cpu(ucode->inst_size);
5356 data_size = le32_to_cpu(ucode->data_size);
5357 init_size = le32_to_cpu(ucode->init_size);
5358 init_data_size = le32_to_cpu(ucode->init_data_size);
5359 boot_size = le32_to_cpu(ucode->boot_size);
5360
5361 /* api_ver should match the api version forming part of the
5362 * firmware filename ... but we don't check for that and only rely
5363 * on the API version read from firware header from here on forward */
5364
5365 if (api_ver < api_min || api_ver > api_max) {
5366 IWL_ERROR("Driver unable to support your firmware API. "
5367 "Driver supports v%u, firmware is v%u.\n",
5368 api_max, api_ver);
5369 priv->ucode_ver = 0;
5370 ret = -EINVAL;
5371 goto err_release;
5372 }
5373 if (api_ver != api_max)
5374 IWL_ERROR("Firmware has old API version. Expected %u, "
5375 "got %u. New firmware can be obtained "
5376 "from http://www.intellinuxwireless.org.\n",
5377 api_max, api_ver);
5378
5379 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
5380 IWL_UCODE_MAJOR(priv->ucode_ver),
5381 IWL_UCODE_MINOR(priv->ucode_ver),
5382 IWL_UCODE_API(priv->ucode_ver),
5383 IWL_UCODE_SERIAL(priv->ucode_ver));
5384 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5385 priv->ucode_ver);
5386 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5387 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5388 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5389 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5390 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5391
5392
5393 /* Verify size of file vs. image size info in file's header */
5394 if (ucode_raw->size < sizeof(*ucode) +
5395 inst_size + data_size + init_size +
5396 init_data_size + boot_size) {
5397
5398 IWL_DEBUG_INFO("uCode file size %d too small\n",
5399 (int)ucode_raw->size);
5400 ret = -EINVAL;
5401 goto err_release;
5402 }
5403
5404 /* Verify that uCode images will fit in card's SRAM */
5405 if (inst_size > IWL39_MAX_INST_SIZE) {
5406 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5407 inst_size);
5408 ret = -EINVAL;
5409 goto err_release;
5410 }
5411
5412 if (data_size > IWL39_MAX_DATA_SIZE) {
5413 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5414 data_size);
5415 ret = -EINVAL;
5416 goto err_release;
5417 }
5418 if (init_size > IWL39_MAX_INST_SIZE) {
5419 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5420 init_size);
5421 ret = -EINVAL;
5422 goto err_release;
5423 }
5424 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5425 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5426 init_data_size);
5427 ret = -EINVAL;
5428 goto err_release;
5429 }
5430 if (boot_size > IWL39_MAX_BSM_SIZE) {
5431 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5432 boot_size);
5433 ret = -EINVAL;
5434 goto err_release;
5435 }
5436
5437 /* Allocate ucode buffers for card's bus-master loading ... */
5438
5439 /* Runtime instructions and 2 copies of data:
5440 * 1) unmodified from disk
5441 * 2) backup cache for save/restore during power-downs */
5442 priv->ucode_code.len = inst_size;
5443 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5444
5445 priv->ucode_data.len = data_size;
5446 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5447
5448 priv->ucode_data_backup.len = data_size;
5449 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5450
5451 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5452 !priv->ucode_data_backup.v_addr)
5453 goto err_pci_alloc;
5454
5455 /* Initialization instructions and data */
5456 if (init_size && init_data_size) {
5457 priv->ucode_init.len = init_size;
5458 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5459
5460 priv->ucode_init_data.len = init_data_size;
5461 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5462
5463 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5464 goto err_pci_alloc;
5465 }
5466
5467 /* Bootstrap (instructions only, no data) */
5468 if (boot_size) {
5469 priv->ucode_boot.len = boot_size;
5470 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5471
5472 if (!priv->ucode_boot.v_addr)
5473 goto err_pci_alloc;
5474 }
5475
5476 /* Copy images into buffers for card's bus-master reads ... */
5477
5478 /* Runtime instructions (first block of data in file) */
5479 src = &ucode->data[0];
5480 len = priv->ucode_code.len;
5481 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5482 memcpy(priv->ucode_code.v_addr, src, len);
5483 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5484 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5485
5486 /* Runtime data (2nd block)
5487 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5488 src = &ucode->data[inst_size];
5489 len = priv->ucode_data.len;
5490 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5491 memcpy(priv->ucode_data.v_addr, src, len);
5492 memcpy(priv->ucode_data_backup.v_addr, src, len);
5493
5494 /* Initialization instructions (3rd block) */
5495 if (init_size) {
5496 src = &ucode->data[inst_size + data_size];
5497 len = priv->ucode_init.len;
5498 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5499 len);
5500 memcpy(priv->ucode_init.v_addr, src, len);
5501 }
5502
5503 /* Initialization data (4th block) */
5504 if (init_data_size) {
5505 src = &ucode->data[inst_size + data_size + init_size];
5506 len = priv->ucode_init_data.len;
5507 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5508 (int)len);
5509 memcpy(priv->ucode_init_data.v_addr, src, len);
5510 }
5511
5512 /* Bootstrap instructions (5th block) */
5513 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5514 len = priv->ucode_boot.len;
5515 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5516 (int)len);
5517 memcpy(priv->ucode_boot.v_addr, src, len);
5518
5519 /* We have our copies now, allow OS release its copies */
5520 release_firmware(ucode_raw);
5521 return 0;
5522
5523 err_pci_alloc:
5524 IWL_ERROR("failed to allocate pci memory\n");
5525 ret = -ENOMEM;
5526 iwl3945_dealloc_ucode_pci(priv);
5527
5528 err_release:
5529 release_firmware(ucode_raw);
5530
5531 error:
5532 return ret;
5533 }
5534
5535
5536 /**
5537 * iwl3945_set_ucode_ptrs - Set uCode address location
5538 *
5539 * Tell initialization uCode where to find runtime uCode.
5540 *
5541 * BSM registers initially contain pointers to initialization uCode.
5542 * We need to replace them to load runtime uCode inst and data,
5543 * and to save runtime data when powering down.
5544 */
5545 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5546 {
5547 dma_addr_t pinst;
5548 dma_addr_t pdata;
5549 int rc = 0;
5550 unsigned long flags;
5551
5552 /* bits 31:0 for 3945 */
5553 pinst = priv->ucode_code.p_addr;
5554 pdata = priv->ucode_data_backup.p_addr;
5555
5556 spin_lock_irqsave(&priv->lock, flags);
5557 rc = iwl3945_grab_nic_access(priv);
5558 if (rc) {
5559 spin_unlock_irqrestore(&priv->lock, flags);
5560 return rc;
5561 }
5562
5563 /* Tell bootstrap uCode where to find image to load */
5564 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5565 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5566 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5567 priv->ucode_data.len);
5568
5569 /* Inst byte count must be last to set up, bit 31 signals uCode
5570 * that all new ptr/size info is in place */
5571 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5572 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5573
5574 iwl3945_release_nic_access(priv);
5575
5576 spin_unlock_irqrestore(&priv->lock, flags);
5577
5578 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5579
5580 return rc;
5581 }
5582
5583 /**
5584 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5585 *
5586 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5587 *
5588 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5589 */
5590 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5591 {
5592 /* Check alive response for "valid" sign from uCode */
5593 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5594 /* We had an error bringing up the hardware, so take it
5595 * all the way back down so we can try again */
5596 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5597 goto restart;
5598 }
5599
5600 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5601 * This is a paranoid check, because we would not have gotten the
5602 * "initialize" alive if code weren't properly loaded. */
5603 if (iwl3945_verify_ucode(priv)) {
5604 /* Runtime instruction load was bad;
5605 * take it all the way back down so we can try again */
5606 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5607 goto restart;
5608 }
5609
5610 /* Send pointers to protocol/runtime uCode image ... init code will
5611 * load and launch runtime uCode, which will send us another "Alive"
5612 * notification. */
5613 IWL_DEBUG_INFO("Initialization Alive received.\n");
5614 if (iwl3945_set_ucode_ptrs(priv)) {
5615 /* Runtime instruction load won't happen;
5616 * take it all the way back down so we can try again */
5617 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5618 goto restart;
5619 }
5620 return;
5621
5622 restart:
5623 queue_work(priv->workqueue, &priv->restart);
5624 }
5625
5626
5627 /* temporary */
5628 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5629 struct sk_buff *skb);
5630
5631 /**
5632 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5633 * from protocol/runtime uCode (initialization uCode's
5634 * Alive gets handled by iwl3945_init_alive_start()).
5635 */
5636 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5637 {
5638 int rc = 0;
5639 int thermal_spin = 0;
5640 u32 rfkill;
5641
5642 IWL_DEBUG_INFO("Runtime Alive received.\n");
5643
5644 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5645 /* We had an error bringing up the hardware, so take it
5646 * all the way back down so we can try again */
5647 IWL_DEBUG_INFO("Alive failed.\n");
5648 goto restart;
5649 }
5650
5651 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5652 * This is a paranoid check, because we would not have gotten the
5653 * "runtime" alive if code weren't properly loaded. */
5654 if (iwl3945_verify_ucode(priv)) {
5655 /* Runtime instruction load was bad;
5656 * take it all the way back down so we can try again */
5657 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5658 goto restart;
5659 }
5660
5661 iwl3945_clear_stations_table(priv);
5662
5663 rc = iwl3945_grab_nic_access(priv);
5664 if (rc) {
5665 IWL_WARNING("Can not read RFKILL status from adapter\n");
5666 return;
5667 }
5668
5669 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5670 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5671 iwl3945_release_nic_access(priv);
5672
5673 if (rfkill & 0x1) {
5674 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5675 /* if RFKILL is not on, then wait for thermal
5676 * sensor in adapter to kick in */
5677 while (iwl3945_hw_get_temperature(priv) == 0) {
5678 thermal_spin++;
5679 udelay(10);
5680 }
5681
5682 if (thermal_spin)
5683 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5684 thermal_spin * 10);
5685 } else
5686 set_bit(STATUS_RF_KILL_HW, &priv->status);
5687
5688 /* After the ALIVE response, we can send commands to 3945 uCode */
5689 set_bit(STATUS_ALIVE, &priv->status);
5690
5691 /* Clear out the uCode error bit if it is set */
5692 clear_bit(STATUS_FW_ERROR, &priv->status);
5693
5694 if (iwl3945_is_rfkill(priv))
5695 return;
5696
5697 ieee80211_wake_queues(priv->hw);
5698
5699 priv->active_rate = priv->rates_mask;
5700 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5701
5702 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5703
5704 if (iwl3945_is_associated(priv)) {
5705 struct iwl3945_rxon_cmd *active_rxon =
5706 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5707
5708 memcpy(&priv->staging_rxon, &priv->active_rxon,
5709 sizeof(priv->staging_rxon));
5710 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5711 } else {
5712 /* Initialize our rx_config data */
5713 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5714 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5715 }
5716
5717 /* Configure Bluetooth device coexistence support */
5718 iwl3945_send_bt_config(priv);
5719
5720 /* Configure the adapter for unassociated operation */
5721 iwl3945_commit_rxon(priv);
5722
5723 iwl3945_reg_txpower_periodic(priv);
5724
5725 iwl3945_led_register(priv);
5726
5727 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5728 set_bit(STATUS_READY, &priv->status);
5729 wake_up_interruptible(&priv->wait_command_queue);
5730
5731 if (priv->error_recovering)
5732 iwl3945_error_recovery(priv);
5733
5734 /* reassociate for ADHOC mode */
5735 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5736 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5737 priv->vif);
5738 if (beacon)
5739 iwl3945_mac_beacon_update(priv->hw, beacon);
5740 }
5741
5742 return;
5743
5744 restart:
5745 queue_work(priv->workqueue, &priv->restart);
5746 }
5747
5748 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5749
5750 static void __iwl3945_down(struct iwl3945_priv *priv)
5751 {
5752 unsigned long flags;
5753 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5754 struct ieee80211_conf *conf = NULL;
5755
5756 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5757
5758 conf = ieee80211_get_hw_conf(priv->hw);
5759
5760 if (!exit_pending)
5761 set_bit(STATUS_EXIT_PENDING, &priv->status);
5762
5763 iwl3945_led_unregister(priv);
5764 iwl3945_clear_stations_table(priv);
5765
5766 /* Unblock any waiting calls */
5767 wake_up_interruptible_all(&priv->wait_command_queue);
5768
5769 /* Wipe out the EXIT_PENDING status bit if we are not actually
5770 * exiting the module */
5771 if (!exit_pending)
5772 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5773
5774 /* stop and reset the on-board processor */
5775 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5776
5777 /* tell the device to stop sending interrupts */
5778 spin_lock_irqsave(&priv->lock, flags);
5779 iwl3945_disable_interrupts(priv);
5780 spin_unlock_irqrestore(&priv->lock, flags);
5781 iwl_synchronize_irq(priv);
5782
5783 if (priv->mac80211_registered)
5784 ieee80211_stop_queues(priv->hw);
5785
5786 /* If we have not previously called iwl3945_init() then
5787 * clear all bits but the RF Kill and SUSPEND bits and return */
5788 if (!iwl3945_is_init(priv)) {
5789 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5790 STATUS_RF_KILL_HW |
5791 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5792 STATUS_RF_KILL_SW |
5793 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5794 STATUS_GEO_CONFIGURED |
5795 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5796 STATUS_IN_SUSPEND |
5797 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5798 STATUS_EXIT_PENDING;
5799 goto exit;
5800 }
5801
5802 /* ...otherwise clear out all the status bits but the RF Kill and
5803 * SUSPEND bits and continue taking the NIC down. */
5804 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5805 STATUS_RF_KILL_HW |
5806 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5807 STATUS_RF_KILL_SW |
5808 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5809 STATUS_GEO_CONFIGURED |
5810 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5811 STATUS_IN_SUSPEND |
5812 test_bit(STATUS_FW_ERROR, &priv->status) <<
5813 STATUS_FW_ERROR |
5814 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5815 STATUS_EXIT_PENDING;
5816
5817 spin_lock_irqsave(&priv->lock, flags);
5818 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5819 spin_unlock_irqrestore(&priv->lock, flags);
5820
5821 iwl3945_hw_txq_ctx_stop(priv);
5822 iwl3945_hw_rxq_stop(priv);
5823
5824 spin_lock_irqsave(&priv->lock, flags);
5825 if (!iwl3945_grab_nic_access(priv)) {
5826 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5827 APMG_CLK_VAL_DMA_CLK_RQT);
5828 iwl3945_release_nic_access(priv);
5829 }
5830 spin_unlock_irqrestore(&priv->lock, flags);
5831
5832 udelay(5);
5833
5834 iwl3945_hw_nic_stop_master(priv);
5835 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5836 iwl3945_hw_nic_reset(priv);
5837
5838 exit:
5839 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5840
5841 if (priv->ibss_beacon)
5842 dev_kfree_skb(priv->ibss_beacon);
5843 priv->ibss_beacon = NULL;
5844
5845 /* clear out any free frames */
5846 iwl3945_clear_free_frames(priv);
5847 }
5848
5849 static void iwl3945_down(struct iwl3945_priv *priv)
5850 {
5851 mutex_lock(&priv->mutex);
5852 __iwl3945_down(priv);
5853 mutex_unlock(&priv->mutex);
5854
5855 iwl3945_cancel_deferred_work(priv);
5856 }
5857
5858 #define MAX_HW_RESTARTS 5
5859
5860 static int __iwl3945_up(struct iwl3945_priv *priv)
5861 {
5862 int rc, i;
5863
5864 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5865 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5866 return -EIO;
5867 }
5868
5869 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5870 IWL_WARNING("Radio disabled by SW RF kill (module "
5871 "parameter)\n");
5872 return -ENODEV;
5873 }
5874
5875 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5876 IWL_ERROR("ucode not available for device bring up\n");
5877 return -EIO;
5878 }
5879
5880 /* If platform's RF_KILL switch is NOT set to KILL */
5881 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5882 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5883 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5884 else {
5885 set_bit(STATUS_RF_KILL_HW, &priv->status);
5886 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5887 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5888 return -ENODEV;
5889 }
5890 }
5891
5892 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5893
5894 rc = iwl3945_hw_nic_init(priv);
5895 if (rc) {
5896 IWL_ERROR("Unable to int nic\n");
5897 return rc;
5898 }
5899
5900 /* make sure rfkill handshake bits are cleared */
5901 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5902 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5903 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5904
5905 /* clear (again), then enable host interrupts */
5906 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5907 iwl3945_enable_interrupts(priv);
5908
5909 /* really make sure rfkill handshake bits are cleared */
5910 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5911 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5912
5913 /* Copy original ucode data image from disk into backup cache.
5914 * This will be used to initialize the on-board processor's
5915 * data SRAM for a clean start when the runtime program first loads. */
5916 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5917 priv->ucode_data.len);
5918
5919 /* We return success when we resume from suspend and rf_kill is on. */
5920 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5921 return 0;
5922
5923 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5924
5925 iwl3945_clear_stations_table(priv);
5926
5927 /* load bootstrap state machine,
5928 * load bootstrap program into processor's memory,
5929 * prepare to load the "initialize" uCode */
5930 rc = iwl3945_load_bsm(priv);
5931
5932 if (rc) {
5933 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5934 continue;
5935 }
5936
5937 /* start card; "initialize" will load runtime ucode */
5938 iwl3945_nic_start(priv);
5939
5940 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5941
5942 return 0;
5943 }
5944
5945 set_bit(STATUS_EXIT_PENDING, &priv->status);
5946 __iwl3945_down(priv);
5947 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5948
5949 /* tried to restart and config the device for as long as our
5950 * patience could withstand */
5951 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5952 return -EIO;
5953 }
5954
5955
5956 /*****************************************************************************
5957 *
5958 * Workqueue callbacks
5959 *
5960 *****************************************************************************/
5961
5962 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5963 {
5964 struct iwl3945_priv *priv =
5965 container_of(data, struct iwl3945_priv, init_alive_start.work);
5966
5967 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5968 return;
5969
5970 mutex_lock(&priv->mutex);
5971 iwl3945_init_alive_start(priv);
5972 mutex_unlock(&priv->mutex);
5973 }
5974
5975 static void iwl3945_bg_alive_start(struct work_struct *data)
5976 {
5977 struct iwl3945_priv *priv =
5978 container_of(data, struct iwl3945_priv, alive_start.work);
5979
5980 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5981 return;
5982
5983 mutex_lock(&priv->mutex);
5984 iwl3945_alive_start(priv);
5985 mutex_unlock(&priv->mutex);
5986 }
5987
5988 static void iwl3945_bg_rf_kill(struct work_struct *work)
5989 {
5990 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
5991
5992 wake_up_interruptible(&priv->wait_command_queue);
5993
5994 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5995 return;
5996
5997 mutex_lock(&priv->mutex);
5998
5999 if (!iwl3945_is_rfkill(priv)) {
6000 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6001 "HW and/or SW RF Kill no longer active, restarting "
6002 "device\n");
6003 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6004 queue_work(priv->workqueue, &priv->restart);
6005 } else {
6006
6007 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6008 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6009 "disabled by SW switch\n");
6010 else
6011 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6012 "Kill switch must be turned off for "
6013 "wireless networking to work.\n");
6014 }
6015
6016 mutex_unlock(&priv->mutex);
6017 iwl3945_rfkill_set_hw_state(priv);
6018 }
6019
6020 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6021
6022 static void iwl3945_bg_scan_check(struct work_struct *data)
6023 {
6024 struct iwl3945_priv *priv =
6025 container_of(data, struct iwl3945_priv, scan_check.work);
6026
6027 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6028 return;
6029
6030 mutex_lock(&priv->mutex);
6031 if (test_bit(STATUS_SCANNING, &priv->status) ||
6032 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6033 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6034 "Scan completion watchdog resetting adapter (%dms)\n",
6035 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6036
6037 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6038 iwl3945_send_scan_abort(priv);
6039 }
6040 mutex_unlock(&priv->mutex);
6041 }
6042
6043 static void iwl3945_bg_request_scan(struct work_struct *data)
6044 {
6045 struct iwl3945_priv *priv =
6046 container_of(data, struct iwl3945_priv, request_scan);
6047 struct iwl3945_host_cmd cmd = {
6048 .id = REPLY_SCAN_CMD,
6049 .len = sizeof(struct iwl3945_scan_cmd),
6050 .meta.flags = CMD_SIZE_HUGE,
6051 };
6052 int rc = 0;
6053 struct iwl3945_scan_cmd *scan;
6054 struct ieee80211_conf *conf = NULL;
6055 u8 n_probes = 2;
6056 enum ieee80211_band band;
6057 DECLARE_SSID_BUF(ssid);
6058
6059 conf = ieee80211_get_hw_conf(priv->hw);
6060
6061 mutex_lock(&priv->mutex);
6062
6063 if (!iwl3945_is_ready(priv)) {
6064 IWL_WARNING("request scan called when driver not ready.\n");
6065 goto done;
6066 }
6067
6068 /* Make sure the scan wasn't canceled before this queued work
6069 * was given the chance to run... */
6070 if (!test_bit(STATUS_SCANNING, &priv->status))
6071 goto done;
6072
6073 /* This should never be called or scheduled if there is currently
6074 * a scan active in the hardware. */
6075 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6076 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6077 "Ignoring second request.\n");
6078 rc = -EIO;
6079 goto done;
6080 }
6081
6082 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6083 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6084 goto done;
6085 }
6086
6087 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6088 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6089 goto done;
6090 }
6091
6092 if (iwl3945_is_rfkill(priv)) {
6093 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6094 goto done;
6095 }
6096
6097 if (!test_bit(STATUS_READY, &priv->status)) {
6098 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6099 goto done;
6100 }
6101
6102 if (!priv->scan_bands) {
6103 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6104 goto done;
6105 }
6106
6107 if (!priv->scan) {
6108 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6109 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6110 if (!priv->scan) {
6111 rc = -ENOMEM;
6112 goto done;
6113 }
6114 }
6115 scan = priv->scan;
6116 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6117
6118 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6119 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6120
6121 if (iwl3945_is_associated(priv)) {
6122 u16 interval = 0;
6123 u32 extra;
6124 u32 suspend_time = 100;
6125 u32 scan_suspend_time = 100;
6126 unsigned long flags;
6127
6128 IWL_DEBUG_INFO("Scanning while associated...\n");
6129
6130 spin_lock_irqsave(&priv->lock, flags);
6131 interval = priv->beacon_int;
6132 spin_unlock_irqrestore(&priv->lock, flags);
6133
6134 scan->suspend_time = 0;
6135 scan->max_out_time = cpu_to_le32(200 * 1024);
6136 if (!interval)
6137 interval = suspend_time;
6138 /*
6139 * suspend time format:
6140 * 0-19: beacon interval in usec (time before exec.)
6141 * 20-23: 0
6142 * 24-31: number of beacons (suspend between channels)
6143 */
6144
6145 extra = (suspend_time / interval) << 24;
6146 scan_suspend_time = 0xFF0FFFFF &
6147 (extra | ((suspend_time % interval) * 1024));
6148
6149 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6150 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6151 scan_suspend_time, interval);
6152 }
6153
6154 /* We should add the ability for user to lock to PASSIVE ONLY */
6155 if (priv->one_direct_scan) {
6156 IWL_DEBUG_SCAN
6157 ("Kicking off one direct scan for '%s'\n",
6158 print_ssid(ssid, priv->direct_ssid,
6159 priv->direct_ssid_len));
6160 scan->direct_scan[0].id = WLAN_EID_SSID;
6161 scan->direct_scan[0].len = priv->direct_ssid_len;
6162 memcpy(scan->direct_scan[0].ssid,
6163 priv->direct_ssid, priv->direct_ssid_len);
6164 n_probes++;
6165 } else
6166 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6167
6168 /* We don't build a direct scan probe request; the uCode will do
6169 * that based on the direct_mask added to each channel entry */
6170 scan->tx_cmd.len = cpu_to_le16(
6171 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6172 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6173 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6174 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6175 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6176
6177 /* flags + rate selection */
6178
6179 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6180 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6181 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6182 scan->good_CRC_th = 0;
6183 band = IEEE80211_BAND_2GHZ;
6184 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6185 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6186 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6187 band = IEEE80211_BAND_5GHZ;
6188 } else {
6189 IWL_WARNING("Invalid scan band count\n");
6190 goto done;
6191 }
6192
6193 /* select Rx antennas */
6194 scan->flags |= iwl3945_get_antenna_flags(priv);
6195
6196 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6197 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6198
6199 scan->channel_count =
6200 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6201 n_probes,
6202 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6203
6204 if (scan->channel_count == 0) {
6205 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6206 goto done;
6207 }
6208
6209 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6210 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6211 cmd.data = scan;
6212 scan->len = cpu_to_le16(cmd.len);
6213
6214 set_bit(STATUS_SCAN_HW, &priv->status);
6215 rc = iwl3945_send_cmd_sync(priv, &cmd);
6216 if (rc)
6217 goto done;
6218
6219 queue_delayed_work(priv->workqueue, &priv->scan_check,
6220 IWL_SCAN_CHECK_WATCHDOG);
6221
6222 mutex_unlock(&priv->mutex);
6223 return;
6224
6225 done:
6226 /* can not perform scan make sure we clear scanning
6227 * bits from status so next scan request can be performed.
6228 * if we dont clear scanning status bit here all next scan
6229 * will fail
6230 */
6231 clear_bit(STATUS_SCAN_HW, &priv->status);
6232 clear_bit(STATUS_SCANNING, &priv->status);
6233
6234 /* inform mac80211 scan aborted */
6235 queue_work(priv->workqueue, &priv->scan_completed);
6236 mutex_unlock(&priv->mutex);
6237 }
6238
6239 static void iwl3945_bg_up(struct work_struct *data)
6240 {
6241 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6242
6243 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6244 return;
6245
6246 mutex_lock(&priv->mutex);
6247 __iwl3945_up(priv);
6248 mutex_unlock(&priv->mutex);
6249 iwl3945_rfkill_set_hw_state(priv);
6250 }
6251
6252 static void iwl3945_bg_restart(struct work_struct *data)
6253 {
6254 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6255
6256 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6257 return;
6258
6259 iwl3945_down(priv);
6260 queue_work(priv->workqueue, &priv->up);
6261 }
6262
6263 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6264 {
6265 struct iwl3945_priv *priv =
6266 container_of(data, struct iwl3945_priv, rx_replenish);
6267
6268 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6269 return;
6270
6271 mutex_lock(&priv->mutex);
6272 iwl3945_rx_replenish(priv);
6273 mutex_unlock(&priv->mutex);
6274 }
6275
6276 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6277
6278 static void iwl3945_post_associate(struct iwl3945_priv *priv)
6279 {
6280 int rc = 0;
6281 struct ieee80211_conf *conf = NULL;
6282
6283 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6284 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6285 return;
6286 }
6287
6288
6289 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6290 priv->assoc_id, priv->active_rxon.bssid_addr);
6291
6292 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6293 return;
6294
6295 if (!priv->vif || !priv->is_open)
6296 return;
6297
6298 iwl3945_scan_cancel_timeout(priv, 200);
6299
6300 conf = ieee80211_get_hw_conf(priv->hw);
6301
6302 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6303 iwl3945_commit_rxon(priv);
6304
6305 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6306 iwl3945_setup_rxon_timing(priv);
6307 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6308 sizeof(priv->rxon_timing), &priv->rxon_timing);
6309 if (rc)
6310 IWL_WARNING("REPLY_RXON_TIMING failed - "
6311 "Attempting to continue.\n");
6312
6313 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6314
6315 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6316
6317 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6318 priv->assoc_id, priv->beacon_int);
6319
6320 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6321 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6322 else
6323 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6324
6325 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6326 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6327 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6328 else
6329 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6330
6331 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6332 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6333
6334 }
6335
6336 iwl3945_commit_rxon(priv);
6337
6338 switch (priv->iw_mode) {
6339 case NL80211_IFTYPE_STATION:
6340 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6341 break;
6342
6343 case NL80211_IFTYPE_ADHOC:
6344
6345 priv->assoc_id = 1;
6346 iwl3945_add_station(priv, priv->bssid, 0, 0);
6347 iwl3945_sync_sta(priv, IWL_STA_ID,
6348 (priv->band == IEEE80211_BAND_5GHZ) ?
6349 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6350 CMD_ASYNC);
6351 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6352 iwl3945_send_beacon_cmd(priv);
6353
6354 break;
6355
6356 default:
6357 IWL_ERROR("%s Should not be called in %d mode\n",
6358 __func__, priv->iw_mode);
6359 break;
6360 }
6361
6362 iwl3945_activate_qos(priv, 0);
6363
6364 /* we have just associated, don't start scan too early */
6365 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6366 }
6367
6368 static void iwl3945_bg_abort_scan(struct work_struct *work)
6369 {
6370 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6371
6372 if (!iwl3945_is_ready(priv))
6373 return;
6374
6375 mutex_lock(&priv->mutex);
6376
6377 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6378 iwl3945_send_scan_abort(priv);
6379
6380 mutex_unlock(&priv->mutex);
6381 }
6382
6383 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6384
6385 static void iwl3945_bg_scan_completed(struct work_struct *work)
6386 {
6387 struct iwl3945_priv *priv =
6388 container_of(work, struct iwl3945_priv, scan_completed);
6389
6390 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6391
6392 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6393 return;
6394
6395 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6396 iwl3945_mac_config(priv->hw, 0);
6397
6398 ieee80211_scan_completed(priv->hw);
6399
6400 /* Since setting the TXPOWER may have been deferred while
6401 * performing the scan, fire one off */
6402 mutex_lock(&priv->mutex);
6403 iwl3945_hw_reg_send_txpower(priv);
6404 mutex_unlock(&priv->mutex);
6405 }
6406
6407 /*****************************************************************************
6408 *
6409 * mac80211 entry point functions
6410 *
6411 *****************************************************************************/
6412
6413 #define UCODE_READY_TIMEOUT (2 * HZ)
6414
6415 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6416 {
6417 struct iwl3945_priv *priv = hw->priv;
6418 int ret;
6419
6420 IWL_DEBUG_MAC80211("enter\n");
6421
6422 if (pci_enable_device(priv->pci_dev)) {
6423 IWL_ERROR("Fail to pci_enable_device\n");
6424 return -ENODEV;
6425 }
6426 pci_restore_state(priv->pci_dev);
6427 pci_enable_msi(priv->pci_dev);
6428
6429 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6430 DRV_NAME, priv);
6431 if (ret) {
6432 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6433 goto out_disable_msi;
6434 }
6435
6436 /* we should be verifying the device is ready to be opened */
6437 mutex_lock(&priv->mutex);
6438
6439 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6440 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6441 * ucode filename and max sizes are card-specific. */
6442
6443 if (!priv->ucode_code.len) {
6444 ret = iwl3945_read_ucode(priv);
6445 if (ret) {
6446 IWL_ERROR("Could not read microcode: %d\n", ret);
6447 mutex_unlock(&priv->mutex);
6448 goto out_release_irq;
6449 }
6450 }
6451
6452 ret = __iwl3945_up(priv);
6453
6454 mutex_unlock(&priv->mutex);
6455
6456 iwl3945_rfkill_set_hw_state(priv);
6457
6458 if (ret)
6459 goto out_release_irq;
6460
6461 IWL_DEBUG_INFO("Start UP work.\n");
6462
6463 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6464 return 0;
6465
6466 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6467 * mac80211 will not be run successfully. */
6468 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6469 test_bit(STATUS_READY, &priv->status),
6470 UCODE_READY_TIMEOUT);
6471 if (!ret) {
6472 if (!test_bit(STATUS_READY, &priv->status)) {
6473 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6474 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6475 ret = -ETIMEDOUT;
6476 goto out_release_irq;
6477 }
6478 }
6479
6480 priv->is_open = 1;
6481 IWL_DEBUG_MAC80211("leave\n");
6482 return 0;
6483
6484 out_release_irq:
6485 free_irq(priv->pci_dev->irq, priv);
6486 out_disable_msi:
6487 pci_disable_msi(priv->pci_dev);
6488 pci_disable_device(priv->pci_dev);
6489 priv->is_open = 0;
6490 IWL_DEBUG_MAC80211("leave - failed\n");
6491 return ret;
6492 }
6493
6494 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6495 {
6496 struct iwl3945_priv *priv = hw->priv;
6497
6498 IWL_DEBUG_MAC80211("enter\n");
6499
6500 if (!priv->is_open) {
6501 IWL_DEBUG_MAC80211("leave - skip\n");
6502 return;
6503 }
6504
6505 priv->is_open = 0;
6506
6507 if (iwl3945_is_ready_rf(priv)) {
6508 /* stop mac, cancel any scan request and clear
6509 * RXON_FILTER_ASSOC_MSK BIT
6510 */
6511 mutex_lock(&priv->mutex);
6512 iwl3945_scan_cancel_timeout(priv, 100);
6513 mutex_unlock(&priv->mutex);
6514 }
6515
6516 iwl3945_down(priv);
6517
6518 flush_workqueue(priv->workqueue);
6519 free_irq(priv->pci_dev->irq, priv);
6520 pci_disable_msi(priv->pci_dev);
6521 pci_save_state(priv->pci_dev);
6522 pci_disable_device(priv->pci_dev);
6523
6524 IWL_DEBUG_MAC80211("leave\n");
6525 }
6526
6527 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6528 {
6529 struct iwl3945_priv *priv = hw->priv;
6530
6531 IWL_DEBUG_MAC80211("enter\n");
6532
6533 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6534 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6535
6536 if (iwl3945_tx_skb(priv, skb))
6537 dev_kfree_skb_any(skb);
6538
6539 IWL_DEBUG_MAC80211("leave\n");
6540 return NETDEV_TX_OK;
6541 }
6542
6543 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6544 struct ieee80211_if_init_conf *conf)
6545 {
6546 struct iwl3945_priv *priv = hw->priv;
6547 unsigned long flags;
6548
6549 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6550
6551 if (priv->vif) {
6552 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6553 return -EOPNOTSUPP;
6554 }
6555
6556 spin_lock_irqsave(&priv->lock, flags);
6557 priv->vif = conf->vif;
6558 priv->iw_mode = conf->type;
6559
6560 spin_unlock_irqrestore(&priv->lock, flags);
6561
6562 mutex_lock(&priv->mutex);
6563
6564 if (conf->mac_addr) {
6565 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6566 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6567 }
6568
6569 if (iwl3945_is_ready(priv))
6570 iwl3945_set_mode(priv, conf->type);
6571
6572 mutex_unlock(&priv->mutex);
6573
6574 IWL_DEBUG_MAC80211("leave\n");
6575 return 0;
6576 }
6577
6578 /**
6579 * iwl3945_mac_config - mac80211 config callback
6580 *
6581 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6582 * be set inappropriately and the driver currently sets the hardware up to
6583 * use it whenever needed.
6584 */
6585 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6586 {
6587 struct iwl3945_priv *priv = hw->priv;
6588 const struct iwl3945_channel_info *ch_info;
6589 struct ieee80211_conf *conf = &hw->conf;
6590 unsigned long flags;
6591 int ret = 0;
6592
6593 mutex_lock(&priv->mutex);
6594 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6595
6596 if (!iwl3945_is_ready(priv)) {
6597 IWL_DEBUG_MAC80211("leave - not ready\n");
6598 ret = -EIO;
6599 goto out;
6600 }
6601
6602 if (unlikely(!iwl3945_param_disable_hw_scan &&
6603 test_bit(STATUS_SCANNING, &priv->status))) {
6604 IWL_DEBUG_MAC80211("leave - scanning\n");
6605 set_bit(STATUS_CONF_PENDING, &priv->status);
6606 mutex_unlock(&priv->mutex);
6607 return 0;
6608 }
6609
6610 spin_lock_irqsave(&priv->lock, flags);
6611
6612 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6613 conf->channel->hw_value);
6614 if (!is_channel_valid(ch_info)) {
6615 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6616 conf->channel->hw_value, conf->channel->band);
6617 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6618 spin_unlock_irqrestore(&priv->lock, flags);
6619 ret = -EINVAL;
6620 goto out;
6621 }
6622
6623 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6624
6625 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6626
6627 /* The list of supported rates and rate mask can be different
6628 * for each phymode; since the phymode may have changed, reset
6629 * the rate mask to what mac80211 lists */
6630 iwl3945_set_rate(priv);
6631
6632 spin_unlock_irqrestore(&priv->lock, flags);
6633
6634 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6635 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6636 iwl3945_hw_channel_switch(priv, conf->channel);
6637 goto out;
6638 }
6639 #endif
6640
6641 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6642
6643 if (!conf->radio_enabled) {
6644 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6645 goto out;
6646 }
6647
6648 if (iwl3945_is_rfkill(priv)) {
6649 IWL_DEBUG_MAC80211("leave - RF kill\n");
6650 ret = -EIO;
6651 goto out;
6652 }
6653
6654 iwl3945_set_rate(priv);
6655
6656 if (memcmp(&priv->active_rxon,
6657 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6658 iwl3945_commit_rxon(priv);
6659 else
6660 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6661
6662 IWL_DEBUG_MAC80211("leave\n");
6663
6664 out:
6665 clear_bit(STATUS_CONF_PENDING, &priv->status);
6666 mutex_unlock(&priv->mutex);
6667 return ret;
6668 }
6669
6670 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6671 {
6672 int rc = 0;
6673
6674 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6675 return;
6676
6677 /* The following should be done only at AP bring up */
6678 if (!(iwl3945_is_associated(priv))) {
6679
6680 /* RXON - unassoc (to set timing command) */
6681 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6682 iwl3945_commit_rxon(priv);
6683
6684 /* RXON Timing */
6685 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6686 iwl3945_setup_rxon_timing(priv);
6687 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6688 sizeof(priv->rxon_timing), &priv->rxon_timing);
6689 if (rc)
6690 IWL_WARNING("REPLY_RXON_TIMING failed - "
6691 "Attempting to continue.\n");
6692
6693 /* FIXME: what should be the assoc_id for AP? */
6694 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6695 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6696 priv->staging_rxon.flags |=
6697 RXON_FLG_SHORT_PREAMBLE_MSK;
6698 else
6699 priv->staging_rxon.flags &=
6700 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6701
6702 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6703 if (priv->assoc_capability &
6704 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6705 priv->staging_rxon.flags |=
6706 RXON_FLG_SHORT_SLOT_MSK;
6707 else
6708 priv->staging_rxon.flags &=
6709 ~RXON_FLG_SHORT_SLOT_MSK;
6710
6711 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6712 priv->staging_rxon.flags &=
6713 ~RXON_FLG_SHORT_SLOT_MSK;
6714 }
6715 /* restore RXON assoc */
6716 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6717 iwl3945_commit_rxon(priv);
6718 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6719 }
6720 iwl3945_send_beacon_cmd(priv);
6721
6722 /* FIXME - we need to add code here to detect a totally new
6723 * configuration, reset the AP, unassoc, rxon timing, assoc,
6724 * clear sta table, add BCAST sta... */
6725 }
6726
6727 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6728 struct ieee80211_vif *vif,
6729 struct ieee80211_if_conf *conf)
6730 {
6731 struct iwl3945_priv *priv = hw->priv;
6732 int rc;
6733
6734 if (conf == NULL)
6735 return -EIO;
6736
6737 if (priv->vif != vif) {
6738 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6739 return 0;
6740 }
6741
6742 /* handle this temporarily here */
6743 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6744 conf->changed & IEEE80211_IFCC_BEACON) {
6745 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6746 if (!beacon)
6747 return -ENOMEM;
6748 mutex_lock(&priv->mutex);
6749 rc = iwl3945_mac_beacon_update(hw, beacon);
6750 mutex_unlock(&priv->mutex);
6751 if (rc)
6752 return rc;
6753 }
6754
6755 if (!iwl3945_is_alive(priv))
6756 return -EAGAIN;
6757
6758 mutex_lock(&priv->mutex);
6759
6760 if (conf->bssid)
6761 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6762
6763 /*
6764 * very dubious code was here; the probe filtering flag is never set:
6765 *
6766 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6767 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6768 */
6769
6770 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6771 if (!conf->bssid) {
6772 conf->bssid = priv->mac_addr;
6773 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6774 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6775 conf->bssid);
6776 }
6777 if (priv->ibss_beacon)
6778 dev_kfree_skb(priv->ibss_beacon);
6779
6780 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6781 }
6782
6783 if (iwl3945_is_rfkill(priv))
6784 goto done;
6785
6786 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6787 !is_multicast_ether_addr(conf->bssid)) {
6788 /* If there is currently a HW scan going on in the background
6789 * then we need to cancel it else the RXON below will fail. */
6790 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6791 IWL_WARNING("Aborted scan still in progress "
6792 "after 100ms\n");
6793 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6794 mutex_unlock(&priv->mutex);
6795 return -EAGAIN;
6796 }
6797 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6798
6799 /* TODO: Audit driver for usage of these members and see
6800 * if mac80211 deprecates them (priv->bssid looks like it
6801 * shouldn't be there, but I haven't scanned the IBSS code
6802 * to verify) - jpk */
6803 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6804
6805 if (priv->iw_mode == NL80211_IFTYPE_AP)
6806 iwl3945_config_ap(priv);
6807 else {
6808 rc = iwl3945_commit_rxon(priv);
6809 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6810 iwl3945_add_station(priv,
6811 priv->active_rxon.bssid_addr, 1, 0);
6812 }
6813
6814 } else {
6815 iwl3945_scan_cancel_timeout(priv, 100);
6816 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6817 iwl3945_commit_rxon(priv);
6818 }
6819
6820 done:
6821 IWL_DEBUG_MAC80211("leave\n");
6822 mutex_unlock(&priv->mutex);
6823
6824 return 0;
6825 }
6826
6827 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6828 unsigned int changed_flags,
6829 unsigned int *total_flags,
6830 int mc_count, struct dev_addr_list *mc_list)
6831 {
6832 struct iwl3945_priv *priv = hw->priv;
6833 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
6834
6835 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6836 changed_flags, *total_flags);
6837
6838 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6839 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6840 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6841 else
6842 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6843 }
6844 if (changed_flags & FIF_ALLMULTI) {
6845 if (*total_flags & FIF_ALLMULTI)
6846 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6847 else
6848 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6849 }
6850 if (changed_flags & FIF_CONTROL) {
6851 if (*total_flags & FIF_CONTROL)
6852 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6853 else
6854 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6855 }
6856 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6857 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6858 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6859 else
6860 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6861 }
6862
6863 /* We avoid iwl_commit_rxon here to commit the new filter flags
6864 * since mac80211 will call ieee80211_hw_config immediately.
6865 * (mc_list is not supported at this time). Otherwise, we need to
6866 * queue a background iwl_commit_rxon work.
6867 */
6868
6869 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6870 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6871 }
6872
6873 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6874 struct ieee80211_if_init_conf *conf)
6875 {
6876 struct iwl3945_priv *priv = hw->priv;
6877
6878 IWL_DEBUG_MAC80211("enter\n");
6879
6880 mutex_lock(&priv->mutex);
6881
6882 if (iwl3945_is_ready_rf(priv)) {
6883 iwl3945_scan_cancel_timeout(priv, 100);
6884 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6885 iwl3945_commit_rxon(priv);
6886 }
6887 if (priv->vif == conf->vif) {
6888 priv->vif = NULL;
6889 memset(priv->bssid, 0, ETH_ALEN);
6890 }
6891 mutex_unlock(&priv->mutex);
6892
6893 IWL_DEBUG_MAC80211("leave\n");
6894 }
6895
6896 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6897
6898 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6899 struct ieee80211_vif *vif,
6900 struct ieee80211_bss_conf *bss_conf,
6901 u32 changes)
6902 {
6903 struct iwl3945_priv *priv = hw->priv;
6904
6905 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6906
6907 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6908 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6909 bss_conf->use_short_preamble);
6910 if (bss_conf->use_short_preamble)
6911 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6912 else
6913 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6914 }
6915
6916 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6917 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6918 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6919 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6920 else
6921 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6922 }
6923
6924 if (changes & BSS_CHANGED_ASSOC) {
6925 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6926 /* This should never happen as this function should
6927 * never be called from interrupt context. */
6928 if (WARN_ON_ONCE(in_interrupt()))
6929 return;
6930 if (bss_conf->assoc) {
6931 priv->assoc_id = bss_conf->aid;
6932 priv->beacon_int = bss_conf->beacon_int;
6933 priv->timestamp = bss_conf->timestamp;
6934 priv->assoc_capability = bss_conf->assoc_capability;
6935 priv->next_scan_jiffies = jiffies +
6936 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6937 mutex_lock(&priv->mutex);
6938 iwl3945_post_associate(priv);
6939 mutex_unlock(&priv->mutex);
6940 } else {
6941 priv->assoc_id = 0;
6942 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6943 }
6944 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6945 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6946 iwl3945_send_rxon_assoc(priv);
6947 }
6948
6949 }
6950
6951 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6952 {
6953 int rc = 0;
6954 unsigned long flags;
6955 struct iwl3945_priv *priv = hw->priv;
6956 DECLARE_SSID_BUF(ssid_buf);
6957
6958 IWL_DEBUG_MAC80211("enter\n");
6959
6960 mutex_lock(&priv->mutex);
6961 spin_lock_irqsave(&priv->lock, flags);
6962
6963 if (!iwl3945_is_ready_rf(priv)) {
6964 rc = -EIO;
6965 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6966 goto out_unlock;
6967 }
6968
6969 /* we don't schedule scan within next_scan_jiffies period */
6970 if (priv->next_scan_jiffies &&
6971 time_after(priv->next_scan_jiffies, jiffies)) {
6972 rc = -EAGAIN;
6973 goto out_unlock;
6974 }
6975 /* if we just finished scan ask for delay for a broadcast scan */
6976 if ((len == 0) && priv->last_scan_jiffies &&
6977 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6978 jiffies)) {
6979 rc = -EAGAIN;
6980 goto out_unlock;
6981 }
6982 if (len) {
6983 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6984 print_ssid(ssid_buf, ssid, len), (int)len);
6985
6986 priv->one_direct_scan = 1;
6987 priv->direct_ssid_len = (u8)
6988 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6989 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6990 } else
6991 priv->one_direct_scan = 0;
6992
6993 rc = iwl3945_scan_initiate(priv);
6994
6995 IWL_DEBUG_MAC80211("leave\n");
6996
6997 out_unlock:
6998 spin_unlock_irqrestore(&priv->lock, flags);
6999 mutex_unlock(&priv->mutex);
7000
7001 return rc;
7002 }
7003
7004 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7005 const u8 *local_addr, const u8 *addr,
7006 struct ieee80211_key_conf *key)
7007 {
7008 struct iwl3945_priv *priv = hw->priv;
7009 int rc = 0;
7010 u8 sta_id;
7011
7012 IWL_DEBUG_MAC80211("enter\n");
7013
7014 if (!iwl3945_param_hwcrypto) {
7015 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7016 return -EOPNOTSUPP;
7017 }
7018
7019 if (is_zero_ether_addr(addr))
7020 /* only support pairwise keys */
7021 return -EOPNOTSUPP;
7022
7023 sta_id = iwl3945_hw_find_station(priv, addr);
7024 if (sta_id == IWL_INVALID_STATION) {
7025 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
7026 addr);
7027 return -EINVAL;
7028 }
7029
7030 mutex_lock(&priv->mutex);
7031
7032 iwl3945_scan_cancel_timeout(priv, 100);
7033
7034 switch (cmd) {
7035 case SET_KEY:
7036 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7037 if (!rc) {
7038 iwl3945_set_rxon_hwcrypto(priv, 1);
7039 iwl3945_commit_rxon(priv);
7040 key->hw_key_idx = sta_id;
7041 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7042 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7043 }
7044 break;
7045 case DISABLE_KEY:
7046 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7047 if (!rc) {
7048 iwl3945_set_rxon_hwcrypto(priv, 0);
7049 iwl3945_commit_rxon(priv);
7050 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7051 }
7052 break;
7053 default:
7054 rc = -EINVAL;
7055 }
7056
7057 IWL_DEBUG_MAC80211("leave\n");
7058 mutex_unlock(&priv->mutex);
7059
7060 return rc;
7061 }
7062
7063 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7064 const struct ieee80211_tx_queue_params *params)
7065 {
7066 struct iwl3945_priv *priv = hw->priv;
7067 unsigned long flags;
7068 int q;
7069
7070 IWL_DEBUG_MAC80211("enter\n");
7071
7072 if (!iwl3945_is_ready_rf(priv)) {
7073 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7074 return -EIO;
7075 }
7076
7077 if (queue >= AC_NUM) {
7078 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7079 return 0;
7080 }
7081
7082 q = AC_NUM - 1 - queue;
7083
7084 spin_lock_irqsave(&priv->lock, flags);
7085
7086 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7087 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7088 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7089 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7090 cpu_to_le16((params->txop * 32));
7091
7092 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7093 priv->qos_data.qos_active = 1;
7094
7095 spin_unlock_irqrestore(&priv->lock, flags);
7096
7097 mutex_lock(&priv->mutex);
7098 if (priv->iw_mode == NL80211_IFTYPE_AP)
7099 iwl3945_activate_qos(priv, 1);
7100 else if (priv->assoc_id && iwl3945_is_associated(priv))
7101 iwl3945_activate_qos(priv, 0);
7102
7103 mutex_unlock(&priv->mutex);
7104
7105 IWL_DEBUG_MAC80211("leave\n");
7106 return 0;
7107 }
7108
7109 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7110 struct ieee80211_tx_queue_stats *stats)
7111 {
7112 struct iwl3945_priv *priv = hw->priv;
7113 int i, avail;
7114 struct iwl3945_tx_queue *txq;
7115 struct iwl3945_queue *q;
7116 unsigned long flags;
7117
7118 IWL_DEBUG_MAC80211("enter\n");
7119
7120 if (!iwl3945_is_ready_rf(priv)) {
7121 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7122 return -EIO;
7123 }
7124
7125 spin_lock_irqsave(&priv->lock, flags);
7126
7127 for (i = 0; i < AC_NUM; i++) {
7128 txq = &priv->txq[i];
7129 q = &txq->q;
7130 avail = iwl3945_queue_space(q);
7131
7132 stats[i].len = q->n_window - avail;
7133 stats[i].limit = q->n_window - q->high_mark;
7134 stats[i].count = q->n_window;
7135
7136 }
7137 spin_unlock_irqrestore(&priv->lock, flags);
7138
7139 IWL_DEBUG_MAC80211("leave\n");
7140
7141 return 0;
7142 }
7143
7144 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7145 struct ieee80211_low_level_stats *stats)
7146 {
7147 return 0;
7148 }
7149
7150 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7151 {
7152 struct iwl3945_priv *priv = hw->priv;
7153 unsigned long flags;
7154
7155 mutex_lock(&priv->mutex);
7156 IWL_DEBUG_MAC80211("enter\n");
7157
7158 iwl3945_reset_qos(priv);
7159
7160 spin_lock_irqsave(&priv->lock, flags);
7161 priv->assoc_id = 0;
7162 priv->assoc_capability = 0;
7163 priv->call_post_assoc_from_beacon = 0;
7164
7165 /* new association get rid of ibss beacon skb */
7166 if (priv->ibss_beacon)
7167 dev_kfree_skb(priv->ibss_beacon);
7168
7169 priv->ibss_beacon = NULL;
7170
7171 priv->beacon_int = priv->hw->conf.beacon_int;
7172 priv->timestamp = 0;
7173 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7174 priv->beacon_int = 0;
7175
7176 spin_unlock_irqrestore(&priv->lock, flags);
7177
7178 if (!iwl3945_is_ready_rf(priv)) {
7179 IWL_DEBUG_MAC80211("leave - not ready\n");
7180 mutex_unlock(&priv->mutex);
7181 return;
7182 }
7183
7184 /* we are restarting association process
7185 * clear RXON_FILTER_ASSOC_MSK bit
7186 */
7187 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7188 iwl3945_scan_cancel_timeout(priv, 100);
7189 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7190 iwl3945_commit_rxon(priv);
7191 }
7192
7193 /* Per mac80211.h: This is only used in IBSS mode... */
7194 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7195
7196 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7197 mutex_unlock(&priv->mutex);
7198 return;
7199 }
7200
7201 iwl3945_set_rate(priv);
7202
7203 mutex_unlock(&priv->mutex);
7204
7205 IWL_DEBUG_MAC80211("leave\n");
7206
7207 }
7208
7209 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7210 {
7211 struct iwl3945_priv *priv = hw->priv;
7212 unsigned long flags;
7213
7214 IWL_DEBUG_MAC80211("enter\n");
7215
7216 if (!iwl3945_is_ready_rf(priv)) {
7217 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7218 return -EIO;
7219 }
7220
7221 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7222 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7223 return -EIO;
7224 }
7225
7226 spin_lock_irqsave(&priv->lock, flags);
7227
7228 if (priv->ibss_beacon)
7229 dev_kfree_skb(priv->ibss_beacon);
7230
7231 priv->ibss_beacon = skb;
7232
7233 priv->assoc_id = 0;
7234
7235 IWL_DEBUG_MAC80211("leave\n");
7236 spin_unlock_irqrestore(&priv->lock, flags);
7237
7238 iwl3945_reset_qos(priv);
7239
7240 iwl3945_post_associate(priv);
7241
7242
7243 return 0;
7244 }
7245
7246 /*****************************************************************************
7247 *
7248 * sysfs attributes
7249 *
7250 *****************************************************************************/
7251
7252 #ifdef CONFIG_IWL3945_DEBUG
7253
7254 /*
7255 * The following adds a new attribute to the sysfs representation
7256 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7257 * used for controlling the debug level.
7258 *
7259 * See the level definitions in iwl for details.
7260 */
7261 static ssize_t show_debug_level(struct device *d,
7262 struct device_attribute *attr, char *buf)
7263 {
7264 struct iwl3945_priv *priv = d->driver_data;
7265
7266 return sprintf(buf, "0x%08X\n", priv->debug_level);
7267 }
7268 static ssize_t store_debug_level(struct device *d,
7269 struct device_attribute *attr,
7270 const char *buf, size_t count)
7271 {
7272 struct iwl3945_priv *priv = d->driver_data;
7273 unsigned long val;
7274 int ret;
7275
7276 ret = strict_strtoul(buf, 0, &val);
7277 if (ret)
7278 printk(KERN_INFO DRV_NAME
7279 ": %s is not in hex or decimal form.\n", buf);
7280 else
7281 priv->debug_level = val;
7282
7283 return strnlen(buf, count);
7284 }
7285
7286 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7287 show_debug_level, store_debug_level);
7288
7289 #endif /* CONFIG_IWL3945_DEBUG */
7290
7291 static ssize_t show_temperature(struct device *d,
7292 struct device_attribute *attr, char *buf)
7293 {
7294 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7295
7296 if (!iwl3945_is_alive(priv))
7297 return -EAGAIN;
7298
7299 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7300 }
7301
7302 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7303
7304 static ssize_t show_tx_power(struct device *d,
7305 struct device_attribute *attr, char *buf)
7306 {
7307 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7308 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7309 }
7310
7311 static ssize_t store_tx_power(struct device *d,
7312 struct device_attribute *attr,
7313 const char *buf, size_t count)
7314 {
7315 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7316 char *p = (char *)buf;
7317 u32 val;
7318
7319 val = simple_strtoul(p, &p, 10);
7320 if (p == buf)
7321 printk(KERN_INFO DRV_NAME
7322 ": %s is not in decimal form.\n", buf);
7323 else
7324 iwl3945_hw_reg_set_txpower(priv, val);
7325
7326 return count;
7327 }
7328
7329 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7330
7331 static ssize_t show_flags(struct device *d,
7332 struct device_attribute *attr, char *buf)
7333 {
7334 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7335
7336 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7337 }
7338
7339 static ssize_t store_flags(struct device *d,
7340 struct device_attribute *attr,
7341 const char *buf, size_t count)
7342 {
7343 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7344 u32 flags = simple_strtoul(buf, NULL, 0);
7345
7346 mutex_lock(&priv->mutex);
7347 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7348 /* Cancel any currently running scans... */
7349 if (iwl3945_scan_cancel_timeout(priv, 100))
7350 IWL_WARNING("Could not cancel scan.\n");
7351 else {
7352 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7353 flags);
7354 priv->staging_rxon.flags = cpu_to_le32(flags);
7355 iwl3945_commit_rxon(priv);
7356 }
7357 }
7358 mutex_unlock(&priv->mutex);
7359
7360 return count;
7361 }
7362
7363 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7364
7365 static ssize_t show_filter_flags(struct device *d,
7366 struct device_attribute *attr, char *buf)
7367 {
7368 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7369
7370 return sprintf(buf, "0x%04X\n",
7371 le32_to_cpu(priv->active_rxon.filter_flags));
7372 }
7373
7374 static ssize_t store_filter_flags(struct device *d,
7375 struct device_attribute *attr,
7376 const char *buf, size_t count)
7377 {
7378 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7379 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7380
7381 mutex_lock(&priv->mutex);
7382 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7383 /* Cancel any currently running scans... */
7384 if (iwl3945_scan_cancel_timeout(priv, 100))
7385 IWL_WARNING("Could not cancel scan.\n");
7386 else {
7387 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7388 "0x%04X\n", filter_flags);
7389 priv->staging_rxon.filter_flags =
7390 cpu_to_le32(filter_flags);
7391 iwl3945_commit_rxon(priv);
7392 }
7393 }
7394 mutex_unlock(&priv->mutex);
7395
7396 return count;
7397 }
7398
7399 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7400 store_filter_flags);
7401
7402 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7403
7404 static ssize_t show_measurement(struct device *d,
7405 struct device_attribute *attr, char *buf)
7406 {
7407 struct iwl3945_priv *priv = dev_get_drvdata(d);
7408 struct iwl_spectrum_notification measure_report;
7409 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7410 u8 *data = (u8 *)&measure_report;
7411 unsigned long flags;
7412
7413 spin_lock_irqsave(&priv->lock, flags);
7414 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7415 spin_unlock_irqrestore(&priv->lock, flags);
7416 return 0;
7417 }
7418 memcpy(&measure_report, &priv->measure_report, size);
7419 priv->measurement_status = 0;
7420 spin_unlock_irqrestore(&priv->lock, flags);
7421
7422 while (size && (PAGE_SIZE - len)) {
7423 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7424 PAGE_SIZE - len, 1);
7425 len = strlen(buf);
7426 if (PAGE_SIZE - len)
7427 buf[len++] = '\n';
7428
7429 ofs += 16;
7430 size -= min(size, 16U);
7431 }
7432
7433 return len;
7434 }
7435
7436 static ssize_t store_measurement(struct device *d,
7437 struct device_attribute *attr,
7438 const char *buf, size_t count)
7439 {
7440 struct iwl3945_priv *priv = dev_get_drvdata(d);
7441 struct ieee80211_measurement_params params = {
7442 .channel = le16_to_cpu(priv->active_rxon.channel),
7443 .start_time = cpu_to_le64(priv->last_tsf),
7444 .duration = cpu_to_le16(1),
7445 };
7446 u8 type = IWL_MEASURE_BASIC;
7447 u8 buffer[32];
7448 u8 channel;
7449
7450 if (count) {
7451 char *p = buffer;
7452 strncpy(buffer, buf, min(sizeof(buffer), count));
7453 channel = simple_strtoul(p, NULL, 0);
7454 if (channel)
7455 params.channel = channel;
7456
7457 p = buffer;
7458 while (*p && *p != ' ')
7459 p++;
7460 if (*p)
7461 type = simple_strtoul(p + 1, NULL, 0);
7462 }
7463
7464 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7465 "channel %d (for '%s')\n", type, params.channel, buf);
7466 iwl3945_get_measurement(priv, &params, type);
7467
7468 return count;
7469 }
7470
7471 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7472 show_measurement, store_measurement);
7473 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7474
7475 static ssize_t store_retry_rate(struct device *d,
7476 struct device_attribute *attr,
7477 const char *buf, size_t count)
7478 {
7479 struct iwl3945_priv *priv = dev_get_drvdata(d);
7480
7481 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7482 if (priv->retry_rate <= 0)
7483 priv->retry_rate = 1;
7484
7485 return count;
7486 }
7487
7488 static ssize_t show_retry_rate(struct device *d,
7489 struct device_attribute *attr, char *buf)
7490 {
7491 struct iwl3945_priv *priv = dev_get_drvdata(d);
7492 return sprintf(buf, "%d", priv->retry_rate);
7493 }
7494
7495 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7496 store_retry_rate);
7497
7498 static ssize_t store_power_level(struct device *d,
7499 struct device_attribute *attr,
7500 const char *buf, size_t count)
7501 {
7502 struct iwl3945_priv *priv = dev_get_drvdata(d);
7503 int rc;
7504 int mode;
7505
7506 mode = simple_strtoul(buf, NULL, 0);
7507 mutex_lock(&priv->mutex);
7508
7509 if (!iwl3945_is_ready(priv)) {
7510 rc = -EAGAIN;
7511 goto out;
7512 }
7513
7514 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7515 (mode == IWL39_POWER_AC))
7516 mode = IWL39_POWER_AC;
7517 else
7518 mode |= IWL_POWER_ENABLED;
7519
7520 if (mode != priv->power_mode) {
7521 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7522 if (rc) {
7523 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7524 goto out;
7525 }
7526 priv->power_mode = mode;
7527 }
7528
7529 rc = count;
7530
7531 out:
7532 mutex_unlock(&priv->mutex);
7533 return rc;
7534 }
7535
7536 #define MAX_WX_STRING 80
7537
7538 /* Values are in microsecond */
7539 static const s32 timeout_duration[] = {
7540 350000,
7541 250000,
7542 75000,
7543 37000,
7544 25000,
7545 };
7546 static const s32 period_duration[] = {
7547 400000,
7548 700000,
7549 1000000,
7550 1000000,
7551 1000000
7552 };
7553
7554 static ssize_t show_power_level(struct device *d,
7555 struct device_attribute *attr, char *buf)
7556 {
7557 struct iwl3945_priv *priv = dev_get_drvdata(d);
7558 int level = IWL_POWER_LEVEL(priv->power_mode);
7559 char *p = buf;
7560
7561 p += sprintf(p, "%d ", level);
7562 switch (level) {
7563 case IWL_POWER_MODE_CAM:
7564 case IWL39_POWER_AC:
7565 p += sprintf(p, "(AC)");
7566 break;
7567 case IWL39_POWER_BATTERY:
7568 p += sprintf(p, "(BATTERY)");
7569 break;
7570 default:
7571 p += sprintf(p,
7572 "(Timeout %dms, Period %dms)",
7573 timeout_duration[level - 1] / 1000,
7574 period_duration[level - 1] / 1000);
7575 }
7576
7577 if (!(priv->power_mode & IWL_POWER_ENABLED))
7578 p += sprintf(p, " OFF\n");
7579 else
7580 p += sprintf(p, " \n");
7581
7582 return p - buf + 1;
7583
7584 }
7585
7586 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7587 store_power_level);
7588
7589 static ssize_t show_channels(struct device *d,
7590 struct device_attribute *attr, char *buf)
7591 {
7592 /* all this shit doesn't belong into sysfs anyway */
7593 return 0;
7594 }
7595
7596 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7597
7598 static ssize_t show_statistics(struct device *d,
7599 struct device_attribute *attr, char *buf)
7600 {
7601 struct iwl3945_priv *priv = dev_get_drvdata(d);
7602 u32 size = sizeof(struct iwl3945_notif_statistics);
7603 u32 len = 0, ofs = 0;
7604 u8 *data = (u8 *)&priv->statistics;
7605 int rc = 0;
7606
7607 if (!iwl3945_is_alive(priv))
7608 return -EAGAIN;
7609
7610 mutex_lock(&priv->mutex);
7611 rc = iwl3945_send_statistics_request(priv);
7612 mutex_unlock(&priv->mutex);
7613
7614 if (rc) {
7615 len = sprintf(buf,
7616 "Error sending statistics request: 0x%08X\n", rc);
7617 return len;
7618 }
7619
7620 while (size && (PAGE_SIZE - len)) {
7621 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7622 PAGE_SIZE - len, 1);
7623 len = strlen(buf);
7624 if (PAGE_SIZE - len)
7625 buf[len++] = '\n';
7626
7627 ofs += 16;
7628 size -= min(size, 16U);
7629 }
7630
7631 return len;
7632 }
7633
7634 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7635
7636 static ssize_t show_antenna(struct device *d,
7637 struct device_attribute *attr, char *buf)
7638 {
7639 struct iwl3945_priv *priv = dev_get_drvdata(d);
7640
7641 if (!iwl3945_is_alive(priv))
7642 return -EAGAIN;
7643
7644 return sprintf(buf, "%d\n", priv->antenna);
7645 }
7646
7647 static ssize_t store_antenna(struct device *d,
7648 struct device_attribute *attr,
7649 const char *buf, size_t count)
7650 {
7651 int ant;
7652 struct iwl3945_priv *priv = dev_get_drvdata(d);
7653
7654 if (count == 0)
7655 return 0;
7656
7657 if (sscanf(buf, "%1i", &ant) != 1) {
7658 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7659 return count;
7660 }
7661
7662 if ((ant >= 0) && (ant <= 2)) {
7663 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7664 priv->antenna = (enum iwl3945_antenna)ant;
7665 } else
7666 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7667
7668
7669 return count;
7670 }
7671
7672 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7673
7674 static ssize_t show_status(struct device *d,
7675 struct device_attribute *attr, char *buf)
7676 {
7677 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7678 if (!iwl3945_is_alive(priv))
7679 return -EAGAIN;
7680 return sprintf(buf, "0x%08x\n", (int)priv->status);
7681 }
7682
7683 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7684
7685 static ssize_t dump_error_log(struct device *d,
7686 struct device_attribute *attr,
7687 const char *buf, size_t count)
7688 {
7689 char *p = (char *)buf;
7690
7691 if (p[0] == '1')
7692 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7693
7694 return strnlen(buf, count);
7695 }
7696
7697 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7698
7699 static ssize_t dump_event_log(struct device *d,
7700 struct device_attribute *attr,
7701 const char *buf, size_t count)
7702 {
7703 char *p = (char *)buf;
7704
7705 if (p[0] == '1')
7706 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7707
7708 return strnlen(buf, count);
7709 }
7710
7711 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7712
7713 /*****************************************************************************
7714 *
7715 * driver setup and tear down
7716 *
7717 *****************************************************************************/
7718
7719 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7720 {
7721 priv->workqueue = create_workqueue(DRV_NAME);
7722
7723 init_waitqueue_head(&priv->wait_command_queue);
7724
7725 INIT_WORK(&priv->up, iwl3945_bg_up);
7726 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7727 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7728 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7729 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7730 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7731 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7732 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7733 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7734 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7735 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7736
7737 iwl3945_hw_setup_deferred_work(priv);
7738
7739 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7740 iwl3945_irq_tasklet, (unsigned long)priv);
7741 }
7742
7743 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7744 {
7745 iwl3945_hw_cancel_deferred_work(priv);
7746
7747 cancel_delayed_work_sync(&priv->init_alive_start);
7748 cancel_delayed_work(&priv->scan_check);
7749 cancel_delayed_work(&priv->alive_start);
7750 cancel_work_sync(&priv->beacon_update);
7751 }
7752
7753 static struct attribute *iwl3945_sysfs_entries[] = {
7754 &dev_attr_antenna.attr,
7755 &dev_attr_channels.attr,
7756 &dev_attr_dump_errors.attr,
7757 &dev_attr_dump_events.attr,
7758 &dev_attr_flags.attr,
7759 &dev_attr_filter_flags.attr,
7760 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7761 &dev_attr_measurement.attr,
7762 #endif
7763 &dev_attr_power_level.attr,
7764 &dev_attr_retry_rate.attr,
7765 &dev_attr_statistics.attr,
7766 &dev_attr_status.attr,
7767 &dev_attr_temperature.attr,
7768 &dev_attr_tx_power.attr,
7769 #ifdef CONFIG_IWL3945_DEBUG
7770 &dev_attr_debug_level.attr,
7771 #endif
7772 NULL
7773 };
7774
7775 static struct attribute_group iwl3945_attribute_group = {
7776 .name = NULL, /* put in device directory */
7777 .attrs = iwl3945_sysfs_entries,
7778 };
7779
7780 static struct ieee80211_ops iwl3945_hw_ops = {
7781 .tx = iwl3945_mac_tx,
7782 .start = iwl3945_mac_start,
7783 .stop = iwl3945_mac_stop,
7784 .add_interface = iwl3945_mac_add_interface,
7785 .remove_interface = iwl3945_mac_remove_interface,
7786 .config = iwl3945_mac_config,
7787 .config_interface = iwl3945_mac_config_interface,
7788 .configure_filter = iwl3945_configure_filter,
7789 .set_key = iwl3945_mac_set_key,
7790 .get_stats = iwl3945_mac_get_stats,
7791 .get_tx_stats = iwl3945_mac_get_tx_stats,
7792 .conf_tx = iwl3945_mac_conf_tx,
7793 .reset_tsf = iwl3945_mac_reset_tsf,
7794 .bss_info_changed = iwl3945_bss_info_changed,
7795 .hw_scan = iwl3945_mac_hw_scan
7796 };
7797
7798 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7799 {
7800 int err = 0;
7801 struct iwl3945_priv *priv;
7802 struct ieee80211_hw *hw;
7803 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7804 unsigned long flags;
7805
7806 /***********************
7807 * 1. Allocating HW data
7808 * ********************/
7809
7810 /* mac80211 allocates memory for this device instance, including
7811 * space for this driver's private structure */
7812 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7813 if (hw == NULL) {
7814 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7815 err = -ENOMEM;
7816 goto out;
7817 }
7818
7819 SET_IEEE80211_DEV(hw, &pdev->dev);
7820
7821 priv = hw->priv;
7822 priv->hw = hw;
7823 priv->pci_dev = pdev;
7824 priv->cfg = cfg;
7825
7826 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7827 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7828 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7829 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7830 err = -EINVAL;
7831 goto out;
7832 }
7833
7834 /* Disabling hardware scan means that mac80211 will perform scans
7835 * "the hard way", rather than using device's scan. */
7836 if (iwl3945_param_disable_hw_scan) {
7837 IWL_DEBUG_INFO("Disabling hw_scan\n");
7838 iwl3945_hw_ops.hw_scan = NULL;
7839 }
7840
7841 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7842 hw->rate_control_algorithm = "iwl-3945-rs";
7843 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7844
7845 /* Select antenna (may be helpful if only one antenna is connected) */
7846 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7847 #ifdef CONFIG_IWL3945_DEBUG
7848 priv->debug_level = iwl3945_param_debug;
7849 atomic_set(&priv->restrict_refcnt, 0);
7850 #endif
7851
7852 /* Tell mac80211 our characteristics */
7853 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7854 IEEE80211_HW_NOISE_DBM;
7855
7856 hw->wiphy->interface_modes =
7857 BIT(NL80211_IFTYPE_STATION) |
7858 BIT(NL80211_IFTYPE_ADHOC);
7859
7860 hw->wiphy->fw_handles_regulatory = true;
7861
7862 /* 4 EDCA QOS priorities */
7863 hw->queues = 4;
7864
7865 /***************************
7866 * 2. Initializing PCI bus
7867 * *************************/
7868 if (pci_enable_device(pdev)) {
7869 err = -ENODEV;
7870 goto out_ieee80211_free_hw;
7871 }
7872
7873 pci_set_master(pdev);
7874
7875 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7876 if (!err)
7877 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7878 if (err) {
7879 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7880 goto out_pci_disable_device;
7881 }
7882
7883 pci_set_drvdata(pdev, priv);
7884 err = pci_request_regions(pdev, DRV_NAME);
7885 if (err)
7886 goto out_pci_disable_device;
7887
7888 /***********************
7889 * 3. Read REV Register
7890 * ********************/
7891 priv->hw_base = pci_iomap(pdev, 0, 0);
7892 if (!priv->hw_base) {
7893 err = -ENODEV;
7894 goto out_pci_release_regions;
7895 }
7896
7897 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7898 (unsigned long long) pci_resource_len(pdev, 0));
7899 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7900
7901 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7902 * PCI Tx retries from interfering with C3 CPU state */
7903 pci_write_config_byte(pdev, 0x41, 0x00);
7904
7905 /* nic init */
7906 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7907 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7908
7909 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7910 err = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
7911 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7912 if (err < 0) {
7913 IWL_DEBUG_INFO("Failed to init the card\n");
7914 goto out_remove_sysfs;
7915 }
7916
7917 /***********************
7918 * 4. Read EEPROM
7919 * ********************/
7920 /* Read the EEPROM */
7921 err = iwl3945_eeprom_init(priv);
7922 if (err) {
7923 IWL_ERROR("Unable to init EEPROM\n");
7924 goto out_remove_sysfs;
7925 }
7926 /* MAC Address location in EEPROM same for 3945/4965 */
7927 get_eeprom_mac(priv, priv->mac_addr);
7928 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7929 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7930
7931 /***********************
7932 * 5. Setup HW Constants
7933 * ********************/
7934 /* Device-specific setup */
7935 if (iwl3945_hw_set_hw_setting(priv)) {
7936 IWL_ERROR("failed to set hw settings\n");
7937 goto out_iounmap;
7938 }
7939
7940 /***********************
7941 * 6. Setup priv
7942 * ********************/
7943 priv->retry_rate = 1;
7944 priv->ibss_beacon = NULL;
7945
7946 spin_lock_init(&priv->lock);
7947 spin_lock_init(&priv->power_data.lock);
7948 spin_lock_init(&priv->sta_lock);
7949 spin_lock_init(&priv->hcmd_lock);
7950
7951 INIT_LIST_HEAD(&priv->free_frames);
7952 mutex_init(&priv->mutex);
7953
7954 /* Clear the driver's (not device's) station table */
7955 iwl3945_clear_stations_table(priv);
7956
7957 priv->data_retry_limit = -1;
7958 priv->ieee_channels = NULL;
7959 priv->ieee_rates = NULL;
7960 priv->band = IEEE80211_BAND_2GHZ;
7961
7962 priv->iw_mode = NL80211_IFTYPE_STATION;
7963
7964 iwl3945_reset_qos(priv);
7965
7966 priv->qos_data.qos_active = 0;
7967 priv->qos_data.qos_cap.val = 0;
7968
7969
7970 priv->rates_mask = IWL_RATES_MASK;
7971 /* If power management is turned on, default to AC mode */
7972 priv->power_mode = IWL39_POWER_AC;
7973 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7974
7975 err = iwl3945_init_channel_map(priv);
7976 if (err) {
7977 IWL_ERROR("initializing regulatory failed: %d\n", err);
7978 goto out_release_irq;
7979 }
7980
7981 err = iwl3945_init_geos(priv);
7982 if (err) {
7983 IWL_ERROR("initializing geos failed: %d\n", err);
7984 goto out_free_channel_map;
7985 }
7986
7987 printk(KERN_INFO DRV_NAME
7988 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7989
7990 /***********************************
7991 * 7. Initialize Module Parameters
7992 * **********************************/
7993
7994 /* Initialize module parameter values here */
7995 /* Disable radio (SW RF KILL) via parameter when loading driver */
7996 if (iwl3945_param_disable) {
7997 set_bit(STATUS_RF_KILL_SW, &priv->status);
7998 IWL_DEBUG_INFO("Radio disabled.\n");
7999 }
8000
8001
8002 /***********************
8003 * 8. Setup Services
8004 * ********************/
8005
8006 spin_lock_irqsave(&priv->lock, flags);
8007 iwl3945_disable_interrupts(priv);
8008 spin_unlock_irqrestore(&priv->lock, flags);
8009
8010 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8011 if (err) {
8012 IWL_ERROR("failed to create sysfs device attributes\n");
8013 goto out_free_geos;
8014 }
8015
8016 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8017 iwl3945_setup_deferred_work(priv);
8018 iwl3945_setup_rx_handlers(priv);
8019
8020 /***********************
8021 * 9. Conclude
8022 * ********************/
8023 pci_save_state(pdev);
8024 pci_disable_device(pdev);
8025
8026 /*********************************
8027 * 10. Setup and Register mac80211
8028 * *******************************/
8029
8030 err = ieee80211_register_hw(priv->hw);
8031 if (err) {
8032 IWL_ERROR("Failed to register network device (error %d)\n", err);
8033 goto out_remove_sysfs;
8034 }
8035
8036 priv->hw->conf.beacon_int = 100;
8037 priv->mac80211_registered = 1;
8038
8039
8040 err = iwl3945_rfkill_init(priv);
8041 if (err)
8042 IWL_ERROR("Unable to initialize RFKILL system. "
8043 "Ignoring error: %d\n", err);
8044
8045 return 0;
8046
8047 out_remove_sysfs:
8048 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8049 out_free_geos:
8050 iwl3945_free_geos(priv);
8051 out_free_channel_map:
8052 iwl3945_free_channel_map(priv);
8053
8054
8055 out_release_irq:
8056 destroy_workqueue(priv->workqueue);
8057 priv->workqueue = NULL;
8058 iwl3945_unset_hw_setting(priv);
8059
8060 out_iounmap:
8061 pci_iounmap(pdev, priv->hw_base);
8062 out_pci_release_regions:
8063 pci_release_regions(pdev);
8064 out_pci_disable_device:
8065 pci_disable_device(pdev);
8066 pci_set_drvdata(pdev, NULL);
8067 out_ieee80211_free_hw:
8068 ieee80211_free_hw(priv->hw);
8069 out:
8070 return err;
8071 }
8072
8073 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8074 {
8075 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8076 unsigned long flags;
8077
8078 if (!priv)
8079 return;
8080
8081 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8082
8083 set_bit(STATUS_EXIT_PENDING, &priv->status);
8084
8085 iwl3945_down(priv);
8086
8087 /* make sure we flush any pending irq or
8088 * tasklet for the driver
8089 */
8090 spin_lock_irqsave(&priv->lock, flags);
8091 iwl3945_disable_interrupts(priv);
8092 spin_unlock_irqrestore(&priv->lock, flags);
8093
8094 iwl_synchronize_irq(priv);
8095
8096 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8097
8098 iwl3945_rfkill_unregister(priv);
8099 iwl3945_dealloc_ucode_pci(priv);
8100
8101 if (priv->rxq.bd)
8102 iwl3945_rx_queue_free(priv, &priv->rxq);
8103 iwl3945_hw_txq_ctx_free(priv);
8104
8105 iwl3945_unset_hw_setting(priv);
8106 iwl3945_clear_stations_table(priv);
8107
8108 if (priv->mac80211_registered)
8109 ieee80211_unregister_hw(priv->hw);
8110
8111 /*netif_stop_queue(dev); */
8112 flush_workqueue(priv->workqueue);
8113
8114 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8115 * priv->workqueue... so we can't take down the workqueue
8116 * until now... */
8117 destroy_workqueue(priv->workqueue);
8118 priv->workqueue = NULL;
8119
8120 pci_iounmap(pdev, priv->hw_base);
8121 pci_release_regions(pdev);
8122 pci_disable_device(pdev);
8123 pci_set_drvdata(pdev, NULL);
8124
8125 iwl3945_free_channel_map(priv);
8126 iwl3945_free_geos(priv);
8127 kfree(priv->scan);
8128 if (priv->ibss_beacon)
8129 dev_kfree_skb(priv->ibss_beacon);
8130
8131 ieee80211_free_hw(priv->hw);
8132 }
8133
8134 #ifdef CONFIG_PM
8135
8136 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8137 {
8138 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8139
8140 if (priv->is_open) {
8141 set_bit(STATUS_IN_SUSPEND, &priv->status);
8142 iwl3945_mac_stop(priv->hw);
8143 priv->is_open = 1;
8144 }
8145
8146 pci_set_power_state(pdev, PCI_D3hot);
8147
8148 return 0;
8149 }
8150
8151 static int iwl3945_pci_resume(struct pci_dev *pdev)
8152 {
8153 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8154
8155 pci_set_power_state(pdev, PCI_D0);
8156
8157 if (priv->is_open)
8158 iwl3945_mac_start(priv->hw);
8159
8160 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8161 return 0;
8162 }
8163
8164 #endif /* CONFIG_PM */
8165
8166 /*************** RFKILL FUNCTIONS **********/
8167 #ifdef CONFIG_IWL3945_RFKILL
8168 /* software rf-kill from user */
8169 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8170 {
8171 struct iwl3945_priv *priv = data;
8172 int err = 0;
8173
8174 if (!priv->rfkill)
8175 return 0;
8176
8177 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8178 return 0;
8179
8180 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8181 mutex_lock(&priv->mutex);
8182
8183 switch (state) {
8184 case RFKILL_STATE_UNBLOCKED:
8185 if (iwl3945_is_rfkill_hw(priv)) {
8186 err = -EBUSY;
8187 goto out_unlock;
8188 }
8189 iwl3945_radio_kill_sw(priv, 0);
8190 break;
8191 case RFKILL_STATE_SOFT_BLOCKED:
8192 iwl3945_radio_kill_sw(priv, 1);
8193 break;
8194 default:
8195 IWL_WARNING("we received unexpected RFKILL state %d\n", state);
8196 break;
8197 }
8198 out_unlock:
8199 mutex_unlock(&priv->mutex);
8200
8201 return err;
8202 }
8203
8204 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8205 {
8206 struct device *device = wiphy_dev(priv->hw->wiphy);
8207 int ret = 0;
8208
8209 BUG_ON(device == NULL);
8210
8211 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8212 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8213 if (!priv->rfkill) {
8214 IWL_ERROR("Unable to allocate rfkill device.\n");
8215 ret = -ENOMEM;
8216 goto error;
8217 }
8218
8219 priv->rfkill->name = priv->cfg->name;
8220 priv->rfkill->data = priv;
8221 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8222 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8223 priv->rfkill->user_claim_unsupported = 1;
8224
8225 priv->rfkill->dev.class->suspend = NULL;
8226 priv->rfkill->dev.class->resume = NULL;
8227
8228 ret = rfkill_register(priv->rfkill);
8229 if (ret) {
8230 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8231 goto freed_rfkill;
8232 }
8233
8234 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8235 return ret;
8236
8237 freed_rfkill:
8238 if (priv->rfkill != NULL)
8239 rfkill_free(priv->rfkill);
8240 priv->rfkill = NULL;
8241
8242 error:
8243 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8244 return ret;
8245 }
8246
8247 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8248 {
8249 if (priv->rfkill)
8250 rfkill_unregister(priv->rfkill);
8251
8252 priv->rfkill = NULL;
8253 }
8254
8255 /* set rf-kill to the right state. */
8256 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8257 {
8258
8259 if (!priv->rfkill)
8260 return;
8261
8262 if (iwl3945_is_rfkill_hw(priv)) {
8263 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8264 return;
8265 }
8266
8267 if (!iwl3945_is_rfkill_sw(priv))
8268 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8269 else
8270 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8271 }
8272 #endif
8273
8274 /*****************************************************************************
8275 *
8276 * driver and module entry point
8277 *
8278 *****************************************************************************/
8279
8280 static struct pci_driver iwl3945_driver = {
8281 .name = DRV_NAME,
8282 .id_table = iwl3945_hw_card_ids,
8283 .probe = iwl3945_pci_probe,
8284 .remove = __devexit_p(iwl3945_pci_remove),
8285 #ifdef CONFIG_PM
8286 .suspend = iwl3945_pci_suspend,
8287 .resume = iwl3945_pci_resume,
8288 #endif
8289 };
8290
8291 static int __init iwl3945_init(void)
8292 {
8293
8294 int ret;
8295 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8296 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8297
8298 ret = iwl3945_rate_control_register();
8299 if (ret) {
8300 printk(KERN_ERR DRV_NAME
8301 "Unable to register rate control algorithm: %d\n", ret);
8302 return ret;
8303 }
8304
8305 ret = pci_register_driver(&iwl3945_driver);
8306 if (ret) {
8307 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8308 goto error_register;
8309 }
8310
8311 return ret;
8312
8313 error_register:
8314 iwl3945_rate_control_unregister();
8315 return ret;
8316 }
8317
8318 static void __exit iwl3945_exit(void)
8319 {
8320 pci_unregister_driver(&iwl3945_driver);
8321 iwl3945_rate_control_unregister();
8322 }
8323
8324 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8325
8326 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8327 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8328 module_param_named(disable, iwl3945_param_disable, int, 0444);
8329 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8330 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8331 MODULE_PARM_DESC(hwcrypto,
8332 "using hardware crypto engine (default 0 [software])\n");
8333 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8334 MODULE_PARM_DESC(debug, "debug output mask");
8335 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8336 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8337
8338 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8339 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8340
8341 module_exit(iwl3945_exit);
8342 module_init(iwl3945_init);
kernel-based virtual machine