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[NET]: Nuke SET_MODULE_OWNER macro.
[linux-2.6/kvm.git] / drivers / net / wireless / atmel.c
blob47dbdf95ea6ffa1337d7316b83330406fef63afd
1 /*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
34 For all queries about this code, please contact the current author,
35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40 ******************************************************************************/
41
42 #include <linux/init.h>
43
44 #include <linux/kernel.h>
45 #include <linux/ptrace.h>
46 #include <linux/slab.h>
47 #include <linux/string.h>
48 #include <linux/ctype.h>
49 #include <linux/timer.h>
50 #include <asm/io.h>
51 #include <asm/system.h>
52 #include <asm/uaccess.h>
53 #include <linux/module.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
57 #include <linux/if_arp.h>
58 #include <linux/ioport.h>
59 #include <linux/fcntl.h>
60 #include <linux/delay.h>
61 #include <linux/wireless.h>
62 #include <net/iw_handler.h>
63 #include <linux/byteorder/generic.h>
64 #include <linux/crc32.h>
65 #include <linux/proc_fs.h>
66 #include <linux/device.h>
67 #include <linux/moduleparam.h>
68 #include <linux/firmware.h>
69 #include <net/ieee80211.h>
70 #include "atmel.h"
71
72 #define DRIVER_MAJOR 0
73 #define DRIVER_MINOR 98
74
75 MODULE_AUTHOR("Simon Kelley");
76 MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
77 MODULE_LICENSE("GPL");
78 MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
79
80 /* The name of the firmware file to be loaded
81 over-rides any automatic selection */
82 static char *firmware = NULL;
83 module_param(firmware, charp, 0);
84
85 /* table of firmware file names */
86 static struct {
87 AtmelFWType fw_type;
88 const char *fw_file;
89 const char *fw_file_ext;
90 } fw_table[] = {
91 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
92 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
93 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
94 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
95 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
96 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
97 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
98 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
99 { ATMEL_FW_TYPE_NONE, NULL, NULL }
100 };
101
102 #define MAX_SSID_LENGTH 32
103 #define MGMT_JIFFIES (256 * HZ / 100)
104
105 #define MAX_BSS_ENTRIES 64
106
107 /* registers */
108 #define GCR 0x00 // (SIR0) General Configuration Register
109 #define BSR 0x02 // (SIR1) Bank Switching Select Register
110 #define AR 0x04
111 #define DR 0x08
112 #define MR1 0x12 // Mirror Register 1
113 #define MR2 0x14 // Mirror Register 2
114 #define MR3 0x16 // Mirror Register 3
115 #define MR4 0x18 // Mirror Register 4
116
117 #define GPR1 0x0c
118 #define GPR2 0x0e
119 #define GPR3 0x10
120 //
121 // Constants for the GCR register.
122 //
123 #define GCR_REMAP 0x0400 // Remap internal SRAM to 0
124 #define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
125 #define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
126 #define GCR_ENINT 0x0002 // Enable Interrupts
127 #define GCR_ACKINT 0x0008 // Acknowledge Interrupts
128
129 #define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
130 #define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
131 //
132 // Constants for the MR registers.
133 //
134 #define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
135 #define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
136 #define MAC_INIT_OK 0x0002 // MAC boot has been completed
137
138 #define MIB_MAX_DATA_BYTES 212
139 #define MIB_HEADER_SIZE 4 /* first four fields */
140
141 struct get_set_mib {
142 u8 type;
143 u8 size;
144 u8 index;
145 u8 reserved;
146 u8 data[MIB_MAX_DATA_BYTES];
147 };
148
149 struct rx_desc {
150 u32 Next;
151 u16 MsduPos;
152 u16 MsduSize;
153
154 u8 State;
155 u8 Status;
156 u8 Rate;
157 u8 Rssi;
158 u8 LinkQuality;
159 u8 PreambleType;
160 u16 Duration;
161 u32 RxTime;
162 };
163
164 #define RX_DESC_FLAG_VALID 0x80
165 #define RX_DESC_FLAG_CONSUMED 0x40
166 #define RX_DESC_FLAG_IDLE 0x00
167
168 #define RX_STATUS_SUCCESS 0x00
169
170 #define RX_DESC_MSDU_POS_OFFSET 4
171 #define RX_DESC_MSDU_SIZE_OFFSET 6
172 #define RX_DESC_FLAGS_OFFSET 8
173 #define RX_DESC_STATUS_OFFSET 9
174 #define RX_DESC_RSSI_OFFSET 11
175 #define RX_DESC_LINK_QUALITY_OFFSET 12
176 #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
177 #define RX_DESC_DURATION_OFFSET 14
178 #define RX_DESC_RX_TIME_OFFSET 16
179
180 struct tx_desc {
181 u32 NextDescriptor;
182 u16 TxStartOfFrame;
183 u16 TxLength;
184
185 u8 TxState;
186 u8 TxStatus;
187 u8 RetryCount;
188
189 u8 TxRate;
190
191 u8 KeyIndex;
192 u8 ChiperType;
193 u8 ChipreLength;
194 u8 Reserved1;
195
196 u8 Reserved;
197 u8 PacketType;
198 u16 HostTxLength;
199 };
200
201 #define TX_DESC_NEXT_OFFSET 0
202 #define TX_DESC_POS_OFFSET 4
203 #define TX_DESC_SIZE_OFFSET 6
204 #define TX_DESC_FLAGS_OFFSET 8
205 #define TX_DESC_STATUS_OFFSET 9
206 #define TX_DESC_RETRY_OFFSET 10
207 #define TX_DESC_RATE_OFFSET 11
208 #define TX_DESC_KEY_INDEX_OFFSET 12
209 #define TX_DESC_CIPHER_TYPE_OFFSET 13
210 #define TX_DESC_CIPHER_LENGTH_OFFSET 14
211 #define TX_DESC_PACKET_TYPE_OFFSET 17
212 #define TX_DESC_HOST_LENGTH_OFFSET 18
213
214 ///////////////////////////////////////////////////////
215 // Host-MAC interface
216 ///////////////////////////////////////////////////////
217
218 #define TX_STATUS_SUCCESS 0x00
219
220 #define TX_FIRM_OWN 0x80
221 #define TX_DONE 0x40
222
223 #define TX_ERROR 0x01
224
225 #define TX_PACKET_TYPE_DATA 0x01
226 #define TX_PACKET_TYPE_MGMT 0x02
227
228 #define ISR_EMPTY 0x00 // no bits set in ISR
229 #define ISR_TxCOMPLETE 0x01 // packet transmitted
230 #define ISR_RxCOMPLETE 0x02 // packet received
231 #define ISR_RxFRAMELOST 0x04 // Rx Frame lost
232 #define ISR_FATAL_ERROR 0x08 // Fatal error
233 #define ISR_COMMAND_COMPLETE 0x10 // command completed
234 #define ISR_OUT_OF_RANGE 0x20 // command completed
235 #define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
236 #define ISR_GENERIC_IRQ 0x80
237
238 #define Local_Mib_Type 0x01
239 #define Mac_Address_Mib_Type 0x02
240 #define Mac_Mib_Type 0x03
241 #define Statistics_Mib_Type 0x04
242 #define Mac_Mgmt_Mib_Type 0x05
243 #define Mac_Wep_Mib_Type 0x06
244 #define Phy_Mib_Type 0x07
245 #define Multi_Domain_MIB 0x08
246
247 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
248 #define MAC_MIB_FRAG_THRESHOLD_POS 8
249 #define MAC_MIB_RTS_THRESHOLD_POS 10
250 #define MAC_MIB_SHORT_RETRY_POS 16
251 #define MAC_MIB_LONG_RETRY_POS 17
252 #define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
253 #define MAC_MGMT_MIB_BEACON_PER_POS 0
254 #define MAC_MGMT_MIB_STATION_ID_POS 6
255 #define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
256 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
257 #define MAC_MGMT_MIB_PS_MODE_POS 53
258 #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
259 #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
260 #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
261 #define PHY_MIB_CHANNEL_POS 14
262 #define PHY_MIB_RATE_SET_POS 20
263 #define PHY_MIB_REG_DOMAIN_POS 26
264 #define LOCAL_MIB_AUTO_TX_RATE_POS 3
265 #define LOCAL_MIB_SSID_SIZE 5
266 #define LOCAL_MIB_TX_PROMISCUOUS_POS 6
267 #define LOCAL_MIB_TX_MGMT_RATE_POS 7
268 #define LOCAL_MIB_TX_CONTROL_RATE_POS 8
269 #define LOCAL_MIB_PREAMBLE_TYPE 9
270 #define MAC_ADDR_MIB_MAC_ADDR_POS 0
271
272 #define CMD_Set_MIB_Vars 0x01
273 #define CMD_Get_MIB_Vars 0x02
274 #define CMD_Scan 0x03
275 #define CMD_Join 0x04
276 #define CMD_Start 0x05
277 #define CMD_EnableRadio 0x06
278 #define CMD_DisableRadio 0x07
279 #define CMD_SiteSurvey 0x0B
280
281 #define CMD_STATUS_IDLE 0x00
282 #define CMD_STATUS_COMPLETE 0x01
283 #define CMD_STATUS_UNKNOWN 0x02
284 #define CMD_STATUS_INVALID_PARAMETER 0x03
285 #define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
286 #define CMD_STATUS_TIME_OUT 0x07
287 #define CMD_STATUS_IN_PROGRESS 0x08
288 #define CMD_STATUS_REJECTED_RADIO_OFF 0x09
289 #define CMD_STATUS_HOST_ERROR 0xFF
290 #define CMD_STATUS_BUSY 0xFE
291
292 #define CMD_BLOCK_COMMAND_OFFSET 0
293 #define CMD_BLOCK_STATUS_OFFSET 1
294 #define CMD_BLOCK_PARAMETERS_OFFSET 4
295
296 #define SCAN_OPTIONS_SITE_SURVEY 0x80
297
298 #define MGMT_FRAME_BODY_OFFSET 24
299 #define MAX_AUTHENTICATION_RETRIES 3
300 #define MAX_ASSOCIATION_RETRIES 3
301
302 #define AUTHENTICATION_RESPONSE_TIME_OUT 1000
303
304 #define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
305 #define LOOP_RETRY_LIMIT 500000
306
307 #define ACTIVE_MODE 1
308 #define PS_MODE 2
309
310 #define MAX_ENCRYPTION_KEYS 4
311 #define MAX_ENCRYPTION_KEY_SIZE 40
312
313 ///////////////////////////////////////////////////////////////////////////
314 // 802.11 related definitions
315 ///////////////////////////////////////////////////////////////////////////
316
317 //
318 // Regulatory Domains
319 //
320
321 #define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
322 #define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
323 #define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
324 #define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
325 #define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
326 #define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
327 #define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
328 #define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
329
330 #define BSS_TYPE_AD_HOC 1
331 #define BSS_TYPE_INFRASTRUCTURE 2
332
333 #define SCAN_TYPE_ACTIVE 0
334 #define SCAN_TYPE_PASSIVE 1
335
336 #define LONG_PREAMBLE 0
337 #define SHORT_PREAMBLE 1
338 #define AUTO_PREAMBLE 2
339
340 #define DATA_FRAME_WS_HEADER_SIZE 30
341
342 /* promiscuous mode control */
343 #define PROM_MODE_OFF 0x0
344 #define PROM_MODE_UNKNOWN 0x1
345 #define PROM_MODE_CRC_FAILED 0x2
346 #define PROM_MODE_DUPLICATED 0x4
347 #define PROM_MODE_MGMT 0x8
348 #define PROM_MODE_CTRL 0x10
349 #define PROM_MODE_BAD_PROTOCOL 0x20
350
351 #define IFACE_INT_STATUS_OFFSET 0
352 #define IFACE_INT_MASK_OFFSET 1
353 #define IFACE_LOCKOUT_HOST_OFFSET 2
354 #define IFACE_LOCKOUT_MAC_OFFSET 3
355 #define IFACE_FUNC_CTRL_OFFSET 28
356 #define IFACE_MAC_STAT_OFFSET 30
357 #define IFACE_GENERIC_INT_TYPE_OFFSET 32
358
359 #define CIPHER_SUITE_NONE 0
360 #define CIPHER_SUITE_WEP_64 1
361 #define CIPHER_SUITE_TKIP 2
362 #define CIPHER_SUITE_AES 3
363 #define CIPHER_SUITE_CCX 4
364 #define CIPHER_SUITE_WEP_128 5
365
366 //
367 // IFACE MACROS & definitions
368 //
369 //
370
371 // FuncCtrl field:
372 //
373 #define FUNC_CTRL_TxENABLE 0x10
374 #define FUNC_CTRL_RxENABLE 0x20
375 #define FUNC_CTRL_INIT_COMPLETE 0x01
376
377 /* A stub firmware image which reads the MAC address from NVRAM on the card.
378 For copyright information and source see the end of this file. */
379 static u8 mac_reader[] = {
380 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
381 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
382 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
383 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
384 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
385 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
386 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
387 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
388 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
389 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
390 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
391 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
392 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
393 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
394 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
395 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
396 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
397 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
398 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
399 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
400 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
401 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
402 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
403 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
404 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
405 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
406 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
407 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
408 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
409 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
410 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
411 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
412 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
413 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
414 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
415 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
416 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
417 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
418 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
419 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
420 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
421 0x00,0x01,0x00,0x02
422 };
423
424 struct atmel_private {
425 void *card; /* Bus dependent stucture varies for PCcard */
426 int (*present_callback)(void *); /* And callback which uses it */
427 char firmware_id[32];
428 AtmelFWType firmware_type;
429 u8 *firmware;
430 int firmware_length;
431 struct timer_list management_timer;
432 struct net_device *dev;
433 struct device *sys_dev;
434 struct iw_statistics wstats;
435 struct net_device_stats stats; // device stats
436 spinlock_t irqlock, timerlock; // spinlocks
437 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
438 enum {
439 CARD_TYPE_PARALLEL_FLASH,
440 CARD_TYPE_SPI_FLASH,
441 CARD_TYPE_EEPROM
442 } card_type;
443 int do_rx_crc; /* If we need to CRC incoming packets */
444 int probe_crc; /* set if we don't yet know */
445 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
446 u16 rx_desc_head;
447 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
448 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
449
450 u16 frag_seq, frag_len, frag_no;
451 u8 frag_source[6];
452
453 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
454 u8 group_cipher_suite, pairwise_cipher_suite;
455 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
456 int wep_key_len[MAX_ENCRYPTION_KEYS];
457 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
458
459 u16 host_info_base;
460 struct host_info_struct {
461 /* NB this is matched to the hardware, don't change. */
462 u8 volatile int_status;
463 u8 volatile int_mask;
464 u8 volatile lockout_host;
465 u8 volatile lockout_mac;
466
467 u16 tx_buff_pos;
468 u16 tx_buff_size;
469 u16 tx_desc_pos;
470 u16 tx_desc_count;
471
472 u16 rx_buff_pos;
473 u16 rx_buff_size;
474 u16 rx_desc_pos;
475 u16 rx_desc_count;
476
477 u16 build_version;
478 u16 command_pos;
479
480 u16 major_version;
481 u16 minor_version;
482
483 u16 func_ctrl;
484 u16 mac_status;
485 u16 generic_IRQ_type;
486 u8 reserved[2];
487 } host_info;
488
489 enum {
490 STATION_STATE_SCANNING,
491 STATION_STATE_JOINNING,
492 STATION_STATE_AUTHENTICATING,
493 STATION_STATE_ASSOCIATING,
494 STATION_STATE_READY,
495 STATION_STATE_REASSOCIATING,
496 STATION_STATE_DOWN,
497 STATION_STATE_MGMT_ERROR
498 } station_state;
499
500 int operating_mode, power_mode;
501 time_t last_qual;
502 int beacons_this_sec;
503 int channel;
504 int reg_domain, config_reg_domain;
505 int tx_rate;
506 int auto_tx_rate;
507 int rts_threshold;
508 int frag_threshold;
509 int long_retry, short_retry;
510 int preamble;
511 int default_beacon_period, beacon_period, listen_interval;
512 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
513 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
514 enum {
515 SITE_SURVEY_IDLE,
516 SITE_SURVEY_IN_PROGRESS,
517 SITE_SURVEY_COMPLETED
518 } site_survey_state;
519 time_t last_survey;
520
521 int station_was_associated, station_is_associated;
522 int fast_scan;
523
524 struct bss_info {
525 int channel;
526 int SSIDsize;
527 int RSSI;
528 int UsingWEP;
529 int preamble;
530 int beacon_period;
531 int BSStype;
532 u8 BSSID[6];
533 u8 SSID[MAX_SSID_LENGTH];
534 } BSSinfo[MAX_BSS_ENTRIES];
535 int BSS_list_entries, current_BSS;
536 int connect_to_any_BSS;
537 int SSID_size, new_SSID_size;
538 u8 CurrentBSSID[6], BSSID[6];
539 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
540 u64 last_beacon_timestamp;
541 u8 rx_buf[MAX_WIRELESS_BODY];
542 };
543
544 static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
545
546 static const struct {
547 int reg_domain;
548 int min, max;
549 char *name;
550 } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
551 { REG_DOMAIN_DOC, 1, 11, "Canada" },
552 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
553 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
554 { REG_DOMAIN_FRANCE, 10, 13, "France" },
555 { REG_DOMAIN_MKK, 14, 14, "MKK" },
556 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
557 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
558
559 static void build_wpa_mib(struct atmel_private *priv);
560 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
561 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
562 unsigned char *src, u16 len);
563 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
564 u16 src, u16 len);
565 static void atmel_set_gcr(struct net_device *dev, u16 mask);
566 static void atmel_clear_gcr(struct net_device *dev, u16 mask);
567 static int atmel_lock_mac(struct atmel_private *priv);
568 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
569 static void atmel_command_irq(struct atmel_private *priv);
570 static int atmel_validate_channel(struct atmel_private *priv, int channel);
571 static void atmel_management_frame(struct atmel_private *priv,
572 struct ieee80211_hdr_4addr *header,
573 u16 frame_len, u8 rssi);
574 static void atmel_management_timer(u_long a);
575 static void atmel_send_command(struct atmel_private *priv, int command,
576 void *cmd, int cmd_size);
577 static int atmel_send_command_wait(struct atmel_private *priv, int command,
578 void *cmd, int cmd_size);
579 static void atmel_transmit_management_frame(struct atmel_private *priv,
580 struct ieee80211_hdr_4addr *header,
581 u8 *body, int body_len);
582
583 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
584 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
585 u8 data);
586 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
587 u16 data);
588 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
589 u8 *data, int data_len);
590 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
591 u8 *data, int data_len);
592 static void atmel_scan(struct atmel_private *priv, int specific_ssid);
593 static void atmel_join_bss(struct atmel_private *priv, int bss_index);
594 static void atmel_smooth_qual(struct atmel_private *priv);
595 static void atmel_writeAR(struct net_device *dev, u16 data);
596 static int probe_atmel_card(struct net_device *dev);
597 static int reset_atmel_card(struct net_device *dev);
598 static void atmel_enter_state(struct atmel_private *priv, int new_state);
599 int atmel_open (struct net_device *dev);
600
601 static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
602 {
603 return priv->host_info_base + offset;
604 }
605
606 static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
607 {
608 return priv->host_info.command_pos + offset;
609 }
610
611 static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
612 {
613 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
614 }
615
616 static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
617 {
618 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
619 }
620
621 static inline u8 atmel_read8(struct net_device *dev, u16 offset)
622 {
623 return inb(dev->base_addr + offset);
624 }
625
626 static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
627 {
628 outb(data, dev->base_addr + offset);
629 }
630
631 static inline u16 atmel_read16(struct net_device *dev, u16 offset)
632 {
633 return inw(dev->base_addr + offset);
634 }
635
636 static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
637 {
638 outw(data, dev->base_addr + offset);
639 }
640
641 static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
642 {
643 atmel_writeAR(priv->dev, pos);
644 return atmel_read8(priv->dev, DR);
645 }
646
647 static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
648 {
649 atmel_writeAR(priv->dev, pos);
650 atmel_write8(priv->dev, DR, data);
651 }
652
653 static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
654 {
655 atmel_writeAR(priv->dev, pos);
656 return atmel_read16(priv->dev, DR);
657 }
658
659 static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
660 {
661 atmel_writeAR(priv->dev, pos);
662 atmel_write16(priv->dev, DR, data);
663 }
664
665 static const struct iw_handler_def atmel_handler_def;
666
667 static void tx_done_irq(struct atmel_private *priv)
668 {
669 int i;
670
671 for (i = 0;
672 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
673 i < priv->host_info.tx_desc_count;
674 i++) {
675 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
676 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
677 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
678
679 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
680
681 priv->tx_free_mem += msdu_size;
682 priv->tx_desc_free++;
683
684 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
685 priv->tx_buff_head = 0;
686 else
687 priv->tx_buff_head += msdu_size;
688
689 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
690 priv->tx_desc_head++ ;
691 else
692 priv->tx_desc_head = 0;
693
694 if (type == TX_PACKET_TYPE_DATA) {
695 if (status == TX_STATUS_SUCCESS)
696 priv->stats.tx_packets++;
697 else
698 priv->stats.tx_errors++;
699 netif_wake_queue(priv->dev);
700 }
701 }
702 }
703
704 static u16 find_tx_buff(struct atmel_private *priv, u16 len)
705 {
706 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
707
708 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
709 return 0;
710
711 if (bottom_free >= len)
712 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
713
714 if (priv->tx_free_mem - bottom_free >= len) {
715 priv->tx_buff_tail = 0;
716 return priv->host_info.tx_buff_pos;
717 }
718
719 return 0;
720 }
721
722 static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
723 u16 len, u16 buff, u8 type)
724 {
725 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
726 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
727 if (!priv->use_wpa)
728 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
729 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
730 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
731 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
732 if (priv->use_wpa) {
733 int cipher_type, cipher_length;
734 if (is_bcast) {
735 cipher_type = priv->group_cipher_suite;
736 if (cipher_type == CIPHER_SUITE_WEP_64 ||
737 cipher_type == CIPHER_SUITE_WEP_128)
738 cipher_length = 8;
739 else if (cipher_type == CIPHER_SUITE_TKIP)
740 cipher_length = 12;
741 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
742 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
743 cipher_type = priv->pairwise_cipher_suite;
744 cipher_length = 8;
745 } else {
746 cipher_type = CIPHER_SUITE_NONE;
747 cipher_length = 0;
748 }
749 } else {
750 cipher_type = priv->pairwise_cipher_suite;
751 if (cipher_type == CIPHER_SUITE_WEP_64 ||
752 cipher_type == CIPHER_SUITE_WEP_128)
753 cipher_length = 8;
754 else if (cipher_type == CIPHER_SUITE_TKIP)
755 cipher_length = 12;
756 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
757 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
758 cipher_type = priv->group_cipher_suite;
759 cipher_length = 8;
760 } else {
761 cipher_type = CIPHER_SUITE_NONE;
762 cipher_length = 0;
763 }
764 }
765
766 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
767 cipher_type);
768 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
769 cipher_length);
770 }
771 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
772 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
773 if (priv->tx_desc_previous != priv->tx_desc_tail)
774 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
775 priv->tx_desc_previous = priv->tx_desc_tail;
776 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
777 priv->tx_desc_tail++;
778 else
779 priv->tx_desc_tail = 0;
780 priv->tx_desc_free--;
781 priv->tx_free_mem -= len;
782 }
783
784 static int start_tx(struct sk_buff *skb, struct net_device *dev)
785 {
786 static const u8 SNAP_RFC1024[6] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
787 struct atmel_private *priv = netdev_priv(dev);
788 struct ieee80211_hdr_4addr header;
789 unsigned long flags;
790 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
791
792 if (priv->card && priv->present_callback &&
793 !(*priv->present_callback)(priv->card)) {
794 priv->stats.tx_errors++;
795 dev_kfree_skb(skb);
796 return 0;
797 }
798
799 if (priv->station_state != STATION_STATE_READY) {
800 priv->stats.tx_errors++;
801 dev_kfree_skb(skb);
802 return 0;
803 }
804
805 /* first ensure the timer func cannot run */
806 spin_lock_bh(&priv->timerlock);
807 /* then stop the hardware ISR */
808 spin_lock_irqsave(&priv->irqlock, flags);
809 /* nb doing the above in the opposite order will deadlock */
810
811 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
812 12 first bytes (containing DA/SA) and put them in the appropriate
813 fields of the Wireless Header. Thus the packet length is then the
814 initial + 18 (+30-12) */
815
816 if (!(buff = find_tx_buff(priv, len + 18))) {
817 priv->stats.tx_dropped++;
818 spin_unlock_irqrestore(&priv->irqlock, flags);
819 spin_unlock_bh(&priv->timerlock);
820 netif_stop_queue(dev);
821 return 1;
822 }
823
824 frame_ctl = IEEE80211_FTYPE_DATA;
825 header.duration_id = 0;
826 header.seq_ctl = 0;
827 if (priv->wep_is_on)
828 frame_ctl |= IEEE80211_FCTL_PROTECTED;
829 if (priv->operating_mode == IW_MODE_ADHOC) {
830 skb_copy_from_linear_data(skb, &header.addr1, 6);
831 memcpy(&header.addr2, dev->dev_addr, 6);
832 memcpy(&header.addr3, priv->BSSID, 6);
833 } else {
834 frame_ctl |= IEEE80211_FCTL_TODS;
835 memcpy(&header.addr1, priv->CurrentBSSID, 6);
836 memcpy(&header.addr2, dev->dev_addr, 6);
837 skb_copy_from_linear_data(skb, &header.addr3, 6);
838 }
839
840 if (priv->use_wpa)
841 memcpy(&header.addr4, SNAP_RFC1024, 6);
842
843 header.frame_ctl = cpu_to_le16(frame_ctl);
844 /* Copy the wireless header into the card */
845 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
846 /* Copy the packet sans its 802.3 header addresses which have been replaced */
847 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
848 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
849
850 /* low bit of first byte of destination tells us if broadcast */
851 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
852 dev->trans_start = jiffies;
853 priv->stats.tx_bytes += len;
854
855 spin_unlock_irqrestore(&priv->irqlock, flags);
856 spin_unlock_bh(&priv->timerlock);
857 dev_kfree_skb(skb);
858
859 return 0;
860 }
861
862 static void atmel_transmit_management_frame(struct atmel_private *priv,
863 struct ieee80211_hdr_4addr *header,
864 u8 *body, int body_len)
865 {
866 u16 buff;
867 int len = MGMT_FRAME_BODY_OFFSET + body_len;
868
869 if (!(buff = find_tx_buff(priv, len)))
870 return;
871
872 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
873 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
874 priv->tx_buff_tail += len;
875 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
876 }
877
878 static void fast_rx_path(struct atmel_private *priv,
879 struct ieee80211_hdr_4addr *header,
880 u16 msdu_size, u16 rx_packet_loc, u32 crc)
881 {
882 /* fast path: unfragmented packet copy directly into skbuf */
883 u8 mac4[6];
884 struct sk_buff *skb;
885 unsigned char *skbp;
886
887 /* get the final, mac 4 header field, this tells us encapsulation */
888 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
889 msdu_size -= 6;
890
891 if (priv->do_rx_crc) {
892 crc = crc32_le(crc, mac4, 6);
893 msdu_size -= 4;
894 }
895
896 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
897 priv->stats.rx_dropped++;
898 return;
899 }
900
901 skb_reserve(skb, 2);
902 skbp = skb_put(skb, msdu_size + 12);
903 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
904
905 if (priv->do_rx_crc) {
906 u32 netcrc;
907 crc = crc32_le(crc, skbp + 12, msdu_size);
908 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
909 if ((crc ^ 0xffffffff) != netcrc) {
910 priv->stats.rx_crc_errors++;
911 dev_kfree_skb(skb);
912 return;
913 }
914 }
915
916 memcpy(skbp, header->addr1, 6); /* destination address */
917 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
918 memcpy(&skbp[6], header->addr3, 6);
919 else
920 memcpy(&skbp[6], header->addr2, 6); /* source address */
921
922 priv->dev->last_rx = jiffies;
923 skb->protocol = eth_type_trans(skb, priv->dev);
924 skb->ip_summed = CHECKSUM_NONE;
925 netif_rx(skb);
926 priv->stats.rx_bytes += 12 + msdu_size;
927 priv->stats.rx_packets++;
928 }
929
930 /* Test to see if the packet in card memory at packet_loc has a valid CRC
931 It doesn't matter that this is slow: it is only used to proble the first few
932 packets. */
933 static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
934 {
935 int i = msdu_size - 4;
936 u32 netcrc, crc = 0xffffffff;
937
938 if (msdu_size < 4)
939 return 0;
940
941 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
942
943 atmel_writeAR(priv->dev, packet_loc);
944 while (i--) {
945 u8 octet = atmel_read8(priv->dev, DR);
946 crc = crc32_le(crc, &octet, 1);
947 }
948
949 return (crc ^ 0xffffffff) == netcrc;
950 }
951
952 static void frag_rx_path(struct atmel_private *priv,
953 struct ieee80211_hdr_4addr *header,
954 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
955 u8 frag_no, int more_frags)
956 {
957 u8 mac4[6];
958 u8 source[6];
959 struct sk_buff *skb;
960
961 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
962 memcpy(source, header->addr3, 6);
963 else
964 memcpy(source, header->addr2, 6);
965
966 rx_packet_loc += 24; /* skip header */
967
968 if (priv->do_rx_crc)
969 msdu_size -= 4;
970
971 if (frag_no == 0) { /* first fragment */
972 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
973 msdu_size -= 6;
974 rx_packet_loc += 6;
975
976 if (priv->do_rx_crc)
977 crc = crc32_le(crc, mac4, 6);
978
979 priv->frag_seq = seq_no;
980 priv->frag_no = 1;
981 priv->frag_len = msdu_size;
982 memcpy(priv->frag_source, source, 6);
983 memcpy(&priv->rx_buf[6], source, 6);
984 memcpy(priv->rx_buf, header->addr1, 6);
985
986 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
987
988 if (priv->do_rx_crc) {
989 u32 netcrc;
990 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
991 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
992 if ((crc ^ 0xffffffff) != netcrc) {
993 priv->stats.rx_crc_errors++;
994 memset(priv->frag_source, 0xff, 6);
995 }
996 }
997
998 } else if (priv->frag_no == frag_no &&
999 priv->frag_seq == seq_no &&
1000 memcmp(priv->frag_source, source, 6) == 0) {
1001
1002 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1003 rx_packet_loc, msdu_size);
1004 if (priv->do_rx_crc) {
1005 u32 netcrc;
1006 crc = crc32_le(crc,
1007 &priv->rx_buf[12 + priv->frag_len],
1008 msdu_size);
1009 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1010 if ((crc ^ 0xffffffff) != netcrc) {
1011 priv->stats.rx_crc_errors++;
1012 memset(priv->frag_source, 0xff, 6);
1013 more_frags = 1; /* don't send broken assembly */
1014 }
1015 }
1016
1017 priv->frag_len += msdu_size;
1018 priv->frag_no++;
1019
1020 if (!more_frags) { /* last one */
1021 memset(priv->frag_source, 0xff, 6);
1022 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1023 priv->stats.rx_dropped++;
1024 } else {
1025 skb_reserve(skb, 2);
1026 memcpy(skb_put(skb, priv->frag_len + 12),
1027 priv->rx_buf,
1028 priv->frag_len + 12);
1029 priv->dev->last_rx = jiffies;
1030 skb->protocol = eth_type_trans(skb, priv->dev);
1031 skb->ip_summed = CHECKSUM_NONE;
1032 netif_rx(skb);
1033 priv->stats.rx_bytes += priv->frag_len + 12;
1034 priv->stats.rx_packets++;
1035 }
1036 }
1037 } else
1038 priv->wstats.discard.fragment++;
1039 }
1040
1041 static void rx_done_irq(struct atmel_private *priv)
1042 {
1043 int i;
1044 struct ieee80211_hdr_4addr header;
1045
1046 for (i = 0;
1047 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1048 i < priv->host_info.rx_desc_count;
1049 i++) {
1050
1051 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1052 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1053 u32 crc = 0xffffffff;
1054
1055 if (status != RX_STATUS_SUCCESS) {
1056 if (status == 0xc1) /* determined by experiment */
1057 priv->wstats.discard.nwid++;
1058 else
1059 priv->stats.rx_errors++;
1060 goto next;
1061 }
1062
1063 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1064 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1065
1066 if (msdu_size < 30) {
1067 priv->stats.rx_errors++;
1068 goto next;
1069 }
1070
1071 /* Get header as far as end of seq_ctl */
1072 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1073 frame_ctl = le16_to_cpu(header.frame_ctl);
1074 seq_control = le16_to_cpu(header.seq_ctl);
1075
1076 /* probe for CRC use here if needed once five packets have
1077 arrived with the same crc status, we assume we know what's
1078 happening and stop probing */
1079 if (priv->probe_crc) {
1080 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1081 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1082 } else {
1083 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1084 }
1085 if (priv->do_rx_crc) {
1086 if (priv->crc_ok_cnt++ > 5)
1087 priv->probe_crc = 0;
1088 } else {
1089 if (priv->crc_ko_cnt++ > 5)
1090 priv->probe_crc = 0;
1091 }
1092 }
1093
1094 /* don't CRC header when WEP in use */
1095 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1096 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1097 }
1098 msdu_size -= 24; /* header */
1099
1100 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1101 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1102 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1103 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1104
1105 if (!more_fragments && packet_fragment_no == 0) {
1106 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1107 } else {
1108 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1109 packet_sequence_no, packet_fragment_no, more_fragments);
1110 }
1111 }
1112
1113 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1114 /* copy rest of packet into buffer */
1115 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1116
1117 /* we use the same buffer for frag reassembly and control packets */
1118 memset(priv->frag_source, 0xff, 6);
1119
1120 if (priv->do_rx_crc) {
1121 /* last 4 octets is crc */
1122 msdu_size -= 4;
1123 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1124 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1125 priv->stats.rx_crc_errors++;
1126 goto next;
1127 }
1128 }
1129
1130 atmel_management_frame(priv, &header, msdu_size,
1131 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1132 }
1133
1134 next:
1135 /* release descriptor */
1136 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1137
1138 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1139 priv->rx_desc_head++;
1140 else
1141 priv->rx_desc_head = 0;
1142 }
1143 }
1144
1145 static irqreturn_t service_interrupt(int irq, void *dev_id)
1146 {
1147 struct net_device *dev = (struct net_device *) dev_id;
1148 struct atmel_private *priv = netdev_priv(dev);
1149 u8 isr;
1150 int i = -1;
1151 static u8 irq_order[] = {
1152 ISR_OUT_OF_RANGE,
1153 ISR_RxCOMPLETE,
1154 ISR_TxCOMPLETE,
1155 ISR_RxFRAMELOST,
1156 ISR_FATAL_ERROR,
1157 ISR_COMMAND_COMPLETE,
1158 ISR_IBSS_MERGE,
1159 ISR_GENERIC_IRQ
1160 };
1161
1162 if (priv->card && priv->present_callback &&
1163 !(*priv->present_callback)(priv->card))
1164 return IRQ_HANDLED;
1165
1166 /* In this state upper-level code assumes it can mess with
1167 the card unhampered by interrupts which may change register state.
1168 Note that even though the card shouldn't generate interrupts
1169 the inturrupt line may be shared. This allows card setup
1170 to go on without disabling interrupts for a long time. */
1171 if (priv->station_state == STATION_STATE_DOWN)
1172 return IRQ_NONE;
1173
1174 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1175
1176 while (1) {
1177 if (!atmel_lock_mac(priv)) {
1178 /* failed to contact card */
1179 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1180 return IRQ_HANDLED;
1181 }
1182
1183 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1184 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1185
1186 if (!isr) {
1187 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1188 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1189 }
1190
1191 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1192
1193 for (i = 0; i < ARRAY_SIZE(irq_order); i++)
1194 if (isr & irq_order[i])
1195 break;
1196
1197 if (!atmel_lock_mac(priv)) {
1198 /* failed to contact card */
1199 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1200 return IRQ_HANDLED;
1201 }
1202
1203 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1204 isr ^= irq_order[i];
1205 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1206 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1207
1208 switch (irq_order[i]) {
1209
1210 case ISR_OUT_OF_RANGE:
1211 if (priv->operating_mode == IW_MODE_INFRA &&
1212 priv->station_state == STATION_STATE_READY) {
1213 priv->station_is_associated = 0;
1214 atmel_scan(priv, 1);
1215 }
1216 break;
1217
1218 case ISR_RxFRAMELOST:
1219 priv->wstats.discard.misc++;
1220 /* fall through */
1221 case ISR_RxCOMPLETE:
1222 rx_done_irq(priv);
1223 break;
1224
1225 case ISR_TxCOMPLETE:
1226 tx_done_irq(priv);
1227 break;
1228
1229 case ISR_FATAL_ERROR:
1230 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1231 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1232 break;
1233
1234 case ISR_COMMAND_COMPLETE:
1235 atmel_command_irq(priv);
1236 break;
1237
1238 case ISR_IBSS_MERGE:
1239 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1240 priv->CurrentBSSID, 6);
1241 /* The WPA stuff cares about the current AP address */
1242 if (priv->use_wpa)
1243 build_wpa_mib(priv);
1244 break;
1245 case ISR_GENERIC_IRQ:
1246 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1247 break;
1248 }
1249 }
1250 }
1251
1252 static struct net_device_stats *atmel_get_stats(struct net_device *dev)
1253 {
1254 struct atmel_private *priv = netdev_priv(dev);
1255 return &priv->stats;
1256 }
1257
1258 static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1259 {
1260 struct atmel_private *priv = netdev_priv(dev);
1261
1262 /* update the link quality here in case we are seeing no beacons
1263 at all to drive the process */
1264 atmel_smooth_qual(priv);
1265
1266 priv->wstats.status = priv->station_state;
1267
1268 if (priv->operating_mode == IW_MODE_INFRA) {
1269 if (priv->station_state != STATION_STATE_READY) {
1270 priv->wstats.qual.qual = 0;
1271 priv->wstats.qual.level = 0;
1272 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1273 | IW_QUAL_LEVEL_INVALID);
1274 }
1275 priv->wstats.qual.noise = 0;
1276 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1277 } else {
1278 /* Quality levels cannot be determined in ad-hoc mode,
1279 because we can 'hear' more that one remote station. */
1280 priv->wstats.qual.qual = 0;
1281 priv->wstats.qual.level = 0;
1282 priv->wstats.qual.noise = 0;
1283 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1284 | IW_QUAL_LEVEL_INVALID
1285 | IW_QUAL_NOISE_INVALID;
1286 priv->wstats.miss.beacon = 0;
1287 }
1288
1289 return &priv->wstats;
1290 }
1291
1292 static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1293 {
1294 if ((new_mtu < 68) || (new_mtu > 2312))
1295 return -EINVAL;
1296 dev->mtu = new_mtu;
1297 return 0;
1298 }
1299
1300 static int atmel_set_mac_address(struct net_device *dev, void *p)
1301 {
1302 struct sockaddr *addr = p;
1303
1304 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1305 return atmel_open(dev);
1306 }
1307
1308 EXPORT_SYMBOL(atmel_open);
1309
1310 int atmel_open(struct net_device *dev)
1311 {
1312 struct atmel_private *priv = netdev_priv(dev);
1313 int i, channel;
1314
1315 /* any scheduled timer is no longer needed and might screw things up.. */
1316 del_timer_sync(&priv->management_timer);
1317
1318 /* Interrupts will not touch the card once in this state... */
1319 priv->station_state = STATION_STATE_DOWN;
1320
1321 if (priv->new_SSID_size) {
1322 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1323 priv->SSID_size = priv->new_SSID_size;
1324 priv->new_SSID_size = 0;
1325 }
1326 priv->BSS_list_entries = 0;
1327
1328 priv->AuthenticationRequestRetryCnt = 0;
1329 priv->AssociationRequestRetryCnt = 0;
1330 priv->ReAssociationRequestRetryCnt = 0;
1331 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1332 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1333
1334 priv->site_survey_state = SITE_SURVEY_IDLE;
1335 priv->station_is_associated = 0;
1336
1337 if (!reset_atmel_card(dev))
1338 return -EAGAIN;
1339
1340 if (priv->config_reg_domain) {
1341 priv->reg_domain = priv->config_reg_domain;
1342 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1343 } else {
1344 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1345 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1346 if (priv->reg_domain == channel_table[i].reg_domain)
1347 break;
1348 if (i == ARRAY_SIZE(channel_table)) {
1349 priv->reg_domain = REG_DOMAIN_MKK1;
1350 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1351 }
1352 }
1353
1354 if ((channel = atmel_validate_channel(priv, priv->channel)))
1355 priv->channel = channel;
1356
1357 /* this moves station_state on.... */
1358 atmel_scan(priv, 1);
1359
1360 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1361 return 0;
1362 }
1363
1364 static int atmel_close(struct net_device *dev)
1365 {
1366 struct atmel_private *priv = netdev_priv(dev);
1367
1368 /* Send event to userspace that we are disassociating */
1369 if (priv->station_state == STATION_STATE_READY) {
1370 union iwreq_data wrqu;
1371
1372 wrqu.data.length = 0;
1373 wrqu.data.flags = 0;
1374 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1375 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1376 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1377 }
1378
1379 atmel_enter_state(priv, STATION_STATE_DOWN);
1380
1381 if (priv->bus_type == BUS_TYPE_PCCARD)
1382 atmel_write16(dev, GCR, 0x0060);
1383 atmel_write16(dev, GCR, 0x0040);
1384 return 0;
1385 }
1386
1387 static int atmel_validate_channel(struct atmel_private *priv, int channel)
1388 {
1389 /* check that channel is OK, if so return zero,
1390 else return suitable default channel */
1391 int i;
1392
1393 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1394 if (priv->reg_domain == channel_table[i].reg_domain) {
1395 if (channel >= channel_table[i].min &&
1396 channel <= channel_table[i].max)
1397 return 0;
1398 else
1399 return channel_table[i].min;
1400 }
1401 return 0;
1402 }
1403
1404 static int atmel_proc_output (char *buf, struct atmel_private *priv)
1405 {
1406 int i;
1407 char *p = buf;
1408 char *s, *r, *c;
1409
1410 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1411 DRIVER_MAJOR, DRIVER_MINOR);
1412
1413 if (priv->station_state != STATION_STATE_DOWN) {
1414 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1415 "Firmware location:\t",
1416 priv->host_info.major_version,
1417 priv->host_info.minor_version,
1418 priv->host_info.build_version);
1419
1420 if (priv->card_type != CARD_TYPE_EEPROM)
1421 p += sprintf(p, "on card\n");
1422 else if (priv->firmware)
1423 p += sprintf(p, "%s loaded by host\n",
1424 priv->firmware_id);
1425 else
1426 p += sprintf(p, "%s loaded by hotplug\n",
1427 priv->firmware_id);
1428
1429 switch (priv->card_type) {
1430 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1431 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1432 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1433 default: c = "<unknown>";
1434 }
1435
1436 r = "<unknown>";
1437 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1438 if (priv->reg_domain == channel_table[i].reg_domain)
1439 r = channel_table[i].name;
1440
1441 p += sprintf(p, "MAC memory type:\t%s\n", c);
1442 p += sprintf(p, "Regulatory domain:\t%s\n", r);
1443 p += sprintf(p, "Host CRC checking:\t%s\n",
1444 priv->do_rx_crc ? "On" : "Off");
1445 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1446 priv->use_wpa ? "Yes" : "No");
1447 }
1448
1449 switch(priv->station_state) {
1450 case STATION_STATE_SCANNING: s = "Scanning"; break;
1451 case STATION_STATE_JOINNING: s = "Joining"; break;
1452 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1453 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1454 case STATION_STATE_READY: s = "Ready"; break;
1455 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1456 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1457 case STATION_STATE_DOWN: s = "Down"; break;
1458 default: s = "<unknown>";
1459 }
1460
1461 p += sprintf(p, "Current state:\t\t%s\n", s);
1462 return p - buf;
1463 }
1464
1465 static int atmel_read_proc(char *page, char **start, off_t off,
1466 int count, int *eof, void *data)
1467 {
1468 struct atmel_private *priv = data;
1469 int len = atmel_proc_output (page, priv);
1470 if (len <= off+count) *eof = 1;
1471 *start = page + off;
1472 len -= off;
1473 if (len>count) len = count;
1474 if (len<0) len = 0;
1475 return len;
1476 }
1477
1478 struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1479 const AtmelFWType fw_type,
1480 struct device *sys_dev,
1481 int (*card_present)(void *), void *card)
1482 {
1483 struct proc_dir_entry *ent;
1484 struct net_device *dev;
1485 struct atmel_private *priv;
1486 int rc;
1487
1488 /* Create the network device object. */
1489 dev = alloc_etherdev(sizeof(*priv));
1490 if (!dev) {
1491 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1492 return NULL;
1493 }
1494 if (dev_alloc_name(dev, dev->name) < 0) {
1495 printk(KERN_ERR "atmel: Couldn't get name!\n");
1496 goto err_out_free;
1497 }
1498
1499 priv = netdev_priv(dev);
1500 priv->dev = dev;
1501 priv->sys_dev = sys_dev;
1502 priv->present_callback = card_present;
1503 priv->card = card;
1504 priv->firmware = NULL;
1505 priv->firmware_id[0] = '\0';
1506 priv->firmware_type = fw_type;
1507 if (firmware) /* module parameter */
1508 strcpy(priv->firmware_id, firmware);
1509 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1510 priv->station_state = STATION_STATE_DOWN;
1511 priv->do_rx_crc = 0;
1512 /* For PCMCIA cards, some chips need CRC, some don't
1513 so we have to probe. */
1514 if (priv->bus_type == BUS_TYPE_PCCARD) {
1515 priv->probe_crc = 1;
1516 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1517 } else
1518 priv->probe_crc = 0;
1519 memset(&priv->stats, 0, sizeof(priv->stats));
1520 memset(&priv->wstats, 0, sizeof(priv->wstats));
1521 priv->last_qual = jiffies;
1522 priv->last_beacon_timestamp = 0;
1523 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1524 memset(priv->BSSID, 0, 6);
1525 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1526 priv->station_was_associated = 0;
1527
1528 priv->last_survey = jiffies;
1529 priv->preamble = LONG_PREAMBLE;
1530 priv->operating_mode = IW_MODE_INFRA;
1531 priv->connect_to_any_BSS = 0;
1532 priv->config_reg_domain = 0;
1533 priv->reg_domain = 0;
1534 priv->tx_rate = 3;
1535 priv->auto_tx_rate = 1;
1536 priv->channel = 4;
1537 priv->power_mode = 0;
1538 priv->SSID[0] = '\0';
1539 priv->SSID_size = 0;
1540 priv->new_SSID_size = 0;
1541 priv->frag_threshold = 2346;
1542 priv->rts_threshold = 2347;
1543 priv->short_retry = 7;
1544 priv->long_retry = 4;
1545
1546 priv->wep_is_on = 0;
1547 priv->default_key = 0;
1548 priv->encryption_level = 0;
1549 priv->exclude_unencrypted = 0;
1550 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1551 priv->use_wpa = 0;
1552 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1553 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1554
1555 priv->default_beacon_period = priv->beacon_period = 100;
1556 priv->listen_interval = 1;
1557
1558 init_timer(&priv->management_timer);
1559 spin_lock_init(&priv->irqlock);
1560 spin_lock_init(&priv->timerlock);
1561 priv->management_timer.function = atmel_management_timer;
1562 priv->management_timer.data = (unsigned long) dev;
1563
1564 dev->open = atmel_open;
1565 dev->stop = atmel_close;
1566 dev->change_mtu = atmel_change_mtu;
1567 dev->set_mac_address = atmel_set_mac_address;
1568 dev->hard_start_xmit = start_tx;
1569 dev->get_stats = atmel_get_stats;
1570 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1571 dev->do_ioctl = atmel_ioctl;
1572 dev->irq = irq;
1573 dev->base_addr = port;
1574
1575 SET_NETDEV_DEV(dev, sys_dev);
1576
1577 if ((rc = request_irq(dev->irq, service_interrupt, IRQF_SHARED, dev->name, dev))) {
1578 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1579 goto err_out_free;
1580 }
1581
1582 if (!request_region(dev->base_addr, 32,
1583 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1584 goto err_out_irq;
1585 }
1586
1587 if (register_netdev(dev))
1588 goto err_out_res;
1589
1590 if (!probe_atmel_card(dev)){
1591 unregister_netdev(dev);
1592 goto err_out_res;
1593 }
1594
1595 netif_carrier_off(dev);
1596
1597 ent = create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1598 if (!ent)
1599 printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
1600
1601 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
1602 dev->name, DRIVER_MAJOR, DRIVER_MINOR,
1603 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1604 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] );
1605
1606 return dev;
1607
1608 err_out_res:
1609 release_region( dev->base_addr, 32);
1610 err_out_irq:
1611 free_irq(dev->irq, dev);
1612 err_out_free:
1613 free_netdev(dev);
1614 return NULL;
1615 }
1616
1617 EXPORT_SYMBOL(init_atmel_card);
1618
1619 void stop_atmel_card(struct net_device *dev)
1620 {
1621 struct atmel_private *priv = netdev_priv(dev);
1622
1623 /* put a brick on it... */
1624 if (priv->bus_type == BUS_TYPE_PCCARD)
1625 atmel_write16(dev, GCR, 0x0060);
1626 atmel_write16(dev, GCR, 0x0040);
1627
1628 del_timer_sync(&priv->management_timer);
1629 unregister_netdev(dev);
1630 remove_proc_entry("driver/atmel", NULL);
1631 free_irq(dev->irq, dev);
1632 kfree(priv->firmware);
1633 release_region(dev->base_addr, 32);
1634 free_netdev(dev);
1635 }
1636
1637 EXPORT_SYMBOL(stop_atmel_card);
1638
1639 static int atmel_set_essid(struct net_device *dev,
1640 struct iw_request_info *info,
1641 struct iw_point *dwrq,
1642 char *extra)
1643 {
1644 struct atmel_private *priv = netdev_priv(dev);
1645
1646 /* Check if we asked for `any' */
1647 if(dwrq->flags == 0) {
1648 priv->connect_to_any_BSS = 1;
1649 } else {
1650 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1651
1652 priv->connect_to_any_BSS = 0;
1653
1654 /* Check the size of the string */
1655 if (dwrq->length > MAX_SSID_LENGTH)
1656 return -E2BIG;
1657 if (index != 0)
1658 return -EINVAL;
1659
1660 memcpy(priv->new_SSID, extra, dwrq->length);
1661 priv->new_SSID_size = dwrq->length;
1662 }
1663
1664 return -EINPROGRESS;
1665 }
1666
1667 static int atmel_get_essid(struct net_device *dev,
1668 struct iw_request_info *info,
1669 struct iw_point *dwrq,
1670 char *extra)
1671 {
1672 struct atmel_private *priv = netdev_priv(dev);
1673
1674 /* Get the current SSID */
1675 if (priv->new_SSID_size != 0) {
1676 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1677 dwrq->length = priv->new_SSID_size;
1678 } else {
1679 memcpy(extra, priv->SSID, priv->SSID_size);
1680 dwrq->length = priv->SSID_size;
1681 }
1682
1683 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1684
1685 return 0;
1686 }
1687
1688 static int atmel_get_wap(struct net_device *dev,
1689 struct iw_request_info *info,
1690 struct sockaddr *awrq,
1691 char *extra)
1692 {
1693 struct atmel_private *priv = netdev_priv(dev);
1694 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1695 awrq->sa_family = ARPHRD_ETHER;
1696
1697 return 0;
1698 }
1699
1700 static int atmel_set_encode(struct net_device *dev,
1701 struct iw_request_info *info,
1702 struct iw_point *dwrq,
1703 char *extra)
1704 {
1705 struct atmel_private *priv = netdev_priv(dev);
1706
1707 /* Basic checking: do we have a key to set ?
1708 * Note : with the new API, it's impossible to get a NULL pointer.
1709 * Therefore, we need to check a key size == 0 instead.
1710 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1711 * when no key is present (only change flags), but older versions
1712 * don't do it. - Jean II */
1713 if (dwrq->length > 0) {
1714 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1715 int current_index = priv->default_key;
1716 /* Check the size of the key */
1717 if (dwrq->length > 13) {
1718 return -EINVAL;
1719 }
1720 /* Check the index (none -> use current) */
1721 if (index < 0 || index >= 4)
1722 index = current_index;
1723 else
1724 priv->default_key = index;
1725 /* Set the length */
1726 if (dwrq->length > 5)
1727 priv->wep_key_len[index] = 13;
1728 else
1729 if (dwrq->length > 0)
1730 priv->wep_key_len[index] = 5;
1731 else
1732 /* Disable the key */
1733 priv->wep_key_len[index] = 0;
1734 /* Check if the key is not marked as invalid */
1735 if (!(dwrq->flags & IW_ENCODE_NOKEY)) {
1736 /* Cleanup */
1737 memset(priv->wep_keys[index], 0, 13);
1738 /* Copy the key in the driver */
1739 memcpy(priv->wep_keys[index], extra, dwrq->length);
1740 }
1741 /* WE specify that if a valid key is set, encryption
1742 * should be enabled (user may turn it off later)
1743 * This is also how "iwconfig ethX key on" works */
1744 if (index == current_index &&
1745 priv->wep_key_len[index] > 0) {
1746 priv->wep_is_on = 1;
1747 priv->exclude_unencrypted = 1;
1748 if (priv->wep_key_len[index] > 5) {
1749 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1750 priv->encryption_level = 2;
1751 } else {
1752 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1753 priv->encryption_level = 1;
1754 }
1755 }
1756 } else {
1757 /* Do we want to just set the transmit key index ? */
1758 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1759 if (index >= 0 && index < 4) {
1760 priv->default_key = index;
1761 } else
1762 /* Don't complain if only change the mode */
1763 if (!dwrq->flags & IW_ENCODE_MODE) {
1764 return -EINVAL;
1765 }
1766 }
1767 /* Read the flags */
1768 if (dwrq->flags & IW_ENCODE_DISABLED) {
1769 priv->wep_is_on = 0;
1770 priv->encryption_level = 0;
1771 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1772 } else {
1773 priv->wep_is_on = 1;
1774 if (priv->wep_key_len[priv->default_key] > 5) {
1775 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1776 priv->encryption_level = 2;
1777 } else {
1778 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1779 priv->encryption_level = 1;
1780 }
1781 }
1782 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1783 priv->exclude_unencrypted = 1;
1784 if(dwrq->flags & IW_ENCODE_OPEN)
1785 priv->exclude_unencrypted = 0;
1786
1787 return -EINPROGRESS; /* Call commit handler */
1788 }
1789
1790 static int atmel_get_encode(struct net_device *dev,
1791 struct iw_request_info *info,
1792 struct iw_point *dwrq,
1793 char *extra)
1794 {
1795 struct atmel_private *priv = netdev_priv(dev);
1796 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1797
1798 if (!priv->wep_is_on)
1799 dwrq->flags = IW_ENCODE_DISABLED;
1800 else {
1801 if (priv->exclude_unencrypted)
1802 dwrq->flags = IW_ENCODE_RESTRICTED;
1803 else
1804 dwrq->flags = IW_ENCODE_OPEN;
1805 }
1806 /* Which key do we want ? -1 -> tx index */
1807 if (index < 0 || index >= 4)
1808 index = priv->default_key;
1809 dwrq->flags |= index + 1;
1810 /* Copy the key to the user buffer */
1811 dwrq->length = priv->wep_key_len[index];
1812 if (dwrq->length > 16) {
1813 dwrq->length=0;
1814 } else {
1815 memset(extra, 0, 16);
1816 memcpy(extra, priv->wep_keys[index], dwrq->length);
1817 }
1818
1819 return 0;
1820 }
1821
1822 static int atmel_set_encodeext(struct net_device *dev,
1823 struct iw_request_info *info,
1824 union iwreq_data *wrqu,
1825 char *extra)
1826 {
1827 struct atmel_private *priv = netdev_priv(dev);
1828 struct iw_point *encoding = &wrqu->encoding;
1829 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1830 int idx, key_len, alg = ext->alg, set_key = 1;
1831
1832 /* Determine and validate the key index */
1833 idx = encoding->flags & IW_ENCODE_INDEX;
1834 if (idx) {
1835 if (idx < 1 || idx > WEP_KEYS)
1836 return -EINVAL;
1837 idx--;
1838 } else
1839 idx = priv->default_key;
1840
1841 if (encoding->flags & IW_ENCODE_DISABLED)
1842 alg = IW_ENCODE_ALG_NONE;
1843
1844 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
1845 priv->default_key = idx;
1846 set_key = ext->key_len > 0 ? 1 : 0;
1847 }
1848
1849 if (set_key) {
1850 /* Set the requested key first */
1851 switch (alg) {
1852 case IW_ENCODE_ALG_NONE:
1853 priv->wep_is_on = 0;
1854 priv->encryption_level = 0;
1855 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1856 break;
1857 case IW_ENCODE_ALG_WEP:
1858 if (ext->key_len > 5) {
1859 priv->wep_key_len[idx] = 13;
1860 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1861 priv->encryption_level = 2;
1862 } else if (ext->key_len > 0) {
1863 priv->wep_key_len[idx] = 5;
1864 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1865 priv->encryption_level = 1;
1866 } else {
1867 return -EINVAL;
1868 }
1869 priv->wep_is_on = 1;
1870 memset(priv->wep_keys[idx], 0, 13);
1871 key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1872 memcpy(priv->wep_keys[idx], ext->key, key_len);
1873 break;
1874 default:
1875 return -EINVAL;
1876 }
1877 }
1878
1879 return -EINPROGRESS;
1880 }
1881
1882 static int atmel_get_encodeext(struct net_device *dev,
1883 struct iw_request_info *info,
1884 union iwreq_data *wrqu,
1885 char *extra)
1886 {
1887 struct atmel_private *priv = netdev_priv(dev);
1888 struct iw_point *encoding = &wrqu->encoding;
1889 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1890 int idx, max_key_len;
1891
1892 max_key_len = encoding->length - sizeof(*ext);
1893 if (max_key_len < 0)
1894 return -EINVAL;
1895
1896 idx = encoding->flags & IW_ENCODE_INDEX;
1897 if (idx) {
1898 if (idx < 1 || idx > WEP_KEYS)
1899 return -EINVAL;
1900 idx--;
1901 } else
1902 idx = priv->default_key;
1903
1904 encoding->flags = idx + 1;
1905 memset(ext, 0, sizeof(*ext));
1906
1907 if (!priv->wep_is_on) {
1908 ext->alg = IW_ENCODE_ALG_NONE;
1909 ext->key_len = 0;
1910 encoding->flags |= IW_ENCODE_DISABLED;
1911 } else {
1912 if (priv->encryption_level > 0)
1913 ext->alg = IW_ENCODE_ALG_WEP;
1914 else
1915 return -EINVAL;
1916
1917 ext->key_len = priv->wep_key_len[idx];
1918 memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1919 encoding->flags |= IW_ENCODE_ENABLED;
1920 }
1921
1922 return 0;
1923 }
1924
1925 static int atmel_set_auth(struct net_device *dev,
1926 struct iw_request_info *info,
1927 union iwreq_data *wrqu, char *extra)
1928 {
1929 struct atmel_private *priv = netdev_priv(dev);
1930 struct iw_param *param = &wrqu->param;
1931
1932 switch (param->flags & IW_AUTH_INDEX) {
1933 case IW_AUTH_WPA_VERSION:
1934 case IW_AUTH_CIPHER_PAIRWISE:
1935 case IW_AUTH_CIPHER_GROUP:
1936 case IW_AUTH_KEY_MGMT:
1937 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1938 case IW_AUTH_PRIVACY_INVOKED:
1939 /*
1940 * atmel does not use these parameters
1941 */
1942 break;
1943
1944 case IW_AUTH_DROP_UNENCRYPTED:
1945 priv->exclude_unencrypted = param->value ? 1 : 0;
1946 break;
1947
1948 case IW_AUTH_80211_AUTH_ALG: {
1949 if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1950 priv->exclude_unencrypted = 1;
1951 } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1952 priv->exclude_unencrypted = 0;
1953 } else
1954 return -EINVAL;
1955 break;
1956 }
1957
1958 case IW_AUTH_WPA_ENABLED:
1959 /* Silently accept disable of WPA */
1960 if (param->value > 0)
1961 return -EOPNOTSUPP;
1962 break;
1963
1964 default:
1965 return -EOPNOTSUPP;
1966 }
1967 return -EINPROGRESS;
1968 }
1969
1970 static int atmel_get_auth(struct net_device *dev,
1971 struct iw_request_info *info,
1972 union iwreq_data *wrqu, char *extra)
1973 {
1974 struct atmel_private *priv = netdev_priv(dev);
1975 struct iw_param *param = &wrqu->param;
1976
1977 switch (param->flags & IW_AUTH_INDEX) {
1978 case IW_AUTH_DROP_UNENCRYPTED:
1979 param->value = priv->exclude_unencrypted;
1980 break;
1981
1982 case IW_AUTH_80211_AUTH_ALG:
1983 if (priv->exclude_unencrypted == 1)
1984 param->value = IW_AUTH_ALG_SHARED_KEY;
1985 else
1986 param->value = IW_AUTH_ALG_OPEN_SYSTEM;
1987 break;
1988
1989 case IW_AUTH_WPA_ENABLED:
1990 param->value = 0;
1991 break;
1992
1993 default:
1994 return -EOPNOTSUPP;
1995 }
1996 return 0;
1997 }
1998
1999
2000 static int atmel_get_name(struct net_device *dev,
2001 struct iw_request_info *info,
2002 char *cwrq,
2003 char *extra)
2004 {
2005 strcpy(cwrq, "IEEE 802.11-DS");
2006 return 0;
2007 }
2008
2009 static int atmel_set_rate(struct net_device *dev,
2010 struct iw_request_info *info,
2011 struct iw_param *vwrq,
2012 char *extra)
2013 {
2014 struct atmel_private *priv = netdev_priv(dev);
2015
2016 if (vwrq->fixed == 0) {
2017 priv->tx_rate = 3;
2018 priv->auto_tx_rate = 1;
2019 } else {
2020 priv->auto_tx_rate = 0;
2021
2022 /* Which type of value ? */
2023 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
2024 /* Setting by rate index */
2025 priv->tx_rate = vwrq->value;
2026 } else {
2027 /* Setting by frequency value */
2028 switch (vwrq->value) {
2029 case 1000000: priv->tx_rate = 0; break;
2030 case 2000000: priv->tx_rate = 1; break;
2031 case 5500000: priv->tx_rate = 2; break;
2032 case 11000000: priv->tx_rate = 3; break;
2033 default: return -EINVAL;
2034 }
2035 }
2036 }
2037
2038 return -EINPROGRESS;
2039 }
2040
2041 static int atmel_set_mode(struct net_device *dev,
2042 struct iw_request_info *info,
2043 __u32 *uwrq,
2044 char *extra)
2045 {
2046 struct atmel_private *priv = netdev_priv(dev);
2047
2048 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2049 return -EINVAL;
2050
2051 priv->operating_mode = *uwrq;
2052 return -EINPROGRESS;
2053 }
2054
2055 static int atmel_get_mode(struct net_device *dev,
2056 struct iw_request_info *info,
2057 __u32 *uwrq,
2058 char *extra)
2059 {
2060 struct atmel_private *priv = netdev_priv(dev);
2061
2062 *uwrq = priv->operating_mode;
2063 return 0;
2064 }
2065
2066 static int atmel_get_rate(struct net_device *dev,
2067 struct iw_request_info *info,
2068 struct iw_param *vwrq,
2069 char *extra)
2070 {
2071 struct atmel_private *priv = netdev_priv(dev);
2072
2073 if (priv->auto_tx_rate) {
2074 vwrq->fixed = 0;
2075 vwrq->value = 11000000;
2076 } else {
2077 vwrq->fixed = 1;
2078 switch(priv->tx_rate) {
2079 case 0: vwrq->value = 1000000; break;
2080 case 1: vwrq->value = 2000000; break;
2081 case 2: vwrq->value = 5500000; break;
2082 case 3: vwrq->value = 11000000; break;
2083 }
2084 }
2085 return 0;
2086 }
2087
2088 static int atmel_set_power(struct net_device *dev,
2089 struct iw_request_info *info,
2090 struct iw_param *vwrq,
2091 char *extra)
2092 {
2093 struct atmel_private *priv = netdev_priv(dev);
2094 priv->power_mode = vwrq->disabled ? 0 : 1;
2095 return -EINPROGRESS;
2096 }
2097
2098 static int atmel_get_power(struct net_device *dev,
2099 struct iw_request_info *info,
2100 struct iw_param *vwrq,
2101 char *extra)
2102 {
2103 struct atmel_private *priv = netdev_priv(dev);
2104 vwrq->disabled = priv->power_mode ? 0 : 1;
2105 vwrq->flags = IW_POWER_ON;
2106 return 0;
2107 }
2108
2109 static int atmel_set_retry(struct net_device *dev,
2110 struct iw_request_info *info,
2111 struct iw_param *vwrq,
2112 char *extra)
2113 {
2114 struct atmel_private *priv = netdev_priv(dev);
2115
2116 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
2117 if (vwrq->flags & IW_RETRY_LONG)
2118 priv->long_retry = vwrq->value;
2119 else if (vwrq->flags & IW_RETRY_SHORT)
2120 priv->short_retry = vwrq->value;
2121 else {
2122 /* No modifier : set both */
2123 priv->long_retry = vwrq->value;
2124 priv->short_retry = vwrq->value;
2125 }
2126 return -EINPROGRESS;
2127 }
2128
2129 return -EINVAL;
2130 }
2131
2132 static int atmel_get_retry(struct net_device *dev,
2133 struct iw_request_info *info,
2134 struct iw_param *vwrq,
2135 char *extra)
2136 {
2137 struct atmel_private *priv = netdev_priv(dev);
2138
2139 vwrq->disabled = 0; /* Can't be disabled */
2140
2141 /* Note : by default, display the short retry number */
2142 if (vwrq->flags & IW_RETRY_LONG) {
2143 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_LONG;
2144 vwrq->value = priv->long_retry;
2145 } else {
2146 vwrq->flags = IW_RETRY_LIMIT;
2147 vwrq->value = priv->short_retry;
2148 if (priv->long_retry != priv->short_retry)
2149 vwrq->flags |= IW_RETRY_SHORT;
2150 }
2151
2152 return 0;
2153 }
2154
2155 static int atmel_set_rts(struct net_device *dev,
2156 struct iw_request_info *info,
2157 struct iw_param *vwrq,
2158 char *extra)
2159 {
2160 struct atmel_private *priv = netdev_priv(dev);
2161 int rthr = vwrq->value;
2162
2163 if (vwrq->disabled)
2164 rthr = 2347;
2165 if ((rthr < 0) || (rthr > 2347)) {
2166 return -EINVAL;
2167 }
2168 priv->rts_threshold = rthr;
2169
2170 return -EINPROGRESS; /* Call commit handler */
2171 }
2172
2173 static int atmel_get_rts(struct net_device *dev,
2174 struct iw_request_info *info,
2175 struct iw_param *vwrq,
2176 char *extra)
2177 {
2178 struct atmel_private *priv = netdev_priv(dev);
2179
2180 vwrq->value = priv->rts_threshold;
2181 vwrq->disabled = (vwrq->value >= 2347);
2182 vwrq->fixed = 1;
2183
2184 return 0;
2185 }
2186
2187 static int atmel_set_frag(struct net_device *dev,
2188 struct iw_request_info *info,
2189 struct iw_param *vwrq,
2190 char *extra)
2191 {
2192 struct atmel_private *priv = netdev_priv(dev);
2193 int fthr = vwrq->value;
2194
2195 if (vwrq->disabled)
2196 fthr = 2346;
2197 if ((fthr < 256) || (fthr > 2346)) {
2198 return -EINVAL;
2199 }
2200 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2201 priv->frag_threshold = fthr;
2202
2203 return -EINPROGRESS; /* Call commit handler */
2204 }
2205
2206 static int atmel_get_frag(struct net_device *dev,
2207 struct iw_request_info *info,
2208 struct iw_param *vwrq,
2209 char *extra)
2210 {
2211 struct atmel_private *priv = netdev_priv(dev);
2212
2213 vwrq->value = priv->frag_threshold;
2214 vwrq->disabled = (vwrq->value >= 2346);
2215 vwrq->fixed = 1;
2216
2217 return 0;
2218 }
2219
2220 static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2221 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2222
2223 static int atmel_set_freq(struct net_device *dev,
2224 struct iw_request_info *info,
2225 struct iw_freq *fwrq,
2226 char *extra)
2227 {
2228 struct atmel_private *priv = netdev_priv(dev);
2229 int rc = -EINPROGRESS; /* Call commit handler */
2230
2231 /* If setting by frequency, convert to a channel */
2232 if ((fwrq->e == 1) &&
2233 (fwrq->m >= (int) 241200000) &&
2234 (fwrq->m <= (int) 248700000)) {
2235 int f = fwrq->m / 100000;
2236 int c = 0;
2237 while ((c < 14) && (f != frequency_list[c]))
2238 c++;
2239 /* Hack to fall through... */
2240 fwrq->e = 0;
2241 fwrq->m = c + 1;
2242 }
2243 /* Setting by channel number */
2244 if ((fwrq->m > 1000) || (fwrq->e > 0))
2245 rc = -EOPNOTSUPP;
2246 else {
2247 int channel = fwrq->m;
2248 if (atmel_validate_channel(priv, channel) == 0) {
2249 priv->channel = channel;
2250 } else {
2251 rc = -EINVAL;
2252 }
2253 }
2254 return rc;
2255 }
2256
2257 static int atmel_get_freq(struct net_device *dev,
2258 struct iw_request_info *info,
2259 struct iw_freq *fwrq,
2260 char *extra)
2261 {
2262 struct atmel_private *priv = netdev_priv(dev);
2263
2264 fwrq->m = priv->channel;
2265 fwrq->e = 0;
2266 return 0;
2267 }
2268
2269 static int atmel_set_scan(struct net_device *dev,
2270 struct iw_request_info *info,
2271 struct iw_param *vwrq,
2272 char *extra)
2273 {
2274 struct atmel_private *priv = netdev_priv(dev);
2275 unsigned long flags;
2276
2277 /* Note : you may have realised that, as this is a SET operation,
2278 * this is privileged and therefore a normal user can't
2279 * perform scanning.
2280 * This is not an error, while the device perform scanning,
2281 * traffic doesn't flow, so it's a perfect DoS...
2282 * Jean II */
2283
2284 if (priv->station_state == STATION_STATE_DOWN)
2285 return -EAGAIN;
2286
2287 /* Timeout old surveys. */
2288 if ((jiffies - priv->last_survey) > (20 * HZ))
2289 priv->site_survey_state = SITE_SURVEY_IDLE;
2290 priv->last_survey = jiffies;
2291
2292 /* Initiate a scan command */
2293 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2294 return -EBUSY;
2295
2296 del_timer_sync(&priv->management_timer);
2297 spin_lock_irqsave(&priv->irqlock, flags);
2298
2299 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2300 priv->fast_scan = 0;
2301 atmel_scan(priv, 0);
2302 spin_unlock_irqrestore(&priv->irqlock, flags);
2303
2304 return 0;
2305 }
2306
2307 static int atmel_get_scan(struct net_device *dev,
2308 struct iw_request_info *info,
2309 struct iw_point *dwrq,
2310 char *extra)
2311 {
2312 struct atmel_private *priv = netdev_priv(dev);
2313 int i;
2314 char *current_ev = extra;
2315 struct iw_event iwe;
2316
2317 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2318 return -EAGAIN;
2319
2320 for (i = 0; i < priv->BSS_list_entries; i++) {
2321 iwe.cmd = SIOCGIWAP;
2322 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2323 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2324 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN);
2325
2326 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2327 if (iwe.u.data.length > 32)
2328 iwe.u.data.length = 32;
2329 iwe.cmd = SIOCGIWESSID;
2330 iwe.u.data.flags = 1;
2331 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID);
2332
2333 iwe.cmd = SIOCGIWMODE;
2334 iwe.u.mode = priv->BSSinfo[i].BSStype;
2335 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN);
2336
2337 iwe.cmd = SIOCGIWFREQ;
2338 iwe.u.freq.m = priv->BSSinfo[i].channel;
2339 iwe.u.freq.e = 0;
2340 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN);
2341
2342 /* Add quality statistics */
2343 iwe.cmd = IWEVQUAL;
2344 iwe.u.qual.level = priv->BSSinfo[i].RSSI;
2345 iwe.u.qual.qual = iwe.u.qual.level;
2346 /* iwe.u.qual.noise = SOMETHING */
2347 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA , &iwe, IW_EV_QUAL_LEN);
2348
2349
2350 iwe.cmd = SIOCGIWENCODE;
2351 if (priv->BSSinfo[i].UsingWEP)
2352 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2353 else
2354 iwe.u.data.flags = IW_ENCODE_DISABLED;
2355 iwe.u.data.length = 0;
2356 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL);
2357 }
2358
2359 /* Length of data */
2360 dwrq->length = (current_ev - extra);
2361 dwrq->flags = 0;
2362
2363 return 0;
2364 }
2365
2366 static int atmel_get_range(struct net_device *dev,
2367 struct iw_request_info *info,
2368 struct iw_point *dwrq,
2369 char *extra)
2370 {
2371 struct atmel_private *priv = netdev_priv(dev);
2372 struct iw_range *range = (struct iw_range *) extra;
2373 int k, i, j;
2374
2375 dwrq->length = sizeof(struct iw_range);
2376 memset(range, 0, sizeof(struct iw_range));
2377 range->min_nwid = 0x0000;
2378 range->max_nwid = 0x0000;
2379 range->num_channels = 0;
2380 for (j = 0; j < ARRAY_SIZE(channel_table); j++)
2381 if (priv->reg_domain == channel_table[j].reg_domain) {
2382 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2383 break;
2384 }
2385 if (range->num_channels != 0) {
2386 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2387 range->freq[k].i = i; /* List index */
2388 range->freq[k].m = frequency_list[i - 1] * 100000;
2389 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2390 }
2391 range->num_frequency = k;
2392 }
2393
2394 range->max_qual.qual = 100;
2395 range->max_qual.level = 100;
2396 range->max_qual.noise = 0;
2397 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2398
2399 range->avg_qual.qual = 50;
2400 range->avg_qual.level = 50;
2401 range->avg_qual.noise = 0;
2402 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2403
2404 range->sensitivity = 0;
2405
2406 range->bitrate[0] = 1000000;
2407 range->bitrate[1] = 2000000;
2408 range->bitrate[2] = 5500000;
2409 range->bitrate[3] = 11000000;
2410 range->num_bitrates = 4;
2411
2412 range->min_rts = 0;
2413 range->max_rts = 2347;
2414 range->min_frag = 256;
2415 range->max_frag = 2346;
2416
2417 range->encoding_size[0] = 5;
2418 range->encoding_size[1] = 13;
2419 range->num_encoding_sizes = 2;
2420 range->max_encoding_tokens = 4;
2421
2422 range->pmp_flags = IW_POWER_ON;
2423 range->pmt_flags = IW_POWER_ON;
2424 range->pm_capa = 0;
2425
2426 range->we_version_source = WIRELESS_EXT;
2427 range->we_version_compiled = WIRELESS_EXT;
2428 range->retry_capa = IW_RETRY_LIMIT ;
2429 range->retry_flags = IW_RETRY_LIMIT;
2430 range->r_time_flags = 0;
2431 range->min_retry = 1;
2432 range->max_retry = 65535;
2433
2434 return 0;
2435 }
2436
2437 static int atmel_set_wap(struct net_device *dev,
2438 struct iw_request_info *info,
2439 struct sockaddr *awrq,
2440 char *extra)
2441 {
2442 struct atmel_private *priv = netdev_priv(dev);
2443 int i;
2444 static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2445 static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2446 unsigned long flags;
2447
2448 if (awrq->sa_family != ARPHRD_ETHER)
2449 return -EINVAL;
2450
2451 if (!memcmp(any, awrq->sa_data, 6) ||
2452 !memcmp(off, awrq->sa_data, 6)) {
2453 del_timer_sync(&priv->management_timer);
2454 spin_lock_irqsave(&priv->irqlock, flags);
2455 atmel_scan(priv, 1);
2456 spin_unlock_irqrestore(&priv->irqlock, flags);
2457 return 0;
2458 }
2459
2460 for (i = 0; i < priv->BSS_list_entries; i++) {
2461 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2462 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2463 return -EINVAL;
2464 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2465 return -EINVAL;
2466 } else {
2467 del_timer_sync(&priv->management_timer);
2468 spin_lock_irqsave(&priv->irqlock, flags);
2469 atmel_join_bss(priv, i);
2470 spin_unlock_irqrestore(&priv->irqlock, flags);
2471 return 0;
2472 }
2473 }
2474 }
2475
2476 return -EINVAL;
2477 }
2478
2479 static int atmel_config_commit(struct net_device *dev,
2480 struct iw_request_info *info, /* NULL */
2481 void *zwrq, /* NULL */
2482 char *extra) /* NULL */
2483 {
2484 return atmel_open(dev);
2485 }
2486
2487 static const iw_handler atmel_handler[] =
2488 {
2489 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
2490 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
2491 (iw_handler) NULL, /* SIOCSIWNWID */
2492 (iw_handler) NULL, /* SIOCGIWNWID */
2493 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2494 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2495 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2496 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
2497 (iw_handler) NULL, /* SIOCSIWSENS */
2498 (iw_handler) NULL, /* SIOCGIWSENS */
2499 (iw_handler) NULL, /* SIOCSIWRANGE */
2500 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2501 (iw_handler) NULL, /* SIOCSIWPRIV */
2502 (iw_handler) NULL, /* SIOCGIWPRIV */
2503 (iw_handler) NULL, /* SIOCSIWSTATS */
2504 (iw_handler) NULL, /* SIOCGIWSTATS */
2505 (iw_handler) NULL, /* SIOCSIWSPY */
2506 (iw_handler) NULL, /* SIOCGIWSPY */
2507 (iw_handler) NULL, /* -- hole -- */
2508 (iw_handler) NULL, /* -- hole -- */
2509 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2510 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2511 (iw_handler) NULL, /* -- hole -- */
2512 (iw_handler) NULL, /* SIOCGIWAPLIST */
2513 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2514 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2515 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2516 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
2517 (iw_handler) NULL, /* SIOCSIWNICKN */
2518 (iw_handler) NULL, /* SIOCGIWNICKN */
2519 (iw_handler) NULL, /* -- hole -- */
2520 (iw_handler) NULL, /* -- hole -- */
2521 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2522 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2523 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2524 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2525 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2526 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
2527 (iw_handler) NULL, /* SIOCSIWTXPOW */
2528 (iw_handler) NULL, /* SIOCGIWTXPOW */
2529 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2530 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2531 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2532 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2533 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2534 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
2535 (iw_handler) NULL, /* -- hole -- */
2536 (iw_handler) NULL, /* -- hole -- */
2537 (iw_handler) NULL, /* SIOCSIWGENIE */
2538 (iw_handler) NULL, /* SIOCGIWGENIE */
2539 (iw_handler) atmel_set_auth, /* SIOCSIWAUTH */
2540 (iw_handler) atmel_get_auth, /* SIOCGIWAUTH */
2541 (iw_handler) atmel_set_encodeext, /* SIOCSIWENCODEEXT */
2542 (iw_handler) atmel_get_encodeext, /* SIOCGIWENCODEEXT */
2543 (iw_handler) NULL, /* SIOCSIWPMKSA */
2544 };
2545
2546 static const iw_handler atmel_private_handler[] =
2547 {
2548 NULL, /* SIOCIWFIRSTPRIV */
2549 };
2550
2551 typedef struct atmel_priv_ioctl {
2552 char id[32];
2553 unsigned char __user *data;
2554 unsigned short len;
2555 } atmel_priv_ioctl;
2556
2557 #define ATMELFWL SIOCIWFIRSTPRIV
2558 #define ATMELIDIFC ATMELFWL + 1
2559 #define ATMELRD ATMELFWL + 2
2560 #define ATMELMAGIC 0x51807
2561 #define REGDOMAINSZ 20
2562
2563 static const struct iw_priv_args atmel_private_args[] = {
2564 {
2565 .cmd = ATMELFWL,
2566 .set_args = IW_PRIV_TYPE_BYTE
2567 | IW_PRIV_SIZE_FIXED
2568 | sizeof (atmel_priv_ioctl),
2569 .get_args = IW_PRIV_TYPE_NONE,
2570 .name = "atmelfwl"
2571 }, {
2572 .cmd = ATMELIDIFC,
2573 .set_args = IW_PRIV_TYPE_NONE,
2574 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2575 .name = "atmelidifc"
2576 }, {
2577 .cmd = ATMELRD,
2578 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2579 .get_args = IW_PRIV_TYPE_NONE,
2580 .name = "regdomain"
2581 },
2582 };
2583
2584 static const struct iw_handler_def atmel_handler_def =
2585 {
2586 .num_standard = ARRAY_SIZE(atmel_handler),
2587 .num_private = ARRAY_SIZE(atmel_private_handler),
2588 .num_private_args = ARRAY_SIZE(atmel_private_args),
2589 .standard = (iw_handler *) atmel_handler,
2590 .private = (iw_handler *) atmel_private_handler,
2591 .private_args = (struct iw_priv_args *) atmel_private_args,
2592 .get_wireless_stats = atmel_get_wireless_stats
2593 };
2594
2595 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2596 {
2597 int i, rc = 0;
2598 struct atmel_private *priv = netdev_priv(dev);
2599 atmel_priv_ioctl com;
2600 struct iwreq *wrq = (struct iwreq *) rq;
2601 unsigned char *new_firmware;
2602 char domain[REGDOMAINSZ + 1];
2603
2604 switch (cmd) {
2605 case ATMELIDIFC:
2606 wrq->u.param.value = ATMELMAGIC;
2607 break;
2608
2609 case ATMELFWL:
2610 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2611 rc = -EFAULT;
2612 break;
2613 }
2614
2615 if (!capable(CAP_NET_ADMIN)) {
2616 rc = -EPERM;
2617 break;
2618 }
2619
2620 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2621 rc = -ENOMEM;
2622 break;
2623 }
2624
2625 if (copy_from_user(new_firmware, com.data, com.len)) {
2626 kfree(new_firmware);
2627 rc = -EFAULT;
2628 break;
2629 }
2630
2631 kfree(priv->firmware);
2632
2633 priv->firmware = new_firmware;
2634 priv->firmware_length = com.len;
2635 strncpy(priv->firmware_id, com.id, 31);
2636 priv->firmware_id[31] = '\0';
2637 break;
2638
2639 case ATMELRD:
2640 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2641 rc = -EFAULT;
2642 break;
2643 }
2644
2645 if (!capable(CAP_NET_ADMIN)) {
2646 rc = -EPERM;
2647 break;
2648 }
2649
2650 domain[REGDOMAINSZ] = 0;
2651 rc = -EINVAL;
2652 for (i = 0; i < ARRAY_SIZE(channel_table); i++) {
2653 /* strcasecmp doesn't exist in the library */
2654 char *a = channel_table[i].name;
2655 char *b = domain;
2656 while (*a) {
2657 char c1 = *a++;
2658 char c2 = *b++;
2659 if (tolower(c1) != tolower(c2))
2660 break;
2661 }
2662 if (!*a && !*b) {
2663 priv->config_reg_domain = channel_table[i].reg_domain;
2664 rc = 0;
2665 }
2666 }
2667
2668 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2669 rc = atmel_open(dev);
2670 break;
2671
2672 default:
2673 rc = -EOPNOTSUPP;
2674 }
2675
2676 return rc;
2677 }
2678
2679 struct auth_body {
2680 u16 alg;
2681 u16 trans_seq;
2682 u16 status;
2683 u8 el_id;
2684 u8 chall_text_len;
2685 u8 chall_text[253];
2686 };
2687
2688 static void atmel_enter_state(struct atmel_private *priv, int new_state)
2689 {
2690 int old_state = priv->station_state;
2691
2692 if (new_state == old_state)
2693 return;
2694
2695 priv->station_state = new_state;
2696
2697 if (new_state == STATION_STATE_READY) {
2698 netif_start_queue(priv->dev);
2699 netif_carrier_on(priv->dev);
2700 }
2701
2702 if (old_state == STATION_STATE_READY) {
2703 netif_carrier_off(priv->dev);
2704 if (netif_running(priv->dev))
2705 netif_stop_queue(priv->dev);
2706 priv->last_beacon_timestamp = 0;
2707 }
2708 }
2709
2710 static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2711 {
2712 struct {
2713 u8 BSSID[6];
2714 u8 SSID[MAX_SSID_LENGTH];
2715 u8 scan_type;
2716 u8 channel;
2717 u16 BSS_type;
2718 u16 min_channel_time;
2719 u16 max_channel_time;
2720 u8 options;
2721 u8 SSID_size;
2722 } cmd;
2723
2724 memset(cmd.BSSID, 0xff, 6);
2725
2726 if (priv->fast_scan) {
2727 cmd.SSID_size = priv->SSID_size;
2728 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2729 cmd.min_channel_time = cpu_to_le16(10);
2730 cmd.max_channel_time = cpu_to_le16(50);
2731 } else {
2732 priv->BSS_list_entries = 0;
2733 cmd.SSID_size = 0;
2734 cmd.min_channel_time = cpu_to_le16(10);
2735 cmd.max_channel_time = cpu_to_le16(120);
2736 }
2737
2738 cmd.options = 0;
2739
2740 if (!specific_ssid)
2741 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2742
2743 cmd.channel = (priv->channel & 0x7f);
2744 cmd.scan_type = SCAN_TYPE_ACTIVE;
2745 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2746 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2747
2748 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2749
2750 /* This must come after all hardware access to avoid being messed up
2751 by stuff happening in interrupt context after we leave STATE_DOWN */
2752 atmel_enter_state(priv, STATION_STATE_SCANNING);
2753 }
2754
2755 static void join(struct atmel_private *priv, int type)
2756 {
2757 struct {
2758 u8 BSSID[6];
2759 u8 SSID[MAX_SSID_LENGTH];
2760 u8 BSS_type; /* this is a short in a scan command - weird */
2761 u8 channel;
2762 u16 timeout;
2763 u8 SSID_size;
2764 u8 reserved;
2765 } cmd;
2766
2767 cmd.SSID_size = priv->SSID_size;
2768 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2769 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2770 cmd.channel = (priv->channel & 0x7f);
2771 cmd.BSS_type = type;
2772 cmd.timeout = cpu_to_le16(2000);
2773
2774 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2775 }
2776
2777 static void start(struct atmel_private *priv, int type)
2778 {
2779 struct {
2780 u8 BSSID[6];
2781 u8 SSID[MAX_SSID_LENGTH];
2782 u8 BSS_type;
2783 u8 channel;
2784 u8 SSID_size;
2785 u8 reserved[3];
2786 } cmd;
2787
2788 cmd.SSID_size = priv->SSID_size;
2789 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2790 memcpy(cmd.BSSID, priv->BSSID, 6);
2791 cmd.BSS_type = type;
2792 cmd.channel = (priv->channel & 0x7f);
2793
2794 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2795 }
2796
2797 static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2798 u8 channel)
2799 {
2800 int rejoin = 0;
2801 int new = capability & MFIE_TYPE_POWER_CONSTRAINT ?
2802 SHORT_PREAMBLE : LONG_PREAMBLE;
2803
2804 if (priv->preamble != new) {
2805 priv->preamble = new;
2806 rejoin = 1;
2807 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2808 }
2809
2810 if (priv->channel != channel) {
2811 priv->channel = channel;
2812 rejoin = 1;
2813 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2814 }
2815
2816 if (rejoin) {
2817 priv->station_is_associated = 0;
2818 atmel_enter_state(priv, STATION_STATE_JOINNING);
2819
2820 if (priv->operating_mode == IW_MODE_INFRA)
2821 join(priv, BSS_TYPE_INFRASTRUCTURE);
2822 else
2823 join(priv, BSS_TYPE_AD_HOC);
2824 }
2825 }
2826
2827 static void send_authentication_request(struct atmel_private *priv, u16 system,
2828 u8 *challenge, int challenge_len)
2829 {
2830 struct ieee80211_hdr_4addr header;
2831 struct auth_body auth;
2832
2833 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2834 header.duration_id = cpu_to_le16(0x8000);
2835 header.seq_ctl = 0;
2836 memcpy(header.addr1, priv->CurrentBSSID, 6);
2837 memcpy(header.addr2, priv->dev->dev_addr, 6);
2838 memcpy(header.addr3, priv->CurrentBSSID, 6);
2839
2840 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
2841 /* no WEP for authentication frames with TrSeqNo 1 */
2842 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2843
2844 auth.alg = cpu_to_le16(system);
2845
2846 auth.status = 0;
2847 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2848 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2849 priv->CurrentAuthentTransactionSeqNum += 2;
2850
2851 if (challenge_len != 0) {
2852 auth.el_id = 16; /* challenge_text */
2853 auth.chall_text_len = challenge_len;
2854 memcpy(auth.chall_text, challenge, challenge_len);
2855 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2856 } else {
2857 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2858 }
2859 }
2860
2861 static void send_association_request(struct atmel_private *priv, int is_reassoc)
2862 {
2863 u8 *ssid_el_p;
2864 int bodysize;
2865 struct ieee80211_hdr_4addr header;
2866 struct ass_req_format {
2867 u16 capability;
2868 u16 listen_interval;
2869 u8 ap[6]; /* nothing after here directly accessible */
2870 u8 ssid_el_id;
2871 u8 ssid_len;
2872 u8 ssid[MAX_SSID_LENGTH];
2873 u8 sup_rates_el_id;
2874 u8 sup_rates_len;
2875 u8 rates[4];
2876 } body;
2877
2878 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2879 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2880 header.duration_id = cpu_to_le16(0x8000);
2881 header.seq_ctl = 0;
2882
2883 memcpy(header.addr1, priv->CurrentBSSID, 6);
2884 memcpy(header.addr2, priv->dev->dev_addr, 6);
2885 memcpy(header.addr3, priv->CurrentBSSID, 6);
2886
2887 body.capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
2888 if (priv->wep_is_on)
2889 body.capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
2890 if (priv->preamble == SHORT_PREAMBLE)
2891 body.capability |= cpu_to_le16(MFIE_TYPE_POWER_CONSTRAINT);
2892
2893 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2894
2895 /* current AP address - only in reassoc frame */
2896 if (is_reassoc) {
2897 memcpy(body.ap, priv->CurrentBSSID, 6);
2898 ssid_el_p = (u8 *)&body.ssid_el_id;
2899 bodysize = 18 + priv->SSID_size;
2900 } else {
2901 ssid_el_p = (u8 *)&body.ap[0];
2902 bodysize = 12 + priv->SSID_size;
2903 }
2904
2905 ssid_el_p[0] = MFIE_TYPE_SSID;
2906 ssid_el_p[1] = priv->SSID_size;
2907 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2908 ssid_el_p[2 + priv->SSID_size] = MFIE_TYPE_RATES;
2909 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2910 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2911
2912 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2913 }
2914
2915 static int is_frame_from_current_bss(struct atmel_private *priv,
2916 struct ieee80211_hdr_4addr *header)
2917 {
2918 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
2919 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2920 else
2921 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2922 }
2923
2924 static int retrieve_bss(struct atmel_private *priv)
2925 {
2926 int i;
2927 int max_rssi = -128;
2928 int max_index = -1;
2929
2930 if (priv->BSS_list_entries == 0)
2931 return -1;
2932
2933 if (priv->connect_to_any_BSS) {
2934 /* Select a BSS with the max-RSSI but of the same type and of
2935 the same WEP mode and that it is not marked as 'bad' (i.e.
2936 we had previously failed to connect to this BSS with the
2937 settings that we currently use) */
2938 priv->current_BSS = 0;
2939 for (i = 0; i < priv->BSS_list_entries; i++) {
2940 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2941 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2942 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2943 !(priv->BSSinfo[i].channel & 0x80)) {
2944 max_rssi = priv->BSSinfo[i].RSSI;
2945 priv->current_BSS = max_index = i;
2946 }
2947 }
2948 return max_index;
2949 }
2950
2951 for (i = 0; i < priv->BSS_list_entries; i++) {
2952 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2953 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2954 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2955 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2956 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2957 max_rssi = priv->BSSinfo[i].RSSI;
2958 max_index = i;
2959 }
2960 }
2961 }
2962 return max_index;
2963 }
2964
2965 static void store_bss_info(struct atmel_private *priv,
2966 struct ieee80211_hdr_4addr *header, u16 capability,
2967 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2968 u8 *ssid, int is_beacon)
2969 {
2970 u8 *bss = capability & WLAN_CAPABILITY_ESS ? header->addr2 : header->addr3;
2971 int i, index;
2972
2973 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2974 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
2975 index = i;
2976
2977 /* If we process a probe and an entry from this BSS exists
2978 we will update the BSS entry with the info from this BSS.
2979 If we process a beacon we will only update RSSI */
2980
2981 if (index == -1) {
2982 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2983 return;
2984 index = priv->BSS_list_entries++;
2985 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2986 priv->BSSinfo[index].RSSI = rssi;
2987 } else {
2988 if (rssi > priv->BSSinfo[index].RSSI)
2989 priv->BSSinfo[index].RSSI = rssi;
2990 if (is_beacon)
2991 return;
2992 }
2993
2994 priv->BSSinfo[index].channel = channel;
2995 priv->BSSinfo[index].beacon_period = beacon_period;
2996 priv->BSSinfo[index].UsingWEP = capability & WLAN_CAPABILITY_PRIVACY;
2997 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2998 priv->BSSinfo[index].SSIDsize = ssid_len;
2999
3000 if (capability & WLAN_CAPABILITY_IBSS)
3001 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
3002 else if (capability & WLAN_CAPABILITY_ESS)
3003 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
3004
3005 priv->BSSinfo[index].preamble = capability & MFIE_TYPE_POWER_CONSTRAINT ?
3006 SHORT_PREAMBLE : LONG_PREAMBLE;
3007 }
3008
3009 static void authenticate(struct atmel_private *priv, u16 frame_len)
3010 {
3011 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3012 u16 status = le16_to_cpu(auth->status);
3013 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
3014 u16 system = le16_to_cpu(auth->alg);
3015
3016 if (status == WLAN_STATUS_SUCCESS && !priv->wep_is_on) {
3017 /* no WEP */
3018 if (priv->station_was_associated) {
3019 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3020 send_association_request(priv, 1);
3021 return;
3022 } else {
3023 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3024 send_association_request(priv, 0);
3025 return;
3026 }
3027 }
3028
3029 if (status == WLAN_STATUS_SUCCESS && priv->wep_is_on) {
3030 int should_associate = 0;
3031 /* WEP */
3032 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3033 return;
3034
3035 if (system == WLAN_AUTH_OPEN) {
3036 if (trans_seq_no == 0x0002) {
3037 should_associate = 1;
3038 }
3039 } else if (system == WLAN_AUTH_SHARED_KEY) {
3040 if (trans_seq_no == 0x0002 &&
3041 auth->el_id == MFIE_TYPE_CHALLENGE) {
3042 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3043 return;
3044 } else if (trans_seq_no == 0x0004) {
3045 should_associate = 1;
3046 }
3047 }
3048
3049 if (should_associate) {
3050 if(priv->station_was_associated) {
3051 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3052 send_association_request(priv, 1);
3053 return;
3054 } else {
3055 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3056 send_association_request(priv, 0);
3057 return;
3058 }
3059 }
3060 }
3061
3062 if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
3063 /* Do opensystem first, then try sharedkey */
3064 if (system == WLAN_AUTH_OPEN) {
3065 priv->CurrentAuthentTransactionSeqNum = 0x001;
3066 priv->exclude_unencrypted = 1;
3067 send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3068 return;
3069 } else if (priv->connect_to_any_BSS) {
3070 int bss_index;
3071
3072 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3073
3074 if ((bss_index = retrieve_bss(priv)) != -1) {
3075 atmel_join_bss(priv, bss_index);
3076 return;
3077 }
3078 }
3079 }
3080
3081 priv->AuthenticationRequestRetryCnt = 0;
3082 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3083 priv->station_is_associated = 0;
3084 }
3085
3086 static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3087 {
3088 struct ass_resp_format {
3089 u16 capability;
3090 u16 status;
3091 u16 ass_id;
3092 u8 el_id;
3093 u8 length;
3094 u8 rates[4];
3095 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
3096
3097 u16 status = le16_to_cpu(ass_resp->status);
3098 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
3099 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3100
3101 union iwreq_data wrqu;
3102
3103 if (frame_len < 8 + rates_len)
3104 return;
3105
3106 if (status == WLAN_STATUS_SUCCESS) {
3107 if (subtype == IEEE80211_STYPE_ASSOC_RESP)
3108 priv->AssociationRequestRetryCnt = 0;
3109 else
3110 priv->ReAssociationRequestRetryCnt = 0;
3111
3112 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3113 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3114 atmel_set_mib(priv, Phy_Mib_Type,
3115 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
3116 if (priv->power_mode == 0) {
3117 priv->listen_interval = 1;
3118 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3119 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3120 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3121 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3122 } else {
3123 priv->listen_interval = 2;
3124 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3125 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
3126 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3127 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
3128 }
3129
3130 priv->station_is_associated = 1;
3131 priv->station_was_associated = 1;
3132 atmel_enter_state(priv, STATION_STATE_READY);
3133
3134 /* Send association event to userspace */
3135 wrqu.data.length = 0;
3136 wrqu.data.flags = 0;
3137 memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3138 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3139 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3140
3141 return;
3142 }
3143
3144 if (subtype == IEEE80211_STYPE_ASSOC_RESP &&
3145 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3146 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3147 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3148 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3149 priv->AssociationRequestRetryCnt++;
3150 send_association_request(priv, 0);
3151 return;
3152 }
3153
3154 if (subtype == IEEE80211_STYPE_REASSOC_RESP &&
3155 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3156 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3157 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3158 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3159 priv->ReAssociationRequestRetryCnt++;
3160 send_association_request(priv, 1);
3161 return;
3162 }
3163
3164 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3165 priv->station_is_associated = 0;
3166
3167 if (priv->connect_to_any_BSS) {
3168 int bss_index;
3169 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3170
3171 if ((bss_index = retrieve_bss(priv)) != -1)
3172 atmel_join_bss(priv, bss_index);
3173 }
3174 }
3175
3176 void atmel_join_bss(struct atmel_private *priv, int bss_index)
3177 {
3178 struct bss_info *bss = &priv->BSSinfo[bss_index];
3179
3180 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
3181 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3182
3183 /* The WPA stuff cares about the current AP address */
3184 if (priv->use_wpa)
3185 build_wpa_mib(priv);
3186
3187 /* When switching to AdHoc turn OFF Power Save if needed */
3188
3189 if (bss->BSStype == IW_MODE_ADHOC &&
3190 priv->operating_mode != IW_MODE_ADHOC &&
3191 priv->power_mode) {
3192 priv->power_mode = 0;
3193 priv->listen_interval = 1;
3194 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3195 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3196 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3197 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3198 }
3199
3200 priv->operating_mode = bss->BSStype;
3201 priv->channel = bss->channel & 0x7f;
3202 priv->beacon_period = bss->beacon_period;
3203
3204 if (priv->preamble != bss->preamble) {
3205 priv->preamble = bss->preamble;
3206 atmel_set_mib8(priv, Local_Mib_Type,
3207 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3208 }
3209
3210 if (!priv->wep_is_on && bss->UsingWEP) {
3211 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3212 priv->station_is_associated = 0;
3213 return;
3214 }
3215
3216 if (priv->wep_is_on && !bss->UsingWEP) {
3217 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3218 priv->station_is_associated = 0;
3219 return;
3220 }
3221
3222 atmel_enter_state(priv, STATION_STATE_JOINNING);
3223
3224 if (priv->operating_mode == IW_MODE_INFRA)
3225 join(priv, BSS_TYPE_INFRASTRUCTURE);
3226 else
3227 join(priv, BSS_TYPE_AD_HOC);
3228 }
3229
3230 static void restart_search(struct atmel_private *priv)
3231 {
3232 int bss_index;
3233
3234 if (!priv->connect_to_any_BSS) {
3235 atmel_scan(priv, 1);
3236 } else {
3237 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3238
3239 if ((bss_index = retrieve_bss(priv)) != -1)
3240 atmel_join_bss(priv, bss_index);
3241 else
3242 atmel_scan(priv, 0);
3243 }
3244 }
3245
3246 static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3247 {
3248 u8 old = priv->wstats.qual.level;
3249 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3250
3251 switch (priv->firmware_type) {
3252 case ATMEL_FW_TYPE_502E:
3253 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3254 break;
3255 default:
3256 break;
3257 }
3258
3259 rssi = rssi * 100 / max_rssi;
3260 if ((rssi + old) % 2)
3261 priv->wstats.qual.level = (rssi + old) / 2 + 1;
3262 else
3263 priv->wstats.qual.level = (rssi + old) / 2;
3264 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3265 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3266 }
3267
3268 static void atmel_smooth_qual(struct atmel_private *priv)
3269 {
3270 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
3271 while (time_diff--) {
3272 priv->last_qual += HZ;
3273 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3274 priv->wstats.qual.qual +=
3275 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3276 priv->beacons_this_sec = 0;
3277 }
3278 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3279 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3280 }
3281
3282 /* deals with incoming managment frames. */
3283 static void atmel_management_frame(struct atmel_private *priv,
3284 struct ieee80211_hdr_4addr *header,
3285 u16 frame_len, u8 rssi)
3286 {
3287 u16 subtype;
3288
3289 subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE;
3290 switch (subtype) {
3291 case IEEE80211_STYPE_BEACON:
3292 case IEEE80211_STYPE_PROBE_RESP:
3293
3294 /* beacon frame has multiple variable-length fields -
3295 never let an engineer loose with a data structure design. */
3296 {
3297 struct beacon_format {
3298 u64 timestamp;
3299 u16 interval;
3300 u16 capability;
3301 u8 ssid_el_id;
3302 u8 ssid_length;
3303 /* ssid here */
3304 u8 rates_el_id;
3305 u8 rates_length;
3306 /* rates here */
3307 u8 ds_el_id;
3308 u8 ds_length;
3309 /* ds here */
3310 } *beacon = (struct beacon_format *)priv->rx_buf;
3311
3312 u8 channel, rates_length, ssid_length;
3313 u64 timestamp = le64_to_cpu(beacon->timestamp);
3314 u16 beacon_interval = le16_to_cpu(beacon->interval);
3315 u16 capability = le16_to_cpu(beacon->capability);
3316 u8 *beaconp = priv->rx_buf;
3317 ssid_length = beacon->ssid_length;
3318 /* this blows chunks. */
3319 if (frame_len < 14 || frame_len < ssid_length + 15)
3320 return;
3321 rates_length = beaconp[beacon->ssid_length + 15];
3322 if (frame_len < ssid_length + rates_length + 18)
3323 return;
3324 if (ssid_length > MAX_SSID_LENGTH)
3325 return;
3326 channel = beaconp[ssid_length + rates_length + 18];
3327
3328 if (priv->station_state == STATION_STATE_READY) {
3329 smooth_rssi(priv, rssi);
3330 if (is_frame_from_current_bss(priv, header)) {
3331 priv->beacons_this_sec++;
3332 atmel_smooth_qual(priv);
3333 if (priv->last_beacon_timestamp) {
3334 /* Note truncate this to 32 bits - kernel can't divide a long long */
3335 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3336 int beacons = beacon_delay / (beacon_interval * 1000);
3337 if (beacons > 1)
3338 priv->wstats.miss.beacon += beacons - 1;
3339 }
3340 priv->last_beacon_timestamp = timestamp;
3341 handle_beacon_probe(priv, capability, channel);
3342 }
3343 }
3344
3345 if (priv->station_state == STATION_STATE_SCANNING)
3346 store_bss_info(priv, header, capability,
3347 beacon_interval, channel, rssi,
3348 ssid_length,
3349 &beacon->rates_el_id,
3350 subtype == IEEE80211_STYPE_BEACON);
3351 }
3352 break;
3353
3354 case IEEE80211_STYPE_AUTH:
3355
3356 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3357 authenticate(priv, frame_len);
3358
3359 break;
3360
3361 case IEEE80211_STYPE_ASSOC_RESP:
3362 case IEEE80211_STYPE_REASSOC_RESP:
3363
3364 if (priv->station_state == STATION_STATE_ASSOCIATING ||
3365 priv->station_state == STATION_STATE_REASSOCIATING)
3366 associate(priv, frame_len, subtype);
3367
3368 break;
3369
3370 case IEEE80211_STYPE_DISASSOC:
3371 if (priv->station_is_associated &&
3372 priv->operating_mode == IW_MODE_INFRA &&
3373 is_frame_from_current_bss(priv, header)) {
3374 priv->station_was_associated = 0;
3375 priv->station_is_associated = 0;
3376
3377 atmel_enter_state(priv, STATION_STATE_JOINNING);
3378 join(priv, BSS_TYPE_INFRASTRUCTURE);
3379 }
3380
3381 break;
3382
3383 case IEEE80211_STYPE_DEAUTH:
3384 if (priv->operating_mode == IW_MODE_INFRA &&
3385 is_frame_from_current_bss(priv, header)) {
3386 priv->station_was_associated = 0;
3387
3388 atmel_enter_state(priv, STATION_STATE_JOINNING);
3389 join(priv, BSS_TYPE_INFRASTRUCTURE);
3390 }
3391
3392 break;
3393 }
3394 }
3395
3396 /* run when timer expires */
3397 static void atmel_management_timer(u_long a)
3398 {
3399 struct net_device *dev = (struct net_device *) a;
3400 struct atmel_private *priv = netdev_priv(dev);
3401 unsigned long flags;
3402
3403 /* Check if the card has been yanked. */
3404 if (priv->card && priv->present_callback &&
3405 !(*priv->present_callback)(priv->card))
3406 return;
3407
3408 spin_lock_irqsave(&priv->irqlock, flags);
3409
3410 switch (priv->station_state) {
3411
3412 case STATION_STATE_AUTHENTICATING:
3413 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3414 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3415 priv->station_is_associated = 0;
3416 priv->AuthenticationRequestRetryCnt = 0;
3417 restart_search(priv);
3418 } else {
3419 int auth = WLAN_AUTH_OPEN;
3420 priv->AuthenticationRequestRetryCnt++;
3421 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3422 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3423 if (priv->wep_is_on && priv->exclude_unencrypted)
3424 auth = WLAN_AUTH_SHARED_KEY;
3425 send_authentication_request(priv, auth, NULL, 0);
3426 }
3427 break;
3428
3429 case STATION_STATE_ASSOCIATING:
3430 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3431 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3432 priv->station_is_associated = 0;
3433 priv->AssociationRequestRetryCnt = 0;
3434 restart_search(priv);
3435 } else {
3436 priv->AssociationRequestRetryCnt++;
3437 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3438 send_association_request(priv, 0);
3439 }
3440 break;
3441
3442 case STATION_STATE_REASSOCIATING:
3443 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3444 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3445 priv->station_is_associated = 0;
3446 priv->ReAssociationRequestRetryCnt = 0;
3447 restart_search(priv);
3448 } else {
3449 priv->ReAssociationRequestRetryCnt++;
3450 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3451 send_association_request(priv, 1);
3452 }
3453 break;
3454
3455 default:
3456 break;
3457 }
3458
3459 spin_unlock_irqrestore(&priv->irqlock, flags);
3460 }
3461
3462 static void atmel_command_irq(struct atmel_private *priv)
3463 {
3464 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3465 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3466 int fast_scan;
3467 union iwreq_data wrqu;
3468
3469 if (status == CMD_STATUS_IDLE ||
3470 status == CMD_STATUS_IN_PROGRESS)
3471 return;
3472
3473 switch (command){
3474
3475 case CMD_Start:
3476 if (status == CMD_STATUS_COMPLETE) {
3477 priv->station_was_associated = priv->station_is_associated;
3478 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3479 (u8 *)priv->CurrentBSSID, 6);
3480 atmel_enter_state(priv, STATION_STATE_READY);
3481 }
3482 break;
3483
3484 case CMD_Scan:
3485 fast_scan = priv->fast_scan;
3486 priv->fast_scan = 0;
3487
3488 if (status != CMD_STATUS_COMPLETE) {
3489 atmel_scan(priv, 1);
3490 } else {
3491 int bss_index = retrieve_bss(priv);
3492 int notify_scan_complete = 1;
3493 if (bss_index != -1) {
3494 atmel_join_bss(priv, bss_index);
3495 } else if (priv->operating_mode == IW_MODE_ADHOC &&
3496 priv->SSID_size != 0) {
3497 start(priv, BSS_TYPE_AD_HOC);
3498 } else {
3499 priv->fast_scan = !fast_scan;
3500 atmel_scan(priv, 1);
3501 notify_scan_complete = 0;
3502 }
3503 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3504 if (notify_scan_complete) {
3505 wrqu.data.length = 0;
3506 wrqu.data.flags = 0;
3507 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3508 }
3509 }
3510 break;
3511
3512 case CMD_SiteSurvey:
3513 priv->fast_scan = 0;
3514
3515 if (status != CMD_STATUS_COMPLETE)
3516 return;
3517
3518 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3519 if (priv->station_is_associated) {
3520 atmel_enter_state(priv, STATION_STATE_READY);
3521 wrqu.data.length = 0;
3522 wrqu.data.flags = 0;
3523 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3524 } else {
3525 atmel_scan(priv, 1);
3526 }
3527 break;
3528
3529 case CMD_Join:
3530 if (status == CMD_STATUS_COMPLETE) {
3531 if (priv->operating_mode == IW_MODE_ADHOC) {
3532 priv->station_was_associated = priv->station_is_associated;
3533 atmel_enter_state(priv, STATION_STATE_READY);
3534 } else {
3535 int auth = WLAN_AUTH_OPEN;
3536 priv->AuthenticationRequestRetryCnt = 0;
3537 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3538
3539 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3540 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3541 if (priv->wep_is_on && priv->exclude_unencrypted)
3542 auth = WLAN_AUTH_SHARED_KEY;
3543 send_authentication_request(priv, auth, NULL, 0);
3544 }
3545 return;
3546 }
3547
3548 atmel_scan(priv, 1);
3549 }
3550 }
3551
3552 static int atmel_wakeup_firmware(struct atmel_private *priv)
3553 {
3554 struct host_info_struct *iface = &priv->host_info;
3555 u16 mr1, mr3;
3556 int i;
3557
3558 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3559 atmel_set_gcr(priv->dev, GCR_REMAP);
3560
3561 /* wake up on-board processor */
3562 atmel_clear_gcr(priv->dev, 0x0040);
3563 atmel_write16(priv->dev, BSR, BSS_SRAM);
3564
3565 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3566 mdelay(100);
3567
3568 /* and wait for it */
3569 for (i = LOOP_RETRY_LIMIT; i; i--) {
3570 mr1 = atmel_read16(priv->dev, MR1);
3571 mr3 = atmel_read16(priv->dev, MR3);
3572
3573 if (mr3 & MAC_BOOT_COMPLETE)
3574 break;
3575 if (mr1 & MAC_BOOT_COMPLETE &&
3576 priv->bus_type == BUS_TYPE_PCCARD)
3577 break;
3578 }
3579
3580 if (i == 0) {
3581 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3582 return 0;
3583 }
3584
3585 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3586 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3587 return 0;
3588 }
3589
3590 /* now check for completion of MAC initialization through
3591 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3592 MAC initialization, check completion status, set interrupt mask,
3593 enables interrupts and calls Tx and Rx initialization functions */
3594
3595 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3596
3597 for (i = LOOP_RETRY_LIMIT; i; i--) {
3598 mr1 = atmel_read16(priv->dev, MR1);
3599 mr3 = atmel_read16(priv->dev, MR3);
3600
3601 if (mr3 & MAC_INIT_COMPLETE)
3602 break;
3603 if (mr1 & MAC_INIT_COMPLETE &&
3604 priv->bus_type == BUS_TYPE_PCCARD)
3605 break;
3606 }
3607
3608 if (i == 0) {
3609 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3610 priv->dev->name);
3611 return 0;
3612 }
3613
3614 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3615 if ((mr3 & MAC_INIT_COMPLETE) &&
3616 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3617 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3618 return 0;
3619 }
3620 if ((mr1 & MAC_INIT_COMPLETE) &&
3621 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3622 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3623 return 0;
3624 }
3625
3626 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3627 priv->host_info_base, sizeof(*iface));
3628
3629 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3630 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3631 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3632 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3633 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3634 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3635 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3636 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3637 iface->build_version = le16_to_cpu(iface->build_version);
3638 iface->command_pos = le16_to_cpu(iface->command_pos);
3639 iface->major_version = le16_to_cpu(iface->major_version);
3640 iface->minor_version = le16_to_cpu(iface->minor_version);
3641 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3642 iface->mac_status = le16_to_cpu(iface->mac_status);
3643
3644 return 1;
3645 }
3646
3647 /* determine type of memory and MAC address */
3648 static int probe_atmel_card(struct net_device *dev)
3649 {
3650 int rc = 0;
3651 struct atmel_private *priv = netdev_priv(dev);
3652
3653 /* reset pccard */
3654 if (priv->bus_type == BUS_TYPE_PCCARD)
3655 atmel_write16(dev, GCR, 0x0060);
3656
3657 atmel_write16(dev, GCR, 0x0040);
3658 mdelay(500);
3659
3660 if (atmel_read16(dev, MR2) == 0) {
3661 /* No stored firmware so load a small stub which just
3662 tells us the MAC address */
3663 int i;
3664 priv->card_type = CARD_TYPE_EEPROM;
3665 atmel_write16(dev, BSR, BSS_IRAM);
3666 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3667 atmel_set_gcr(dev, GCR_REMAP);
3668 atmel_clear_gcr(priv->dev, 0x0040);
3669 atmel_write16(dev, BSR, BSS_SRAM);
3670 for (i = LOOP_RETRY_LIMIT; i; i--)
3671 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3672 break;
3673 if (i == 0) {
3674 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3675 } else {
3676 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3677 /* got address, now squash it again until the network
3678 interface is opened */
3679 if (priv->bus_type == BUS_TYPE_PCCARD)
3680 atmel_write16(dev, GCR, 0x0060);
3681 atmel_write16(dev, GCR, 0x0040);
3682 rc = 1;
3683 }
3684 } else if (atmel_read16(dev, MR4) == 0) {
3685 /* Mac address easy in this case. */
3686 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3687 atmel_write16(dev, BSR, 1);
3688 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3689 atmel_write16(dev, BSR, 0x200);
3690 rc = 1;
3691 } else {
3692 /* Standard firmware in flash, boot it up and ask
3693 for the Mac Address */
3694 priv->card_type = CARD_TYPE_SPI_FLASH;
3695 if (atmel_wakeup_firmware(priv)) {
3696 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3697
3698 /* got address, now squash it again until the network
3699 interface is opened */
3700 if (priv->bus_type == BUS_TYPE_PCCARD)
3701 atmel_write16(dev, GCR, 0x0060);
3702 atmel_write16(dev, GCR, 0x0040);
3703 rc = 1;
3704 }
3705 }
3706
3707 if (rc) {
3708 if (dev->dev_addr[0] == 0xFF) {
3709 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3710 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3711 memcpy(dev->dev_addr, default_mac, 6);
3712 }
3713 }
3714
3715 return rc;
3716 }
3717
3718 /* Move the encyption information on the MIB structure.
3719 This routine is for the pre-WPA firmware: later firmware has
3720 a different format MIB and a different routine. */
3721 static void build_wep_mib(struct atmel_private *priv)
3722 {
3723 struct { /* NB this is matched to the hardware, don't change. */
3724 u8 wep_is_on;
3725 u8 default_key; /* 0..3 */
3726 u8 reserved;
3727 u8 exclude_unencrypted;
3728
3729 u32 WEPICV_error_count;
3730 u32 WEP_excluded_count;
3731
3732 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3733 u8 encryption_level; /* 0, 1, 2 */
3734 u8 reserved2[3];
3735 } mib;
3736 int i;
3737
3738 mib.wep_is_on = priv->wep_is_on;
3739 if (priv->wep_is_on) {
3740 if (priv->wep_key_len[priv->default_key] > 5)
3741 mib.encryption_level = 2;
3742 else
3743 mib.encryption_level = 1;
3744 } else {
3745 mib.encryption_level = 0;
3746 }
3747
3748 mib.default_key = priv->default_key;
3749 mib.exclude_unencrypted = priv->exclude_unencrypted;
3750
3751 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
3752 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3753
3754 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3755 }
3756
3757 static void build_wpa_mib(struct atmel_private *priv)
3758 {
3759 /* This is for the later (WPA enabled) firmware. */
3760
3761 struct { /* NB this is matched to the hardware, don't change. */
3762 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3763 u8 receiver_address[6];
3764 u8 wep_is_on;
3765 u8 default_key; /* 0..3 */
3766 u8 group_key;
3767 u8 exclude_unencrypted;
3768 u8 encryption_type;
3769 u8 reserved;
3770
3771 u32 WEPICV_error_count;
3772 u32 WEP_excluded_count;
3773
3774 u8 key_RSC[4][8];
3775 } mib;
3776
3777 int i;
3778
3779 mib.wep_is_on = priv->wep_is_on;
3780 mib.exclude_unencrypted = priv->exclude_unencrypted;
3781 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
3782
3783 /* zero all the keys before adding in valid ones. */
3784 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3785
3786 if (priv->wep_is_on) {
3787 /* There's a comment in the Atmel code to the effect that this
3788 is only valid when still using WEP, it may need to be set to
3789 something to use WPA */
3790 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3791
3792 mib.default_key = mib.group_key = 255;
3793 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3794 if (priv->wep_key_len[i] > 0) {
3795 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3796 if (i == priv->default_key) {
3797 mib.default_key = i;
3798 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3799 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3800 } else {
3801 mib.group_key = i;
3802 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3803 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3804 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3805 }
3806 }
3807 }
3808 if (mib.default_key == 255)
3809 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3810 if (mib.group_key == 255)
3811 mib.group_key = mib.default_key;
3812
3813 }
3814
3815 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3816 }
3817
3818 static int reset_atmel_card(struct net_device *dev)
3819 {
3820 /* do everything necessary to wake up the hardware, including
3821 waiting for the lightning strike and throwing the knife switch....
3822
3823 set all the Mib values which matter in the card to match
3824 their settings in the atmel_private structure. Some of these
3825 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3826 can only be changed by tearing down the world and coming back through
3827 here.
3828
3829 This routine is also responsible for initialising some
3830 hardware-specific fields in the atmel_private structure,
3831 including a copy of the firmware's hostinfo stucture
3832 which is the route into the rest of the firmare datastructures. */
3833
3834 struct atmel_private *priv = netdev_priv(dev);
3835 u8 configuration;
3836 int old_state = priv->station_state;
3837
3838 /* data to add to the firmware names, in priority order
3839 this implemenents firmware versioning */
3840
3841 static char *firmware_modifier[] = {
3842 "-wpa",
3843 "",
3844 NULL
3845 };
3846
3847 /* reset pccard */
3848 if (priv->bus_type == BUS_TYPE_PCCARD)
3849 atmel_write16(priv->dev, GCR, 0x0060);
3850
3851 /* stop card , disable interrupts */
3852 atmel_write16(priv->dev, GCR, 0x0040);
3853
3854 if (priv->card_type == CARD_TYPE_EEPROM) {
3855 /* copy in firmware if needed */
3856 const struct firmware *fw_entry = NULL;
3857 unsigned char *fw;
3858 int len = priv->firmware_length;
3859 if (!(fw = priv->firmware)) {
3860 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3861 if (strlen(priv->firmware_id) == 0) {
3862 printk(KERN_INFO
3863 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3864 dev->name);
3865 printk(KERN_INFO
3866 "%s: if not, use the firmware= module parameter.\n",
3867 dev->name);
3868 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3869 }
3870 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) {
3871 printk(KERN_ALERT
3872 "%s: firmware %s is missing, cannot continue.\n",
3873 dev->name, priv->firmware_id);
3874 return 0;
3875 }
3876 } else {
3877 int fw_index = 0;
3878 int success = 0;
3879
3880 /* get firmware filename entry based on firmware type ID */
3881 while (fw_table[fw_index].fw_type != priv->firmware_type
3882 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3883 fw_index++;
3884
3885 /* construct the actual firmware file name */
3886 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3887 int i;
3888 for (i = 0; firmware_modifier[i]; i++) {
3889 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3890 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3891 priv->firmware_id[31] = '\0';
3892 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3893 success = 1;
3894 break;
3895 }
3896 }
3897 }
3898 if (!success) {
3899 printk(KERN_ALERT
3900 "%s: firmware %s is missing, cannot start.\n",
3901 dev->name, priv->firmware_id);
3902 priv->firmware_id[0] = '\0';
3903 return 0;
3904 }
3905 }
3906
3907 fw = fw_entry->data;
3908 len = fw_entry->size;
3909 }
3910
3911 if (len <= 0x6000) {
3912 atmel_write16(priv->dev, BSR, BSS_IRAM);
3913 atmel_copy_to_card(priv->dev, 0, fw, len);
3914 atmel_set_gcr(priv->dev, GCR_REMAP);
3915 } else {
3916 /* Remap */
3917 atmel_set_gcr(priv->dev, GCR_REMAP);
3918 atmel_write16(priv->dev, BSR, BSS_IRAM);
3919 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3920 atmel_write16(priv->dev, BSR, 0x2ff);
3921 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3922 }
3923
3924 if (fw_entry)
3925 release_firmware(fw_entry);
3926 }
3927
3928 if (!atmel_wakeup_firmware(priv))
3929 return 0;
3930
3931 /* Check the version and set the correct flag for wpa stuff,
3932 old and new firmware is incompatible.
3933 The pre-wpa 3com firmware reports major version 5,
3934 the wpa 3com firmware is major version 4 and doesn't need
3935 the 3com broken-ness filter. */
3936 priv->use_wpa = (priv->host_info.major_version == 4);
3937 priv->radio_on_broken = (priv->host_info.major_version == 5);
3938
3939 /* unmask all irq sources */
3940 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3941
3942 /* int Tx system and enable Tx */
3943 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3944 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3945 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3946 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3947
3948 priv->tx_desc_free = priv->host_info.tx_desc_count;
3949 priv->tx_desc_head = 0;
3950 priv->tx_desc_tail = 0;
3951 priv->tx_desc_previous = 0;
3952 priv->tx_free_mem = priv->host_info.tx_buff_size;
3953 priv->tx_buff_head = 0;
3954 priv->tx_buff_tail = 0;
3955
3956 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3957 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3958 configuration | FUNC_CTRL_TxENABLE);
3959
3960 /* init Rx system and enable */
3961 priv->rx_desc_head = 0;
3962
3963 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3964 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3965 configuration | FUNC_CTRL_RxENABLE);
3966
3967 if (!priv->radio_on_broken) {
3968 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3969 CMD_STATUS_REJECTED_RADIO_OFF) {
3970 printk(KERN_INFO
3971 "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n",
3972 dev->name);
3973 return 0;
3974 }
3975 }
3976
3977 /* set up enough MIB values to run. */
3978 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3979 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
3980 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3981 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3982 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3983 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3984 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
3985 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
3986 priv->dev->dev_addr, 6);
3987 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3988 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3989 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
3990 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
3991 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
3992 if (priv->use_wpa)
3993 build_wpa_mib(priv);
3994 else
3995 build_wep_mib(priv);
3996
3997 if (old_state == STATION_STATE_READY)
3998 {
3999 union iwreq_data wrqu;
4000
4001 wrqu.data.length = 0;
4002 wrqu.data.flags = 0;
4003 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4004 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4005 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4006 }
4007
4008 return 1;
4009 }
4010
4011 static void atmel_send_command(struct atmel_private *priv, int command,
4012 void *cmd, int cmd_size)
4013 {
4014 if (cmd)
4015 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
4016 cmd, cmd_size);
4017
4018 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4019 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4020 }
4021
4022 static int atmel_send_command_wait(struct atmel_private *priv, int command,
4023 void *cmd, int cmd_size)
4024 {
4025 int i, status;
4026
4027 atmel_send_command(priv, command, cmd, cmd_size);
4028
4029 for (i = 5000; i; i--) {
4030 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4031 if (status != CMD_STATUS_IDLE &&
4032 status != CMD_STATUS_IN_PROGRESS)
4033 break;
4034 udelay(20);
4035 }
4036
4037 if (i == 0) {
4038 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4039 status = CMD_STATUS_HOST_ERROR;
4040 } else {
4041 if (command != CMD_EnableRadio)
4042 status = CMD_STATUS_COMPLETE;
4043 }
4044
4045 return status;
4046 }
4047
4048 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4049 {
4050 struct get_set_mib m;
4051 m.type = type;
4052 m.size = 1;
4053 m.index = index;
4054
4055 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4056 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4057 }
4058
4059 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4060 {
4061 struct get_set_mib m;
4062 m.type = type;
4063 m.size = 1;
4064 m.index = index;
4065 m.data[0] = data;
4066
4067 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4068 }
4069
4070 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4071 u16 data)
4072 {
4073 struct get_set_mib m;
4074 m.type = type;
4075 m.size = 2;
4076 m.index = index;
4077 m.data[0] = data;
4078 m.data[1] = data >> 8;
4079
4080 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4081 }
4082
4083 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4084 u8 *data, int data_len)
4085 {
4086 struct get_set_mib m;
4087 m.type = type;
4088 m.size = data_len;
4089 m.index = index;
4090
4091 if (data_len > MIB_MAX_DATA_BYTES)
4092 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4093
4094 memcpy(m.data, data, data_len);
4095 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4096 }
4097
4098 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4099 u8 *data, int data_len)
4100 {
4101 struct get_set_mib m;
4102 m.type = type;
4103 m.size = data_len;
4104 m.index = index;
4105
4106 if (data_len > MIB_MAX_DATA_BYTES)
4107 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4108
4109 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4110 atmel_copy_to_host(priv->dev, data,
4111 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4112 }
4113
4114 static void atmel_writeAR(struct net_device *dev, u16 data)
4115 {
4116 int i;
4117 outw(data, dev->base_addr + AR);
4118 /* Address register appears to need some convincing..... */
4119 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
4120 outw(data, dev->base_addr + AR);
4121 }
4122
4123 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
4124 unsigned char *src, u16 len)
4125 {
4126 int i;
4127 atmel_writeAR(dev, dest);
4128 if (dest % 2) {
4129 atmel_write8(dev, DR, *src);
4130 src++; len--;
4131 }
4132 for (i = len; i > 1 ; i -= 2) {
4133 u8 lb = *src++;
4134 u8 hb = *src++;
4135 atmel_write16(dev, DR, lb | (hb << 8));
4136 }
4137 if (i)
4138 atmel_write8(dev, DR, *src);
4139 }
4140
4141 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4142 u16 src, u16 len)
4143 {
4144 int i;
4145 atmel_writeAR(dev, src);
4146 if (src % 2) {
4147 *dest = atmel_read8(dev, DR);
4148 dest++; len--;
4149 }
4150 for (i = len; i > 1 ; i -= 2) {
4151 u16 hw = atmel_read16(dev, DR);
4152 *dest++ = hw;
4153 *dest++ = hw >> 8;
4154 }
4155 if (i)
4156 *dest = atmel_read8(dev, DR);
4157 }
4158
4159 static void atmel_set_gcr(struct net_device *dev, u16 mask)
4160 {
4161 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4162 }
4163
4164 static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4165 {
4166 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4167 }
4168
4169 static int atmel_lock_mac(struct atmel_private *priv)
4170 {
4171 int i, j = 20;
4172 retry:
4173 for (i = 5000; i; i--) {
4174 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4175 break;
4176 udelay(20);
4177 }
4178
4179 if (!i)
4180 return 0; /* timed out */
4181
4182 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4183 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4184 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4185 if (!j--)
4186 return 0; /* timed out */
4187 goto retry;
4188 }
4189
4190 return 1;
4191 }
4192
4193 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4194 {
4195 atmel_writeAR(priv->dev, pos);
4196 atmel_write16(priv->dev, DR, data); /* card is little-endian */
4197 atmel_write16(priv->dev, DR, data >> 16);
4198 }
4199
4200 /***************************************************************************/
4201 /* There follows the source form of the MAC address reading firmware */
4202 /***************************************************************************/
4203 #if 0
4204
4205 /* Copyright 2003 Matthew T. Russotto */
4206 /* But derived from the Atmel 76C502 firmware written by Atmel and */
4207 /* included in "atmel wireless lan drivers" package */
4208 /**
4209 This file is part of net.russotto.AtmelMACFW, hereto referred to
4210 as AtmelMACFW
4211
4212 AtmelMACFW is free software; you can redistribute it and/or modify
4213 it under the terms of the GNU General Public License version 2
4214 as published by the Free Software Foundation.
4215
4216 AtmelMACFW is distributed in the hope that it will be useful,
4217 but WITHOUT ANY WARRANTY; without even the implied warranty of
4218 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4219 GNU General Public License for more details.
4220
4221 You should have received a copy of the GNU General Public License
4222 along with AtmelMACFW; if not, write to the Free Software
4223 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4224
4225 ****************************************************************************/
4226 /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4227 /* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4228 /* It only works on SPI EEPROM versions of the card. */
4229
4230 /* This firmware initializes the SPI controller and clock, reads the MAC */
4231 /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4232 /* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4233 /* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4234 /* MR4, for investigational purposes (maybe we can determine chip type */
4235 /* from that?) */
4236
4237 .org 0
4238 .set MRBASE, 0x8000000
4239 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4240 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4241 .set SRAM_BASE, 0x02000000
4242 .set SP_BASE, 0x0F300000
4243 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4244 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4245 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4246 .set STACK_BASE, 0x5600
4247 .set SP_SR, 0x10
4248 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4249 .set SP_RDRF, 1 /* status register bit -- RDR full */
4250 .set SP_SWRST, 0x80
4251 .set SP_SPIEN, 0x1
4252 .set SP_CR, 0 /* control register */
4253 .set SP_MR, 4 /* mode register */
4254 .set SP_RDR, 0x08 /* Read Data Register */
4255 .set SP_TDR, 0x0C /* Transmit Data Register */
4256 .set SP_CSR0, 0x30 /* chip select registers */
4257 .set SP_CSR1, 0x34
4258 .set SP_CSR2, 0x38
4259 .set SP_CSR3, 0x3C
4260 .set NVRAM_CMD_RDSR, 5 /* read status register */
4261 .set NVRAM_CMD_READ, 3 /* read data */
4262 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4263 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4264 serial output, since SO is normally high. But it
4265 does cause 8 clock cycles and thus 8 bits to be
4266 clocked in to the chip. See Atmel's SPI
4267 controller (e.g. AT91M55800) timing and 4K
4268 SPI EEPROM manuals */
4269
4270 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4271 .set NVRAM_IMAGE, 0x02000200
4272 .set NVRAM_LENGTH, 0x0200
4273 .set MAC_ADDRESS_MIB, SRAM_BASE
4274 .set MAC_ADDRESS_LENGTH, 6
4275 .set MAC_BOOT_FLAG, 0x10
4276 .set MR1, 0
4277 .set MR2, 4
4278 .set MR3, 8
4279 .set MR4, 0xC
4280 RESET_VECTOR:
4281 b RESET_HANDLER
4282 UNDEF_VECTOR:
4283 b HALT1
4284 SWI_VECTOR:
4285 b HALT1
4286 IABORT_VECTOR:
4287 b HALT1
4288 DABORT_VECTOR:
4289 RESERVED_VECTOR:
4290 b HALT1
4291 IRQ_VECTOR:
4292 b HALT1
4293 FIQ_VECTOR:
4294 b HALT1
4295 HALT1: b HALT1
4296 RESET_HANDLER:
4297 mov r0, #CPSR_INITIAL
4298 msr CPSR_c, r0 /* This is probably unnecessary */
4299
4300 /* I'm guessing this is initializing clock generator electronics for SPI */
4301 ldr r0, =SPI_CGEN_BASE
4302 mov r1, #0
4303 mov r1, r1, lsl #3
4304 orr r1,r1, #0
4305 str r1, [r0]
4306 ldr r1, [r0, #28]
4307 bic r1, r1, #16
4308 str r1, [r0, #28]
4309 mov r1, #1
4310 str r1, [r0, #8]
4311
4312 ldr r0, =MRBASE
4313 mov r1, #0
4314 strh r1, [r0, #MR1]
4315 strh r1, [r0, #MR2]
4316 strh r1, [r0, #MR3]
4317 strh r1, [r0, #MR4]
4318
4319 mov sp, #STACK_BASE
4320 bl SP_INIT
4321 mov r0, #10
4322 bl DELAY9
4323 bl GET_MAC_ADDR
4324 bl GET_WHOLE_NVRAM
4325 ldr r0, =MRBASE
4326 ldr r1, =MAC_ADDRESS_MIB
4327 strh r1, [r0, #MR2]
4328 ldr r1, =NVRAM_IMAGE
4329 strh r1, [r0, #MR4]
4330 mov r1, #MAC_BOOT_FLAG
4331 strh r1, [r0, #MR3]
4332 HALT2: b HALT2
4333 .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4334 GET_WHOLE_NVRAM:
4335 stmdb sp!, {lr}
4336 mov r2, #0 /* 0th bytes of NVRAM */
4337 mov r3, #NVRAM_LENGTH
4338 mov r1, #0 /* not used in routine */
4339 ldr r0, =NVRAM_IMAGE
4340 bl NVRAM_XFER
4341 ldmia sp!, {lr}
4342 bx lr
4343 .endfunc
4344
4345 .func Get_MAC_Addr, GET_MAC_ADDR
4346 GET_MAC_ADDR:
4347 stmdb sp!, {lr}
4348 mov r2, #0x120 /* address of MAC Address within NVRAM */
4349 mov r3, #MAC_ADDRESS_LENGTH
4350 mov r1, #0 /* not used in routine */
4351 ldr r0, =MAC_ADDRESS_MIB
4352 bl NVRAM_XFER
4353 ldmia sp!, {lr}
4354 bx lr
4355 .endfunc
4356 .ltorg
4357 .func Delay9, DELAY9
4358 DELAY9:
4359 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4360 DELAYLOOP:
4361 beq DELAY9_done
4362 subs r0, r0, #1
4363 b DELAYLOOP
4364 DELAY9_done:
4365 bx lr
4366 .endfunc
4367
4368 .func SP_Init, SP_INIT
4369 SP_INIT:
4370 mov r1, #SP_SWRST
4371 ldr r0, =SP_BASE
4372 str r1, [r0, #SP_CR] /* reset the SPI */
4373 mov r1, #0
4374 str r1, [r0, #SP_CR] /* release SPI from reset state */
4375 mov r1, #SP_SPIEN
4376 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4377 str r1, [r0, #SP_CR] /* enable the SPI */
4378
4379 /* My guess would be this turns on the SPI clock */
4380 ldr r3, =SPI_CGEN_BASE
4381 ldr r1, [r3, #28]
4382 orr r1, r1, #0x2000
4383 str r1, [r3, #28]
4384
4385 ldr r1, =0x2000c01
4386 str r1, [r0, #SP_CSR0]
4387 ldr r1, =0x2000201
4388 str r1, [r0, #SP_CSR1]
4389 str r1, [r0, #SP_CSR2]
4390 str r1, [r0, #SP_CSR3]
4391 ldr r1, [r0, #SP_SR]
4392 ldr r0, [r0, #SP_RDR]
4393 bx lr
4394 .endfunc
4395 .func NVRAM_Init, NVRAM_INIT
4396 NVRAM_INIT:
4397 ldr r1, =SP_BASE
4398 ldr r0, [r1, #SP_RDR]
4399 mov r0, #NVRAM_CMD_RDSR
4400 str r0, [r1, #SP_TDR]
4401 SP_loop1:
4402 ldr r0, [r1, #SP_SR]
4403 tst r0, #SP_TDRE
4404 beq SP_loop1
4405
4406 mov r0, #SPI_8CLOCKS
4407 str r0, [r1, #SP_TDR]
4408 SP_loop2:
4409 ldr r0, [r1, #SP_SR]
4410 tst r0, #SP_TDRE
4411 beq SP_loop2
4412
4413 ldr r0, [r1, #SP_RDR]
4414 SP_loop3:
4415 ldr r0, [r1, #SP_SR]
4416 tst r0, #SP_RDRF
4417 beq SP_loop3
4418
4419 ldr r0, [r1, #SP_RDR]
4420 and r0, r0, #255
4421 bx lr
4422 .endfunc
4423
4424 .func NVRAM_Xfer, NVRAM_XFER
4425 /* r0 = dest address */
4426 /* r1 = not used */
4427 /* r2 = src address within NVRAM */
4428 /* r3 = length */
4429 NVRAM_XFER:
4430 stmdb sp!, {r4, r5, lr}
4431 mov r5, r0 /* save r0 (dest address) */
4432 mov r4, r3 /* save r3 (length) */
4433 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4434 and r0, r0, #8
4435 add r0, r0, #NVRAM_CMD_READ
4436 ldr r1, =NVRAM_SCRATCH
4437 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4438 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4439 _local1:
4440 bl NVRAM_INIT
4441 tst r0, #NVRAM_SR_RDY
4442 bne _local1
4443 mov r0, #20
4444 bl DELAY9
4445 mov r2, r4 /* length */
4446 mov r1, r5 /* dest address */
4447 mov r0, #2 /* bytes to transfer in command */
4448 bl NVRAM_XFER2
4449 ldmia sp!, {r4, r5, lr}
4450 bx lr
4451 .endfunc
4452
4453 .func NVRAM_Xfer2, NVRAM_XFER2
4454 NVRAM_XFER2:
4455 stmdb sp!, {r4, r5, r6, lr}
4456 ldr r4, =SP_BASE
4457 mov r3, #0
4458 cmp r0, #0
4459 bls _local2
4460 ldr r5, =NVRAM_SCRATCH
4461 _local4:
4462 ldrb r6, [r5, r3]
4463 str r6, [r4, #SP_TDR]
4464 _local3:
4465 ldr r6, [r4, #SP_SR]
4466 tst r6, #SP_TDRE
4467 beq _local3
4468 add r3, r3, #1
4469 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4470 blo _local4
4471 _local2:
4472 mov r3, #SPI_8CLOCKS
4473 str r3, [r4, #SP_TDR]
4474 ldr r0, [r4, #SP_RDR]
4475 _local5:
4476 ldr r0, [r4, #SP_SR]
4477 tst r0, #SP_RDRF
4478 beq _local5
4479 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4480 mov r0, #0
4481 cmp r2, #0 /* r2 is # of bytes to copy in */
4482 bls _local6
4483 _local7:
4484 ldr r5, [r4, #SP_SR]
4485 tst r5, #SP_TDRE
4486 beq _local7
4487 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4488 _local8:
4489 ldr r5, [r4, #SP_SR]
4490 tst r5, #SP_RDRF
4491 beq _local8
4492 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4493 strb r5, [r1], #1 /* postindexed */
4494 add r0, r0, #1
4495 cmp r0, r2
4496 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4497 _local6:
4498 mov r0, #200
4499 bl DELAY9
4500 ldmia sp!, {r4, r5, r6, lr}
4501 bx lr
4502 #endif
kernel-based virtual machine