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[PATCH] Have ia64 use add_active_range() and free_area_init_nodes
[linux-2.6/kvm.git] / drivers / hwmon / w83627hf.c
blob30295028ea99238ea89e0d59b40fa580018c5cc6
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
32 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
33
34 For other winbond chips, and for i2c support in the above chips,
35 use w83781d.c.
36
37 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
38 supported yet.
39 */
40
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/i2c.h>
46 #include <linux/i2c-isa.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
51 #include <asm/io.h>
52 #include "lm75.h"
53
54 static u16 force_addr;
55 module_param(force_addr, ushort, 0);
56 MODULE_PARM_DESC(force_addr,
57 "Initialize the base address of the sensors");
58 static u8 force_i2c = 0x1f;
59 module_param(force_i2c, byte, 0);
60 MODULE_PARM_DESC(force_i2c,
61 "Initialize the i2c address of the sensors");
62
63 /* The actual ISA address is read from Super-I/O configuration space */
64 static unsigned short address;
65
66 /* Insmod parameters */
67 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
68
69 static int reset;
70 module_param(reset, bool, 0);
71 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
72
73 static int init = 1;
74 module_param(init, bool, 0);
75 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
76
77 /* modified from kernel/include/traps.c */
78 static int REG; /* The register to read/write */
79 #define DEV 0x07 /* Register: Logical device select */
80 static int VAL; /* The value to read/write */
81
82 /* logical device numbers for superio_select (below) */
83 #define W83627HF_LD_FDC 0x00
84 #define W83627HF_LD_PRT 0x01
85 #define W83627HF_LD_UART1 0x02
86 #define W83627HF_LD_UART2 0x03
87 #define W83627HF_LD_KBC 0x05
88 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
89 #define W83627HF_LD_GAME 0x07
90 #define W83627HF_LD_MIDI 0x07
91 #define W83627HF_LD_GPIO1 0x07
92 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
93 #define W83627HF_LD_GPIO2 0x08
94 #define W83627HF_LD_GPIO3 0x09
95 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
96 #define W83627HF_LD_ACPI 0x0a
97 #define W83627HF_LD_HWM 0x0b
98
99 #define DEVID 0x20 /* Register: Device ID */
100
101 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
102 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
103 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
104
105 #define W83687THF_VID_EN 0x29 /* w83687thf only */
106 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
107 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
108
109 static inline void
110 superio_outb(int reg, int val)
111 {
112 outb(reg, REG);
113 outb(val, VAL);
114 }
115
116 static inline int
117 superio_inb(int reg)
118 {
119 outb(reg, REG);
120 return inb(VAL);
121 }
122
123 static inline void
124 superio_select(int ld)
125 {
126 outb(DEV, REG);
127 outb(ld, VAL);
128 }
129
130 static inline void
131 superio_enter(void)
132 {
133 outb(0x87, REG);
134 outb(0x87, REG);
135 }
136
137 static inline void
138 superio_exit(void)
139 {
140 outb(0xAA, REG);
141 }
142
143 #define W627_DEVID 0x52
144 #define W627THF_DEVID 0x82
145 #define W697_DEVID 0x60
146 #define W637_DEVID 0x70
147 #define W687THF_DEVID 0x85
148 #define WINB_ACT_REG 0x30
149 #define WINB_BASE_REG 0x60
150 /* Constants specified below */
151
152 /* Alignment of the base address */
153 #define WINB_ALIGNMENT ~7
154
155 /* Offset & size of I/O region we are interested in */
156 #define WINB_REGION_OFFSET 5
157 #define WINB_REGION_SIZE 2
158
159 /* Where are the sensors address/data registers relative to the base address */
160 #define W83781D_ADDR_REG_OFFSET 5
161 #define W83781D_DATA_REG_OFFSET 6
162
163 /* The W83781D registers */
164 /* The W83782D registers for nr=7,8 are in bank 5 */
165 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
166 (0x554 + (((nr) - 7) * 2)))
167 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
168 (0x555 + (((nr) - 7) * 2)))
169 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
170 (0x550 + (nr) - 7))
171
172 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
173 #define W83781D_REG_FAN(nr) (0x27 + (nr))
174
175 #define W83781D_REG_TEMP2_CONFIG 0x152
176 #define W83781D_REG_TEMP3_CONFIG 0x252
177 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
178 ((nr == 2) ? (0x0150) : \
179 (0x27)))
180 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
181 ((nr == 2) ? (0x153) : \
182 (0x3A)))
183 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
184 ((nr == 2) ? (0x155) : \
185 (0x39)))
186
187 #define W83781D_REG_BANK 0x4E
188
189 #define W83781D_REG_CONFIG 0x40
190 #define W83781D_REG_ALARM1 0x459
191 #define W83781D_REG_ALARM2 0x45A
192 #define W83781D_REG_ALARM3 0x45B
193
194 #define W83781D_REG_BEEP_CONFIG 0x4D
195 #define W83781D_REG_BEEP_INTS1 0x56
196 #define W83781D_REG_BEEP_INTS2 0x57
197 #define W83781D_REG_BEEP_INTS3 0x453
198
199 #define W83781D_REG_VID_FANDIV 0x47
200
201 #define W83781D_REG_CHIPID 0x49
202 #define W83781D_REG_WCHIPID 0x58
203 #define W83781D_REG_CHIPMAN 0x4F
204 #define W83781D_REG_PIN 0x4B
205
206 #define W83781D_REG_VBAT 0x5D
207
208 #define W83627HF_REG_PWM1 0x5A
209 #define W83627HF_REG_PWM2 0x5B
210
211 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
212 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
213 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
214
215 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
216
217 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
218 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
219 W83627THF_REG_PWM3 };
220 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
221 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
222
223 #define W83781D_REG_I2C_ADDR 0x48
224 #define W83781D_REG_I2C_SUBADDR 0x4A
225
226 /* Sensor selection */
227 #define W83781D_REG_SCFG1 0x5D
228 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
229 #define W83781D_REG_SCFG2 0x59
230 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
231 #define W83781D_DEFAULT_BETA 3435
232
233 /* Conversions. Limit checking is only done on the TO_REG
234 variants. Note that you should be a bit careful with which arguments
235 these macros are called: arguments may be evaluated more than once.
236 Fixing this is just not worth it. */
237 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
238 #define IN_FROM_REG(val) ((val) * 16)
239
240 static inline u8 FAN_TO_REG(long rpm, int div)
241 {
242 if (rpm == 0)
243 return 255;
244 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
245 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
246 254);
247 }
248
249 #define TEMP_MIN (-128000)
250 #define TEMP_MAX ( 127000)
251
252 /* TEMP: 0.001C/bit (-128C to +127C)
253 REG: 1C/bit, two's complement */
254 static u8 TEMP_TO_REG(int temp)
255 {
256 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
257 ntemp += (ntemp<0 ? -500 : 500);
258 return (u8)(ntemp / 1000);
259 }
260
261 static int TEMP_FROM_REG(u8 reg)
262 {
263 return (s8)reg * 1000;
264 }
265
266 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
267
268 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
269
270 #define BEEP_MASK_FROM_REG(val) (val)
271 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
272 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
273 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
274
275 #define DIV_FROM_REG(val) (1 << (val))
276
277 static inline u8 DIV_TO_REG(long val)
278 {
279 int i;
280 val = SENSORS_LIMIT(val, 1, 128) >> 1;
281 for (i = 0; i < 7; i++) {
282 if (val == 0)
283 break;
284 val >>= 1;
285 }
286 return ((u8) i);
287 }
288
289 /* For each registered chip, we need to keep some data in memory. That
290 data is pointed to by w83627hf_list[NR]->data. The structure itself is
291 dynamically allocated, at the same time when a new client is allocated. */
292 struct w83627hf_data {
293 struct i2c_client client;
294 struct class_device *class_dev;
295 struct mutex lock;
296 enum chips type;
297
298 struct mutex update_lock;
299 char valid; /* !=0 if following fields are valid */
300 unsigned long last_updated; /* In jiffies */
301
302 struct i2c_client *lm75; /* for secondary I2C addresses */
303 /* pointer to array of 2 subclients */
304
305 u8 in[9]; /* Register value */
306 u8 in_max[9]; /* Register value */
307 u8 in_min[9]; /* Register value */
308 u8 fan[3]; /* Register value */
309 u8 fan_min[3]; /* Register value */
310 u8 temp;
311 u8 temp_max; /* Register value */
312 u8 temp_max_hyst; /* Register value */
313 u16 temp_add[2]; /* Register value */
314 u16 temp_max_add[2]; /* Register value */
315 u16 temp_max_hyst_add[2]; /* Register value */
316 u8 fan_div[3]; /* Register encoding, shifted right */
317 u8 vid; /* Register encoding, combined */
318 u32 alarms; /* Register encoding, combined */
319 u32 beep_mask; /* Register encoding, combined */
320 u8 beep_enable; /* Boolean */
321 u8 pwm[3]; /* Register value */
322 u16 sens[3]; /* 782D/783S only.
323 1 = pentium diode; 2 = 3904 diode;
324 3000-5000 = thermistor beta.
325 Default = 3435.
326 Other Betas unimplemented */
327 u8 vrm;
328 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
329 };
330
331
332 static int w83627hf_detect(struct i2c_adapter *adapter);
333 static int w83627hf_detach_client(struct i2c_client *client);
334
335 static int w83627hf_read_value(struct i2c_client *client, u16 reg);
336 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value);
337 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
338 static void w83627hf_init_client(struct i2c_client *client);
339
340 static struct i2c_driver w83627hf_driver = {
341 .driver = {
342 .owner = THIS_MODULE,
343 .name = "w83627hf",
344 },
345 .attach_adapter = w83627hf_detect,
346 .detach_client = w83627hf_detach_client,
347 };
348
349 /* following are the sysfs callback functions */
350 #define show_in_reg(reg) \
351 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
352 { \
353 struct w83627hf_data *data = w83627hf_update_device(dev); \
354 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
355 }
356 show_in_reg(in)
357 show_in_reg(in_min)
358 show_in_reg(in_max)
359
360 #define store_in_reg(REG, reg) \
361 static ssize_t \
362 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
363 { \
364 struct i2c_client *client = to_i2c_client(dev); \
365 struct w83627hf_data *data = i2c_get_clientdata(client); \
366 u32 val; \
367 \
368 val = simple_strtoul(buf, NULL, 10); \
369 \
370 mutex_lock(&data->update_lock); \
371 data->in_##reg[nr] = IN_TO_REG(val); \
372 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
373 data->in_##reg[nr]); \
374 \
375 mutex_unlock(&data->update_lock); \
376 return count; \
377 }
378 store_in_reg(MIN, min)
379 store_in_reg(MAX, max)
380
381 #define sysfs_in_offset(offset) \
382 static ssize_t \
383 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
384 { \
385 return show_in(dev, buf, offset); \
386 } \
387 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
388
389 #define sysfs_in_reg_offset(reg, offset) \
390 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
391 { \
392 return show_in_##reg (dev, buf, offset); \
393 } \
394 static ssize_t \
395 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
396 const char *buf, size_t count) \
397 { \
398 return store_in_##reg (dev, buf, count, offset); \
399 } \
400 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
401 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
402
403 #define sysfs_in_offsets(offset) \
404 sysfs_in_offset(offset) \
405 sysfs_in_reg_offset(min, offset) \
406 sysfs_in_reg_offset(max, offset)
407
408 sysfs_in_offsets(1);
409 sysfs_in_offsets(2);
410 sysfs_in_offsets(3);
411 sysfs_in_offsets(4);
412 sysfs_in_offsets(5);
413 sysfs_in_offsets(6);
414 sysfs_in_offsets(7);
415 sysfs_in_offsets(8);
416
417 /* use a different set of functions for in0 */
418 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
419 {
420 long in0;
421
422 if ((data->vrm_ovt & 0x01) &&
423 (w83627thf == data->type || w83637hf == data->type
424 || w83687thf == data->type))
425
426 /* use VRM9 calculation */
427 in0 = (long)((reg * 488 + 70000 + 50) / 100);
428 else
429 /* use VRM8 (standard) calculation */
430 in0 = (long)IN_FROM_REG(reg);
431
432 return sprintf(buf,"%ld\n", in0);
433 }
434
435 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
436 {
437 struct w83627hf_data *data = w83627hf_update_device(dev);
438 return show_in_0(data, buf, data->in[0]);
439 }
440
441 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
442 {
443 struct w83627hf_data *data = w83627hf_update_device(dev);
444 return show_in_0(data, buf, data->in_min[0]);
445 }
446
447 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
448 {
449 struct w83627hf_data *data = w83627hf_update_device(dev);
450 return show_in_0(data, buf, data->in_max[0]);
451 }
452
453 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
454 const char *buf, size_t count)
455 {
456 struct i2c_client *client = to_i2c_client(dev);
457 struct w83627hf_data *data = i2c_get_clientdata(client);
458 u32 val;
459
460 val = simple_strtoul(buf, NULL, 10);
461
462 mutex_lock(&data->update_lock);
463
464 if ((data->vrm_ovt & 0x01) &&
465 (w83627thf == data->type || w83637hf == data->type
466 || w83687thf == data->type))
467
468 /* use VRM9 calculation */
469 data->in_min[0] =
470 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
471 255);
472 else
473 /* use VRM8 (standard) calculation */
474 data->in_min[0] = IN_TO_REG(val);
475
476 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
477 mutex_unlock(&data->update_lock);
478 return count;
479 }
480
481 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
482 const char *buf, size_t count)
483 {
484 struct i2c_client *client = to_i2c_client(dev);
485 struct w83627hf_data *data = i2c_get_clientdata(client);
486 u32 val;
487
488 val = simple_strtoul(buf, NULL, 10);
489
490 mutex_lock(&data->update_lock);
491
492 if ((data->vrm_ovt & 0x01) &&
493 (w83627thf == data->type || w83637hf == data->type
494 || w83687thf == data->type))
495
496 /* use VRM9 calculation */
497 data->in_max[0] =
498 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
499 255);
500 else
501 /* use VRM8 (standard) calculation */
502 data->in_max[0] = IN_TO_REG(val);
503
504 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
505 mutex_unlock(&data->update_lock);
506 return count;
507 }
508
509 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
510 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
511 show_regs_in_min0, store_regs_in_min0);
512 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
513 show_regs_in_max0, store_regs_in_max0);
514
515 #define device_create_file_in(client, offset) \
516 do { \
517 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
518 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
519 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
520 } while (0)
521
522 #define show_fan_reg(reg) \
523 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
524 { \
525 struct w83627hf_data *data = w83627hf_update_device(dev); \
526 return sprintf(buf,"%ld\n", \
527 FAN_FROM_REG(data->reg[nr-1], \
528 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
529 }
530 show_fan_reg(fan);
531 show_fan_reg(fan_min);
532
533 static ssize_t
534 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
535 {
536 struct i2c_client *client = to_i2c_client(dev);
537 struct w83627hf_data *data = i2c_get_clientdata(client);
538 u32 val;
539
540 val = simple_strtoul(buf, NULL, 10);
541
542 mutex_lock(&data->update_lock);
543 data->fan_min[nr - 1] =
544 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
545 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
546 data->fan_min[nr - 1]);
547
548 mutex_unlock(&data->update_lock);
549 return count;
550 }
551
552 #define sysfs_fan_offset(offset) \
553 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
554 { \
555 return show_fan(dev, buf, offset); \
556 } \
557 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
558
559 #define sysfs_fan_min_offset(offset) \
560 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
561 { \
562 return show_fan_min(dev, buf, offset); \
563 } \
564 static ssize_t \
565 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
566 { \
567 return store_fan_min(dev, buf, count, offset); \
568 } \
569 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
570 show_regs_fan_min##offset, store_regs_fan_min##offset);
571
572 sysfs_fan_offset(1);
573 sysfs_fan_min_offset(1);
574 sysfs_fan_offset(2);
575 sysfs_fan_min_offset(2);
576 sysfs_fan_offset(3);
577 sysfs_fan_min_offset(3);
578
579 #define device_create_file_fan(client, offset) \
580 do { \
581 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
582 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
583 } while (0)
584
585 #define show_temp_reg(reg) \
586 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
587 { \
588 struct w83627hf_data *data = w83627hf_update_device(dev); \
589 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
590 return sprintf(buf,"%ld\n", \
591 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
592 } else { /* TEMP1 */ \
593 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
594 } \
595 }
596 show_temp_reg(temp);
597 show_temp_reg(temp_max);
598 show_temp_reg(temp_max_hyst);
599
600 #define store_temp_reg(REG, reg) \
601 static ssize_t \
602 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
603 { \
604 struct i2c_client *client = to_i2c_client(dev); \
605 struct w83627hf_data *data = i2c_get_clientdata(client); \
606 u32 val; \
607 \
608 val = simple_strtoul(buf, NULL, 10); \
609 \
610 mutex_lock(&data->update_lock); \
611 \
612 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
613 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
614 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
615 data->temp_##reg##_add[nr-2]); \
616 } else { /* TEMP1 */ \
617 data->temp_##reg = TEMP_TO_REG(val); \
618 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
619 data->temp_##reg); \
620 } \
621 \
622 mutex_unlock(&data->update_lock); \
623 return count; \
624 }
625 store_temp_reg(OVER, max);
626 store_temp_reg(HYST, max_hyst);
627
628 #define sysfs_temp_offset(offset) \
629 static ssize_t \
630 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
631 { \
632 return show_temp(dev, buf, offset); \
633 } \
634 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
635
636 #define sysfs_temp_reg_offset(reg, offset) \
637 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
638 { \
639 return show_temp_##reg (dev, buf, offset); \
640 } \
641 static ssize_t \
642 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
643 const char *buf, size_t count) \
644 { \
645 return store_temp_##reg (dev, buf, count, offset); \
646 } \
647 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
648 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
649
650 #define sysfs_temp_offsets(offset) \
651 sysfs_temp_offset(offset) \
652 sysfs_temp_reg_offset(max, offset) \
653 sysfs_temp_reg_offset(max_hyst, offset)
654
655 sysfs_temp_offsets(1);
656 sysfs_temp_offsets(2);
657 sysfs_temp_offsets(3);
658
659 #define device_create_file_temp(client, offset) \
660 do { \
661 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
662 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
663 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
664 } while (0)
665
666 static ssize_t
667 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
668 {
669 struct w83627hf_data *data = w83627hf_update_device(dev);
670 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
671 }
672 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
673 #define device_create_file_vid(client) \
674 device_create_file(&client->dev, &dev_attr_cpu0_vid)
675
676 static ssize_t
677 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
678 {
679 struct w83627hf_data *data = w83627hf_update_device(dev);
680 return sprintf(buf, "%ld\n", (long) data->vrm);
681 }
682 static ssize_t
683 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
684 {
685 struct i2c_client *client = to_i2c_client(dev);
686 struct w83627hf_data *data = i2c_get_clientdata(client);
687 u32 val;
688
689 val = simple_strtoul(buf, NULL, 10);
690 data->vrm = val;
691
692 return count;
693 }
694 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
695 #define device_create_file_vrm(client) \
696 device_create_file(&client->dev, &dev_attr_vrm)
697
698 static ssize_t
699 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
700 {
701 struct w83627hf_data *data = w83627hf_update_device(dev);
702 return sprintf(buf, "%ld\n", (long) data->alarms);
703 }
704 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
705 #define device_create_file_alarms(client) \
706 device_create_file(&client->dev, &dev_attr_alarms)
707
708 #define show_beep_reg(REG, reg) \
709 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
710 { \
711 struct w83627hf_data *data = w83627hf_update_device(dev); \
712 return sprintf(buf,"%ld\n", \
713 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
714 }
715 show_beep_reg(ENABLE, enable)
716 show_beep_reg(MASK, mask)
717
718 #define BEEP_ENABLE 0 /* Store beep_enable */
719 #define BEEP_MASK 1 /* Store beep_mask */
720
721 static ssize_t
722 store_beep_reg(struct device *dev, const char *buf, size_t count,
723 int update_mask)
724 {
725 struct i2c_client *client = to_i2c_client(dev);
726 struct w83627hf_data *data = i2c_get_clientdata(client);
727 u32 val, val2;
728
729 val = simple_strtoul(buf, NULL, 10);
730
731 mutex_lock(&data->update_lock);
732
733 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
734 data->beep_mask = BEEP_MASK_TO_REG(val);
735 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
736 data->beep_mask & 0xff);
737 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
738 ((data->beep_mask) >> 16) & 0xff);
739 val2 = (data->beep_mask >> 8) & 0x7f;
740 } else { /* We are storing beep_enable */
741 val2 =
742 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
743 data->beep_enable = BEEP_ENABLE_TO_REG(val);
744 }
745
746 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
747 val2 | data->beep_enable << 7);
748
749 mutex_unlock(&data->update_lock);
750 return count;
751 }
752
753 #define sysfs_beep(REG, reg) \
754 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
755 { \
756 return show_beep_##reg(dev, attr, buf); \
757 } \
758 static ssize_t \
759 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
760 { \
761 return store_beep_reg(dev, buf, count, BEEP_##REG); \
762 } \
763 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
764 show_regs_beep_##reg, store_regs_beep_##reg);
765
766 sysfs_beep(ENABLE, enable);
767 sysfs_beep(MASK, mask);
768
769 #define device_create_file_beep(client) \
770 do { \
771 device_create_file(&client->dev, &dev_attr_beep_enable); \
772 device_create_file(&client->dev, &dev_attr_beep_mask); \
773 } while (0)
774
775 static ssize_t
776 show_fan_div_reg(struct device *dev, char *buf, int nr)
777 {
778 struct w83627hf_data *data = w83627hf_update_device(dev);
779 return sprintf(buf, "%ld\n",
780 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
781 }
782
783 /* Note: we save and restore the fan minimum here, because its value is
784 determined in part by the fan divisor. This follows the principle of
785 least surprise; the user doesn't expect the fan minimum to change just
786 because the divisor changed. */
787 static ssize_t
788 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
789 {
790 struct i2c_client *client = to_i2c_client(dev);
791 struct w83627hf_data *data = i2c_get_clientdata(client);
792 unsigned long min;
793 u8 reg;
794 unsigned long val = simple_strtoul(buf, NULL, 10);
795
796 mutex_lock(&data->update_lock);
797
798 /* Save fan_min */
799 min = FAN_FROM_REG(data->fan_min[nr],
800 DIV_FROM_REG(data->fan_div[nr]));
801
802 data->fan_div[nr] = DIV_TO_REG(val);
803
804 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
805 & (nr==0 ? 0xcf : 0x3f))
806 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
807 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
808
809 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
810 & ~(1 << (5 + nr)))
811 | ((data->fan_div[nr] & 0x04) << (3 + nr));
812 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
813
814 /* Restore fan_min */
815 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
816 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
817
818 mutex_unlock(&data->update_lock);
819 return count;
820 }
821
822 #define sysfs_fan_div(offset) \
823 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
824 { \
825 return show_fan_div_reg(dev, buf, offset); \
826 } \
827 static ssize_t \
828 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
829 const char *buf, size_t count) \
830 { \
831 return store_fan_div_reg(dev, buf, count, offset - 1); \
832 } \
833 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
834 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
835
836 sysfs_fan_div(1);
837 sysfs_fan_div(2);
838 sysfs_fan_div(3);
839
840 #define device_create_file_fan_div(client, offset) \
841 do { \
842 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
843 } while (0)
844
845 static ssize_t
846 show_pwm_reg(struct device *dev, char *buf, int nr)
847 {
848 struct w83627hf_data *data = w83627hf_update_device(dev);
849 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
850 }
851
852 static ssize_t
853 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
854 {
855 struct i2c_client *client = to_i2c_client(dev);
856 struct w83627hf_data *data = i2c_get_clientdata(client);
857 u32 val;
858
859 val = simple_strtoul(buf, NULL, 10);
860
861 mutex_lock(&data->update_lock);
862
863 if (data->type == w83627thf) {
864 /* bits 0-3 are reserved in 627THF */
865 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
866 w83627hf_write_value(client,
867 W836X7HF_REG_PWM(data->type, nr),
868 data->pwm[nr - 1] |
869 (w83627hf_read_value(client,
870 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
871 } else {
872 data->pwm[nr - 1] = PWM_TO_REG(val);
873 w83627hf_write_value(client,
874 W836X7HF_REG_PWM(data->type, nr),
875 data->pwm[nr - 1]);
876 }
877
878 mutex_unlock(&data->update_lock);
879 return count;
880 }
881
882 #define sysfs_pwm(offset) \
883 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
884 { \
885 return show_pwm_reg(dev, buf, offset); \
886 } \
887 static ssize_t \
888 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
889 { \
890 return store_pwm_reg(dev, buf, count, offset); \
891 } \
892 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
893 show_regs_pwm_##offset, store_regs_pwm_##offset);
894
895 sysfs_pwm(1);
896 sysfs_pwm(2);
897 sysfs_pwm(3);
898
899 #define device_create_file_pwm(client, offset) \
900 do { \
901 device_create_file(&client->dev, &dev_attr_pwm##offset); \
902 } while (0)
903
904 static ssize_t
905 show_sensor_reg(struct device *dev, char *buf, int nr)
906 {
907 struct w83627hf_data *data = w83627hf_update_device(dev);
908 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
909 }
910
911 static ssize_t
912 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
913 {
914 struct i2c_client *client = to_i2c_client(dev);
915 struct w83627hf_data *data = i2c_get_clientdata(client);
916 u32 val, tmp;
917
918 val = simple_strtoul(buf, NULL, 10);
919
920 mutex_lock(&data->update_lock);
921
922 switch (val) {
923 case 1: /* PII/Celeron diode */
924 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
925 w83627hf_write_value(client, W83781D_REG_SCFG1,
926 tmp | BIT_SCFG1[nr - 1]);
927 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
928 w83627hf_write_value(client, W83781D_REG_SCFG2,
929 tmp | BIT_SCFG2[nr - 1]);
930 data->sens[nr - 1] = val;
931 break;
932 case 2: /* 3904 */
933 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
934 w83627hf_write_value(client, W83781D_REG_SCFG1,
935 tmp | BIT_SCFG1[nr - 1]);
936 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
937 w83627hf_write_value(client, W83781D_REG_SCFG2,
938 tmp & ~BIT_SCFG2[nr - 1]);
939 data->sens[nr - 1] = val;
940 break;
941 case W83781D_DEFAULT_BETA: /* thermistor */
942 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
943 w83627hf_write_value(client, W83781D_REG_SCFG1,
944 tmp & ~BIT_SCFG1[nr - 1]);
945 data->sens[nr - 1] = val;
946 break;
947 default:
948 dev_err(&client->dev,
949 "Invalid sensor type %ld; must be 1, 2, or %d\n",
950 (long) val, W83781D_DEFAULT_BETA);
951 break;
952 }
953
954 mutex_unlock(&data->update_lock);
955 return count;
956 }
957
958 #define sysfs_sensor(offset) \
959 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
960 { \
961 return show_sensor_reg(dev, buf, offset); \
962 } \
963 static ssize_t \
964 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
965 { \
966 return store_sensor_reg(dev, buf, count, offset); \
967 } \
968 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
969 show_regs_sensor_##offset, store_regs_sensor_##offset);
970
971 sysfs_sensor(1);
972 sysfs_sensor(2);
973 sysfs_sensor(3);
974
975 #define device_create_file_sensor(client, offset) \
976 do { \
977 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
978 } while (0)
979
980
981 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
982 {
983 u16 val;
984
985 REG = sioaddr;
986 VAL = sioaddr + 1;
987
988 superio_enter();
989 val= superio_inb(DEVID);
990 if(val != W627_DEVID &&
991 val != W627THF_DEVID &&
992 val != W697_DEVID &&
993 val != W637_DEVID &&
994 val != W687THF_DEVID) {
995 superio_exit();
996 return -ENODEV;
997 }
998
999 superio_select(W83627HF_LD_HWM);
1000 val = (superio_inb(WINB_BASE_REG) << 8) |
1001 superio_inb(WINB_BASE_REG + 1);
1002 *addr = val & WINB_ALIGNMENT;
1003 if (*addr == 0 && force_addr == 0) {
1004 superio_exit();
1005 return -ENODEV;
1006 }
1007
1008 superio_exit();
1009 return 0;
1010 }
1011
1012 static int w83627hf_detect(struct i2c_adapter *adapter)
1013 {
1014 int val, kind;
1015 struct i2c_client *new_client;
1016 struct w83627hf_data *data;
1017 int err = 0;
1018 const char *client_name = "";
1019
1020 if(force_addr)
1021 address = force_addr & WINB_ALIGNMENT;
1022
1023 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1024 w83627hf_driver.driver.name)) {
1025 err = -EBUSY;
1026 goto ERROR0;
1027 }
1028
1029 if(force_addr) {
1030 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1031 superio_enter();
1032 superio_select(W83627HF_LD_HWM);
1033 superio_outb(WINB_BASE_REG, address >> 8);
1034 superio_outb(WINB_BASE_REG+1, address & 0xff);
1035 superio_exit();
1036 }
1037
1038 superio_enter();
1039 val= superio_inb(DEVID);
1040 if(val == W627_DEVID)
1041 kind = w83627hf;
1042 else if(val == W697_DEVID)
1043 kind = w83697hf;
1044 else if(val == W627THF_DEVID)
1045 kind = w83627thf;
1046 else if(val == W637_DEVID)
1047 kind = w83637hf;
1048 else if (val == W687THF_DEVID)
1049 kind = w83687thf;
1050 else {
1051 dev_info(&adapter->dev,
1052 "Unsupported chip (dev_id=0x%02X).\n", val);
1053 goto ERROR1;
1054 }
1055
1056 superio_select(W83627HF_LD_HWM);
1057 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1058 superio_outb(WINB_ACT_REG, 1);
1059 superio_exit();
1060
1061 /* OK. For now, we presume we have a valid client. We now create the
1062 client structure, even though we cannot fill it completely yet.
1063 But it allows us to access w83627hf_{read,write}_value. */
1064
1065 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1066 err = -ENOMEM;
1067 goto ERROR1;
1068 }
1069
1070 new_client = &data->client;
1071 i2c_set_clientdata(new_client, data);
1072 new_client->addr = address;
1073 mutex_init(&data->lock);
1074 new_client->adapter = adapter;
1075 new_client->driver = &w83627hf_driver;
1076 new_client->flags = 0;
1077
1078
1079 if (kind == w83627hf) {
1080 client_name = "w83627hf";
1081 } else if (kind == w83627thf) {
1082 client_name = "w83627thf";
1083 } else if (kind == w83697hf) {
1084 client_name = "w83697hf";
1085 } else if (kind == w83637hf) {
1086 client_name = "w83637hf";
1087 } else if (kind == w83687thf) {
1088 client_name = "w83687thf";
1089 }
1090
1091 /* Fill in the remaining client fields and put into the global list */
1092 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1093 data->type = kind;
1094 data->valid = 0;
1095 mutex_init(&data->update_lock);
1096
1097 /* Tell the I2C layer a new client has arrived */
1098 if ((err = i2c_attach_client(new_client)))
1099 goto ERROR2;
1100
1101 data->lm75 = NULL;
1102
1103 /* Initialize the chip */
1104 w83627hf_init_client(new_client);
1105
1106 /* A few vars need to be filled upon startup */
1107 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1108 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1109 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1110
1111 /* Register sysfs hooks */
1112 data->class_dev = hwmon_device_register(&new_client->dev);
1113 if (IS_ERR(data->class_dev)) {
1114 err = PTR_ERR(data->class_dev);
1115 goto ERROR3;
1116 }
1117
1118 device_create_file_in(new_client, 0);
1119 if (kind != w83697hf)
1120 device_create_file_in(new_client, 1);
1121 device_create_file_in(new_client, 2);
1122 device_create_file_in(new_client, 3);
1123 device_create_file_in(new_client, 4);
1124 if (kind == w83627hf || kind == w83697hf) {
1125 device_create_file_in(new_client, 5);
1126 device_create_file_in(new_client, 6);
1127 }
1128 device_create_file_in(new_client, 7);
1129 device_create_file_in(new_client, 8);
1130
1131 device_create_file_fan(new_client, 1);
1132 device_create_file_fan(new_client, 2);
1133 if (kind != w83697hf)
1134 device_create_file_fan(new_client, 3);
1135
1136 device_create_file_temp(new_client, 1);
1137 device_create_file_temp(new_client, 2);
1138 if (kind != w83697hf)
1139 device_create_file_temp(new_client, 3);
1140
1141 if (kind != w83697hf && data->vid != 0xff) {
1142 device_create_file_vid(new_client);
1143 device_create_file_vrm(new_client);
1144 }
1145
1146 device_create_file_fan_div(new_client, 1);
1147 device_create_file_fan_div(new_client, 2);
1148 if (kind != w83697hf)
1149 device_create_file_fan_div(new_client, 3);
1150
1151 device_create_file_alarms(new_client);
1152
1153 device_create_file_beep(new_client);
1154
1155 device_create_file_pwm(new_client, 1);
1156 device_create_file_pwm(new_client, 2);
1157 if (kind == w83627thf || kind == w83637hf || kind == w83687thf)
1158 device_create_file_pwm(new_client, 3);
1159
1160 device_create_file_sensor(new_client, 1);
1161 device_create_file_sensor(new_client, 2);
1162 if (kind != w83697hf)
1163 device_create_file_sensor(new_client, 3);
1164
1165 return 0;
1166
1167 ERROR3:
1168 i2c_detach_client(new_client);
1169 ERROR2:
1170 kfree(data);
1171 ERROR1:
1172 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1173 ERROR0:
1174 return err;
1175 }
1176
1177 static int w83627hf_detach_client(struct i2c_client *client)
1178 {
1179 struct w83627hf_data *data = i2c_get_clientdata(client);
1180 int err;
1181
1182 hwmon_device_unregister(data->class_dev);
1183
1184 if ((err = i2c_detach_client(client)))
1185 return err;
1186
1187 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1188 kfree(data);
1189
1190 return 0;
1191 }
1192
1193
1194 /*
1195 ISA access must always be locked explicitly!
1196 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1197 would slow down the W83781D access and should not be necessary.
1198 There are some ugly typecasts here, but the good news is - they should
1199 nowhere else be necessary! */
1200 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1201 {
1202 struct w83627hf_data *data = i2c_get_clientdata(client);
1203 int res, word_sized;
1204
1205 mutex_lock(&data->lock);
1206 word_sized = (((reg & 0xff00) == 0x100)
1207 || ((reg & 0xff00) == 0x200))
1208 && (((reg & 0x00ff) == 0x50)
1209 || ((reg & 0x00ff) == 0x53)
1210 || ((reg & 0x00ff) == 0x55));
1211 if (reg & 0xff00) {
1212 outb_p(W83781D_REG_BANK,
1213 client->addr + W83781D_ADDR_REG_OFFSET);
1214 outb_p(reg >> 8,
1215 client->addr + W83781D_DATA_REG_OFFSET);
1216 }
1217 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1218 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1219 if (word_sized) {
1220 outb_p((reg & 0xff) + 1,
1221 client->addr + W83781D_ADDR_REG_OFFSET);
1222 res =
1223 (res << 8) + inb_p(client->addr +
1224 W83781D_DATA_REG_OFFSET);
1225 }
1226 if (reg & 0xff00) {
1227 outb_p(W83781D_REG_BANK,
1228 client->addr + W83781D_ADDR_REG_OFFSET);
1229 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1230 }
1231 mutex_unlock(&data->lock);
1232 return res;
1233 }
1234
1235 static int w83627thf_read_gpio5(struct i2c_client *client)
1236 {
1237 int res = 0xff, sel;
1238
1239 superio_enter();
1240 superio_select(W83627HF_LD_GPIO5);
1241
1242 /* Make sure these GPIO pins are enabled */
1243 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1244 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1245 goto exit;
1246 }
1247
1248 /* Make sure the pins are configured for input
1249 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1250 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1251 if ((sel & 0x1f) != 0x1f) {
1252 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1253 "function\n");
1254 goto exit;
1255 }
1256
1257 dev_info(&client->dev, "Reading VID from GPIO5\n");
1258 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1259
1260 exit:
1261 superio_exit();
1262 return res;
1263 }
1264
1265 static int w83687thf_read_vid(struct i2c_client *client)
1266 {
1267 int res = 0xff;
1268
1269 superio_enter();
1270 superio_select(W83627HF_LD_HWM);
1271
1272 /* Make sure these GPIO pins are enabled */
1273 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1274 dev_dbg(&client->dev, "VID disabled, no VID function\n");
1275 goto exit;
1276 }
1277
1278 /* Make sure the pins are configured for input */
1279 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1280 dev_dbg(&client->dev, "VID configured as output, "
1281 "no VID function\n");
1282 goto exit;
1283 }
1284
1285 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1286
1287 exit:
1288 superio_exit();
1289 return res;
1290 }
1291
1292 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1293 {
1294 struct w83627hf_data *data = i2c_get_clientdata(client);
1295 int word_sized;
1296
1297 mutex_lock(&data->lock);
1298 word_sized = (((reg & 0xff00) == 0x100)
1299 || ((reg & 0xff00) == 0x200))
1300 && (((reg & 0x00ff) == 0x53)
1301 || ((reg & 0x00ff) == 0x55));
1302 if (reg & 0xff00) {
1303 outb_p(W83781D_REG_BANK,
1304 client->addr + W83781D_ADDR_REG_OFFSET);
1305 outb_p(reg >> 8,
1306 client->addr + W83781D_DATA_REG_OFFSET);
1307 }
1308 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1309 if (word_sized) {
1310 outb_p(value >> 8,
1311 client->addr + W83781D_DATA_REG_OFFSET);
1312 outb_p((reg & 0xff) + 1,
1313 client->addr + W83781D_ADDR_REG_OFFSET);
1314 }
1315 outb_p(value & 0xff,
1316 client->addr + W83781D_DATA_REG_OFFSET);
1317 if (reg & 0xff00) {
1318 outb_p(W83781D_REG_BANK,
1319 client->addr + W83781D_ADDR_REG_OFFSET);
1320 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1321 }
1322 mutex_unlock(&data->lock);
1323 return 0;
1324 }
1325
1326 static void w83627hf_init_client(struct i2c_client *client)
1327 {
1328 struct w83627hf_data *data = i2c_get_clientdata(client);
1329 int i;
1330 int type = data->type;
1331 u8 tmp;
1332
1333 if (reset) {
1334 /* Resetting the chip has been the default for a long time,
1335 but repeatedly caused problems (fans going to full
1336 speed...) so it is now optional. It might even go away if
1337 nobody reports it as being useful, as I see very little
1338 reason why this would be needed at all. */
1339 dev_info(&client->dev, "If reset=1 solved a problem you were "
1340 "having, please report!\n");
1341
1342 /* save this register */
1343 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1344 /* Reset all except Watchdog values and last conversion values
1345 This sets fan-divs to 2, among others */
1346 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1347 /* Restore the register and disable power-on abnormal beep.
1348 This saves FAN 1/2/3 input/output values set by BIOS. */
1349 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1350 /* Disable master beep-enable (reset turns it on).
1351 Individual beeps should be reset to off but for some reason
1352 disabling this bit helps some people not get beeped */
1353 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1354 }
1355
1356 /* Minimize conflicts with other winbond i2c-only clients... */
1357 /* disable i2c subclients... how to disable main i2c client?? */
1358 /* force i2c address to relatively uncommon address */
1359 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1360 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1361
1362 /* Read VID only once */
1363 if (w83627hf == data->type || w83637hf == data->type) {
1364 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1365 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1366 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1367 } else if (w83627thf == data->type) {
1368 data->vid = w83627thf_read_gpio5(client);
1369 } else if (w83687thf == data->type) {
1370 data->vid = w83687thf_read_vid(client);
1371 }
1372
1373 /* Read VRM & OVT Config only once */
1374 if (w83627thf == data->type || w83637hf == data->type
1375 || w83687thf == data->type) {
1376 data->vrm_ovt =
1377 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1378 }
1379
1380 /* Convert VID to voltage based on VRM */
1381 data->vrm = vid_which_vrm();
1382
1383 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1384 for (i = 1; i <= 3; i++) {
1385 if (!(tmp & BIT_SCFG1[i - 1])) {
1386 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1387 } else {
1388 if (w83627hf_read_value
1389 (client,
1390 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1391 data->sens[i - 1] = 1;
1392 else
1393 data->sens[i - 1] = 2;
1394 }
1395 if ((type == w83697hf) && (i == 2))
1396 break;
1397 }
1398
1399 if(init) {
1400 /* Enable temp2 */
1401 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1402 if (tmp & 0x01) {
1403 dev_warn(&client->dev, "Enabling temp2, readings "
1404 "might not make sense\n");
1405 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1406 tmp & 0xfe);
1407 }
1408
1409 /* Enable temp3 */
1410 if (type != w83697hf) {
1411 tmp = w83627hf_read_value(client,
1412 W83781D_REG_TEMP3_CONFIG);
1413 if (tmp & 0x01) {
1414 dev_warn(&client->dev, "Enabling temp3, "
1415 "readings might not make sense\n");
1416 w83627hf_write_value(client,
1417 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1418 }
1419 }
1420 }
1421
1422 /* Start monitoring */
1423 w83627hf_write_value(client, W83781D_REG_CONFIG,
1424 (w83627hf_read_value(client,
1425 W83781D_REG_CONFIG) & 0xf7)
1426 | 0x01);
1427 }
1428
1429 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1430 {
1431 struct i2c_client *client = to_i2c_client(dev);
1432 struct w83627hf_data *data = i2c_get_clientdata(client);
1433 int i;
1434
1435 mutex_lock(&data->update_lock);
1436
1437 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1438 || !data->valid) {
1439 for (i = 0; i <= 8; i++) {
1440 /* skip missing sensors */
1441 if (((data->type == w83697hf) && (i == 1)) ||
1442 ((data->type != w83627hf && data->type != w83697hf)
1443 && (i == 5 || i == 6)))
1444 continue;
1445 data->in[i] =
1446 w83627hf_read_value(client, W83781D_REG_IN(i));
1447 data->in_min[i] =
1448 w83627hf_read_value(client,
1449 W83781D_REG_IN_MIN(i));
1450 data->in_max[i] =
1451 w83627hf_read_value(client,
1452 W83781D_REG_IN_MAX(i));
1453 }
1454 for (i = 1; i <= 3; i++) {
1455 data->fan[i - 1] =
1456 w83627hf_read_value(client, W83781D_REG_FAN(i));
1457 data->fan_min[i - 1] =
1458 w83627hf_read_value(client,
1459 W83781D_REG_FAN_MIN(i));
1460 }
1461 for (i = 1; i <= 3; i++) {
1462 u8 tmp = w83627hf_read_value(client,
1463 W836X7HF_REG_PWM(data->type, i));
1464 /* bits 0-3 are reserved in 627THF */
1465 if (data->type == w83627thf)
1466 tmp &= 0xf0;
1467 data->pwm[i - 1] = tmp;
1468 if(i == 2 &&
1469 (data->type == w83627hf || data->type == w83697hf))
1470 break;
1471 }
1472
1473 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1474 data->temp_max =
1475 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1476 data->temp_max_hyst =
1477 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1478 data->temp_add[0] =
1479 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1480 data->temp_max_add[0] =
1481 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1482 data->temp_max_hyst_add[0] =
1483 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1484 if (data->type != w83697hf) {
1485 data->temp_add[1] =
1486 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1487 data->temp_max_add[1] =
1488 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1489 data->temp_max_hyst_add[1] =
1490 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1491 }
1492
1493 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1494 data->fan_div[0] = (i >> 4) & 0x03;
1495 data->fan_div[1] = (i >> 6) & 0x03;
1496 if (data->type != w83697hf) {
1497 data->fan_div[2] = (w83627hf_read_value(client,
1498 W83781D_REG_PIN) >> 6) & 0x03;
1499 }
1500 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1501 data->fan_div[0] |= (i >> 3) & 0x04;
1502 data->fan_div[1] |= (i >> 4) & 0x04;
1503 if (data->type != w83697hf)
1504 data->fan_div[2] |= (i >> 5) & 0x04;
1505 data->alarms =
1506 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1507 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1508 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1509 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1510 data->beep_enable = i >> 7;
1511 data->beep_mask = ((i & 0x7f) << 8) |
1512 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1513 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1514 data->last_updated = jiffies;
1515 data->valid = 1;
1516 }
1517
1518 mutex_unlock(&data->update_lock);
1519
1520 return data;
1521 }
1522
1523 static int __init sensors_w83627hf_init(void)
1524 {
1525 if (w83627hf_find(0x2e, &address)
1526 && w83627hf_find(0x4e, &address)) {
1527 return -ENODEV;
1528 }
1529
1530 return i2c_isa_add_driver(&w83627hf_driver);
1531 }
1532
1533 static void __exit sensors_w83627hf_exit(void)
1534 {
1535 i2c_isa_del_driver(&w83627hf_driver);
1536 }
1537
1538 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1539 "Philip Edelbrock <phil@netroedge.com>, "
1540 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1541 MODULE_DESCRIPTION("W83627HF driver");
1542 MODULE_LICENSE("GPL");
1543
1544 module_init(sensors_w83627hf_init);
1545 module_exit(sensors_w83627hf_exit);
kernel-based virtual machine