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Don't claim to do IPv6 checksum offload
[linux-2.6/kvm.git] / drivers / net / pasemi_mac.c
bloba8db5d7105fb9a9c23fe213694d3b5ab9a7ceb75
1 /*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
29 #include <linux/in.h>
30 #include <linux/skbuff.h>
31
32 #include <linux/ip.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
35
36 #include <asm/irq.h>
37 #include <asm/firmware.h>
38
39 #include "pasemi_mac.h"
40
41 /* We have our own align, since ppc64 in general has it at 0 because
42 * of design flaws in some of the server bridge chips. However, for
43 * PWRficient doing the unaligned copies is more expensive than doing
44 * unaligned DMA, so make sure the data is aligned instead.
45 */
46 #define LOCAL_SKB_ALIGN 2
47
48 /* TODO list
49 *
50 * - Multicast support
51 * - Large MTU support
52 * - SW LRO
53 * - Multiqueue RX/TX
54 */
55
56
57 /* Must be a power of two */
58 #define RX_RING_SIZE 4096
59 #define TX_RING_SIZE 4096
60
61 #define DEFAULT_MSG_ENABLE \
62 (NETIF_MSG_DRV | \
63 NETIF_MSG_PROBE | \
64 NETIF_MSG_LINK | \
65 NETIF_MSG_TIMER | \
66 NETIF_MSG_IFDOWN | \
67 NETIF_MSG_IFUP | \
68 NETIF_MSG_RX_ERR | \
69 NETIF_MSG_TX_ERR)
70
71 #define TX_RING(mac, num) ((mac)->tx->ring[(num) & (TX_RING_SIZE-1)])
72 #define TX_RING_INFO(mac, num) ((mac)->tx->ring_info[(num) & (TX_RING_SIZE-1)])
73 #define RX_RING(mac, num) ((mac)->rx->ring[(num) & (RX_RING_SIZE-1)])
74 #define RX_RING_INFO(mac, num) ((mac)->rx->ring_info[(num) & (RX_RING_SIZE-1)])
75 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
76
77 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
78 & ((ring)->size - 1))
79 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
80
81 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
82
83 MODULE_LICENSE("GPL");
84 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
85 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
86
87 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
88 module_param(debug, int, 0);
89 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
90
91 static struct pasdma_status *dma_status;
92
93 static int translation_enabled(void)
94 {
95 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
96 return 1;
97 #else
98 return firmware_has_feature(FW_FEATURE_LPAR);
99 #endif
100 }
101
102 static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
103 unsigned int val)
104 {
105 out_le32(mac->iob_regs+reg, val);
106 }
107
108 static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
109 {
110 return in_le32(mac->regs+reg);
111 }
112
113 static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
114 unsigned int val)
115 {
116 out_le32(mac->regs+reg, val);
117 }
118
119 static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
120 {
121 return in_le32(mac->dma_regs+reg);
122 }
123
124 static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
125 unsigned int val)
126 {
127 out_le32(mac->dma_regs+reg, val);
128 }
129
130 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
131 {
132 struct pci_dev *pdev = mac->pdev;
133 struct device_node *dn = pci_device_to_OF_node(pdev);
134 int len;
135 const u8 *maddr;
136 u8 addr[6];
137
138 if (!dn) {
139 dev_dbg(&pdev->dev,
140 "No device node for mac, not configuring\n");
141 return -ENOENT;
142 }
143
144 maddr = of_get_property(dn, "local-mac-address", &len);
145
146 if (maddr && len == 6) {
147 memcpy(mac->mac_addr, maddr, 6);
148 return 0;
149 }
150
151 /* Some old versions of firmware mistakenly uses mac-address
152 * (and as a string) instead of a byte array in local-mac-address.
153 */
154
155 if (maddr == NULL)
156 maddr = of_get_property(dn, "mac-address", NULL);
157
158 if (maddr == NULL) {
159 dev_warn(&pdev->dev,
160 "no mac address in device tree, not configuring\n");
161 return -ENOENT;
162 }
163
164
165 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
166 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
167 dev_warn(&pdev->dev,
168 "can't parse mac address, not configuring\n");
169 return -EINVAL;
170 }
171
172 memcpy(mac->mac_addr, addr, 6);
173
174 return 0;
175 }
176
177 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
178 struct sk_buff *skb,
179 dma_addr_t *dmas)
180 {
181 int f;
182 int nfrags = skb_shinfo(skb)->nr_frags;
183
184 pci_unmap_single(mac->dma_pdev, dmas[0], skb_headlen(skb),
185 PCI_DMA_TODEVICE);
186
187 for (f = 0; f < nfrags; f++) {
188 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
189
190 pci_unmap_page(mac->dma_pdev, dmas[f+1], frag->size,
191 PCI_DMA_TODEVICE);
192 }
193 dev_kfree_skb_irq(skb);
194
195 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
196 * aligned up to a power of 2
197 */
198 return (nfrags + 3) & ~1;
199 }
200
201 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
202 {
203 struct pasemi_mac_rxring *ring;
204 struct pasemi_mac *mac = netdev_priv(dev);
205 int chan_id = mac->dma_rxch;
206 unsigned int cfg;
207
208 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
209
210 if (!ring)
211 goto out_ring;
212
213 spin_lock_init(&ring->lock);
214
215 ring->size = RX_RING_SIZE;
216 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
217 RX_RING_SIZE, GFP_KERNEL);
218
219 if (!ring->ring_info)
220 goto out_ring_info;
221
222 /* Allocate descriptors */
223 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
224 RX_RING_SIZE * sizeof(u64),
225 &ring->dma, GFP_KERNEL);
226
227 if (!ring->ring)
228 goto out_ring_desc;
229
230 memset(ring->ring, 0, RX_RING_SIZE * sizeof(u64));
231
232 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
233 RX_RING_SIZE * sizeof(u64),
234 &ring->buf_dma, GFP_KERNEL);
235 if (!ring->buffers)
236 goto out_buffers;
237
238 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
239
240 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
241
242 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
243 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
244 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
245
246 cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
247
248 if (translation_enabled())
249 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
250
251 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id), cfg);
252
253 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
254 PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
255
256 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
257 PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
258 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
259
260 cfg = PAS_DMA_RXINT_CFG_DHL(3) | PAS_DMA_RXINT_CFG_L2 |
261 PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
262 PAS_DMA_RXINT_CFG_HEN;
263
264 if (translation_enabled())
265 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
266
267 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
268
269 ring->next_to_fill = 0;
270 ring->next_to_clean = 0;
271
272 snprintf(ring->irq_name, sizeof(ring->irq_name),
273 "%s rx", dev->name);
274 mac->rx = ring;
275
276 return 0;
277
278 out_buffers:
279 dma_free_coherent(&mac->dma_pdev->dev,
280 RX_RING_SIZE * sizeof(u64),
281 mac->rx->ring, mac->rx->dma);
282 out_ring_desc:
283 kfree(ring->ring_info);
284 out_ring_info:
285 kfree(ring);
286 out_ring:
287 return -ENOMEM;
288 }
289
290
291 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
292 {
293 struct pasemi_mac *mac = netdev_priv(dev);
294 u32 val;
295 int chan_id = mac->dma_txch;
296 struct pasemi_mac_txring *ring;
297 unsigned int cfg;
298
299 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
300 if (!ring)
301 goto out_ring;
302
303 spin_lock_init(&ring->lock);
304
305 ring->size = TX_RING_SIZE;
306 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
307 TX_RING_SIZE, GFP_KERNEL);
308 if (!ring->ring_info)
309 goto out_ring_info;
310
311 /* Allocate descriptors */
312 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
313 TX_RING_SIZE * sizeof(u64),
314 &ring->dma, GFP_KERNEL);
315 if (!ring->ring)
316 goto out_ring_desc;
317
318 memset(ring->ring, 0, TX_RING_SIZE * sizeof(u64));
319
320 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
321 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
322 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
323 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
324
325 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
326
327 cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
328 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
329 PAS_DMA_TXCHAN_CFG_UP |
330 PAS_DMA_TXCHAN_CFG_WT(2);
331
332 if (translation_enabled())
333 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
334
335 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id), cfg);
336
337 ring->next_to_fill = 0;
338 ring->next_to_clean = 0;
339
340 snprintf(ring->irq_name, sizeof(ring->irq_name),
341 "%s tx", dev->name);
342 mac->tx = ring;
343
344 return 0;
345
346 out_ring_desc:
347 kfree(ring->ring_info);
348 out_ring_info:
349 kfree(ring);
350 out_ring:
351 return -ENOMEM;
352 }
353
354 static void pasemi_mac_free_tx_resources(struct net_device *dev)
355 {
356 struct pasemi_mac *mac = netdev_priv(dev);
357 unsigned int i, j;
358 struct pasemi_mac_buffer *info;
359 dma_addr_t dmas[MAX_SKB_FRAGS+1];
360 int freed;
361 int start, limit;
362
363 start = mac->tx->next_to_clean;
364 limit = mac->tx->next_to_fill;
365
366 /* Compensate for when fill has wrapped and clean has not */
367 if (start > limit)
368 limit += TX_RING_SIZE;
369
370 for (i = start; i < limit; i += freed) {
371 info = &TX_RING_INFO(mac, i+1);
372 if (info->dma && info->skb) {
373 for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
374 dmas[j] = TX_RING_INFO(mac, i+1+j).dma;
375 freed = pasemi_mac_unmap_tx_skb(mac, info->skb, dmas);
376 } else
377 freed = 2;
378 }
379
380 for (i = 0; i < TX_RING_SIZE; i++)
381 TX_RING(mac, i) = 0;
382
383 dma_free_coherent(&mac->dma_pdev->dev,
384 TX_RING_SIZE * sizeof(u64),
385 mac->tx->ring, mac->tx->dma);
386
387 kfree(mac->tx->ring_info);
388 kfree(mac->tx);
389 mac->tx = NULL;
390 }
391
392 static void pasemi_mac_free_rx_resources(struct net_device *dev)
393 {
394 struct pasemi_mac *mac = netdev_priv(dev);
395 unsigned int i;
396 struct pasemi_mac_buffer *info;
397
398 for (i = 0; i < RX_RING_SIZE; i++) {
399 info = &RX_RING_INFO(mac, i);
400 if (info->skb && info->dma) {
401 pci_unmap_single(mac->dma_pdev,
402 info->dma,
403 info->skb->len,
404 PCI_DMA_FROMDEVICE);
405 dev_kfree_skb_any(info->skb);
406 }
407 info->dma = 0;
408 info->skb = NULL;
409 }
410
411 for (i = 0; i < RX_RING_SIZE; i++)
412 RX_RING(mac, i) = 0;
413
414 dma_free_coherent(&mac->dma_pdev->dev,
415 RX_RING_SIZE * sizeof(u64),
416 mac->rx->ring, mac->rx->dma);
417
418 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
419 mac->rx->buffers, mac->rx->buf_dma);
420
421 kfree(mac->rx->ring_info);
422 kfree(mac->rx);
423 mac->rx = NULL;
424 }
425
426 static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
427 {
428 struct pasemi_mac *mac = netdev_priv(dev);
429 int fill, count;
430
431 if (limit <= 0)
432 return;
433
434 fill = mac->rx->next_to_fill;
435 for (count = 0; count < limit; count++) {
436 struct pasemi_mac_buffer *info = &RX_RING_INFO(mac, fill);
437 u64 *buff = &RX_BUFF(mac, fill);
438 struct sk_buff *skb;
439 dma_addr_t dma;
440
441 /* Entry in use? */
442 WARN_ON(*buff);
443
444 /* skb might still be in there for recycle on short receives */
445 if (info->skb)
446 skb = info->skb;
447 else {
448 skb = dev_alloc_skb(BUF_SIZE);
449 skb_reserve(skb, LOCAL_SKB_ALIGN);
450 }
451
452 if (unlikely(!skb))
453 break;
454
455 dma = pci_map_single(mac->dma_pdev, skb->data,
456 BUF_SIZE - LOCAL_SKB_ALIGN,
457 PCI_DMA_FROMDEVICE);
458
459 if (unlikely(dma_mapping_error(dma))) {
460 dev_kfree_skb_irq(info->skb);
461 break;
462 }
463
464 info->skb = skb;
465 info->dma = dma;
466 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
467 fill++;
468 }
469
470 wmb();
471
472 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
473
474 mac->rx->next_to_fill = (mac->rx->next_to_fill + count) &
475 (RX_RING_SIZE - 1);
476 }
477
478 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
479 {
480 unsigned int reg, pcnt;
481 /* Re-enable packet count interrupts: finally
482 * ack the packet count interrupt we got in rx_intr.
483 */
484
485 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
486
487 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
488
489 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
490 }
491
492 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
493 {
494 unsigned int reg, pcnt;
495
496 /* Re-enable packet count interrupts */
497 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
498
499 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
500
501 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
502 }
503
504
505 static inline void pasemi_mac_rx_error(struct pasemi_mac *mac, u64 macrx)
506 {
507 unsigned int rcmdsta, ccmdsta;
508
509 if (!netif_msg_rx_err(mac))
510 return;
511
512 rcmdsta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
513 ccmdsta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
514
515 printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
516 macrx, *mac->rx_status);
517
518 printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
519 rcmdsta, ccmdsta);
520 }
521
522 static inline void pasemi_mac_tx_error(struct pasemi_mac *mac, u64 mactx)
523 {
524 unsigned int cmdsta;
525
526 if (!netif_msg_tx_err(mac))
527 return;
528
529 cmdsta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
530
531 printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
532 "tx status 0x%016lx\n", mactx, *mac->tx_status);
533
534 printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
535 }
536
537 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
538 {
539 unsigned int n;
540 int count;
541 struct pasemi_mac_buffer *info;
542 struct sk_buff *skb;
543 unsigned int len;
544 u64 macrx;
545 dma_addr_t dma;
546 int buf_index;
547 u64 eval;
548
549 spin_lock(&mac->rx->lock);
550
551 n = mac->rx->next_to_clean;
552
553 prefetch(&RX_RING(mac, n));
554
555 for (count = 0; count < limit; count++) {
556 macrx = RX_RING(mac, n);
557
558 if ((macrx & XCT_MACRX_E) ||
559 (*mac->rx_status & PAS_STATUS_ERROR))
560 pasemi_mac_rx_error(mac, macrx);
561
562 if (!(macrx & XCT_MACRX_O))
563 break;
564
565 info = NULL;
566
567 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
568
569 eval = (RX_RING(mac, n+1) & XCT_RXRES_8B_EVAL_M) >>
570 XCT_RXRES_8B_EVAL_S;
571 buf_index = eval-1;
572
573 dma = (RX_RING(mac, n+2) & XCT_PTR_ADDR_M);
574 info = &RX_RING_INFO(mac, buf_index);
575
576 skb = info->skb;
577
578 prefetch(skb);
579 prefetch(&skb->data_len);
580
581 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
582
583 pci_unmap_single(mac->dma_pdev, dma, len, PCI_DMA_FROMDEVICE);
584
585 if (macrx & XCT_MACRX_CRC) {
586 /* CRC error flagged */
587 mac->netdev->stats.rx_errors++;
588 mac->netdev->stats.rx_crc_errors++;
589 dev_kfree_skb_irq(skb);
590 goto next;
591 }
592
593 if (len < 256) {
594 struct sk_buff *new_skb;
595
596 new_skb = netdev_alloc_skb(mac->netdev,
597 len + LOCAL_SKB_ALIGN);
598 if (new_skb) {
599 skb_reserve(new_skb, LOCAL_SKB_ALIGN);
600 memcpy(new_skb->data, skb->data, len);
601 /* save the skb in buffer_info as good */
602 skb = new_skb;
603 }
604 /* else just continue with the old one */
605 } else
606 info->skb = NULL;
607
608 info->dma = 0;
609
610 /* Don't include CRC */
611 skb_put(skb, len-4);
612
613 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
614 skb->ip_summed = CHECKSUM_UNNECESSARY;
615 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
616 XCT_MACRX_CSUM_S;
617 } else
618 skb->ip_summed = CHECKSUM_NONE;
619
620 mac->netdev->stats.rx_bytes += len;
621 mac->netdev->stats.rx_packets++;
622
623 skb->protocol = eth_type_trans(skb, mac->netdev);
624 netif_receive_skb(skb);
625
626 next:
627 RX_RING(mac, n) = 0;
628 RX_RING(mac, n+1) = 0;
629
630 /* Need to zero it out since hardware doesn't, since the
631 * replenish loop uses it to tell when it's done.
632 */
633 RX_BUFF(mac, buf_index) = 0;
634
635 n += 4;
636 }
637
638 if (n > RX_RING_SIZE) {
639 /* Errata 5971 workaround: L2 target of headers */
640 write_iob_reg(mac, PAS_IOB_COM_PKTHDRCNT, 0);
641 n &= (RX_RING_SIZE-1);
642 }
643
644 mac->rx->next_to_clean = n;
645
646 /* Increase is in number of 16-byte entries, and since each descriptor
647 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
648 * count*2.
649 */
650 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count << 1);
651
652 pasemi_mac_replenish_rx_ring(mac->netdev, count);
653
654 spin_unlock(&mac->rx->lock);
655
656 return count;
657 }
658
659 /* Can't make this too large or we blow the kernel stack limits */
660 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
661
662 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
663 {
664 int i, j;
665 unsigned int start, descr_count, buf_count, batch_limit;
666 unsigned int ring_limit;
667 unsigned int total_count;
668 unsigned long flags;
669 struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
670 dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
671
672 total_count = 0;
673 batch_limit = TX_CLEAN_BATCHSIZE;
674 restart:
675 spin_lock_irqsave(&mac->tx->lock, flags);
676
677 start = mac->tx->next_to_clean;
678 ring_limit = mac->tx->next_to_fill;
679
680 /* Compensate for when fill has wrapped but clean has not */
681 if (start > ring_limit)
682 ring_limit += TX_RING_SIZE;
683
684 buf_count = 0;
685 descr_count = 0;
686
687 for (i = start;
688 descr_count < batch_limit && i < ring_limit;
689 i += buf_count) {
690 u64 mactx = TX_RING(mac, i);
691 struct sk_buff *skb;
692
693 if ((mactx & XCT_MACTX_E) ||
694 (*mac->tx_status & PAS_STATUS_ERROR))
695 pasemi_mac_tx_error(mac, mactx);
696
697 if (unlikely(mactx & XCT_MACTX_O))
698 /* Not yet transmitted */
699 break;
700
701 skb = TX_RING_INFO(mac, i+1).skb;
702 skbs[descr_count] = skb;
703
704 buf_count = 2 + skb_shinfo(skb)->nr_frags;
705 for (j = 0; j <= skb_shinfo(skb)->nr_frags; j++)
706 dmas[descr_count][j] = TX_RING_INFO(mac, i+1+j).dma;
707
708 TX_RING(mac, i) = 0;
709 TX_RING(mac, i+1) = 0;
710
711 /* Since we always fill with an even number of entries, make
712 * sure we skip any unused one at the end as well.
713 */
714 if (buf_count & 1)
715 buf_count++;
716 descr_count++;
717 }
718 mac->tx->next_to_clean = i & (TX_RING_SIZE-1);
719
720 spin_unlock_irqrestore(&mac->tx->lock, flags);
721 netif_wake_queue(mac->netdev);
722
723 for (i = 0; i < descr_count; i++)
724 pasemi_mac_unmap_tx_skb(mac, skbs[i], dmas[i]);
725
726 total_count += descr_count;
727
728 /* If the batch was full, try to clean more */
729 if (descr_count == batch_limit)
730 goto restart;
731
732 return total_count;
733 }
734
735
736 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
737 {
738 struct net_device *dev = data;
739 struct pasemi_mac *mac = netdev_priv(dev);
740 unsigned int reg;
741
742 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
743 return IRQ_NONE;
744
745 /* Don't reset packet count so it won't fire again but clear
746 * all others.
747 */
748
749 reg = 0;
750 if (*mac->rx_status & PAS_STATUS_SOFT)
751 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
752 if (*mac->rx_status & PAS_STATUS_ERROR)
753 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
754 if (*mac->rx_status & PAS_STATUS_TIMER)
755 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
756
757 netif_rx_schedule(dev, &mac->napi);
758
759 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
760
761 return IRQ_HANDLED;
762 }
763
764 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
765 {
766 struct net_device *dev = data;
767 struct pasemi_mac *mac = netdev_priv(dev);
768 unsigned int reg, pcnt;
769
770 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
771 return IRQ_NONE;
772
773 pasemi_mac_clean_tx(mac);
774
775 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
776
777 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
778
779 if (*mac->tx_status & PAS_STATUS_SOFT)
780 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
781 if (*mac->tx_status & PAS_STATUS_ERROR)
782 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
783
784 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
785
786 return IRQ_HANDLED;
787 }
788
789 static void pasemi_adjust_link(struct net_device *dev)
790 {
791 struct pasemi_mac *mac = netdev_priv(dev);
792 int msg;
793 unsigned int flags;
794 unsigned int new_flags;
795
796 if (!mac->phydev->link) {
797 /* If no link, MAC speed settings don't matter. Just report
798 * link down and return.
799 */
800 if (mac->link && netif_msg_link(mac))
801 printk(KERN_INFO "%s: Link is down.\n", dev->name);
802
803 netif_carrier_off(dev);
804 mac->link = 0;
805
806 return;
807 } else
808 netif_carrier_on(dev);
809
810 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
811 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
812 PAS_MAC_CFG_PCFG_TSR_M);
813
814 if (!mac->phydev->duplex)
815 new_flags |= PAS_MAC_CFG_PCFG_HD;
816
817 switch (mac->phydev->speed) {
818 case 1000:
819 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
820 PAS_MAC_CFG_PCFG_TSR_1G;
821 break;
822 case 100:
823 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
824 PAS_MAC_CFG_PCFG_TSR_100M;
825 break;
826 case 10:
827 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
828 PAS_MAC_CFG_PCFG_TSR_10M;
829 break;
830 default:
831 printk("Unsupported speed %d\n", mac->phydev->speed);
832 }
833
834 /* Print on link or speed/duplex change */
835 msg = mac->link != mac->phydev->link || flags != new_flags;
836
837 mac->duplex = mac->phydev->duplex;
838 mac->speed = mac->phydev->speed;
839 mac->link = mac->phydev->link;
840
841 if (new_flags != flags)
842 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
843
844 if (msg && netif_msg_link(mac))
845 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
846 dev->name, mac->speed, mac->duplex ? "full" : "half");
847 }
848
849 static int pasemi_mac_phy_init(struct net_device *dev)
850 {
851 struct pasemi_mac *mac = netdev_priv(dev);
852 struct device_node *dn, *phy_dn;
853 struct phy_device *phydev;
854 unsigned int phy_id;
855 const phandle *ph;
856 const unsigned int *prop;
857 struct resource r;
858 int ret;
859
860 dn = pci_device_to_OF_node(mac->pdev);
861 ph = of_get_property(dn, "phy-handle", NULL);
862 if (!ph)
863 return -ENODEV;
864 phy_dn = of_find_node_by_phandle(*ph);
865
866 prop = of_get_property(phy_dn, "reg", NULL);
867 ret = of_address_to_resource(phy_dn->parent, 0, &r);
868 if (ret)
869 goto err;
870
871 phy_id = *prop;
872 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
873
874 of_node_put(phy_dn);
875
876 mac->link = 0;
877 mac->speed = 0;
878 mac->duplex = -1;
879
880 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
881
882 if (IS_ERR(phydev)) {
883 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
884 return PTR_ERR(phydev);
885 }
886
887 mac->phydev = phydev;
888
889 return 0;
890
891 err:
892 of_node_put(phy_dn);
893 return -ENODEV;
894 }
895
896
897 static int pasemi_mac_open(struct net_device *dev)
898 {
899 struct pasemi_mac *mac = netdev_priv(dev);
900 int base_irq;
901 unsigned int flags;
902 int ret;
903
904 /* enable rx section */
905 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
906
907 /* enable tx section */
908 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
909
910 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
911 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
912 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
913
914 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
915
916 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
917 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
918
919 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
920 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
921
922 /* Clear out any residual packet count state from firmware */
923 pasemi_mac_restart_rx_intr(mac);
924 pasemi_mac_restart_tx_intr(mac);
925
926 /* 0xffffff is max value, about 16ms */
927 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
928 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
929
930 ret = pasemi_mac_setup_rx_resources(dev);
931 if (ret)
932 goto out_rx_resources;
933
934 ret = pasemi_mac_setup_tx_resources(dev);
935 if (ret)
936 goto out_tx_resources;
937
938 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
939 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
940 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
941
942 /* enable rx if */
943 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
944 PAS_DMA_RXINT_RCMDSTA_EN |
945 PAS_DMA_RXINT_RCMDSTA_DROPS_M |
946 PAS_DMA_RXINT_RCMDSTA_BP |
947 PAS_DMA_RXINT_RCMDSTA_OO |
948 PAS_DMA_RXINT_RCMDSTA_BT);
949
950 /* enable rx channel */
951 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
952 PAS_DMA_RXCHAN_CCMDSTA_EN |
953 PAS_DMA_RXCHAN_CCMDSTA_DU |
954 PAS_DMA_RXCHAN_CCMDSTA_OD |
955 PAS_DMA_RXCHAN_CCMDSTA_FD |
956 PAS_DMA_RXCHAN_CCMDSTA_DT);
957
958 /* enable tx channel */
959 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
960 PAS_DMA_TXCHAN_TCMDSTA_EN |
961 PAS_DMA_TXCHAN_TCMDSTA_SZ |
962 PAS_DMA_TXCHAN_TCMDSTA_DB |
963 PAS_DMA_TXCHAN_TCMDSTA_DE |
964 PAS_DMA_TXCHAN_TCMDSTA_DA);
965
966 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
967
968 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), RX_RING_SIZE>>1);
969
970 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
971 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
972
973 if (mac->type == MAC_TYPE_GMAC)
974 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
975 else
976 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
977
978 /* Enable interface in MAC */
979 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
980
981 ret = pasemi_mac_phy_init(dev);
982 /* Some configs don't have PHYs (XAUI etc), so don't complain about
983 * failed init due to -ENODEV.
984 */
985 if (ret && ret != -ENODEV)
986 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
987
988 netif_start_queue(dev);
989 napi_enable(&mac->napi);
990
991 /* Interrupts are a bit different for our DMA controller: While
992 * it's got one a regular PCI device header, the interrupt there
993 * is really the base of the range it's using. Each tx and rx
994 * channel has it's own interrupt source.
995 */
996
997 base_irq = virq_to_hw(mac->dma_pdev->irq);
998
999 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
1000 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
1001
1002 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1003 mac->tx->irq_name, dev);
1004 if (ret) {
1005 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1006 base_irq + mac->dma_txch, ret);
1007 goto out_tx_int;
1008 }
1009
1010 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1011 mac->rx->irq_name, dev);
1012 if (ret) {
1013 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1014 base_irq + 20 + mac->dma_rxch, ret);
1015 goto out_rx_int;
1016 }
1017
1018 if (mac->phydev)
1019 phy_start(mac->phydev);
1020
1021 return 0;
1022
1023 out_rx_int:
1024 free_irq(mac->tx_irq, dev);
1025 out_tx_int:
1026 napi_disable(&mac->napi);
1027 netif_stop_queue(dev);
1028 pasemi_mac_free_tx_resources(dev);
1029 out_tx_resources:
1030 pasemi_mac_free_rx_resources(dev);
1031 out_rx_resources:
1032
1033 return ret;
1034 }
1035
1036 #define MAX_RETRIES 5000
1037
1038 static int pasemi_mac_close(struct net_device *dev)
1039 {
1040 struct pasemi_mac *mac = netdev_priv(dev);
1041 unsigned int sta;
1042 int retries;
1043
1044 if (mac->phydev) {
1045 phy_stop(mac->phydev);
1046 phy_disconnect(mac->phydev);
1047 }
1048
1049 netif_stop_queue(dev);
1050 napi_disable(&mac->napi);
1051
1052 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1053 if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1054 PAS_DMA_RXINT_RCMDSTA_OO |
1055 PAS_DMA_RXINT_RCMDSTA_BT))
1056 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1057
1058 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1059 if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1060 PAS_DMA_RXCHAN_CCMDSTA_OD |
1061 PAS_DMA_RXCHAN_CCMDSTA_FD |
1062 PAS_DMA_RXCHAN_CCMDSTA_DT))
1063 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1064
1065 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1066 if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ |
1067 PAS_DMA_TXCHAN_TCMDSTA_DB |
1068 PAS_DMA_TXCHAN_TCMDSTA_DE |
1069 PAS_DMA_TXCHAN_TCMDSTA_DA))
1070 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1071
1072 /* Clean out any pending buffers */
1073 pasemi_mac_clean_tx(mac);
1074 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
1075
1076 /* Disable interface */
1077 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
1078 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
1079 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
1080
1081 for (retries = 0; retries < MAX_RETRIES; retries++) {
1082 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1083 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1084 break;
1085 cond_resched();
1086 }
1087
1088 if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1089 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
1090
1091 for (retries = 0; retries < MAX_RETRIES; retries++) {
1092 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1093 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1094 break;
1095 cond_resched();
1096 }
1097
1098 if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1099 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
1100
1101 for (retries = 0; retries < MAX_RETRIES; retries++) {
1102 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1103 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1104 break;
1105 cond_resched();
1106 }
1107
1108 if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1109 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
1110
1111 /* Then, disable the channel. This must be done separately from
1112 * stopping, since you can't disable when active.
1113 */
1114
1115 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
1116 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
1117 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1118
1119 free_irq(mac->tx_irq, dev);
1120 free_irq(mac->rx_irq, dev);
1121
1122 /* Free resources */
1123 pasemi_mac_free_rx_resources(dev);
1124 pasemi_mac_free_tx_resources(dev);
1125
1126 return 0;
1127 }
1128
1129 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1130 {
1131 struct pasemi_mac *mac = netdev_priv(dev);
1132 struct pasemi_mac_txring *txring;
1133 u64 dflags, mactx;
1134 dma_addr_t map[MAX_SKB_FRAGS+1];
1135 unsigned int map_size[MAX_SKB_FRAGS+1];
1136 unsigned long flags;
1137 int i, nfrags;
1138
1139 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1140
1141 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1142 const unsigned char *nh = skb_network_header(skb);
1143
1144 switch (ip_hdr(skb)->protocol) {
1145 case IPPROTO_TCP:
1146 dflags |= XCT_MACTX_CSUM_TCP;
1147 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1148 dflags |= XCT_MACTX_IPO(nh - skb->data);
1149 break;
1150 case IPPROTO_UDP:
1151 dflags |= XCT_MACTX_CSUM_UDP;
1152 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1153 dflags |= XCT_MACTX_IPO(nh - skb->data);
1154 break;
1155 }
1156 }
1157
1158 nfrags = skb_shinfo(skb)->nr_frags;
1159
1160 map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1161 PCI_DMA_TODEVICE);
1162 map_size[0] = skb_headlen(skb);
1163 if (dma_mapping_error(map[0]))
1164 goto out_err_nolock;
1165
1166 for (i = 0; i < nfrags; i++) {
1167 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1168
1169 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1170 frag->page_offset, frag->size,
1171 PCI_DMA_TODEVICE);
1172 map_size[i+1] = frag->size;
1173 if (dma_mapping_error(map[i+1])) {
1174 nfrags = i;
1175 goto out_err_nolock;
1176 }
1177 }
1178
1179 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1180
1181 txring = mac->tx;
1182
1183 spin_lock_irqsave(&txring->lock, flags);
1184
1185 /* Avoid stepping on the same cache line that the DMA controller
1186 * is currently about to send, so leave at least 8 words available.
1187 * Total free space needed is mactx + fragments + 8
1188 */
1189 if (RING_AVAIL(txring) < nfrags + 10) {
1190 /* no room -- stop the queue and wait for tx intr */
1191 netif_stop_queue(dev);
1192 goto out_err;
1193 }
1194
1195 TX_RING(mac, txring->next_to_fill) = mactx;
1196 txring->next_to_fill++;
1197 TX_RING_INFO(mac, txring->next_to_fill).skb = skb;
1198 for (i = 0; i <= nfrags; i++) {
1199 TX_RING(mac, txring->next_to_fill+i) =
1200 XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1201 TX_RING_INFO(mac, txring->next_to_fill+i).dma = map[i];
1202 }
1203
1204 /* We have to add an even number of 8-byte entries to the ring
1205 * even if the last one is unused. That means always an odd number
1206 * of pointers + one mactx descriptor.
1207 */
1208 if (nfrags & 1)
1209 nfrags++;
1210
1211 txring->next_to_fill = (txring->next_to_fill + nfrags + 1) &
1212 (TX_RING_SIZE-1);
1213
1214 dev->stats.tx_packets++;
1215 dev->stats.tx_bytes += skb->len;
1216
1217 spin_unlock_irqrestore(&txring->lock, flags);
1218
1219 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), (nfrags+2) >> 1);
1220
1221 return NETDEV_TX_OK;
1222
1223 out_err:
1224 spin_unlock_irqrestore(&txring->lock, flags);
1225 out_err_nolock:
1226 while (nfrags--)
1227 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1228 PCI_DMA_TODEVICE);
1229
1230 return NETDEV_TX_BUSY;
1231 }
1232
1233 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1234 {
1235 struct pasemi_mac *mac = netdev_priv(dev);
1236 unsigned int flags;
1237
1238 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1239
1240 /* Set promiscuous */
1241 if (dev->flags & IFF_PROMISC)
1242 flags |= PAS_MAC_CFG_PCFG_PR;
1243 else
1244 flags &= ~PAS_MAC_CFG_PCFG_PR;
1245
1246 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1247 }
1248
1249
1250 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1251 {
1252 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1253 struct net_device *dev = mac->netdev;
1254 int pkts;
1255
1256 pasemi_mac_clean_tx(mac);
1257 pkts = pasemi_mac_clean_rx(mac, budget);
1258 if (pkts < budget) {
1259 /* all done, no more packets present */
1260 netif_rx_complete(dev, napi);
1261
1262 pasemi_mac_restart_rx_intr(mac);
1263 }
1264 return pkts;
1265 }
1266
1267 static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1268 {
1269 struct device_node *dn;
1270 void __iomem *ret;
1271
1272 dn = pci_device_to_OF_node(p);
1273 if (!dn)
1274 goto fallback;
1275
1276 ret = of_iomap(dn, index);
1277 if (!ret)
1278 goto fallback;
1279
1280 return ret;
1281 fallback:
1282 /* This is hardcoded and ugly, but we have some firmware versions
1283 * that don't provide the register space in the device tree. Luckily
1284 * they are at well-known locations so we can just do the math here.
1285 */
1286 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1287 }
1288
1289 static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1290 {
1291 struct resource res;
1292 struct device_node *dn;
1293 int err;
1294
1295 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1296 if (!mac->dma_pdev) {
1297 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1298 return -ENODEV;
1299 }
1300
1301 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1302 if (!mac->iob_pdev) {
1303 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1304 return -ENODEV;
1305 }
1306
1307 mac->regs = map_onedev(mac->pdev, 0);
1308 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1309 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1310
1311 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1312 dev_err(&mac->pdev->dev, "Can't map registers\n");
1313 return -ENODEV;
1314 }
1315
1316 /* The dma status structure is located in the I/O bridge, and
1317 * is cache coherent.
1318 */
1319 if (!dma_status) {
1320 dn = pci_device_to_OF_node(mac->iob_pdev);
1321 if (dn)
1322 err = of_address_to_resource(dn, 1, &res);
1323 if (!dn || err) {
1324 /* Fallback for old firmware */
1325 res.start = 0xfd800000;
1326 res.end = res.start + 0x1000;
1327 }
1328 dma_status = __ioremap(res.start, res.end-res.start, 0);
1329 }
1330
1331 return 0;
1332 }
1333
1334 static int __devinit
1335 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1336 {
1337 static int index = 0;
1338 struct net_device *dev;
1339 struct pasemi_mac *mac;
1340 int err;
1341 DECLARE_MAC_BUF(mac_buf);
1342
1343 err = pci_enable_device(pdev);
1344 if (err)
1345 return err;
1346
1347 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1348 if (dev == NULL) {
1349 dev_err(&pdev->dev,
1350 "pasemi_mac: Could not allocate ethernet device.\n");
1351 err = -ENOMEM;
1352 goto out_disable_device;
1353 }
1354
1355 pci_set_drvdata(pdev, dev);
1356 SET_NETDEV_DEV(dev, &pdev->dev);
1357
1358 mac = netdev_priv(dev);
1359
1360 mac->pdev = pdev;
1361 mac->netdev = dev;
1362
1363 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1364
1365 dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG;
1366
1367 /* These should come out of the device tree eventually */
1368 mac->dma_txch = index;
1369 mac->dma_rxch = index;
1370
1371 /* We probe GMAC before XAUI, but the DMA interfaces are
1372 * in XAUI, GMAC order.
1373 */
1374 if (index < 4)
1375 mac->dma_if = index + 2;
1376 else
1377 mac->dma_if = index - 4;
1378 index++;
1379
1380 switch (pdev->device) {
1381 case 0xa005:
1382 mac->type = MAC_TYPE_GMAC;
1383 break;
1384 case 0xa006:
1385 mac->type = MAC_TYPE_XAUI;
1386 break;
1387 default:
1388 err = -ENODEV;
1389 goto out;
1390 }
1391
1392 /* get mac addr from device tree */
1393 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1394 err = -ENODEV;
1395 goto out;
1396 }
1397 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1398
1399 dev->open = pasemi_mac_open;
1400 dev->stop = pasemi_mac_close;
1401 dev->hard_start_xmit = pasemi_mac_start_tx;
1402 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1403
1404 err = pasemi_mac_map_regs(mac);
1405 if (err)
1406 goto out;
1407
1408 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1409 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1410
1411 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1412
1413 /* Enable most messages by default */
1414 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1415
1416 err = register_netdev(dev);
1417
1418 if (err) {
1419 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1420 err);
1421 goto out;
1422 } else if netif_msg_probe(mac)
1423 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1424 "hw addr %s\n",
1425 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1426 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1427 print_mac(mac_buf, dev->dev_addr));
1428
1429 return err;
1430
1431 out:
1432 if (mac->iob_pdev)
1433 pci_dev_put(mac->iob_pdev);
1434 if (mac->dma_pdev)
1435 pci_dev_put(mac->dma_pdev);
1436 if (mac->dma_regs)
1437 iounmap(mac->dma_regs);
1438 if (mac->iob_regs)
1439 iounmap(mac->iob_regs);
1440 if (mac->regs)
1441 iounmap(mac->regs);
1442
1443 free_netdev(dev);
1444 out_disable_device:
1445 pci_disable_device(pdev);
1446 return err;
1447
1448 }
1449
1450 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1451 {
1452 struct net_device *netdev = pci_get_drvdata(pdev);
1453 struct pasemi_mac *mac;
1454
1455 if (!netdev)
1456 return;
1457
1458 mac = netdev_priv(netdev);
1459
1460 unregister_netdev(netdev);
1461
1462 pci_disable_device(pdev);
1463 pci_dev_put(mac->dma_pdev);
1464 pci_dev_put(mac->iob_pdev);
1465
1466 iounmap(mac->regs);
1467 iounmap(mac->dma_regs);
1468 iounmap(mac->iob_regs);
1469
1470 pci_set_drvdata(pdev, NULL);
1471 free_netdev(netdev);
1472 }
1473
1474 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1475 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1476 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1477 { },
1478 };
1479
1480 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1481
1482 static struct pci_driver pasemi_mac_driver = {
1483 .name = "pasemi_mac",
1484 .id_table = pasemi_mac_pci_tbl,
1485 .probe = pasemi_mac_probe,
1486 .remove = __devexit_p(pasemi_mac_remove),
1487 };
1488
1489 static void __exit pasemi_mac_cleanup_module(void)
1490 {
1491 pci_unregister_driver(&pasemi_mac_driver);
1492 __iounmap(dma_status);
1493 dma_status = NULL;
1494 }
1495
1496 int pasemi_mac_init_module(void)
1497 {
1498 return pci_register_driver(&pasemi_mac_driver);
1499 }
1500
1501 module_init(pasemi_mac_init_module);
1502 module_exit(pasemi_mac_cleanup_module);
kernel-based virtual machine