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relay: fix "full buffer with exactly full last subbuffer" accounting problem
[linux-2.6/kmemtrace.git] / drivers / net / smc911x.c
blobe2ee91a6ae7e063c8f302b0eaba1fd56eedc12ba
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
40
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48 #ifndef SMC_DEBUG
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56 #endif
57
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
74
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
78
79 #include <asm/io.h>
80
81 #include "smc911x.h"
82
83 /*
84 * Transmit timeout, default 5 seconds.
85 */
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94 MODULE_LICENSE("GPL");
95 MODULE_ALIAS("platform:smc911x");
96
97 /*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102 #define CARDNAME "smc911x"
103
104 /*
105 * Use power-down feature of the chip
106 */
107 #define POWER_DOWN 1
108
109
110 /* store this information for the driver.. */
111 struct smc911x_local {
112 /*
113 * If I have to wait until the DMA is finished and ready to reload a
114 * packet, I will store the skbuff here. Then, the DMA will send it
115 * out and free it.
116 */
117 struct sk_buff *pending_tx_skb;
118
119 /* version/revision of the SMC911x chip */
120 u16 version;
121 u16 revision;
122
123 /* FIFO sizes */
124 int tx_fifo_kb;
125 int tx_fifo_size;
126 int rx_fifo_size;
127 int afc_cfg;
128
129 /* Contains the current active receive/phy mode */
130 int ctl_rfduplx;
131 int ctl_rspeed;
132
133 u32 msg_enable;
134 u32 phy_type;
135 struct mii_if_info mii;
136
137 /* work queue */
138 struct work_struct phy_configure;
139
140 int tx_throttle;
141 spinlock_t lock;
142
143 struct net_device *netdev;
144
145 #ifdef SMC_USE_DMA
146 /* DMA needs the physical address of the chip */
147 u_long physaddr;
148 int rxdma;
149 int txdma;
150 int rxdma_active;
151 int txdma_active;
152 struct sk_buff *current_rx_skb;
153 struct sk_buff *current_tx_skb;
154 struct device *dev;
155 #endif
156 };
157
158 #if SMC_DEBUG > 0
159 #define DBG(n, args...) \
160 do { \
161 if (SMC_DEBUG & (n)) \
162 printk(args); \
163 } while (0)
164
165 #define PRINTK(args...) printk(args)
166 #else
167 #define DBG(n, args...) do { } while (0)
168 #define PRINTK(args...) printk(KERN_DEBUG args)
169 #endif
170
171 #if SMC_DEBUG_PKTS > 0
172 static void PRINT_PKT(u_char *buf, int length)
173 {
174 int i;
175 int remainder;
176 int lines;
177
178 lines = length / 16;
179 remainder = length % 16;
180
181 for (i = 0; i < lines ; i ++) {
182 int cur;
183 for (cur = 0; cur < 8; cur++) {
184 u_char a, b;
185 a = *buf++;
186 b = *buf++;
187 printk("%02x%02x ", a, b);
188 }
189 printk("\n");
190 }
191 for (i = 0; i < remainder/2 ; i++) {
192 u_char a, b;
193 a = *buf++;
194 b = *buf++;
195 printk("%02x%02x ", a, b);
196 }
197 printk("\n");
198 }
199 #else
200 #define PRINT_PKT(x...) do { } while (0)
201 #endif
202
203
204 /* this enables an interrupt in the interrupt mask register */
205 #define SMC_ENABLE_INT(x) do { \
206 unsigned int __mask; \
207 unsigned long __flags; \
208 spin_lock_irqsave(&lp->lock, __flags); \
209 __mask = SMC_GET_INT_EN(); \
210 __mask |= (x); \
211 SMC_SET_INT_EN(__mask); \
212 spin_unlock_irqrestore(&lp->lock, __flags); \
213 } while (0)
214
215 /* this disables an interrupt from the interrupt mask register */
216 #define SMC_DISABLE_INT(x) do { \
217 unsigned int __mask; \
218 unsigned long __flags; \
219 spin_lock_irqsave(&lp->lock, __flags); \
220 __mask = SMC_GET_INT_EN(); \
221 __mask &= ~(x); \
222 SMC_SET_INT_EN(__mask); \
223 spin_unlock_irqrestore(&lp->lock, __flags); \
224 } while (0)
225
226 /*
227 * this does a soft reset on the device
228 */
229 static void smc911x_reset(struct net_device *dev)
230 {
231 unsigned long ioaddr = dev->base_addr;
232 struct smc911x_local *lp = netdev_priv(dev);
233 unsigned int reg, timeout=0, resets=1;
234 unsigned long flags;
235
236 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
237
238 /* Take out of PM setting first */
239 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
240 /* Write to the bytetest will take out of powerdown */
241 SMC_SET_BYTE_TEST(0);
242 timeout=10;
243 do {
244 udelay(10);
245 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
246 } while (--timeout && !reg);
247 if (timeout == 0) {
248 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
249 return;
250 }
251 }
252
253 /* Disable all interrupts */
254 spin_lock_irqsave(&lp->lock, flags);
255 SMC_SET_INT_EN(0);
256 spin_unlock_irqrestore(&lp->lock, flags);
257
258 while (resets--) {
259 SMC_SET_HW_CFG(HW_CFG_SRST_);
260 timeout=10;
261 do {
262 udelay(10);
263 reg = SMC_GET_HW_CFG();
264 /* If chip indicates reset timeout then try again */
265 if (reg & HW_CFG_SRST_TO_) {
266 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
267 resets++;
268 break;
269 }
270 } while (--timeout && (reg & HW_CFG_SRST_));
271 }
272 if (timeout == 0) {
273 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
274 return;
275 }
276
277 /* make sure EEPROM has finished loading before setting GPIO_CFG */
278 timeout=1000;
279 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
280 udelay(10);
281 }
282 if (timeout == 0){
283 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
284 return;
285 }
286
287 /* Initialize interrupts */
288 SMC_SET_INT_EN(0);
289 SMC_ACK_INT(-1);
290
291 /* Reset the FIFO level and flow control settings */
292 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
293 //TODO: Figure out what appropriate pause time is
294 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
295 SMC_SET_AFC_CFG(lp->afc_cfg);
296
297
298 /* Set to LED outputs */
299 SMC_SET_GPIO_CFG(0x70070000);
300
301 /*
302 * Deassert IRQ for 1*10us for edge type interrupts
303 * and drive IRQ pin push-pull
304 */
305 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
306
307 /* clear anything saved */
308 if (lp->pending_tx_skb != NULL) {
309 dev_kfree_skb (lp->pending_tx_skb);
310 lp->pending_tx_skb = NULL;
311 dev->stats.tx_errors++;
312 dev->stats.tx_aborted_errors++;
313 }
314 }
315
316 /*
317 * Enable Interrupts, Receive, and Transmit
318 */
319 static void smc911x_enable(struct net_device *dev)
320 {
321 unsigned long ioaddr = dev->base_addr;
322 struct smc911x_local *lp = netdev_priv(dev);
323 unsigned mask, cfg, cr;
324 unsigned long flags;
325
326 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
327
328 SMC_SET_MAC_ADDR(dev->dev_addr);
329
330 /* Enable TX */
331 cfg = SMC_GET_HW_CFG();
332 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
333 cfg |= HW_CFG_SF_;
334 SMC_SET_HW_CFG(cfg);
335 SMC_SET_FIFO_TDA(0xFF);
336 /* Update TX stats on every 64 packets received or every 1 sec */
337 SMC_SET_FIFO_TSL(64);
338 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
339
340 spin_lock_irqsave(&lp->lock, flags);
341 SMC_GET_MAC_CR(cr);
342 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
343 SMC_SET_MAC_CR(cr);
344 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
345 spin_unlock_irqrestore(&lp->lock, flags);
346
347 /* Add 2 byte padding to start of packets */
348 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
349
350 /* Turn on receiver and enable RX */
351 if (cr & MAC_CR_RXEN_)
352 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
353
354 spin_lock_irqsave(&lp->lock, flags);
355 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
356 spin_unlock_irqrestore(&lp->lock, flags);
357
358 /* Interrupt on every received packet */
359 SMC_SET_FIFO_RSA(0x01);
360 SMC_SET_FIFO_RSL(0x00);
361
362 /* now, enable interrupts */
363 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
364 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
365 INT_EN_PHY_INT_EN_;
366 if (IS_REV_A(lp->revision))
367 mask|=INT_EN_RDFL_EN_;
368 else {
369 mask|=INT_EN_RDFO_EN_;
370 }
371 SMC_ENABLE_INT(mask);
372 }
373
374 /*
375 * this puts the device in an inactive state
376 */
377 static void smc911x_shutdown(struct net_device *dev)
378 {
379 unsigned long ioaddr = dev->base_addr;
380 struct smc911x_local *lp = netdev_priv(dev);
381 unsigned cr;
382 unsigned long flags;
383
384 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
385
386 /* Disable IRQ's */
387 SMC_SET_INT_EN(0);
388
389 /* Turn of Rx and TX */
390 spin_lock_irqsave(&lp->lock, flags);
391 SMC_GET_MAC_CR(cr);
392 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
393 SMC_SET_MAC_CR(cr);
394 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
395 spin_unlock_irqrestore(&lp->lock, flags);
396 }
397
398 static inline void smc911x_drop_pkt(struct net_device *dev)
399 {
400 unsigned long ioaddr = dev->base_addr;
401 unsigned int fifo_count, timeout, reg;
402
403 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
404 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
405 if (fifo_count <= 4) {
406 /* Manually dump the packet data */
407 while (fifo_count--)
408 SMC_GET_RX_FIFO();
409 } else {
410 /* Fast forward through the bad packet */
411 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
412 timeout=50;
413 do {
414 udelay(10);
415 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
416 } while (--timeout && reg);
417 if (timeout == 0) {
418 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
419 }
420 }
421 }
422
423 /*
424 * This is the procedure to handle the receipt of a packet.
425 * It should be called after checking for packet presence in
426 * the RX status FIFO. It must be called with the spin lock
427 * already held.
428 */
429 static inline void smc911x_rcv(struct net_device *dev)
430 {
431 unsigned long ioaddr = dev->base_addr;
432 unsigned int pkt_len, status;
433 struct sk_buff *skb;
434 unsigned char *data;
435
436 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
437 dev->name, __FUNCTION__);
438 status = SMC_GET_RX_STS_FIFO();
439 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
440 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
441 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
442 if (status & RX_STS_ES_) {
443 /* Deal with a bad packet */
444 dev->stats.rx_errors++;
445 if (status & RX_STS_CRC_ERR_)
446 dev->stats.rx_crc_errors++;
447 else {
448 if (status & RX_STS_LEN_ERR_)
449 dev->stats.rx_length_errors++;
450 if (status & RX_STS_MCAST_)
451 dev->stats.multicast++;
452 }
453 /* Remove the bad packet data from the RX FIFO */
454 smc911x_drop_pkt(dev);
455 } else {
456 /* Receive a valid packet */
457 /* Alloc a buffer with extra room for DMA alignment */
458 skb=dev_alloc_skb(pkt_len+32);
459 if (unlikely(skb == NULL)) {
460 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
461 dev->name);
462 dev->stats.rx_dropped++;
463 smc911x_drop_pkt(dev);
464 return;
465 }
466 /* Align IP header to 32 bits
467 * Note that the device is configured to add a 2
468 * byte padding to the packet start, so we really
469 * want to write to the orignal data pointer */
470 data = skb->data;
471 skb_reserve(skb, 2);
472 skb_put(skb,pkt_len-4);
473 #ifdef SMC_USE_DMA
474 {
475 struct smc911x_local *lp = netdev_priv(dev);
476 unsigned int fifo;
477 /* Lower the FIFO threshold if possible */
478 fifo = SMC_GET_FIFO_INT();
479 if (fifo & 0xFF) fifo--;
480 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
481 dev->name, fifo & 0xff);
482 SMC_SET_FIFO_INT(fifo);
483 /* Setup RX DMA */
484 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
485 lp->rxdma_active = 1;
486 lp->current_rx_skb = skb;
487 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
488 /* Packet processing deferred to DMA RX interrupt */
489 }
490 #else
491 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
492 SMC_PULL_DATA(data, pkt_len+2+3);
493
494 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
495 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
496 dev->last_rx = jiffies;
497 skb->protocol = eth_type_trans(skb, dev);
498 netif_rx(skb);
499 dev->stats.rx_packets++;
500 dev->stats.rx_bytes += pkt_len-4;
501 #endif
502 }
503 }
504
505 /*
506 * This is called to actually send a packet to the chip.
507 */
508 static void smc911x_hardware_send_pkt(struct net_device *dev)
509 {
510 struct smc911x_local *lp = netdev_priv(dev);
511 unsigned long ioaddr = dev->base_addr;
512 struct sk_buff *skb;
513 unsigned int cmdA, cmdB, len;
514 unsigned char *buf;
515 unsigned long flags;
516
517 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
518 BUG_ON(lp->pending_tx_skb == NULL);
519
520 skb = lp->pending_tx_skb;
521 lp->pending_tx_skb = NULL;
522
523 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
524 /* cmdB {31:16] pkt tag [10:0] length */
525 #ifdef SMC_USE_DMA
526 /* 16 byte buffer alignment mode */
527 buf = (char*)((u32)(skb->data) & ~0xF);
528 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
529 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
530 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
531 skb->len;
532 #else
533 buf = (char*)((u32)skb->data & ~0x3);
534 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
535 cmdA = (((u32)skb->data & 0x3) << 16) |
536 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
537 skb->len;
538 #endif
539 /* tag is packet length so we can use this in stats update later */
540 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
541
542 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
543 dev->name, len, len, buf, cmdA, cmdB);
544 SMC_SET_TX_FIFO(cmdA);
545 SMC_SET_TX_FIFO(cmdB);
546
547 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
548 PRINT_PKT(buf, len <= 64 ? len : 64);
549
550 /* Send pkt via PIO or DMA */
551 #ifdef SMC_USE_DMA
552 lp->current_tx_skb = skb;
553 SMC_PUSH_DATA(buf, len);
554 /* DMA complete IRQ will free buffer and set jiffies */
555 #else
556 SMC_PUSH_DATA(buf, len);
557 dev->trans_start = jiffies;
558 dev_kfree_skb(skb);
559 #endif
560 spin_lock_irqsave(&lp->lock, flags);
561 if (!lp->tx_throttle) {
562 netif_wake_queue(dev);
563 }
564 spin_unlock_irqrestore(&lp->lock, flags);
565 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
566 }
567
568 /*
569 * Since I am not sure if I will have enough room in the chip's ram
570 * to store the packet, I call this routine which either sends it
571 * now, or set the card to generates an interrupt when ready
572 * for the packet.
573 */
574 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
575 {
576 struct smc911x_local *lp = netdev_priv(dev);
577 unsigned long ioaddr = dev->base_addr;
578 unsigned int free;
579 unsigned long flags;
580
581 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
582 dev->name, __FUNCTION__);
583
584 BUG_ON(lp->pending_tx_skb != NULL);
585
586 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
587 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
588
589 /* Turn off the flow when running out of space in FIFO */
590 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
591 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
592 dev->name, free);
593 spin_lock_irqsave(&lp->lock, flags);
594 /* Reenable when at least 1 packet of size MTU present */
595 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
596 lp->tx_throttle = 1;
597 netif_stop_queue(dev);
598 spin_unlock_irqrestore(&lp->lock, flags);
599 }
600
601 /* Drop packets when we run out of space in TX FIFO
602 * Account for overhead required for:
603 *
604 * Tx command words 8 bytes
605 * Start offset 15 bytes
606 * End padding 15 bytes
607 */
608 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
609 printk("%s: No Tx free space %d < %d\n",
610 dev->name, free, skb->len);
611 lp->pending_tx_skb = NULL;
612 dev->stats.tx_errors++;
613 dev->stats.tx_dropped++;
614 dev_kfree_skb(skb);
615 return 0;
616 }
617
618 #ifdef SMC_USE_DMA
619 {
620 /* If the DMA is already running then defer this packet Tx until
621 * the DMA IRQ starts it
622 */
623 spin_lock_irqsave(&lp->lock, flags);
624 if (lp->txdma_active) {
625 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
626 lp->pending_tx_skb = skb;
627 netif_stop_queue(dev);
628 spin_unlock_irqrestore(&lp->lock, flags);
629 return 0;
630 } else {
631 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
632 lp->txdma_active = 1;
633 }
634 spin_unlock_irqrestore(&lp->lock, flags);
635 }
636 #endif
637 lp->pending_tx_skb = skb;
638 smc911x_hardware_send_pkt(dev);
639
640 return 0;
641 }
642
643 /*
644 * This handles a TX status interrupt, which is only called when:
645 * - a TX error occurred, or
646 * - TX of a packet completed.
647 */
648 static void smc911x_tx(struct net_device *dev)
649 {
650 unsigned long ioaddr = dev->base_addr;
651 struct smc911x_local *lp = netdev_priv(dev);
652 unsigned int tx_status;
653
654 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
655 dev->name, __FUNCTION__);
656
657 /* Collect the TX status */
658 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
659 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
660 dev->name,
661 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
662 tx_status = SMC_GET_TX_STS_FIFO();
663 dev->stats.tx_packets++;
664 dev->stats.tx_bytes+=tx_status>>16;
665 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
666 dev->name, (tx_status & 0xffff0000) >> 16,
667 tx_status & 0x0000ffff);
668 /* count Tx errors, but ignore lost carrier errors when in
669 * full-duplex mode */
670 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
671 !(tx_status & 0x00000306))) {
672 dev->stats.tx_errors++;
673 }
674 if (tx_status & TX_STS_MANY_COLL_) {
675 dev->stats.collisions+=16;
676 dev->stats.tx_aborted_errors++;
677 } else {
678 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
679 }
680 /* carrier error only has meaning for half-duplex communication */
681 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
682 !lp->ctl_rfduplx) {
683 dev->stats.tx_carrier_errors++;
684 }
685 if (tx_status & TX_STS_LATE_COLL_) {
686 dev->stats.collisions++;
687 dev->stats.tx_aborted_errors++;
688 }
689 }
690 }
691
692
693 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
694 /*
695 * Reads a register from the MII Management serial interface
696 */
697
698 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
699 {
700 unsigned long ioaddr = dev->base_addr;
701 unsigned int phydata;
702
703 SMC_GET_MII(phyreg, phyaddr, phydata);
704
705 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
706 __FUNCTION__, phyaddr, phyreg, phydata);
707 return phydata;
708 }
709
710
711 /*
712 * Writes a register to the MII Management serial interface
713 */
714 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
715 int phydata)
716 {
717 unsigned long ioaddr = dev->base_addr;
718
719 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
720 __FUNCTION__, phyaddr, phyreg, phydata);
721
722 SMC_SET_MII(phyreg, phyaddr, phydata);
723 }
724
725 /*
726 * Finds and reports the PHY address (115 and 117 have external
727 * PHY interface 118 has internal only
728 */
729 static void smc911x_phy_detect(struct net_device *dev)
730 {
731 unsigned long ioaddr = dev->base_addr;
732 struct smc911x_local *lp = netdev_priv(dev);
733 int phyaddr;
734 unsigned int cfg, id1, id2;
735
736 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
737
738 lp->phy_type = 0;
739
740 /*
741 * Scan all 32 PHY addresses if necessary, starting at
742 * PHY#1 to PHY#31, and then PHY#0 last.
743 */
744 switch(lp->version) {
745 case 0x115:
746 case 0x117:
747 cfg = SMC_GET_HW_CFG();
748 if (cfg & HW_CFG_EXT_PHY_DET_) {
749 cfg &= ~HW_CFG_PHY_CLK_SEL_;
750 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
751 SMC_SET_HW_CFG(cfg);
752 udelay(10); /* Wait for clocks to stop */
753
754 cfg |= HW_CFG_EXT_PHY_EN_;
755 SMC_SET_HW_CFG(cfg);
756 udelay(10); /* Wait for clocks to stop */
757
758 cfg &= ~HW_CFG_PHY_CLK_SEL_;
759 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
760 SMC_SET_HW_CFG(cfg);
761 udelay(10); /* Wait for clocks to stop */
762
763 cfg |= HW_CFG_SMI_SEL_;
764 SMC_SET_HW_CFG(cfg);
765
766 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
767
768 /* Read the PHY identifiers */
769 SMC_GET_PHY_ID1(phyaddr & 31, id1);
770 SMC_GET_PHY_ID2(phyaddr & 31, id2);
771
772 /* Make sure it is a valid identifier */
773 if (id1 != 0x0000 && id1 != 0xffff &&
774 id1 != 0x8000 && id2 != 0x0000 &&
775 id2 != 0xffff && id2 != 0x8000) {
776 /* Save the PHY's address */
777 lp->mii.phy_id = phyaddr & 31;
778 lp->phy_type = id1 << 16 | id2;
779 break;
780 }
781 }
782 }
783 default:
784 /* Internal media only */
785 SMC_GET_PHY_ID1(1, id1);
786 SMC_GET_PHY_ID2(1, id2);
787 /* Save the PHY's address */
788 lp->mii.phy_id = 1;
789 lp->phy_type = id1 << 16 | id2;
790 }
791
792 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
793 dev->name, id1, id2, lp->mii.phy_id);
794 }
795
796 /*
797 * Sets the PHY to a configuration as determined by the user.
798 * Called with spin_lock held.
799 */
800 static int smc911x_phy_fixed(struct net_device *dev)
801 {
802 struct smc911x_local *lp = netdev_priv(dev);
803 unsigned long ioaddr = dev->base_addr;
804 int phyaddr = lp->mii.phy_id;
805 int bmcr;
806
807 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
808
809 /* Enter Link Disable state */
810 SMC_GET_PHY_BMCR(phyaddr, bmcr);
811 bmcr |= BMCR_PDOWN;
812 SMC_SET_PHY_BMCR(phyaddr, bmcr);
813
814 /*
815 * Set our fixed capabilities
816 * Disable auto-negotiation
817 */
818 bmcr &= ~BMCR_ANENABLE;
819 if (lp->ctl_rfduplx)
820 bmcr |= BMCR_FULLDPLX;
821
822 if (lp->ctl_rspeed == 100)
823 bmcr |= BMCR_SPEED100;
824
825 /* Write our capabilities to the phy control register */
826 SMC_SET_PHY_BMCR(phyaddr, bmcr);
827
828 /* Re-Configure the Receive/Phy Control register */
829 bmcr &= ~BMCR_PDOWN;
830 SMC_SET_PHY_BMCR(phyaddr, bmcr);
831
832 return 1;
833 }
834
835 /*
836 * smc911x_phy_reset - reset the phy
837 * @dev: net device
838 * @phy: phy address
839 *
840 * Issue a software reset for the specified PHY and
841 * wait up to 100ms for the reset to complete. We should
842 * not access the PHY for 50ms after issuing the reset.
843 *
844 * The time to wait appears to be dependent on the PHY.
845 *
846 */
847 static int smc911x_phy_reset(struct net_device *dev, int phy)
848 {
849 struct smc911x_local *lp = netdev_priv(dev);
850 unsigned long ioaddr = dev->base_addr;
851 int timeout;
852 unsigned long flags;
853 unsigned int reg;
854
855 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
856
857 spin_lock_irqsave(&lp->lock, flags);
858 reg = SMC_GET_PMT_CTRL();
859 reg &= ~0xfffff030;
860 reg |= PMT_CTRL_PHY_RST_;
861 SMC_SET_PMT_CTRL(reg);
862 spin_unlock_irqrestore(&lp->lock, flags);
863 for (timeout = 2; timeout; timeout--) {
864 msleep(50);
865 spin_lock_irqsave(&lp->lock, flags);
866 reg = SMC_GET_PMT_CTRL();
867 spin_unlock_irqrestore(&lp->lock, flags);
868 if (!(reg & PMT_CTRL_PHY_RST_)) {
869 /* extra delay required because the phy may
870 * not be completed with its reset
871 * when PHY_BCR_RESET_ is cleared. 256us
872 * should suffice, but use 500us to be safe
873 */
874 udelay(500);
875 break;
876 }
877 }
878
879 return reg & PMT_CTRL_PHY_RST_;
880 }
881
882 /*
883 * smc911x_phy_powerdown - powerdown phy
884 * @dev: net device
885 * @phy: phy address
886 *
887 * Power down the specified PHY
888 */
889 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
890 {
891 unsigned long ioaddr = dev->base_addr;
892 unsigned int bmcr;
893
894 /* Enter Link Disable state */
895 SMC_GET_PHY_BMCR(phy, bmcr);
896 bmcr |= BMCR_PDOWN;
897 SMC_SET_PHY_BMCR(phy, bmcr);
898 }
899
900 /*
901 * smc911x_phy_check_media - check the media status and adjust BMCR
902 * @dev: net device
903 * @init: set true for initialisation
904 *
905 * Select duplex mode depending on negotiation state. This
906 * also updates our carrier state.
907 */
908 static void smc911x_phy_check_media(struct net_device *dev, int init)
909 {
910 struct smc911x_local *lp = netdev_priv(dev);
911 unsigned long ioaddr = dev->base_addr;
912 int phyaddr = lp->mii.phy_id;
913 unsigned int bmcr, cr;
914
915 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
916
917 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
918 /* duplex state has changed */
919 SMC_GET_PHY_BMCR(phyaddr, bmcr);
920 SMC_GET_MAC_CR(cr);
921 if (lp->mii.full_duplex) {
922 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
923 bmcr |= BMCR_FULLDPLX;
924 cr |= MAC_CR_RCVOWN_;
925 } else {
926 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
927 bmcr &= ~BMCR_FULLDPLX;
928 cr &= ~MAC_CR_RCVOWN_;
929 }
930 SMC_SET_PHY_BMCR(phyaddr, bmcr);
931 SMC_SET_MAC_CR(cr);
932 }
933 }
934
935 /*
936 * Configures the specified PHY through the MII management interface
937 * using Autonegotiation.
938 * Calls smc911x_phy_fixed() if the user has requested a certain config.
939 * If RPC ANEG bit is set, the media selection is dependent purely on
940 * the selection by the MII (either in the MII BMCR reg or the result
941 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
942 * is controlled by the RPC SPEED and RPC DPLX bits.
943 */
944 static void smc911x_phy_configure(struct work_struct *work)
945 {
946 struct smc911x_local *lp = container_of(work, struct smc911x_local,
947 phy_configure);
948 struct net_device *dev = lp->netdev;
949 unsigned long ioaddr = dev->base_addr;
950 int phyaddr = lp->mii.phy_id;
951 int my_phy_caps; /* My PHY capabilities */
952 int my_ad_caps; /* My Advertised capabilities */
953 int status;
954 unsigned long flags;
955
956 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
957
958 /*
959 * We should not be called if phy_type is zero.
960 */
961 if (lp->phy_type == 0)
962 return;
963
964 if (smc911x_phy_reset(dev, phyaddr)) {
965 printk("%s: PHY reset timed out\n", dev->name);
966 return;
967 }
968 spin_lock_irqsave(&lp->lock, flags);
969
970 /*
971 * Enable PHY Interrupts (for register 18)
972 * Interrupts listed here are enabled
973 */
974 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
975 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
976 PHY_INT_MASK_LINK_DOWN_);
977
978 /* If the user requested no auto neg, then go set his request */
979 if (lp->mii.force_media) {
980 smc911x_phy_fixed(dev);
981 goto smc911x_phy_configure_exit;
982 }
983
984 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
985 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
986 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
987 printk(KERN_INFO "Auto negotiation NOT supported\n");
988 smc911x_phy_fixed(dev);
989 goto smc911x_phy_configure_exit;
990 }
991
992 /* CSMA capable w/ both pauses */
993 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
994
995 if (my_phy_caps & BMSR_100BASE4)
996 my_ad_caps |= ADVERTISE_100BASE4;
997 if (my_phy_caps & BMSR_100FULL)
998 my_ad_caps |= ADVERTISE_100FULL;
999 if (my_phy_caps & BMSR_100HALF)
1000 my_ad_caps |= ADVERTISE_100HALF;
1001 if (my_phy_caps & BMSR_10FULL)
1002 my_ad_caps |= ADVERTISE_10FULL;
1003 if (my_phy_caps & BMSR_10HALF)
1004 my_ad_caps |= ADVERTISE_10HALF;
1005
1006 /* Disable capabilities not selected by our user */
1007 if (lp->ctl_rspeed != 100)
1008 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1009
1010 if (!lp->ctl_rfduplx)
1011 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1012
1013 /* Update our Auto-Neg Advertisement Register */
1014 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1015 lp->mii.advertising = my_ad_caps;
1016
1017 /*
1018 * Read the register back. Without this, it appears that when
1019 * auto-negotiation is restarted, sometimes it isn't ready and
1020 * the link does not come up.
1021 */
1022 udelay(10);
1023 SMC_GET_PHY_MII_ADV(phyaddr, status);
1024
1025 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1026 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1027
1028 /* Restart auto-negotiation process in order to advertise my caps */
1029 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1030
1031 smc911x_phy_check_media(dev, 1);
1032
1033 smc911x_phy_configure_exit:
1034 spin_unlock_irqrestore(&lp->lock, flags);
1035 }
1036
1037 /*
1038 * smc911x_phy_interrupt
1039 *
1040 * Purpose: Handle interrupts relating to PHY register 18. This is
1041 * called from the "hard" interrupt handler under our private spinlock.
1042 */
1043 static void smc911x_phy_interrupt(struct net_device *dev)
1044 {
1045 struct smc911x_local *lp = netdev_priv(dev);
1046 unsigned long ioaddr = dev->base_addr;
1047 int phyaddr = lp->mii.phy_id;
1048 int status;
1049
1050 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1051
1052 if (lp->phy_type == 0)
1053 return;
1054
1055 smc911x_phy_check_media(dev, 0);
1056 /* read to clear status bits */
1057 SMC_GET_PHY_INT_SRC(phyaddr,status);
1058 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1059 dev->name, status & 0xffff);
1060 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1061 dev->name, SMC_GET_AFC_CFG());
1062 }
1063
1064 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1065
1066 /*
1067 * This is the main routine of the driver, to handle the device when
1068 * it needs some attention.
1069 */
1070 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1071 {
1072 struct net_device *dev = dev_id;
1073 unsigned long ioaddr = dev->base_addr;
1074 struct smc911x_local *lp = netdev_priv(dev);
1075 unsigned int status, mask, timeout;
1076 unsigned int rx_overrun=0, cr, pkts;
1077 unsigned long flags;
1078
1079 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1080
1081 spin_lock_irqsave(&lp->lock, flags);
1082
1083 /* Spurious interrupt check */
1084 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1085 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1086 spin_unlock_irqrestore(&lp->lock, flags);
1087 return IRQ_NONE;
1088 }
1089
1090 mask = SMC_GET_INT_EN();
1091 SMC_SET_INT_EN(0);
1092
1093 /* set a timeout value, so I don't stay here forever */
1094 timeout = 8;
1095
1096
1097 do {
1098 status = SMC_GET_INT();
1099
1100 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1101 dev->name, status, mask, status & ~mask);
1102
1103 status &= mask;
1104 if (!status)
1105 break;
1106
1107 /* Handle SW interrupt condition */
1108 if (status & INT_STS_SW_INT_) {
1109 SMC_ACK_INT(INT_STS_SW_INT_);
1110 mask &= ~INT_EN_SW_INT_EN_;
1111 }
1112 /* Handle various error conditions */
1113 if (status & INT_STS_RXE_) {
1114 SMC_ACK_INT(INT_STS_RXE_);
1115 dev->stats.rx_errors++;
1116 }
1117 if (status & INT_STS_RXDFH_INT_) {
1118 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1119 dev->stats.rx_dropped+=SMC_GET_RX_DROP();
1120 }
1121 /* Undocumented interrupt-what is the right thing to do here? */
1122 if (status & INT_STS_RXDF_INT_) {
1123 SMC_ACK_INT(INT_STS_RXDF_INT_);
1124 }
1125
1126 /* Rx Data FIFO exceeds set level */
1127 if (status & INT_STS_RDFL_) {
1128 if (IS_REV_A(lp->revision)) {
1129 rx_overrun=1;
1130 SMC_GET_MAC_CR(cr);
1131 cr &= ~MAC_CR_RXEN_;
1132 SMC_SET_MAC_CR(cr);
1133 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1134 dev->stats.rx_errors++;
1135 dev->stats.rx_fifo_errors++;
1136 }
1137 SMC_ACK_INT(INT_STS_RDFL_);
1138 }
1139 if (status & INT_STS_RDFO_) {
1140 if (!IS_REV_A(lp->revision)) {
1141 SMC_GET_MAC_CR(cr);
1142 cr &= ~MAC_CR_RXEN_;
1143 SMC_SET_MAC_CR(cr);
1144 rx_overrun=1;
1145 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1146 dev->stats.rx_errors++;
1147 dev->stats.rx_fifo_errors++;
1148 }
1149 SMC_ACK_INT(INT_STS_RDFO_);
1150 }
1151 /* Handle receive condition */
1152 if ((status & INT_STS_RSFL_) || rx_overrun) {
1153 unsigned int fifo;
1154 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1155 fifo = SMC_GET_RX_FIFO_INF();
1156 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1157 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1158 dev->name, pkts, fifo & 0xFFFF );
1159 if (pkts != 0) {
1160 #ifdef SMC_USE_DMA
1161 unsigned int fifo;
1162 if (lp->rxdma_active){
1163 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1164 "%s: RX DMA active\n", dev->name);
1165 /* The DMA is already running so up the IRQ threshold */
1166 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1167 fifo |= pkts & 0xFF;
1168 DBG(SMC_DEBUG_RX,
1169 "%s: Setting RX stat FIFO threshold to %d\n",
1170 dev->name, fifo & 0xff);
1171 SMC_SET_FIFO_INT(fifo);
1172 } else
1173 #endif
1174 smc911x_rcv(dev);
1175 }
1176 SMC_ACK_INT(INT_STS_RSFL_);
1177 }
1178 /* Handle transmit FIFO available */
1179 if (status & INT_STS_TDFA_) {
1180 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1181 SMC_SET_FIFO_TDA(0xFF);
1182 lp->tx_throttle = 0;
1183 #ifdef SMC_USE_DMA
1184 if (!lp->txdma_active)
1185 #endif
1186 netif_wake_queue(dev);
1187 SMC_ACK_INT(INT_STS_TDFA_);
1188 }
1189 /* Handle transmit done condition */
1190 #if 1
1191 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1192 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1193 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1194 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1195 smc911x_tx(dev);
1196 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1197 SMC_ACK_INT(INT_STS_TSFL_);
1198 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1199 }
1200 #else
1201 if (status & INT_STS_TSFL_) {
1202 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1203 smc911x_tx(dev);
1204 SMC_ACK_INT(INT_STS_TSFL_);
1205 }
1206
1207 if (status & INT_STS_GPT_INT_) {
1208 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1209 dev->name,
1210 SMC_GET_IRQ_CFG(),
1211 SMC_GET_FIFO_INT(),
1212 SMC_GET_RX_CFG());
1213 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1214 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1215 dev->name,
1216 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1217 SMC_GET_RX_FIFO_INF() & 0xffff,
1218 SMC_GET_RX_STS_FIFO_PEEK());
1219 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1220 SMC_ACK_INT(INT_STS_GPT_INT_);
1221 }
1222 #endif
1223
1224 /* Handle PHY interrupt condition */
1225 if (status & INT_STS_PHY_INT_) {
1226 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1227 smc911x_phy_interrupt(dev);
1228 SMC_ACK_INT(INT_STS_PHY_INT_);
1229 }
1230 } while (--timeout);
1231
1232 /* restore mask state */
1233 SMC_SET_INT_EN(mask);
1234
1235 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1236 dev->name, 8-timeout);
1237
1238 spin_unlock_irqrestore(&lp->lock, flags);
1239
1240 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1241
1242 return IRQ_HANDLED;
1243 }
1244
1245 #ifdef SMC_USE_DMA
1246 static void
1247 smc911x_tx_dma_irq(int dma, void *data)
1248 {
1249 struct net_device *dev = (struct net_device *)data;
1250 struct smc911x_local *lp = netdev_priv(dev);
1251 struct sk_buff *skb = lp->current_tx_skb;
1252 unsigned long flags;
1253
1254 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1255
1256 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1257 /* Clear the DMA interrupt sources */
1258 SMC_DMA_ACK_IRQ(dev, dma);
1259 BUG_ON(skb == NULL);
1260 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1261 dev->trans_start = jiffies;
1262 dev_kfree_skb_irq(skb);
1263 lp->current_tx_skb = NULL;
1264 if (lp->pending_tx_skb != NULL)
1265 smc911x_hardware_send_pkt(dev);
1266 else {
1267 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1268 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1269 spin_lock_irqsave(&lp->lock, flags);
1270 lp->txdma_active = 0;
1271 if (!lp->tx_throttle) {
1272 netif_wake_queue(dev);
1273 }
1274 spin_unlock_irqrestore(&lp->lock, flags);
1275 }
1276
1277 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1278 "%s: TX DMA irq completed\n", dev->name);
1279 }
1280 static void
1281 smc911x_rx_dma_irq(int dma, void *data)
1282 {
1283 struct net_device *dev = (struct net_device *)data;
1284 unsigned long ioaddr = dev->base_addr;
1285 struct smc911x_local *lp = netdev_priv(dev);
1286 struct sk_buff *skb = lp->current_rx_skb;
1287 unsigned long flags;
1288 unsigned int pkts;
1289
1290 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1291 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1292 /* Clear the DMA interrupt sources */
1293 SMC_DMA_ACK_IRQ(dev, dma);
1294 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1295 BUG_ON(skb == NULL);
1296 lp->current_rx_skb = NULL;
1297 PRINT_PKT(skb->data, skb->len);
1298 dev->last_rx = jiffies;
1299 skb->protocol = eth_type_trans(skb, dev);
1300 dev->stats.rx_packets++;
1301 dev->stats.rx_bytes += skb->len;
1302 netif_rx(skb);
1303
1304 spin_lock_irqsave(&lp->lock, flags);
1305 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1306 if (pkts != 0) {
1307 smc911x_rcv(dev);
1308 }else {
1309 lp->rxdma_active = 0;
1310 }
1311 spin_unlock_irqrestore(&lp->lock, flags);
1312 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1313 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1314 dev->name, pkts);
1315 }
1316 #endif /* SMC_USE_DMA */
1317
1318 #ifdef CONFIG_NET_POLL_CONTROLLER
1319 /*
1320 * Polling receive - used by netconsole and other diagnostic tools
1321 * to allow network i/o with interrupts disabled.
1322 */
1323 static void smc911x_poll_controller(struct net_device *dev)
1324 {
1325 disable_irq(dev->irq);
1326 smc911x_interrupt(dev->irq, dev);
1327 enable_irq(dev->irq);
1328 }
1329 #endif
1330
1331 /* Our watchdog timed out. Called by the networking layer */
1332 static void smc911x_timeout(struct net_device *dev)
1333 {
1334 struct smc911x_local *lp = netdev_priv(dev);
1335 unsigned long ioaddr = dev->base_addr;
1336 int status, mask;
1337 unsigned long flags;
1338
1339 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1340
1341 spin_lock_irqsave(&lp->lock, flags);
1342 status = SMC_GET_INT();
1343 mask = SMC_GET_INT_EN();
1344 spin_unlock_irqrestore(&lp->lock, flags);
1345 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1346 dev->name, status, mask);
1347
1348 /* Dump the current TX FIFO contents and restart */
1349 mask = SMC_GET_TX_CFG();
1350 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1351 /*
1352 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1353 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1354 * which calls schedule(). Hence we use a work queue.
1355 */
1356 if (lp->phy_type != 0)
1357 schedule_work(&lp->phy_configure);
1358
1359 /* We can accept TX packets again */
1360 dev->trans_start = jiffies;
1361 netif_wake_queue(dev);
1362 }
1363
1364 /*
1365 * This routine will, depending on the values passed to it,
1366 * either make it accept multicast packets, go into
1367 * promiscuous mode (for TCPDUMP and cousins) or accept
1368 * a select set of multicast packets
1369 */
1370 static void smc911x_set_multicast_list(struct net_device *dev)
1371 {
1372 struct smc911x_local *lp = netdev_priv(dev);
1373 unsigned long ioaddr = dev->base_addr;
1374 unsigned int multicast_table[2];
1375 unsigned int mcr, update_multicast = 0;
1376 unsigned long flags;
1377
1378 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1379
1380 spin_lock_irqsave(&lp->lock, flags);
1381 SMC_GET_MAC_CR(mcr);
1382 spin_unlock_irqrestore(&lp->lock, flags);
1383
1384 if (dev->flags & IFF_PROMISC) {
1385
1386 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1387 mcr |= MAC_CR_PRMS_;
1388 }
1389 /*
1390 * Here, I am setting this to accept all multicast packets.
1391 * I don't need to zero the multicast table, because the flag is
1392 * checked before the table is
1393 */
1394 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1395 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1396 mcr |= MAC_CR_MCPAS_;
1397 }
1398
1399 /*
1400 * This sets the internal hardware table to filter out unwanted
1401 * multicast packets before they take up memory.
1402 *
1403 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1404 * address are the offset into the table. If that bit is 1, then the
1405 * multicast packet is accepted. Otherwise, it's dropped silently.
1406 *
1407 * To use the 6 bits as an offset into the table, the high 1 bit is
1408 * the number of the 32 bit register, while the low 5 bits are the bit
1409 * within that register.
1410 */
1411 else if (dev->mc_count) {
1412 int i;
1413 struct dev_mc_list *cur_addr;
1414
1415 /* Set the Hash perfec mode */
1416 mcr |= MAC_CR_HPFILT_;
1417
1418 /* start with a table of all zeros: reject all */
1419 memset(multicast_table, 0, sizeof(multicast_table));
1420
1421 cur_addr = dev->mc_list;
1422 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1423 u32 position;
1424
1425 /* do we have a pointer here? */
1426 if (!cur_addr)
1427 break;
1428 /* make sure this is a multicast address -
1429 shouldn't this be a given if we have it here ? */
1430 if (!(*cur_addr->dmi_addr & 1))
1431 continue;
1432
1433 /* upper 6 bits are used as hash index */
1434 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
1435
1436 multicast_table[position>>5] |= 1 << (position&0x1f);
1437 }
1438
1439 /* be sure I get rid of flags I might have set */
1440 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1441
1442 /* now, the table can be loaded into the chipset */
1443 update_multicast = 1;
1444 } else {
1445 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1446 dev->name);
1447 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1448
1449 /*
1450 * since I'm disabling all multicast entirely, I need to
1451 * clear the multicast list
1452 */
1453 memset(multicast_table, 0, sizeof(multicast_table));
1454 update_multicast = 1;
1455 }
1456
1457 spin_lock_irqsave(&lp->lock, flags);
1458 SMC_SET_MAC_CR(mcr);
1459 if (update_multicast) {
1460 DBG(SMC_DEBUG_MISC,
1461 "%s: update mcast hash table 0x%08x 0x%08x\n",
1462 dev->name, multicast_table[0], multicast_table[1]);
1463 SMC_SET_HASHL(multicast_table[0]);
1464 SMC_SET_HASHH(multicast_table[1]);
1465 }
1466 spin_unlock_irqrestore(&lp->lock, flags);
1467 }
1468
1469
1470 /*
1471 * Open and Initialize the board
1472 *
1473 * Set up everything, reset the card, etc..
1474 */
1475 static int
1476 smc911x_open(struct net_device *dev)
1477 {
1478 struct smc911x_local *lp = netdev_priv(dev);
1479
1480 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1481
1482 /*
1483 * Check that the address is valid. If its not, refuse
1484 * to bring the device up. The user must specify an
1485 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1486 */
1487 if (!is_valid_ether_addr(dev->dev_addr)) {
1488 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1489 return -EINVAL;
1490 }
1491
1492 /* reset the hardware */
1493 smc911x_reset(dev);
1494
1495 /* Configure the PHY, initialize the link state */
1496 smc911x_phy_configure(&lp->phy_configure);
1497
1498 /* Turn on Tx + Rx */
1499 smc911x_enable(dev);
1500
1501 netif_start_queue(dev);
1502
1503 return 0;
1504 }
1505
1506 /*
1507 * smc911x_close
1508 *
1509 * this makes the board clean up everything that it can
1510 * and not talk to the outside world. Caused by
1511 * an 'ifconfig ethX down'
1512 */
1513 static int smc911x_close(struct net_device *dev)
1514 {
1515 struct smc911x_local *lp = netdev_priv(dev);
1516
1517 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1518
1519 netif_stop_queue(dev);
1520 netif_carrier_off(dev);
1521
1522 /* clear everything */
1523 smc911x_shutdown(dev);
1524
1525 if (lp->phy_type != 0) {
1526 /* We need to ensure that no calls to
1527 * smc911x_phy_configure are pending.
1528 */
1529 cancel_work_sync(&lp->phy_configure);
1530 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1531 }
1532
1533 if (lp->pending_tx_skb) {
1534 dev_kfree_skb(lp->pending_tx_skb);
1535 lp->pending_tx_skb = NULL;
1536 }
1537
1538 return 0;
1539 }
1540
1541 /*
1542 * Ethtool support
1543 */
1544 static int
1545 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1546 {
1547 struct smc911x_local *lp = netdev_priv(dev);
1548 unsigned long ioaddr = dev->base_addr;
1549 int ret, status;
1550 unsigned long flags;
1551
1552 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1553 cmd->maxtxpkt = 1;
1554 cmd->maxrxpkt = 1;
1555
1556 if (lp->phy_type != 0) {
1557 spin_lock_irqsave(&lp->lock, flags);
1558 ret = mii_ethtool_gset(&lp->mii, cmd);
1559 spin_unlock_irqrestore(&lp->lock, flags);
1560 } else {
1561 cmd->supported = SUPPORTED_10baseT_Half |
1562 SUPPORTED_10baseT_Full |
1563 SUPPORTED_TP | SUPPORTED_AUI;
1564
1565 if (lp->ctl_rspeed == 10)
1566 cmd->speed = SPEED_10;
1567 else if (lp->ctl_rspeed == 100)
1568 cmd->speed = SPEED_100;
1569
1570 cmd->autoneg = AUTONEG_DISABLE;
1571 if (lp->mii.phy_id==1)
1572 cmd->transceiver = XCVR_INTERNAL;
1573 else
1574 cmd->transceiver = XCVR_EXTERNAL;
1575 cmd->port = 0;
1576 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1577 cmd->duplex =
1578 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1579 DUPLEX_FULL : DUPLEX_HALF;
1580 ret = 0;
1581 }
1582
1583 return ret;
1584 }
1585
1586 static int
1587 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1588 {
1589 struct smc911x_local *lp = netdev_priv(dev);
1590 int ret;
1591 unsigned long flags;
1592
1593 if (lp->phy_type != 0) {
1594 spin_lock_irqsave(&lp->lock, flags);
1595 ret = mii_ethtool_sset(&lp->mii, cmd);
1596 spin_unlock_irqrestore(&lp->lock, flags);
1597 } else {
1598 if (cmd->autoneg != AUTONEG_DISABLE ||
1599 cmd->speed != SPEED_10 ||
1600 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1601 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1602 return -EINVAL;
1603
1604 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1605
1606 ret = 0;
1607 }
1608
1609 return ret;
1610 }
1611
1612 static void
1613 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1614 {
1615 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1616 strncpy(info->version, version, sizeof(info->version));
1617 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1618 }
1619
1620 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1621 {
1622 struct smc911x_local *lp = netdev_priv(dev);
1623 int ret = -EINVAL;
1624 unsigned long flags;
1625
1626 if (lp->phy_type != 0) {
1627 spin_lock_irqsave(&lp->lock, flags);
1628 ret = mii_nway_restart(&lp->mii);
1629 spin_unlock_irqrestore(&lp->lock, flags);
1630 }
1631
1632 return ret;
1633 }
1634
1635 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1636 {
1637 struct smc911x_local *lp = netdev_priv(dev);
1638 return lp->msg_enable;
1639 }
1640
1641 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1642 {
1643 struct smc911x_local *lp = netdev_priv(dev);
1644 lp->msg_enable = level;
1645 }
1646
1647 static int smc911x_ethtool_getregslen(struct net_device *dev)
1648 {
1649 /* System regs + MAC regs + PHY regs */
1650 return (((E2P_CMD - ID_REV)/4 + 1) +
1651 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1652 }
1653
1654 static void smc911x_ethtool_getregs(struct net_device *dev,
1655 struct ethtool_regs* regs, void *buf)
1656 {
1657 unsigned long ioaddr = dev->base_addr;
1658 struct smc911x_local *lp = netdev_priv(dev);
1659 unsigned long flags;
1660 u32 reg,i,j=0;
1661 u32 *data = (u32*)buf;
1662
1663 regs->version = lp->version;
1664 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1665 data[j++] = SMC_inl(ioaddr,i);
1666 }
1667 for(i=MAC_CR;i<=WUCSR;i++) {
1668 spin_lock_irqsave(&lp->lock, flags);
1669 SMC_GET_MAC_CSR(i, reg);
1670 spin_unlock_irqrestore(&lp->lock, flags);
1671 data[j++] = reg;
1672 }
1673 for(i=0;i<=31;i++) {
1674 spin_lock_irqsave(&lp->lock, flags);
1675 SMC_GET_MII(i, lp->mii.phy_id, reg);
1676 spin_unlock_irqrestore(&lp->lock, flags);
1677 data[j++] = reg & 0xFFFF;
1678 }
1679 }
1680
1681 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1682 {
1683 unsigned long ioaddr = dev->base_addr;
1684 unsigned int timeout;
1685 int e2p_cmd;
1686
1687 e2p_cmd = SMC_GET_E2P_CMD();
1688 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1689 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1690 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1691 dev->name, __FUNCTION__);
1692 return -EFAULT;
1693 }
1694 mdelay(1);
1695 e2p_cmd = SMC_GET_E2P_CMD();
1696 }
1697 if (timeout == 0) {
1698 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1699 dev->name, __FUNCTION__);
1700 return -ETIMEDOUT;
1701 }
1702 return 0;
1703 }
1704
1705 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1706 int cmd, int addr)
1707 {
1708 unsigned long ioaddr = dev->base_addr;
1709 int ret;
1710
1711 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1712 return ret;
1713 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1714 ((cmd) & (0x7<<28)) |
1715 ((addr) & 0xFF));
1716 return 0;
1717 }
1718
1719 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1720 u8 *data)
1721 {
1722 unsigned long ioaddr = dev->base_addr;
1723 int ret;
1724
1725 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1726 return ret;
1727 *data = SMC_GET_E2P_DATA();
1728 return 0;
1729 }
1730
1731 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1732 u8 data)
1733 {
1734 unsigned long ioaddr = dev->base_addr;
1735 int ret;
1736
1737 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1738 return ret;
1739 SMC_SET_E2P_DATA(data);
1740 return 0;
1741 }
1742
1743 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1744 struct ethtool_eeprom *eeprom, u8 *data)
1745 {
1746 u8 eebuf[SMC911X_EEPROM_LEN];
1747 int i, ret;
1748
1749 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1750 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1751 return ret;
1752 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1753 return ret;
1754 }
1755 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1756 return 0;
1757 }
1758
1759 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1760 struct ethtool_eeprom *eeprom, u8 *data)
1761 {
1762 int i, ret;
1763
1764 /* Enable erase */
1765 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1766 return ret;
1767 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1768 /* erase byte */
1769 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1770 return ret;
1771 /* write byte */
1772 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1773 return ret;
1774 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1775 return ret;
1776 }
1777 return 0;
1778 }
1779
1780 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1781 {
1782 return SMC911X_EEPROM_LEN;
1783 }
1784
1785 static const struct ethtool_ops smc911x_ethtool_ops = {
1786 .get_settings = smc911x_ethtool_getsettings,
1787 .set_settings = smc911x_ethtool_setsettings,
1788 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1789 .get_msglevel = smc911x_ethtool_getmsglevel,
1790 .set_msglevel = smc911x_ethtool_setmsglevel,
1791 .nway_reset = smc911x_ethtool_nwayreset,
1792 .get_link = ethtool_op_get_link,
1793 .get_regs_len = smc911x_ethtool_getregslen,
1794 .get_regs = smc911x_ethtool_getregs,
1795 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1796 .get_eeprom = smc911x_ethtool_geteeprom,
1797 .set_eeprom = smc911x_ethtool_seteeprom,
1798 };
1799
1800 /*
1801 * smc911x_findirq
1802 *
1803 * This routine has a simple purpose -- make the SMC chip generate an
1804 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1805 */
1806 static int __init smc911x_findirq(unsigned long ioaddr)
1807 {
1808 int timeout = 20;
1809 unsigned long cookie;
1810
1811 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1812
1813 cookie = probe_irq_on();
1814
1815 /*
1816 * Force a SW interrupt
1817 */
1818
1819 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1820
1821 /*
1822 * Wait until positive that the interrupt has been generated
1823 */
1824 do {
1825 int int_status;
1826 udelay(10);
1827 int_status = SMC_GET_INT_EN();
1828 if (int_status & INT_EN_SW_INT_EN_)
1829 break; /* got the interrupt */
1830 } while (--timeout);
1831
1832 /*
1833 * there is really nothing that I can do here if timeout fails,
1834 * as autoirq_report will return a 0 anyway, which is what I
1835 * want in this case. Plus, the clean up is needed in both
1836 * cases.
1837 */
1838
1839 /* and disable all interrupts again */
1840 SMC_SET_INT_EN(0);
1841
1842 /* and return what I found */
1843 return probe_irq_off(cookie);
1844 }
1845
1846 /*
1847 * Function: smc911x_probe(unsigned long ioaddr)
1848 *
1849 * Purpose:
1850 * Tests to see if a given ioaddr points to an SMC911x chip.
1851 * Returns a 0 on success
1852 *
1853 * Algorithm:
1854 * (1) see if the endian word is OK
1855 * (1) see if I recognize the chip ID in the appropriate register
1856 *
1857 * Here I do typical initialization tasks.
1858 *
1859 * o Initialize the structure if needed
1860 * o print out my vanity message if not done so already
1861 * o print out what type of hardware is detected
1862 * o print out the ethernet address
1863 * o find the IRQ
1864 * o set up my private data
1865 * o configure the dev structure with my subroutines
1866 * o actually GRAB the irq.
1867 * o GRAB the region
1868 */
1869 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1870 {
1871 struct smc911x_local *lp = netdev_priv(dev);
1872 int i, retval;
1873 unsigned int val, chip_id, revision;
1874 const char *version_string;
1875
1876 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1877
1878 /* First, see if the endian word is recognized */
1879 val = SMC_GET_BYTE_TEST();
1880 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1881 if (val != 0x87654321) {
1882 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1883 retval = -ENODEV;
1884 goto err_out;
1885 }
1886
1887 /*
1888 * check if the revision register is something that I
1889 * recognize. These might need to be added to later,
1890 * as future revisions could be added.
1891 */
1892 chip_id = SMC_GET_PN();
1893 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1894 for(i=0;chip_ids[i].id != 0; i++) {
1895 if (chip_ids[i].id == chip_id) break;
1896 }
1897 if (!chip_ids[i].id) {
1898 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1899 retval = -ENODEV;
1900 goto err_out;
1901 }
1902 version_string = chip_ids[i].name;
1903
1904 revision = SMC_GET_REV();
1905 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1906
1907 /* At this point I'll assume that the chip is an SMC911x. */
1908 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1909
1910 /* Validate the TX FIFO size requested */
1911 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1912 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1913 retval = -EINVAL;
1914 goto err_out;
1915 }
1916
1917 /* fill in some of the fields */
1918 dev->base_addr = ioaddr;
1919 lp->version = chip_ids[i].id;
1920 lp->revision = revision;
1921 lp->tx_fifo_kb = tx_fifo_kb;
1922 /* Reverse calculate the RX FIFO size from the TX */
1923 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1924 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1925
1926 /* Set the automatic flow control values */
1927 switch(lp->tx_fifo_kb) {
1928 /*
1929 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1930 * AFC_LO is AFC_HI/2
1931 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1932 */
1933 case 2:/* 13440 Rx Data Fifo Size */
1934 lp->afc_cfg=0x008C46AF;break;
1935 case 3:/* 12480 Rx Data Fifo Size */
1936 lp->afc_cfg=0x0082419F;break;
1937 case 4:/* 11520 Rx Data Fifo Size */
1938 lp->afc_cfg=0x00783C9F;break;
1939 case 5:/* 10560 Rx Data Fifo Size */
1940 lp->afc_cfg=0x006E374F;break;
1941 case 6:/* 9600 Rx Data Fifo Size */
1942 lp->afc_cfg=0x0064328F;break;
1943 case 7:/* 8640 Rx Data Fifo Size */
1944 lp->afc_cfg=0x005A2D7F;break;
1945 case 8:/* 7680 Rx Data Fifo Size */
1946 lp->afc_cfg=0x0050287F;break;
1947 case 9:/* 6720 Rx Data Fifo Size */
1948 lp->afc_cfg=0x0046236F;break;
1949 case 10:/* 5760 Rx Data Fifo Size */
1950 lp->afc_cfg=0x003C1E6F;break;
1951 case 11:/* 4800 Rx Data Fifo Size */
1952 lp->afc_cfg=0x0032195F;break;
1953 /*
1954 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1955 * AFC_LO is AFC_HI/2
1956 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1957 */
1958 case 12:/* 3840 Rx Data Fifo Size */
1959 lp->afc_cfg=0x0024124F;break;
1960 case 13:/* 2880 Rx Data Fifo Size */
1961 lp->afc_cfg=0x0015073F;break;
1962 case 14:/* 1920 Rx Data Fifo Size */
1963 lp->afc_cfg=0x0006032F;break;
1964 default:
1965 PRINTK("%s: ERROR -- no AFC_CFG setting found",
1966 dev->name);
1967 break;
1968 }
1969
1970 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1971 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1972 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1973
1974 spin_lock_init(&lp->lock);
1975
1976 /* Get the MAC address */
1977 SMC_GET_MAC_ADDR(dev->dev_addr);
1978
1979 /* now, reset the chip, and put it into a known state */
1980 smc911x_reset(dev);
1981
1982 /*
1983 * If dev->irq is 0, then the device has to be banged on to see
1984 * what the IRQ is.
1985 *
1986 * Specifying an IRQ is done with the assumption that the user knows
1987 * what (s)he is doing. No checking is done!!!!
1988 */
1989 if (dev->irq < 1) {
1990 int trials;
1991
1992 trials = 3;
1993 while (trials--) {
1994 dev->irq = smc911x_findirq(ioaddr);
1995 if (dev->irq)
1996 break;
1997 /* kick the card and try again */
1998 smc911x_reset(dev);
1999 }
2000 }
2001 if (dev->irq == 0) {
2002 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2003 dev->name);
2004 retval = -ENODEV;
2005 goto err_out;
2006 }
2007 dev->irq = irq_canonicalize(dev->irq);
2008
2009 /* Fill in the fields of the device structure with ethernet values. */
2010 ether_setup(dev);
2011
2012 dev->open = smc911x_open;
2013 dev->stop = smc911x_close;
2014 dev->hard_start_xmit = smc911x_hard_start_xmit;
2015 dev->tx_timeout = smc911x_timeout;
2016 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2017 dev->set_multicast_list = smc911x_set_multicast_list;
2018 dev->ethtool_ops = &smc911x_ethtool_ops;
2019 #ifdef CONFIG_NET_POLL_CONTROLLER
2020 dev->poll_controller = smc911x_poll_controller;
2021 #endif
2022
2023 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
2024 lp->mii.phy_id_mask = 0x1f;
2025 lp->mii.reg_num_mask = 0x1f;
2026 lp->mii.force_media = 0;
2027 lp->mii.full_duplex = 0;
2028 lp->mii.dev = dev;
2029 lp->mii.mdio_read = smc911x_phy_read;
2030 lp->mii.mdio_write = smc911x_phy_write;
2031
2032 /*
2033 * Locate the phy, if any.
2034 */
2035 smc911x_phy_detect(dev);
2036
2037 /* Set default parameters */
2038 lp->msg_enable = NETIF_MSG_LINK;
2039 lp->ctl_rfduplx = 1;
2040 lp->ctl_rspeed = 100;
2041
2042 /* Grab the IRQ */
2043 retval = request_irq(dev->irq, &smc911x_interrupt,
2044 IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev);
2045 if (retval)
2046 goto err_out;
2047
2048 #ifdef SMC_USE_DMA
2049 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2050 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2051 lp->rxdma_active = 0;
2052 lp->txdma_active = 0;
2053 dev->dma = lp->rxdma;
2054 #endif
2055
2056 retval = register_netdev(dev);
2057 if (retval == 0) {
2058 /* now, print out the card info, in a short format.. */
2059 printk("%s: %s (rev %d) at %#lx IRQ %d",
2060 dev->name, version_string, lp->revision,
2061 dev->base_addr, dev->irq);
2062
2063 #ifdef SMC_USE_DMA
2064 if (lp->rxdma != -1)
2065 printk(" RXDMA %d ", lp->rxdma);
2066
2067 if (lp->txdma != -1)
2068 printk("TXDMA %d", lp->txdma);
2069 #endif
2070 printk("\n");
2071 if (!is_valid_ether_addr(dev->dev_addr)) {
2072 printk("%s: Invalid ethernet MAC address. Please "
2073 "set using ifconfig\n", dev->name);
2074 } else {
2075 /* Print the Ethernet address */
2076 printk("%s: Ethernet addr: ", dev->name);
2077 for (i = 0; i < 5; i++)
2078 printk("%2.2x:", dev->dev_addr[i]);
2079 printk("%2.2x\n", dev->dev_addr[5]);
2080 }
2081
2082 if (lp->phy_type == 0) {
2083 PRINTK("%s: No PHY found\n", dev->name);
2084 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2085 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2086 } else {
2087 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2088 }
2089 }
2090
2091 err_out:
2092 #ifdef SMC_USE_DMA
2093 if (retval) {
2094 if (lp->rxdma != -1) {
2095 SMC_DMA_FREE(dev, lp->rxdma);
2096 }
2097 if (lp->txdma != -1) {
2098 SMC_DMA_FREE(dev, lp->txdma);
2099 }
2100 }
2101 #endif
2102 return retval;
2103 }
2104
2105 /*
2106 * smc911x_init(void)
2107 *
2108 * Output:
2109 * 0 --> there is a device
2110 * anything else, error
2111 */
2112 static int smc911x_drv_probe(struct platform_device *pdev)
2113 {
2114 struct net_device *ndev;
2115 struct resource *res;
2116 struct smc911x_local *lp;
2117 unsigned int *addr;
2118 int ret;
2119
2120 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2121 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2122 if (!res) {
2123 ret = -ENODEV;
2124 goto out;
2125 }
2126
2127 /*
2128 * Request the regions.
2129 */
2130 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2131 ret = -EBUSY;
2132 goto out;
2133 }
2134
2135 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2136 if (!ndev) {
2137 printk("%s: could not allocate device.\n", CARDNAME);
2138 ret = -ENOMEM;
2139 goto release_1;
2140 }
2141 SET_NETDEV_DEV(ndev, &pdev->dev);
2142
2143 ndev->dma = (unsigned char)-1;
2144 ndev->irq = platform_get_irq(pdev, 0);
2145 lp = netdev_priv(ndev);
2146 lp->netdev = ndev;
2147
2148 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2149 if (!addr) {
2150 ret = -ENOMEM;
2151 goto release_both;
2152 }
2153
2154 platform_set_drvdata(pdev, ndev);
2155 ret = smc911x_probe(ndev, (unsigned long)addr);
2156 if (ret != 0) {
2157 platform_set_drvdata(pdev, NULL);
2158 iounmap(addr);
2159 release_both:
2160 free_netdev(ndev);
2161 release_1:
2162 release_mem_region(res->start, SMC911X_IO_EXTENT);
2163 out:
2164 printk("%s: not found (%d).\n", CARDNAME, ret);
2165 }
2166 #ifdef SMC_USE_DMA
2167 else {
2168 lp->physaddr = res->start;
2169 lp->dev = &pdev->dev;
2170 }
2171 #endif
2172
2173 return ret;
2174 }
2175
2176 static int smc911x_drv_remove(struct platform_device *pdev)
2177 {
2178 struct net_device *ndev = platform_get_drvdata(pdev);
2179 struct resource *res;
2180
2181 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2182 platform_set_drvdata(pdev, NULL);
2183
2184 unregister_netdev(ndev);
2185
2186 free_irq(ndev->irq, ndev);
2187
2188 #ifdef SMC_USE_DMA
2189 {
2190 struct smc911x_local *lp = netdev_priv(ndev);
2191 if (lp->rxdma != -1) {
2192 SMC_DMA_FREE(dev, lp->rxdma);
2193 }
2194 if (lp->txdma != -1) {
2195 SMC_DMA_FREE(dev, lp->txdma);
2196 }
2197 }
2198 #endif
2199 iounmap((void *)ndev->base_addr);
2200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2201 release_mem_region(res->start, SMC911X_IO_EXTENT);
2202
2203 free_netdev(ndev);
2204 return 0;
2205 }
2206
2207 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2208 {
2209 struct net_device *ndev = platform_get_drvdata(dev);
2210 unsigned long ioaddr = ndev->base_addr;
2211
2212 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2213 if (ndev) {
2214 if (netif_running(ndev)) {
2215 netif_device_detach(ndev);
2216 smc911x_shutdown(ndev);
2217 #if POWER_DOWN
2218 /* Set D2 - Energy detect only setting */
2219 SMC_SET_PMT_CTRL(2<<12);
2220 #endif
2221 }
2222 }
2223 return 0;
2224 }
2225
2226 static int smc911x_drv_resume(struct platform_device *dev)
2227 {
2228 struct net_device *ndev = platform_get_drvdata(dev);
2229
2230 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2231 if (ndev) {
2232 struct smc911x_local *lp = netdev_priv(ndev);
2233
2234 if (netif_running(ndev)) {
2235 smc911x_reset(ndev);
2236 smc911x_enable(ndev);
2237 if (lp->phy_type != 0)
2238 smc911x_phy_configure(&lp->phy_configure);
2239 netif_device_attach(ndev);
2240 }
2241 }
2242 return 0;
2243 }
2244
2245 static struct platform_driver smc911x_driver = {
2246 .probe = smc911x_drv_probe,
2247 .remove = smc911x_drv_remove,
2248 .suspend = smc911x_drv_suspend,
2249 .resume = smc911x_drv_resume,
2250 .driver = {
2251 .name = CARDNAME,
2252 .owner = THIS_MODULE,
2253 },
2254 };
2255
2256 static int __init smc911x_init(void)
2257 {
2258 return platform_driver_register(&smc911x_driver);
2259 }
2260
2261 static void __exit smc911x_cleanup(void)
2262 {
2263 platform_driver_unregister(&smc911x_driver);
2264 }
2265
2266 module_init(smc911x_init);
2267 module_exit(smc911x_cleanup);
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