header cleaning: don't include smp_lock.h when not used
[linux-2.6/kmemtrace.git] / arch / ia64 / kernel / smpboot.c
bloba44792d0f3a97aadb215c60a841b21fb285aa22a
1 /*
2 * SMP boot-related support
4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * Copyright (C) 2001, 2004-2005 Intel Corp
7 * Rohit Seth <rohit.seth@intel.com>
8 * Suresh Siddha <suresh.b.siddha@intel.com>
9 * Gordon Jin <gordon.jin@intel.com>
10 * Ashok Raj <ashok.raj@intel.com>
12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15 * smp_boot_cpus()/smp_commence() is replaced by
16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
18 * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19 * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20 * Add multi-threading and multi-core detection
21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22 * Setup cpu_sibling_map and cpu_core_map
25 #include <linux/module.h>
26 #include <linux/acpi.h>
27 #include <linux/bootmem.h>
28 #include <linux/cpu.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/irq.h>
33 #include <linux/kernel.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/mm.h>
36 #include <linux/notifier.h>
37 #include <linux/smp.h>
38 #include <linux/spinlock.h>
39 #include <linux/efi.h>
40 #include <linux/percpu.h>
41 #include <linux/bitops.h>
43 #include <asm/atomic.h>
44 #include <asm/cache.h>
45 #include <asm/current.h>
46 #include <asm/delay.h>
47 #include <asm/ia32.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/machvec.h>
51 #include <asm/mca.h>
52 #include <asm/page.h>
53 #include <asm/pgalloc.h>
54 #include <asm/pgtable.h>
55 #include <asm/processor.h>
56 #include <asm/ptrace.h>
57 #include <asm/sal.h>
58 #include <asm/system.h>
59 #include <asm/tlbflush.h>
60 #include <asm/unistd.h>
62 #define SMP_DEBUG 0
64 #if SMP_DEBUG
65 #define Dprintk(x...) printk(x)
66 #else
67 #define Dprintk(x...)
68 #endif
70 #ifdef CONFIG_HOTPLUG_CPU
71 #ifdef CONFIG_PERMIT_BSP_REMOVE
72 #define bsp_remove_ok 1
73 #else
74 #define bsp_remove_ok 0
75 #endif
78 * Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
80 * for idle threads.
82 struct task_struct *idle_thread_array[NR_CPUS];
85 * Global array allocated for NR_CPUS at boot time
87 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
90 * start_ap in head.S uses this to store current booting cpu
91 * info.
93 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
95 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
97 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
98 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
100 #else
102 #define get_idle_for_cpu(x) (NULL)
103 #define set_idle_for_cpu(x,p)
104 #define set_brendez_area(x)
105 #endif
109 * ITC synchronization related stuff:
111 #define MASTER (0)
112 #define SLAVE (SMP_CACHE_BYTES/8)
114 #define NUM_ROUNDS 64 /* magic value */
115 #define NUM_ITERS 5 /* likewise */
117 static DEFINE_SPINLOCK(itc_sync_lock);
118 static volatile unsigned long go[SLAVE + 1];
120 #define DEBUG_ITC_SYNC 0
122 extern void __devinit calibrate_delay (void);
123 extern void start_ap (void);
124 extern unsigned long ia64_iobase;
126 struct task_struct *task_for_booting_cpu;
129 * State for each CPU
131 DEFINE_PER_CPU(int, cpu_state);
133 /* Bitmasks of currently online, and possible CPUs */
134 cpumask_t cpu_online_map;
135 EXPORT_SYMBOL(cpu_online_map);
136 cpumask_t cpu_possible_map = CPU_MASK_NONE;
137 EXPORT_SYMBOL(cpu_possible_map);
139 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
140 cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
141 int smp_num_siblings = 1;
142 int smp_num_cpucores = 1;
144 /* which logical CPU number maps to which CPU (physical APIC ID) */
145 volatile int ia64_cpu_to_sapicid[NR_CPUS];
146 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
148 static volatile cpumask_t cpu_callin_map;
150 struct smp_boot_data smp_boot_data __initdata;
152 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
154 char __initdata no_int_routing;
156 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
158 #ifdef CONFIG_FORCE_CPEI_RETARGET
159 #define CPEI_OVERRIDE_DEFAULT (1)
160 #else
161 #define CPEI_OVERRIDE_DEFAULT (0)
162 #endif
164 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
166 static int __init
167 cmdl_force_cpei(char *str)
169 int value=0;
171 get_option (&str, &value);
172 force_cpei_retarget = value;
174 return 1;
177 __setup("force_cpei=", cmdl_force_cpei);
179 static int __init
180 nointroute (char *str)
182 no_int_routing = 1;
183 printk ("no_int_routing on\n");
184 return 1;
187 __setup("nointroute", nointroute);
189 static void fix_b0_for_bsp(void)
191 #ifdef CONFIG_HOTPLUG_CPU
192 int cpuid;
193 static int fix_bsp_b0 = 1;
195 cpuid = smp_processor_id();
198 * Cache the b0 value on the first AP that comes up
200 if (!(fix_bsp_b0 && cpuid))
201 return;
203 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
204 printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
206 fix_bsp_b0 = 0;
207 #endif
210 void
211 sync_master (void *arg)
213 unsigned long flags, i;
215 go[MASTER] = 0;
217 local_irq_save(flags);
219 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
220 while (!go[MASTER])
221 cpu_relax();
222 go[MASTER] = 0;
223 go[SLAVE] = ia64_get_itc();
226 local_irq_restore(flags);
230 * Return the number of cycles by which our itc differs from the itc on the master
231 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
232 * negative that it is behind.
234 static inline long
235 get_delta (long *rt, long *master)
237 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
238 unsigned long tcenter, t0, t1, tm;
239 long i;
241 for (i = 0; i < NUM_ITERS; ++i) {
242 t0 = ia64_get_itc();
243 go[MASTER] = 1;
244 while (!(tm = go[SLAVE]))
245 cpu_relax();
246 go[SLAVE] = 0;
247 t1 = ia64_get_itc();
249 if (t1 - t0 < best_t1 - best_t0)
250 best_t0 = t0, best_t1 = t1, best_tm = tm;
253 *rt = best_t1 - best_t0;
254 *master = best_tm - best_t0;
256 /* average best_t0 and best_t1 without overflow: */
257 tcenter = (best_t0/2 + best_t1/2);
258 if (best_t0 % 2 + best_t1 % 2 == 2)
259 ++tcenter;
260 return tcenter - best_tm;
264 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
265 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
266 * unaccounted-for errors (such as getting a machine check in the middle of a calibration
267 * step). The basic idea is for the slave to ask the master what itc value it has and to
268 * read its own itc before and after the master responds. Each iteration gives us three
269 * timestamps:
271 * slave master
273 * t0 ---\
274 * ---\
275 * --->
276 * tm
277 * /---
278 * /---
279 * t1 <---
282 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
283 * and t1. If we achieve this, the clocks are synchronized provided the interconnect
284 * between the slave and the master is symmetric. Even if the interconnect were
285 * asymmetric, we would still know that the synchronization error is smaller than the
286 * roundtrip latency (t0 - t1).
288 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
289 * within one or two cycles. However, we can only *guarantee* that the synchronization is
290 * accurate to within a round-trip time, which is typically in the range of several
291 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
292 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
293 * than half a micro second or so.
295 void
296 ia64_sync_itc (unsigned int master)
298 long i, delta, adj, adjust_latency = 0, done = 0;
299 unsigned long flags, rt, master_time_stamp, bound;
300 #if DEBUG_ITC_SYNC
301 struct {
302 long rt; /* roundtrip time */
303 long master; /* master's timestamp */
304 long diff; /* difference between midpoint and master's timestamp */
305 long lat; /* estimate of itc adjustment latency */
306 } t[NUM_ROUNDS];
307 #endif
310 * Make sure local timer ticks are disabled while we sync. If
311 * they were enabled, we'd have to worry about nasty issues
312 * like setting the ITC ahead of (or a long time before) the
313 * next scheduled tick.
315 BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
317 go[MASTER] = 1;
319 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
320 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
321 return;
324 while (go[MASTER])
325 cpu_relax(); /* wait for master to be ready */
327 spin_lock_irqsave(&itc_sync_lock, flags);
329 for (i = 0; i < NUM_ROUNDS; ++i) {
330 delta = get_delta(&rt, &master_time_stamp);
331 if (delta == 0) {
332 done = 1; /* let's lock on to this... */
333 bound = rt;
336 if (!done) {
337 if (i > 0) {
338 adjust_latency += -delta;
339 adj = -delta + adjust_latency/4;
340 } else
341 adj = -delta;
343 ia64_set_itc(ia64_get_itc() + adj);
345 #if DEBUG_ITC_SYNC
346 t[i].rt = rt;
347 t[i].master = master_time_stamp;
348 t[i].diff = delta;
349 t[i].lat = adjust_latency/4;
350 #endif
353 spin_unlock_irqrestore(&itc_sync_lock, flags);
355 #if DEBUG_ITC_SYNC
356 for (i = 0; i < NUM_ROUNDS; ++i)
357 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
358 t[i].rt, t[i].master, t[i].diff, t[i].lat);
359 #endif
361 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
362 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
366 * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
368 static inline void __devinit
369 smp_setup_percpu_timer (void)
373 static void __devinit
374 smp_callin (void)
376 int cpuid, phys_id, itc_master;
377 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
378 extern void ia64_init_itm(void);
379 extern volatile int time_keeper_id;
381 #ifdef CONFIG_PERFMON
382 extern void pfm_init_percpu(void);
383 #endif
385 cpuid = smp_processor_id();
386 phys_id = hard_smp_processor_id();
387 itc_master = time_keeper_id;
389 if (cpu_online(cpuid)) {
390 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
391 phys_id, cpuid);
392 BUG();
395 fix_b0_for_bsp();
397 lock_ipi_calllock();
398 cpu_set(cpuid, cpu_online_map);
399 unlock_ipi_calllock();
400 per_cpu(cpu_state, cpuid) = CPU_ONLINE;
402 smp_setup_percpu_timer();
404 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
406 #ifdef CONFIG_PERFMON
407 pfm_init_percpu();
408 #endif
410 local_irq_enable();
412 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
414 * Synchronize the ITC with the BP. Need to do this after irqs are
415 * enabled because ia64_sync_itc() calls smp_call_function_single(), which
416 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
417 * local_bh_enable(), which bugs out if irqs are not enabled...
419 Dprintk("Going to syncup ITC with ITC Master.\n");
420 ia64_sync_itc(itc_master);
424 * Get our bogomips.
426 ia64_init_itm();
429 * Delay calibration can be skipped if new processor is identical to the
430 * previous processor.
432 last_cpuinfo = cpu_data(cpuid - 1);
433 this_cpuinfo = local_cpu_data;
434 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
435 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
436 last_cpuinfo->features != this_cpuinfo->features ||
437 last_cpuinfo->revision != this_cpuinfo->revision ||
438 last_cpuinfo->family != this_cpuinfo->family ||
439 last_cpuinfo->archrev != this_cpuinfo->archrev ||
440 last_cpuinfo->model != this_cpuinfo->model)
441 calibrate_delay();
442 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
444 #ifdef CONFIG_IA32_SUPPORT
445 ia32_gdt_init();
446 #endif
449 * Allow the master to continue.
451 cpu_set(cpuid, cpu_callin_map);
452 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
457 * Activate a secondary processor. head.S calls this.
459 int __devinit
460 start_secondary (void *unused)
462 /* Early console may use I/O ports */
463 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
464 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
465 efi_map_pal_code();
466 cpu_init();
467 preempt_disable();
468 smp_callin();
470 cpu_idle();
471 return 0;
474 struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
476 return NULL;
479 struct create_idle {
480 struct work_struct work;
481 struct task_struct *idle;
482 struct completion done;
483 int cpu;
486 void
487 do_fork_idle(struct work_struct *work)
489 struct create_idle *c_idle =
490 container_of(work, struct create_idle, work);
492 c_idle->idle = fork_idle(c_idle->cpu);
493 complete(&c_idle->done);
496 static int __devinit
497 do_boot_cpu (int sapicid, int cpu)
499 int timeout;
500 struct create_idle c_idle = {
501 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
502 .cpu = cpu,
503 .done = COMPLETION_INITIALIZER(c_idle.done),
506 c_idle.idle = get_idle_for_cpu(cpu);
507 if (c_idle.idle) {
508 init_idle(c_idle.idle, cpu);
509 goto do_rest;
513 * We can't use kernel_thread since we must avoid to reschedule the child.
515 if (!keventd_up() || current_is_keventd())
516 c_idle.work.func(&c_idle.work);
517 else {
518 schedule_work(&c_idle.work);
519 wait_for_completion(&c_idle.done);
522 if (IS_ERR(c_idle.idle))
523 panic("failed fork for CPU %d", cpu);
525 set_idle_for_cpu(cpu, c_idle.idle);
527 do_rest:
528 task_for_booting_cpu = c_idle.idle;
530 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
532 set_brendez_area(cpu);
533 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
536 * Wait 10s total for the AP to start
538 Dprintk("Waiting on callin_map ...");
539 for (timeout = 0; timeout < 100000; timeout++) {
540 if (cpu_isset(cpu, cpu_callin_map))
541 break; /* It has booted */
542 udelay(100);
544 Dprintk("\n");
546 if (!cpu_isset(cpu, cpu_callin_map)) {
547 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
548 ia64_cpu_to_sapicid[cpu] = -1;
549 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */
550 return -EINVAL;
552 return 0;
555 static int __init
556 decay (char *str)
558 int ticks;
559 get_option (&str, &ticks);
560 return 1;
563 __setup("decay=", decay);
566 * Initialize the logical CPU number to SAPICID mapping
568 void __init
569 smp_build_cpu_map (void)
571 int sapicid, cpu, i;
572 int boot_cpu_id = hard_smp_processor_id();
574 for (cpu = 0; cpu < NR_CPUS; cpu++) {
575 ia64_cpu_to_sapicid[cpu] = -1;
578 ia64_cpu_to_sapicid[0] = boot_cpu_id;
579 cpus_clear(cpu_present_map);
580 cpu_set(0, cpu_present_map);
581 cpu_set(0, cpu_possible_map);
582 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
583 sapicid = smp_boot_data.cpu_phys_id[i];
584 if (sapicid == boot_cpu_id)
585 continue;
586 cpu_set(cpu, cpu_present_map);
587 cpu_set(cpu, cpu_possible_map);
588 ia64_cpu_to_sapicid[cpu] = sapicid;
589 cpu++;
594 * Cycle through the APs sending Wakeup IPIs to boot each.
596 void __init
597 smp_prepare_cpus (unsigned int max_cpus)
599 int boot_cpu_id = hard_smp_processor_id();
602 * Initialize the per-CPU profiling counter/multiplier
605 smp_setup_percpu_timer();
608 * We have the boot CPU online for sure.
610 cpu_set(0, cpu_online_map);
611 cpu_set(0, cpu_callin_map);
613 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
614 ia64_cpu_to_sapicid[0] = boot_cpu_id;
616 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
618 current_thread_info()->cpu = 0;
621 * If SMP should be disabled, then really disable it!
623 if (!max_cpus) {
624 printk(KERN_INFO "SMP mode deactivated.\n");
625 cpus_clear(cpu_online_map);
626 cpus_clear(cpu_present_map);
627 cpus_clear(cpu_possible_map);
628 cpu_set(0, cpu_online_map);
629 cpu_set(0, cpu_present_map);
630 cpu_set(0, cpu_possible_map);
631 return;
635 void __devinit smp_prepare_boot_cpu(void)
637 cpu_set(smp_processor_id(), cpu_online_map);
638 cpu_set(smp_processor_id(), cpu_callin_map);
639 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
642 #ifdef CONFIG_HOTPLUG_CPU
643 static inline void
644 clear_cpu_sibling_map(int cpu)
646 int i;
648 for_each_cpu_mask(i, cpu_sibling_map[cpu])
649 cpu_clear(cpu, cpu_sibling_map[i]);
650 for_each_cpu_mask(i, cpu_core_map[cpu])
651 cpu_clear(cpu, cpu_core_map[i]);
653 cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE;
656 static void
657 remove_siblinginfo(int cpu)
659 int last = 0;
661 if (cpu_data(cpu)->threads_per_core == 1 &&
662 cpu_data(cpu)->cores_per_socket == 1) {
663 cpu_clear(cpu, cpu_core_map[cpu]);
664 cpu_clear(cpu, cpu_sibling_map[cpu]);
665 return;
668 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
670 /* remove it from all sibling map's */
671 clear_cpu_sibling_map(cpu);
674 extern void fixup_irqs(void);
676 int migrate_platform_irqs(unsigned int cpu)
678 int new_cpei_cpu;
679 irq_desc_t *desc = NULL;
680 cpumask_t mask;
681 int retval = 0;
684 * dont permit CPEI target to removed.
686 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
687 printk ("CPU (%d) is CPEI Target\n", cpu);
688 if (can_cpei_retarget()) {
690 * Now re-target the CPEI to a different processor
692 new_cpei_cpu = any_online_cpu(cpu_online_map);
693 mask = cpumask_of_cpu(new_cpei_cpu);
694 set_cpei_target_cpu(new_cpei_cpu);
695 desc = irq_desc + ia64_cpe_irq;
697 * Switch for now, immediatly, we need to do fake intr
698 * as other interrupts, but need to study CPEI behaviour with
699 * polling before making changes.
701 if (desc) {
702 desc->chip->disable(ia64_cpe_irq);
703 desc->chip->set_affinity(ia64_cpe_irq, mask);
704 desc->chip->enable(ia64_cpe_irq);
705 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
708 if (!desc) {
709 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
710 retval = -EBUSY;
713 return retval;
716 /* must be called with cpucontrol mutex held */
717 int __cpu_disable(void)
719 int cpu = smp_processor_id();
722 * dont permit boot processor for now
724 if (cpu == 0 && !bsp_remove_ok) {
725 printk ("Your platform does not support removal of BSP\n");
726 return (-EBUSY);
729 cpu_clear(cpu, cpu_online_map);
731 if (migrate_platform_irqs(cpu)) {
732 cpu_set(cpu, cpu_online_map);
733 return (-EBUSY);
736 remove_siblinginfo(cpu);
737 cpu_clear(cpu, cpu_online_map);
738 fixup_irqs();
739 local_flush_tlb_all();
740 cpu_clear(cpu, cpu_callin_map);
741 return 0;
744 void __cpu_die(unsigned int cpu)
746 unsigned int i;
748 for (i = 0; i < 100; i++) {
749 /* They ack this in play_dead by setting CPU_DEAD */
750 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
752 printk ("CPU %d is now offline\n", cpu);
753 return;
755 msleep(100);
757 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
759 #else /* !CONFIG_HOTPLUG_CPU */
760 int __cpu_disable(void)
762 return -ENOSYS;
765 void __cpu_die(unsigned int cpu)
767 /* We said "no" in __cpu_disable */
768 BUG();
770 #endif /* CONFIG_HOTPLUG_CPU */
772 void
773 smp_cpus_done (unsigned int dummy)
775 int cpu;
776 unsigned long bogosum = 0;
779 * Allow the user to impress friends.
782 for_each_online_cpu(cpu) {
783 bogosum += cpu_data(cpu)->loops_per_jiffy;
786 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
787 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
790 static inline void __devinit
791 set_cpu_sibling_map(int cpu)
793 int i;
795 for_each_online_cpu(i) {
796 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
797 cpu_set(i, cpu_core_map[cpu]);
798 cpu_set(cpu, cpu_core_map[i]);
799 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
800 cpu_set(i, cpu_sibling_map[cpu]);
801 cpu_set(cpu, cpu_sibling_map[i]);
807 int __devinit
808 __cpu_up (unsigned int cpu)
810 int ret;
811 int sapicid;
813 sapicid = ia64_cpu_to_sapicid[cpu];
814 if (sapicid == -1)
815 return -EINVAL;
818 * Already booted cpu? not valid anymore since we dont
819 * do idle loop tightspin anymore.
821 if (cpu_isset(cpu, cpu_callin_map))
822 return -EINVAL;
824 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
825 /* Processor goes to start_secondary(), sets online flag */
826 ret = do_boot_cpu(sapicid, cpu);
827 if (ret < 0)
828 return ret;
830 if (cpu_data(cpu)->threads_per_core == 1 &&
831 cpu_data(cpu)->cores_per_socket == 1) {
832 cpu_set(cpu, cpu_sibling_map[cpu]);
833 cpu_set(cpu, cpu_core_map[cpu]);
834 return 0;
837 set_cpu_sibling_map(cpu);
839 return 0;
843 * Assume that CPU's have been discovered by some platform-dependent interface. For
844 * SoftSDV/Lion, that would be ACPI.
846 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
848 void __init
849 init_smp_config(void)
851 struct fptr {
852 unsigned long fp;
853 unsigned long gp;
854 } *ap_startup;
855 long sal_ret;
857 /* Tell SAL where to drop the AP's. */
858 ap_startup = (struct fptr *) start_ap;
859 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
860 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
861 if (sal_ret < 0)
862 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
863 ia64_sal_strerror(sal_ret));
867 * identify_siblings(cpu) gets called from identify_cpu. This populates the
868 * information related to logical execution units in per_cpu_data structure.
870 void __devinit
871 identify_siblings(struct cpuinfo_ia64 *c)
873 s64 status;
874 u16 pltid;
875 pal_logical_to_physical_t info;
877 if (smp_num_cpucores == 1 && smp_num_siblings == 1)
878 return;
880 if ((status = ia64_pal_logical_to_phys(-1, &info)) != PAL_STATUS_SUCCESS) {
881 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
882 status);
883 return;
885 if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) {
886 printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status);
887 return;
890 c->socket_id = (pltid << 8) | info.overview_ppid;
891 c->cores_per_socket = info.overview_cpp;
892 c->threads_per_core = info.overview_tpc;
893 c->num_log = info.overview_num_log;
895 c->core_id = info.log1_cid;
896 c->thread_id = info.log1_tid;
900 * returns non zero, if multi-threading is enabled
901 * on at least one physical package. Due to hotplug cpu
902 * and (maxcpus=), all threads may not necessarily be enabled
903 * even though the processor supports multi-threading.
905 int is_multithreading_enabled(void)
907 int i, j;
909 for_each_present_cpu(i) {
910 for_each_present_cpu(j) {
911 if (j == i)
912 continue;
913 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
914 if (cpu_data(j)->core_id == cpu_data(i)->core_id)
915 return 1;
919 return 0;
921 EXPORT_SYMBOL_GPL(is_multithreading_enabled);