2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
12 #include <linux/delay.h>
13 #include <linux/highmem.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/protocol.h>
20 #include <asm/scatterlist.h>
24 #define DRIVER_NAME "sdhci"
25 #define DRIVER_VERSION "0.12"
27 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
29 #define DBG(f, x...) \
30 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32 static unsigned int debug_nodma
= 0;
33 static unsigned int debug_forcedma
= 0;
34 static unsigned int debug_quirks
= 0;
36 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
37 #define SDHCI_QUIRK_FORCE_DMA (1<<1)
38 /* Controller doesn't like some resets when there is no card inserted. */
39 #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
40 #define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
42 static const struct pci_device_id pci_ids
[] __devinitdata
= {
44 .vendor
= PCI_VENDOR_ID_RICOH
,
45 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
46 .subvendor
= PCI_VENDOR_ID_IBM
,
47 .subdevice
= PCI_ANY_ID
,
48 .driver_data
= SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
49 SDHCI_QUIRK_FORCE_DMA
,
53 .vendor
= PCI_VENDOR_ID_RICOH
,
54 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
55 .subvendor
= PCI_ANY_ID
,
56 .subdevice
= PCI_ANY_ID
,
57 .driver_data
= SDHCI_QUIRK_FORCE_DMA
|
58 SDHCI_QUIRK_NO_CARD_NO_RESET
,
62 .vendor
= PCI_VENDOR_ID_TI
,
63 .device
= PCI_DEVICE_ID_TI_XX21_XX11_SD
,
64 .subvendor
= PCI_ANY_ID
,
65 .subdevice
= PCI_ANY_ID
,
66 .driver_data
= SDHCI_QUIRK_FORCE_DMA
,
70 .vendor
= PCI_VENDOR_ID_ENE
,
71 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
72 .subvendor
= PCI_ANY_ID
,
73 .subdevice
= PCI_ANY_ID
,
74 .driver_data
= SDHCI_QUIRK_SINGLE_POWER_WRITE
,
77 { /* Generic SD host controller */
78 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
81 { /* end: all zeroes */ },
84 MODULE_DEVICE_TABLE(pci
, pci_ids
);
86 static void sdhci_prepare_data(struct sdhci_host
*, struct mmc_data
*);
87 static void sdhci_finish_data(struct sdhci_host
*);
89 static void sdhci_send_command(struct sdhci_host
*, struct mmc_command
*);
90 static void sdhci_finish_command(struct sdhci_host
*);
92 static void sdhci_dumpregs(struct sdhci_host
*host
)
94 printk(KERN_DEBUG DRIVER_NAME
": ============== REGISTER DUMP ==============\n");
96 printk(KERN_DEBUG DRIVER_NAME
": Sys addr: 0x%08x | Version: 0x%08x\n",
97 readl(host
->ioaddr
+ SDHCI_DMA_ADDRESS
),
98 readw(host
->ioaddr
+ SDHCI_HOST_VERSION
));
99 printk(KERN_DEBUG DRIVER_NAME
": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
100 readw(host
->ioaddr
+ SDHCI_BLOCK_SIZE
),
101 readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
));
102 printk(KERN_DEBUG DRIVER_NAME
": Argument: 0x%08x | Trn mode: 0x%08x\n",
103 readl(host
->ioaddr
+ SDHCI_ARGUMENT
),
104 readw(host
->ioaddr
+ SDHCI_TRANSFER_MODE
));
105 printk(KERN_DEBUG DRIVER_NAME
": Present: 0x%08x | Host ctl: 0x%08x\n",
106 readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
),
107 readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
));
108 printk(KERN_DEBUG DRIVER_NAME
": Power: 0x%08x | Blk gap: 0x%08x\n",
109 readb(host
->ioaddr
+ SDHCI_POWER_CONTROL
),
110 readb(host
->ioaddr
+ SDHCI_BLOCK_GAP_CONTROL
));
111 printk(KERN_DEBUG DRIVER_NAME
": Wake-up: 0x%08x | Clock: 0x%08x\n",
112 readb(host
->ioaddr
+ SDHCI_WALK_UP_CONTROL
),
113 readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
));
114 printk(KERN_DEBUG DRIVER_NAME
": Timeout: 0x%08x | Int stat: 0x%08x\n",
115 readb(host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
),
116 readl(host
->ioaddr
+ SDHCI_INT_STATUS
));
117 printk(KERN_DEBUG DRIVER_NAME
": Int enab: 0x%08x | Sig enab: 0x%08x\n",
118 readl(host
->ioaddr
+ SDHCI_INT_ENABLE
),
119 readl(host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
));
120 printk(KERN_DEBUG DRIVER_NAME
": AC12 err: 0x%08x | Slot int: 0x%08x\n",
121 readw(host
->ioaddr
+ SDHCI_ACMD12_ERR
),
122 readw(host
->ioaddr
+ SDHCI_SLOT_INT_STATUS
));
123 printk(KERN_DEBUG DRIVER_NAME
": Caps: 0x%08x | Max curr: 0x%08x\n",
124 readl(host
->ioaddr
+ SDHCI_CAPABILITIES
),
125 readl(host
->ioaddr
+ SDHCI_MAX_CURRENT
));
127 printk(KERN_DEBUG DRIVER_NAME
": ===========================================\n");
130 /*****************************************************************************\
132 * Low level functions *
134 \*****************************************************************************/
136 static void sdhci_reset(struct sdhci_host
*host
, u8 mask
)
138 unsigned long timeout
;
140 if (host
->chip
->quirks
& SDHCI_QUIRK_NO_CARD_NO_RESET
) {
141 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) &
146 writeb(mask
, host
->ioaddr
+ SDHCI_SOFTWARE_RESET
);
148 if (mask
& SDHCI_RESET_ALL
)
151 /* Wait max 100 ms */
154 /* hw clears the bit when it's done */
155 while (readb(host
->ioaddr
+ SDHCI_SOFTWARE_RESET
) & mask
) {
157 printk(KERN_ERR
"%s: Reset 0x%x never completed. "
158 "Please report this to " BUGMAIL
".\n",
159 mmc_hostname(host
->mmc
), (int)mask
);
160 sdhci_dumpregs(host
);
168 static void sdhci_init(struct sdhci_host
*host
)
172 sdhci_reset(host
, SDHCI_RESET_ALL
);
174 intmask
= SDHCI_INT_BUS_POWER
| SDHCI_INT_DATA_END_BIT
|
175 SDHCI_INT_DATA_CRC
| SDHCI_INT_DATA_TIMEOUT
| SDHCI_INT_INDEX
|
176 SDHCI_INT_END_BIT
| SDHCI_INT_CRC
| SDHCI_INT_TIMEOUT
|
177 SDHCI_INT_CARD_REMOVE
| SDHCI_INT_CARD_INSERT
|
178 SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
|
179 SDHCI_INT_DMA_END
| SDHCI_INT_DATA_END
| SDHCI_INT_RESPONSE
;
181 writel(intmask
, host
->ioaddr
+ SDHCI_INT_ENABLE
);
182 writel(intmask
, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
185 static void sdhci_activate_led(struct sdhci_host
*host
)
189 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
190 ctrl
|= SDHCI_CTRL_LED
;
191 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
194 static void sdhci_deactivate_led(struct sdhci_host
*host
)
198 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
199 ctrl
&= ~SDHCI_CTRL_LED
;
200 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
203 /*****************************************************************************\
207 \*****************************************************************************/
209 static inline char* sdhci_sg_to_buffer(struct sdhci_host
* host
)
211 return page_address(host
->cur_sg
->page
) + host
->cur_sg
->offset
;
214 static inline int sdhci_next_sg(struct sdhci_host
* host
)
217 * Skip to next SG entry.
225 if (host
->num_sg
> 0) {
227 host
->remain
= host
->cur_sg
->length
;
233 static void sdhci_read_block_pio(struct sdhci_host
*host
)
235 int blksize
, chunk_remain
;
240 DBG("PIO reading\n");
242 blksize
= host
->data
->blksz
;
246 buffer
= sdhci_sg_to_buffer(host
) + host
->offset
;
249 if (chunk_remain
== 0) {
250 data
= readl(host
->ioaddr
+ SDHCI_BUFFER
);
251 chunk_remain
= min(blksize
, 4);
254 size
= min(host
->size
, host
->remain
);
255 size
= min(size
, chunk_remain
);
257 chunk_remain
-= size
;
259 host
->offset
+= size
;
260 host
->remain
-= size
;
263 *buffer
= data
& 0xFF;
269 if (host
->remain
== 0) {
270 if (sdhci_next_sg(host
) == 0) {
271 BUG_ON(blksize
!= 0);
274 buffer
= sdhci_sg_to_buffer(host
);
279 static void sdhci_write_block_pio(struct sdhci_host
*host
)
281 int blksize
, chunk_remain
;
286 DBG("PIO writing\n");
288 blksize
= host
->data
->blksz
;
293 buffer
= sdhci_sg_to_buffer(host
) + host
->offset
;
296 size
= min(host
->size
, host
->remain
);
297 size
= min(size
, chunk_remain
);
299 chunk_remain
-= size
;
301 host
->offset
+= size
;
302 host
->remain
-= size
;
306 data
|= (u32
)*buffer
<< 24;
311 if (chunk_remain
== 0) {
312 writel(data
, host
->ioaddr
+ SDHCI_BUFFER
);
313 chunk_remain
= min(blksize
, 4);
316 if (host
->remain
== 0) {
317 if (sdhci_next_sg(host
) == 0) {
318 BUG_ON(blksize
!= 0);
321 buffer
= sdhci_sg_to_buffer(host
);
326 static void sdhci_transfer_pio(struct sdhci_host
*host
)
335 if (host
->data
->flags
& MMC_DATA_READ
)
336 mask
= SDHCI_DATA_AVAILABLE
;
338 mask
= SDHCI_SPACE_AVAILABLE
;
340 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
341 if (host
->data
->flags
& MMC_DATA_READ
)
342 sdhci_read_block_pio(host
);
344 sdhci_write_block_pio(host
);
349 BUG_ON(host
->num_sg
== 0);
352 DBG("PIO transfer complete.\n");
355 static void sdhci_prepare_data(struct sdhci_host
*host
, struct mmc_data
*data
)
358 unsigned target_timeout
, current_timeout
;
365 DBG("blksz %04x blks %04x flags %08x\n",
366 data
->blksz
, data
->blocks
, data
->flags
);
367 DBG("tsac %d ms nsac %d clk\n",
368 data
->timeout_ns
/ 1000000, data
->timeout_clks
);
371 BUG_ON(data
->blksz
* data
->blocks
> 524288);
372 BUG_ON(data
->blksz
> host
->mmc
->max_blk_size
);
373 BUG_ON(data
->blocks
> 65535);
376 target_timeout
= data
->timeout_ns
/ 1000 +
377 data
->timeout_clks
/ host
->clock
;
380 * Figure out needed cycles.
381 * We do this in steps in order to fit inside a 32 bit int.
382 * The first step is the minimum timeout, which will have a
383 * minimum resolution of 6 bits:
384 * (1) 2^13*1000 > 2^22,
385 * (2) host->timeout_clk < 2^16
390 current_timeout
= (1 << 13) * 1000 / host
->timeout_clk
;
391 while (current_timeout
< target_timeout
) {
393 current_timeout
<<= 1;
399 printk(KERN_WARNING
"%s: Too large timeout requested!\n",
400 mmc_hostname(host
->mmc
));
404 writeb(count
, host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
);
406 if (host
->flags
& SDHCI_USE_DMA
) {
409 count
= pci_map_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
410 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
413 writel(sg_dma_address(data
->sg
), host
->ioaddr
+ SDHCI_DMA_ADDRESS
);
415 host
->size
= data
->blksz
* data
->blocks
;
417 host
->cur_sg
= data
->sg
;
418 host
->num_sg
= data
->sg_len
;
421 host
->remain
= host
->cur_sg
->length
;
424 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
425 writew(SDHCI_MAKE_BLKSZ(7, data
->blksz
),
426 host
->ioaddr
+ SDHCI_BLOCK_SIZE
);
427 writew(data
->blocks
, host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
430 static void sdhci_set_transfer_mode(struct sdhci_host
*host
,
431 struct mmc_data
*data
)
440 mode
= SDHCI_TRNS_BLK_CNT_EN
;
441 if (data
->blocks
> 1)
442 mode
|= SDHCI_TRNS_MULTI
;
443 if (data
->flags
& MMC_DATA_READ
)
444 mode
|= SDHCI_TRNS_READ
;
445 if (host
->flags
& SDHCI_USE_DMA
)
446 mode
|= SDHCI_TRNS_DMA
;
448 writew(mode
, host
->ioaddr
+ SDHCI_TRANSFER_MODE
);
451 static void sdhci_finish_data(struct sdhci_host
*host
)
453 struct mmc_data
*data
;
461 if (host
->flags
& SDHCI_USE_DMA
) {
462 pci_unmap_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
463 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
467 * Controller doesn't count down when in single block mode.
469 if ((data
->blocks
== 1) && (data
->error
== MMC_ERR_NONE
))
472 blocks
= readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
473 data
->bytes_xfered
= data
->blksz
* (data
->blocks
- blocks
);
475 if ((data
->error
== MMC_ERR_NONE
) && blocks
) {
476 printk(KERN_ERR
"%s: Controller signalled completion even "
477 "though there were blocks left. Please report this "
478 "to " BUGMAIL
".\n", mmc_hostname(host
->mmc
));
479 data
->error
= MMC_ERR_FAILED
;
480 } else if (host
->size
!= 0) {
481 printk(KERN_ERR
"%s: %d bytes were left untransferred. "
482 "Please report this to " BUGMAIL
".\n",
483 mmc_hostname(host
->mmc
), host
->size
);
484 data
->error
= MMC_ERR_FAILED
;
487 DBG("Ending data transfer (%d bytes)\n", data
->bytes_xfered
);
491 * The controller needs a reset of internal state machines
492 * upon error conditions.
494 if (data
->error
!= MMC_ERR_NONE
) {
495 sdhci_reset(host
, SDHCI_RESET_CMD
);
496 sdhci_reset(host
, SDHCI_RESET_DATA
);
499 sdhci_send_command(host
, data
->stop
);
501 tasklet_schedule(&host
->finish_tasklet
);
504 static void sdhci_send_command(struct sdhci_host
*host
, struct mmc_command
*cmd
)
508 unsigned long timeout
;
512 DBG("Sending cmd (%x)\n", cmd
->opcode
);
517 mask
= SDHCI_CMD_INHIBIT
;
518 if ((cmd
->data
!= NULL
) || (cmd
->flags
& MMC_RSP_BUSY
))
519 mask
|= SDHCI_DATA_INHIBIT
;
521 /* We shouldn't wait for data inihibit for stop commands, even
522 though they might use busy signaling */
523 if (host
->mrq
->data
&& (cmd
== host
->mrq
->data
->stop
))
524 mask
&= ~SDHCI_DATA_INHIBIT
;
526 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
528 printk(KERN_ERR
"%s: Controller never released "
529 "inhibit bit(s). Please report this to "
530 BUGMAIL
".\n", mmc_hostname(host
->mmc
));
531 sdhci_dumpregs(host
);
532 cmd
->error
= MMC_ERR_FAILED
;
533 tasklet_schedule(&host
->finish_tasklet
);
540 mod_timer(&host
->timer
, jiffies
+ 10 * HZ
);
544 sdhci_prepare_data(host
, cmd
->data
);
546 writel(cmd
->arg
, host
->ioaddr
+ SDHCI_ARGUMENT
);
548 sdhci_set_transfer_mode(host
, cmd
->data
);
550 if ((cmd
->flags
& MMC_RSP_136
) && (cmd
->flags
& MMC_RSP_BUSY
)) {
551 printk(KERN_ERR
"%s: Unsupported response type! "
552 "Please report this to " BUGMAIL
".\n",
553 mmc_hostname(host
->mmc
));
554 cmd
->error
= MMC_ERR_INVALID
;
555 tasklet_schedule(&host
->finish_tasklet
);
559 if (!(cmd
->flags
& MMC_RSP_PRESENT
))
560 flags
= SDHCI_CMD_RESP_NONE
;
561 else if (cmd
->flags
& MMC_RSP_136
)
562 flags
= SDHCI_CMD_RESP_LONG
;
563 else if (cmd
->flags
& MMC_RSP_BUSY
)
564 flags
= SDHCI_CMD_RESP_SHORT_BUSY
;
566 flags
= SDHCI_CMD_RESP_SHORT
;
568 if (cmd
->flags
& MMC_RSP_CRC
)
569 flags
|= SDHCI_CMD_CRC
;
570 if (cmd
->flags
& MMC_RSP_OPCODE
)
571 flags
|= SDHCI_CMD_INDEX
;
573 flags
|= SDHCI_CMD_DATA
;
575 writew(SDHCI_MAKE_CMD(cmd
->opcode
, flags
),
576 host
->ioaddr
+ SDHCI_COMMAND
);
579 static void sdhci_finish_command(struct sdhci_host
*host
)
583 BUG_ON(host
->cmd
== NULL
);
585 if (host
->cmd
->flags
& MMC_RSP_PRESENT
) {
586 if (host
->cmd
->flags
& MMC_RSP_136
) {
587 /* CRC is stripped so we need to do some shifting. */
588 for (i
= 0;i
< 4;i
++) {
589 host
->cmd
->resp
[i
] = readl(host
->ioaddr
+
590 SDHCI_RESPONSE
+ (3-i
)*4) << 8;
592 host
->cmd
->resp
[i
] |=
594 SDHCI_RESPONSE
+ (3-i
)*4-1);
597 host
->cmd
->resp
[0] = readl(host
->ioaddr
+ SDHCI_RESPONSE
);
601 host
->cmd
->error
= MMC_ERR_NONE
;
603 DBG("Ending cmd (%x)\n", host
->cmd
->opcode
);
606 host
->data
= host
->cmd
->data
;
608 tasklet_schedule(&host
->finish_tasklet
);
613 static void sdhci_set_clock(struct sdhci_host
*host
, unsigned int clock
)
618 unsigned long timeout
;
620 if (clock
== host
->clock
)
623 writew(0, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
625 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
626 if (clock
> 25000000)
627 ctrl
|= SDHCI_CTRL_HISPD
;
629 ctrl
&= ~SDHCI_CTRL_HISPD
;
630 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
635 for (div
= 1;div
< 256;div
*= 2) {
636 if ((host
->max_clk
/ div
) <= clock
)
641 clk
= div
<< SDHCI_DIVIDER_SHIFT
;
642 clk
|= SDHCI_CLOCK_INT_EN
;
643 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
647 while (!((clk
= readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
))
648 & SDHCI_CLOCK_INT_STABLE
)) {
650 printk(KERN_ERR
"%s: Internal clock never stabilised. "
651 "Please report this to " BUGMAIL
".\n",
652 mmc_hostname(host
->mmc
));
653 sdhci_dumpregs(host
);
660 clk
|= SDHCI_CLOCK_CARD_EN
;
661 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
667 static void sdhci_set_power(struct sdhci_host
*host
, unsigned short power
)
671 if (host
->power
== power
)
674 if (power
== (unsigned short)-1) {
675 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
680 * Spec says that we should clear the power reg before setting
681 * a new value. Some controllers don't seem to like this though.
683 if (!(host
->chip
->quirks
& SDHCI_QUIRK_SINGLE_POWER_WRITE
))
684 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
686 pwr
= SDHCI_POWER_ON
;
692 pwr
|= SDHCI_POWER_180
;
697 pwr
|= SDHCI_POWER_300
;
702 pwr
|= SDHCI_POWER_330
;
708 writeb(pwr
, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
714 /*****************************************************************************\
718 \*****************************************************************************/
720 static void sdhci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
722 struct sdhci_host
*host
;
725 host
= mmc_priv(mmc
);
727 spin_lock_irqsave(&host
->lock
, flags
);
729 WARN_ON(host
->mrq
!= NULL
);
731 sdhci_activate_led(host
);
735 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
736 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
737 tasklet_schedule(&host
->finish_tasklet
);
739 sdhci_send_command(host
, mrq
->cmd
);
742 spin_unlock_irqrestore(&host
->lock
, flags
);
745 static void sdhci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
747 struct sdhci_host
*host
;
751 host
= mmc_priv(mmc
);
753 spin_lock_irqsave(&host
->lock
, flags
);
756 * Reset the chip on each power off.
757 * Should clear out any weird states.
759 if (ios
->power_mode
== MMC_POWER_OFF
) {
760 writel(0, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
764 sdhci_set_clock(host
, ios
->clock
);
766 if (ios
->power_mode
== MMC_POWER_OFF
)
767 sdhci_set_power(host
, -1);
769 sdhci_set_power(host
, ios
->vdd
);
771 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
772 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
773 ctrl
|= SDHCI_CTRL_4BITBUS
;
775 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
776 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
779 spin_unlock_irqrestore(&host
->lock
, flags
);
782 static int sdhci_get_ro(struct mmc_host
*mmc
)
784 struct sdhci_host
*host
;
788 host
= mmc_priv(mmc
);
790 spin_lock_irqsave(&host
->lock
, flags
);
792 present
= readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
);
794 spin_unlock_irqrestore(&host
->lock
, flags
);
796 return !(present
& SDHCI_WRITE_PROTECT
);
799 static const struct mmc_host_ops sdhci_ops
= {
800 .request
= sdhci_request
,
801 .set_ios
= sdhci_set_ios
,
802 .get_ro
= sdhci_get_ro
,
805 /*****************************************************************************\
809 \*****************************************************************************/
811 static void sdhci_tasklet_card(unsigned long param
)
813 struct sdhci_host
*host
;
816 host
= (struct sdhci_host
*)param
;
818 spin_lock_irqsave(&host
->lock
, flags
);
820 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
822 printk(KERN_ERR
"%s: Card removed during transfer!\n",
823 mmc_hostname(host
->mmc
));
824 printk(KERN_ERR
"%s: Resetting controller.\n",
825 mmc_hostname(host
->mmc
));
827 sdhci_reset(host
, SDHCI_RESET_CMD
);
828 sdhci_reset(host
, SDHCI_RESET_DATA
);
830 host
->mrq
->cmd
->error
= MMC_ERR_FAILED
;
831 tasklet_schedule(&host
->finish_tasklet
);
835 spin_unlock_irqrestore(&host
->lock
, flags
);
837 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
840 static void sdhci_tasklet_finish(unsigned long param
)
842 struct sdhci_host
*host
;
844 struct mmc_request
*mrq
;
846 host
= (struct sdhci_host
*)param
;
848 spin_lock_irqsave(&host
->lock
, flags
);
850 del_timer(&host
->timer
);
854 DBG("Ending request, cmd (%x)\n", mrq
->cmd
->opcode
);
857 * The controller needs a reset of internal state machines
858 * upon error conditions.
860 if ((mrq
->cmd
->error
!= MMC_ERR_NONE
) ||
861 (mrq
->data
&& ((mrq
->data
->error
!= MMC_ERR_NONE
) ||
862 (mrq
->data
->stop
&& (mrq
->data
->stop
->error
!= MMC_ERR_NONE
))))) {
864 /* Some controllers need this kick or reset won't work here */
865 if (host
->chip
->quirks
& SDHCI_QUIRK_CLOCK_BEFORE_RESET
) {
868 /* This is to force an update */
871 sdhci_set_clock(host
, clock
);
874 /* Spec says we should do both at the same time, but Ricoh
875 controllers do not like that. */
876 sdhci_reset(host
, SDHCI_RESET_CMD
);
877 sdhci_reset(host
, SDHCI_RESET_DATA
);
884 sdhci_deactivate_led(host
);
887 spin_unlock_irqrestore(&host
->lock
, flags
);
889 mmc_request_done(host
->mmc
, mrq
);
892 static void sdhci_timeout_timer(unsigned long data
)
894 struct sdhci_host
*host
;
897 host
= (struct sdhci_host
*)data
;
899 spin_lock_irqsave(&host
->lock
, flags
);
902 printk(KERN_ERR
"%s: Timeout waiting for hardware interrupt. "
903 "Please report this to " BUGMAIL
".\n",
904 mmc_hostname(host
->mmc
));
905 sdhci_dumpregs(host
);
908 host
->data
->error
= MMC_ERR_TIMEOUT
;
909 sdhci_finish_data(host
);
912 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
914 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
916 tasklet_schedule(&host
->finish_tasklet
);
921 spin_unlock_irqrestore(&host
->lock
, flags
);
924 /*****************************************************************************\
926 * Interrupt handling *
928 \*****************************************************************************/
930 static void sdhci_cmd_irq(struct sdhci_host
*host
, u32 intmask
)
932 BUG_ON(intmask
== 0);
935 printk(KERN_ERR
"%s: Got command interrupt even though no "
936 "command operation was in progress.\n",
937 mmc_hostname(host
->mmc
));
938 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
939 mmc_hostname(host
->mmc
));
940 sdhci_dumpregs(host
);
944 if (intmask
& SDHCI_INT_RESPONSE
)
945 sdhci_finish_command(host
);
947 if (intmask
& SDHCI_INT_TIMEOUT
)
948 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
949 else if (intmask
& SDHCI_INT_CRC
)
950 host
->cmd
->error
= MMC_ERR_BADCRC
;
951 else if (intmask
& (SDHCI_INT_END_BIT
| SDHCI_INT_INDEX
))
952 host
->cmd
->error
= MMC_ERR_FAILED
;
954 host
->cmd
->error
= MMC_ERR_INVALID
;
956 tasklet_schedule(&host
->finish_tasklet
);
960 static void sdhci_data_irq(struct sdhci_host
*host
, u32 intmask
)
962 BUG_ON(intmask
== 0);
966 * A data end interrupt is sent together with the response
967 * for the stop command.
969 if (intmask
& SDHCI_INT_DATA_END
)
972 printk(KERN_ERR
"%s: Got data interrupt even though no "
973 "data operation was in progress.\n",
974 mmc_hostname(host
->mmc
));
975 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
976 mmc_hostname(host
->mmc
));
977 sdhci_dumpregs(host
);
982 if (intmask
& SDHCI_INT_DATA_TIMEOUT
)
983 host
->data
->error
= MMC_ERR_TIMEOUT
;
984 else if (intmask
& SDHCI_INT_DATA_CRC
)
985 host
->data
->error
= MMC_ERR_BADCRC
;
986 else if (intmask
& SDHCI_INT_DATA_END_BIT
)
987 host
->data
->error
= MMC_ERR_FAILED
;
989 if (host
->data
->error
!= MMC_ERR_NONE
)
990 sdhci_finish_data(host
);
992 if (intmask
& (SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
))
993 sdhci_transfer_pio(host
);
995 if (intmask
& SDHCI_INT_DATA_END
)
996 sdhci_finish_data(host
);
1000 static irqreturn_t
sdhci_irq(int irq
, void *dev_id
)
1003 struct sdhci_host
* host
= dev_id
;
1006 spin_lock(&host
->lock
);
1008 intmask
= readl(host
->ioaddr
+ SDHCI_INT_STATUS
);
1015 DBG("*** %s got interrupt: 0x%08x\n", host
->slot_descr
, intmask
);
1017 if (intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
)) {
1018 writel(intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
),
1019 host
->ioaddr
+ SDHCI_INT_STATUS
);
1020 tasklet_schedule(&host
->card_tasklet
);
1023 intmask
&= ~(SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
);
1025 if (intmask
& SDHCI_INT_CMD_MASK
) {
1026 writel(intmask
& SDHCI_INT_CMD_MASK
,
1027 host
->ioaddr
+ SDHCI_INT_STATUS
);
1028 sdhci_cmd_irq(host
, intmask
& SDHCI_INT_CMD_MASK
);
1031 if (intmask
& SDHCI_INT_DATA_MASK
) {
1032 writel(intmask
& SDHCI_INT_DATA_MASK
,
1033 host
->ioaddr
+ SDHCI_INT_STATUS
);
1034 sdhci_data_irq(host
, intmask
& SDHCI_INT_DATA_MASK
);
1037 intmask
&= ~(SDHCI_INT_CMD_MASK
| SDHCI_INT_DATA_MASK
);
1039 if (intmask
& SDHCI_INT_BUS_POWER
) {
1040 printk(KERN_ERR
"%s: Card is consuming too much power!\n",
1041 mmc_hostname(host
->mmc
));
1042 writel(SDHCI_INT_BUS_POWER
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1045 intmask
&= SDHCI_INT_BUS_POWER
;
1048 printk(KERN_ERR
"%s: Unexpected interrupt 0x%08x. Please "
1049 "report this to " BUGMAIL
".\n",
1050 mmc_hostname(host
->mmc
), intmask
);
1051 sdhci_dumpregs(host
);
1053 writel(intmask
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1056 result
= IRQ_HANDLED
;
1060 spin_unlock(&host
->lock
);
1065 /*****************************************************************************\
1069 \*****************************************************************************/
1073 static int sdhci_suspend (struct pci_dev
*pdev
, pm_message_t state
)
1075 struct sdhci_chip
*chip
;
1078 chip
= pci_get_drvdata(pdev
);
1082 DBG("Suspending...\n");
1084 for (i
= 0;i
< chip
->num_slots
;i
++) {
1085 if (!chip
->hosts
[i
])
1087 ret
= mmc_suspend_host(chip
->hosts
[i
]->mmc
, state
);
1089 for (i
--;i
>= 0;i
--)
1090 mmc_resume_host(chip
->hosts
[i
]->mmc
);
1095 pci_save_state(pdev
);
1096 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
1097 pci_disable_device(pdev
);
1098 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1103 static int sdhci_resume (struct pci_dev
*pdev
)
1105 struct sdhci_chip
*chip
;
1108 chip
= pci_get_drvdata(pdev
);
1112 DBG("Resuming...\n");
1114 pci_set_power_state(pdev
, PCI_D0
);
1115 pci_restore_state(pdev
);
1116 ret
= pci_enable_device(pdev
);
1120 for (i
= 0;i
< chip
->num_slots
;i
++) {
1121 if (!chip
->hosts
[i
])
1123 if (chip
->hosts
[i
]->flags
& SDHCI_USE_DMA
)
1124 pci_set_master(pdev
);
1125 sdhci_init(chip
->hosts
[i
]);
1127 ret
= mmc_resume_host(chip
->hosts
[i
]->mmc
);
1135 #else /* CONFIG_PM */
1137 #define sdhci_suspend NULL
1138 #define sdhci_resume NULL
1140 #endif /* CONFIG_PM */
1142 /*****************************************************************************\
1144 * Device probing/removal *
1146 \*****************************************************************************/
1148 static int __devinit
sdhci_probe_slot(struct pci_dev
*pdev
, int slot
)
1151 unsigned int version
;
1152 struct sdhci_chip
*chip
;
1153 struct mmc_host
*mmc
;
1154 struct sdhci_host
*host
;
1159 chip
= pci_get_drvdata(pdev
);
1162 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1166 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1168 if (first_bar
> 5) {
1169 printk(KERN_ERR DRIVER_NAME
": Invalid first BAR. Aborting.\n");
1173 if (!(pci_resource_flags(pdev
, first_bar
+ slot
) & IORESOURCE_MEM
)) {
1174 printk(KERN_ERR DRIVER_NAME
": BAR is not iomem. Aborting.\n");
1178 if (pci_resource_len(pdev
, first_bar
+ slot
) != 0x100) {
1179 printk(KERN_ERR DRIVER_NAME
": Invalid iomem size. "
1180 "You may experience problems.\n");
1183 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1184 printk(KERN_ERR DRIVER_NAME
": Vendor specific interface. Aborting.\n");
1188 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1189 printk(KERN_ERR DRIVER_NAME
": Unknown interface. Aborting.\n");
1193 mmc
= mmc_alloc_host(sizeof(struct sdhci_host
), &pdev
->dev
);
1197 host
= mmc_priv(mmc
);
1201 chip
->hosts
[slot
] = host
;
1203 host
->bar
= first_bar
+ slot
;
1205 host
->addr
= pci_resource_start(pdev
, host
->bar
);
1206 host
->irq
= pdev
->irq
;
1208 DBG("slot %d at 0x%08lx, irq %d\n", slot
, host
->addr
, host
->irq
);
1210 snprintf(host
->slot_descr
, 20, "sdhci:slot%d", slot
);
1212 ret
= pci_request_region(pdev
, host
->bar
, host
->slot_descr
);
1216 host
->ioaddr
= ioremap_nocache(host
->addr
,
1217 pci_resource_len(pdev
, host
->bar
));
1218 if (!host
->ioaddr
) {
1223 sdhci_reset(host
, SDHCI_RESET_ALL
);
1225 version
= readw(host
->ioaddr
+ SDHCI_HOST_VERSION
);
1226 version
= (version
& SDHCI_SPEC_VER_MASK
) >> SDHCI_SPEC_VER_SHIFT
;
1228 printk(KERN_ERR
"%s: Unknown controller version (%d). "
1229 "You may experience problems.\n", host
->slot_descr
,
1233 caps
= readl(host
->ioaddr
+ SDHCI_CAPABILITIES
);
1236 DBG("DMA forced off\n");
1237 else if (debug_forcedma
) {
1238 DBG("DMA forced on\n");
1239 host
->flags
|= SDHCI_USE_DMA
;
1240 } else if (chip
->quirks
& SDHCI_QUIRK_FORCE_DMA
)
1241 host
->flags
|= SDHCI_USE_DMA
;
1242 else if ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
)
1243 DBG("Controller doesn't have DMA interface\n");
1244 else if (!(caps
& SDHCI_CAN_DO_DMA
))
1245 DBG("Controller doesn't have DMA capability\n");
1247 host
->flags
|= SDHCI_USE_DMA
;
1249 if (host
->flags
& SDHCI_USE_DMA
) {
1250 if (pci_set_dma_mask(pdev
, DMA_32BIT_MASK
)) {
1251 printk(KERN_WARNING
"%s: No suitable DMA available. "
1252 "Falling back to PIO.\n", host
->slot_descr
);
1253 host
->flags
&= ~SDHCI_USE_DMA
;
1257 if (host
->flags
& SDHCI_USE_DMA
)
1258 pci_set_master(pdev
);
1259 else /* XXX: Hack to get MMC layer to avoid highmem */
1263 (caps
& SDHCI_CLOCK_BASE_MASK
) >> SDHCI_CLOCK_BASE_SHIFT
;
1264 if (host
->max_clk
== 0) {
1265 printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
1266 "frequency.\n", host
->slot_descr
);
1270 host
->max_clk
*= 1000000;
1273 (caps
& SDHCI_TIMEOUT_CLK_MASK
) >> SDHCI_TIMEOUT_CLK_SHIFT
;
1274 if (host
->timeout_clk
== 0) {
1275 printk(KERN_ERR
"%s: Hardware doesn't specify timeout clock "
1276 "frequency.\n", host
->slot_descr
);
1280 if (caps
& SDHCI_TIMEOUT_CLK_UNIT
)
1281 host
->timeout_clk
*= 1000;
1284 * Set host parameters.
1286 mmc
->ops
= &sdhci_ops
;
1287 mmc
->f_min
= host
->max_clk
/ 256;
1288 mmc
->f_max
= host
->max_clk
;
1289 mmc
->caps
= MMC_CAP_4_BIT_DATA
| MMC_CAP_MULTIWRITE
| MMC_CAP_BYTEBLOCK
;
1292 if (caps
& SDHCI_CAN_VDD_330
)
1293 mmc
->ocr_avail
|= MMC_VDD_32_33
|MMC_VDD_33_34
;
1294 if (caps
& SDHCI_CAN_VDD_300
)
1295 mmc
->ocr_avail
|= MMC_VDD_29_30
|MMC_VDD_30_31
;
1296 if (caps
& SDHCI_CAN_VDD_180
)
1297 mmc
->ocr_avail
|= MMC_VDD_17_18
|MMC_VDD_18_19
;
1299 if ((host
->max_clk
> 25000000) && !(caps
& SDHCI_CAN_DO_HISPD
)) {
1300 printk(KERN_ERR
"%s: Controller reports > 25 MHz base clock,"
1301 " but no high speed support.\n",
1303 mmc
->f_max
= 25000000;
1306 if (mmc
->ocr_avail
== 0) {
1307 printk(KERN_ERR
"%s: Hardware doesn't report any "
1308 "support voltages.\n", host
->slot_descr
);
1313 spin_lock_init(&host
->lock
);
1316 * Maximum number of segments. Hardware cannot do scatter lists.
1318 if (host
->flags
& SDHCI_USE_DMA
)
1319 mmc
->max_hw_segs
= 1;
1321 mmc
->max_hw_segs
= 16;
1322 mmc
->max_phys_segs
= 16;
1325 * Maximum number of sectors in one transfer. Limited by DMA boundary
1328 mmc
->max_req_size
= 524288;
1331 * Maximum segment size. Could be one segment with the maximum number
1334 mmc
->max_seg_size
= mmc
->max_req_size
;
1337 * Maximum block size. This varies from controller to controller and
1338 * is specified in the capabilities register.
1340 mmc
->max_blk_size
= (caps
& SDHCI_MAX_BLOCK_MASK
) >> SDHCI_MAX_BLOCK_SHIFT
;
1341 if (mmc
->max_blk_size
>= 3) {
1342 printk(KERN_ERR
"%s: Invalid maximum block size.\n",
1347 mmc
->max_blk_size
= 512 << mmc
->max_blk_size
;
1350 * Maximum block count.
1352 mmc
->max_blk_count
= 65535;
1357 tasklet_init(&host
->card_tasklet
,
1358 sdhci_tasklet_card
, (unsigned long)host
);
1359 tasklet_init(&host
->finish_tasklet
,
1360 sdhci_tasklet_finish
, (unsigned long)host
);
1362 setup_timer(&host
->timer
, sdhci_timeout_timer
, (unsigned long)host
);
1364 ret
= request_irq(host
->irq
, sdhci_irq
, IRQF_SHARED
,
1365 host
->slot_descr
, host
);
1371 #ifdef CONFIG_MMC_DEBUG
1372 sdhci_dumpregs(host
);
1379 printk(KERN_INFO
"%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc
),
1380 host
->addr
, host
->irq
,
1381 (host
->flags
& SDHCI_USE_DMA
)?"DMA":"PIO");
1386 tasklet_kill(&host
->card_tasklet
);
1387 tasklet_kill(&host
->finish_tasklet
);
1389 iounmap(host
->ioaddr
);
1391 pci_release_region(pdev
, host
->bar
);
1398 static void sdhci_remove_slot(struct pci_dev
*pdev
, int slot
)
1400 struct sdhci_chip
*chip
;
1401 struct mmc_host
*mmc
;
1402 struct sdhci_host
*host
;
1404 chip
= pci_get_drvdata(pdev
);
1405 host
= chip
->hosts
[slot
];
1408 chip
->hosts
[slot
] = NULL
;
1410 mmc_remove_host(mmc
);
1412 sdhci_reset(host
, SDHCI_RESET_ALL
);
1414 free_irq(host
->irq
, host
);
1416 del_timer_sync(&host
->timer
);
1418 tasklet_kill(&host
->card_tasklet
);
1419 tasklet_kill(&host
->finish_tasklet
);
1421 iounmap(host
->ioaddr
);
1423 pci_release_region(pdev
, host
->bar
);
1428 static int __devinit
sdhci_probe(struct pci_dev
*pdev
,
1429 const struct pci_device_id
*ent
)
1433 struct sdhci_chip
*chip
;
1435 BUG_ON(pdev
== NULL
);
1436 BUG_ON(ent
== NULL
);
1438 pci_read_config_byte(pdev
, PCI_CLASS_REVISION
, &rev
);
1440 printk(KERN_INFO DRIVER_NAME
1441 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1442 pci_name(pdev
), (int)pdev
->vendor
, (int)pdev
->device
,
1445 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1449 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1450 DBG("found %d slot(s)\n", slots
);
1454 ret
= pci_enable_device(pdev
);
1458 chip
= kzalloc(sizeof(struct sdhci_chip
) +
1459 sizeof(struct sdhci_host
*) * slots
, GFP_KERNEL
);
1466 chip
->quirks
= ent
->driver_data
;
1469 chip
->quirks
= debug_quirks
;
1471 chip
->num_slots
= slots
;
1472 pci_set_drvdata(pdev
, chip
);
1474 for (i
= 0;i
< slots
;i
++) {
1475 ret
= sdhci_probe_slot(pdev
, i
);
1477 for (i
--;i
>= 0;i
--)
1478 sdhci_remove_slot(pdev
, i
);
1486 pci_set_drvdata(pdev
, NULL
);
1490 pci_disable_device(pdev
);
1494 static void __devexit
sdhci_remove(struct pci_dev
*pdev
)
1497 struct sdhci_chip
*chip
;
1499 chip
= pci_get_drvdata(pdev
);
1502 for (i
= 0;i
< chip
->num_slots
;i
++)
1503 sdhci_remove_slot(pdev
, i
);
1505 pci_set_drvdata(pdev
, NULL
);
1510 pci_disable_device(pdev
);
1513 static struct pci_driver sdhci_driver
= {
1514 .name
= DRIVER_NAME
,
1515 .id_table
= pci_ids
,
1516 .probe
= sdhci_probe
,
1517 .remove
= __devexit_p(sdhci_remove
),
1518 .suspend
= sdhci_suspend
,
1519 .resume
= sdhci_resume
,
1522 /*****************************************************************************\
1524 * Driver init/exit *
1526 \*****************************************************************************/
1528 static int __init
sdhci_drv_init(void)
1530 printk(KERN_INFO DRIVER_NAME
1531 ": Secure Digital Host Controller Interface driver, "
1532 DRIVER_VERSION
"\n");
1533 printk(KERN_INFO DRIVER_NAME
": Copyright(c) Pierre Ossman\n");
1535 return pci_register_driver(&sdhci_driver
);
1538 static void __exit
sdhci_drv_exit(void)
1542 pci_unregister_driver(&sdhci_driver
);
1545 module_init(sdhci_drv_init
);
1546 module_exit(sdhci_drv_exit
);
1548 module_param(debug_nodma
, uint
, 0444);
1549 module_param(debug_forcedma
, uint
, 0444);
1550 module_param(debug_quirks
, uint
, 0444);
1552 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1553 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1554 MODULE_VERSION(DRIVER_VERSION
);
1555 MODULE_LICENSE("GPL");
1557 MODULE_PARM_DESC(debug_nodma
, "Forcefully disable DMA transfers. (default 0)");
1558 MODULE_PARM_DESC(debug_forcedma
, "Forcefully enable DMA transfers. (default 0)");
1559 MODULE_PARM_DESC(debug_quirks
, "Force certain quirks.");