2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
32 /* Platform device Usage :
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
50 /* OF Platform device Usage :
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
76 #if defined(CONFIG_PPC_MERGE)
78 #include <linux/of_platform.h>
80 #include <linux/platform_device.h>
83 #include <asm/mpc52xx.h>
84 #include <asm/mpc512x.h>
85 #include <asm/mpc52xx_psc.h>
87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
91 #include <linux/serial_core.h>
94 /* We've been assigned a range on the "Low-density serial ports" major */
95 #define SERIAL_PSC_MAJOR 204
96 #define SERIAL_PSC_MINOR 148
99 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
102 static struct uart_port mpc52xx_uart_ports
[MPC52xx_PSC_MAXNUM
];
103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr
105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset(...,0,...) should be added to
110 #if defined(CONFIG_PPC_MERGE)
111 /* lookup table for matching device nodes to index numbers */
112 static struct device_node
*mpc52xx_uart_nodes
[MPC52xx_PSC_MAXNUM
];
114 static void mpc52xx_uart_of_enumerate(void);
118 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
121 /* Forward declaration of the interruption handling routine */
122 static irqreturn_t
mpc52xx_uart_int(int irq
, void *dev_id
);
125 /* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127 #ifdef CONFIG_SERIAL_CORE_CONSOLE
128 #define uart_console(port) \
129 ((port)->cons && (port)->cons->index == (port)->line)
131 #define uart_console(port) (0)
134 /* ======================================================================== */
135 /* PSC fifo operations for isolating differences between 52xx and 512x */
136 /* ======================================================================== */
139 void (*fifo_init
)(struct uart_port
*port
);
140 int (*raw_rx_rdy
)(struct uart_port
*port
);
141 int (*raw_tx_rdy
)(struct uart_port
*port
);
142 int (*rx_rdy
)(struct uart_port
*port
);
143 int (*tx_rdy
)(struct uart_port
*port
);
144 int (*tx_empty
)(struct uart_port
*port
);
145 void (*stop_rx
)(struct uart_port
*port
);
146 void (*start_tx
)(struct uart_port
*port
);
147 void (*stop_tx
)(struct uart_port
*port
);
148 void (*rx_clr_irq
)(struct uart_port
*port
);
149 void (*tx_clr_irq
)(struct uart_port
*port
);
150 void (*write_char
)(struct uart_port
*port
, unsigned char c
);
151 unsigned char (*read_char
)(struct uart_port
*port
);
152 void (*cw_disable_ints
)(struct uart_port
*port
);
153 void (*cw_restore_ints
)(struct uart_port
*port
);
154 unsigned long (*getuartclk
)(void *p
);
157 #ifdef CONFIG_PPC_MPC52xx
158 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
159 static void mpc52xx_psc_fifo_init(struct uart_port
*port
)
161 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
162 struct mpc52xx_psc_fifo __iomem
*fifo
= FIFO_52xx(port
);
165 out_be16(&psc
->mpc52xx_psc_clock_select
, 0xdd00);
167 out_8(&fifo
->rfcntl
, 0x00);
168 out_be16(&fifo
->rfalarm
, 0x1ff);
169 out_8(&fifo
->tfcntl
, 0x07);
170 out_be16(&fifo
->tfalarm
, 0x80);
172 port
->read_status_mask
|= MPC52xx_PSC_IMR_RXRDY
| MPC52xx_PSC_IMR_TXRDY
;
173 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
176 static int mpc52xx_psc_raw_rx_rdy(struct uart_port
*port
)
178 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
179 & MPC52xx_PSC_SR_RXRDY
;
182 static int mpc52xx_psc_raw_tx_rdy(struct uart_port
*port
)
184 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
185 & MPC52xx_PSC_SR_TXRDY
;
189 static int mpc52xx_psc_rx_rdy(struct uart_port
*port
)
191 return in_be16(&PSC(port
)->mpc52xx_psc_isr
)
192 & port
->read_status_mask
193 & MPC52xx_PSC_IMR_RXRDY
;
196 static int mpc52xx_psc_tx_rdy(struct uart_port
*port
)
198 return in_be16(&PSC(port
)->mpc52xx_psc_isr
)
199 & port
->read_status_mask
200 & MPC52xx_PSC_IMR_TXRDY
;
203 static int mpc52xx_psc_tx_empty(struct uart_port
*port
)
205 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
206 & MPC52xx_PSC_SR_TXEMP
;
209 static void mpc52xx_psc_start_tx(struct uart_port
*port
)
211 port
->read_status_mask
|= MPC52xx_PSC_IMR_TXRDY
;
212 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
215 static void mpc52xx_psc_stop_tx(struct uart_port
*port
)
217 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_TXRDY
;
218 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
221 static void mpc52xx_psc_stop_rx(struct uart_port
*port
)
223 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_RXRDY
;
224 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
227 static void mpc52xx_psc_rx_clr_irq(struct uart_port
*port
)
231 static void mpc52xx_psc_tx_clr_irq(struct uart_port
*port
)
235 static void mpc52xx_psc_write_char(struct uart_port
*port
, unsigned char c
)
237 out_8(&PSC(port
)->mpc52xx_psc_buffer_8
, c
);
240 static unsigned char mpc52xx_psc_read_char(struct uart_port
*port
)
242 return in_8(&PSC(port
)->mpc52xx_psc_buffer_8
);
245 static void mpc52xx_psc_cw_disable_ints(struct uart_port
*port
)
247 out_be16(&PSC(port
)->mpc52xx_psc_imr
, 0);
250 static void mpc52xx_psc_cw_restore_ints(struct uart_port
*port
)
252 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
255 /* Search for bus-frequency property in this node or a parent */
256 static unsigned long mpc52xx_getuartclk(void *p
)
258 #if defined(CONFIG_PPC_MERGE)
260 * 5200 UARTs have a / 32 prescaler
261 * but the generic serial code assumes 16
262 * so return ipb freq / 2
264 return mpc52xx_find_ipb_freq(p
) / 2;
266 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
271 static struct psc_ops mpc52xx_psc_ops
= {
272 .fifo_init
= mpc52xx_psc_fifo_init
,
273 .raw_rx_rdy
= mpc52xx_psc_raw_rx_rdy
,
274 .raw_tx_rdy
= mpc52xx_psc_raw_tx_rdy
,
275 .rx_rdy
= mpc52xx_psc_rx_rdy
,
276 .tx_rdy
= mpc52xx_psc_tx_rdy
,
277 .tx_empty
= mpc52xx_psc_tx_empty
,
278 .stop_rx
= mpc52xx_psc_stop_rx
,
279 .start_tx
= mpc52xx_psc_start_tx
,
280 .stop_tx
= mpc52xx_psc_stop_tx
,
281 .rx_clr_irq
= mpc52xx_psc_rx_clr_irq
,
282 .tx_clr_irq
= mpc52xx_psc_tx_clr_irq
,
283 .write_char
= mpc52xx_psc_write_char
,
284 .read_char
= mpc52xx_psc_read_char
,
285 .cw_disable_ints
= mpc52xx_psc_cw_disable_ints
,
286 .cw_restore_ints
= mpc52xx_psc_cw_restore_ints
,
287 .getuartclk
= mpc52xx_getuartclk
,
290 #endif /* CONFIG_MPC52xx */
292 #ifdef CONFIG_PPC_MPC512x
293 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
294 static void mpc512x_psc_fifo_init(struct uart_port
*port
)
296 out_be32(&FIFO_512x(port
)->txcmd
, MPC512x_PSC_FIFO_RESET_SLICE
);
297 out_be32(&FIFO_512x(port
)->txcmd
, MPC512x_PSC_FIFO_ENABLE_SLICE
);
298 out_be32(&FIFO_512x(port
)->txalarm
, 1);
299 out_be32(&FIFO_512x(port
)->tximr
, 0);
301 out_be32(&FIFO_512x(port
)->rxcmd
, MPC512x_PSC_FIFO_RESET_SLICE
);
302 out_be32(&FIFO_512x(port
)->rxcmd
, MPC512x_PSC_FIFO_ENABLE_SLICE
);
303 out_be32(&FIFO_512x(port
)->rxalarm
, 1);
304 out_be32(&FIFO_512x(port
)->rximr
, 0);
306 out_be32(&FIFO_512x(port
)->tximr
, MPC512x_PSC_FIFO_ALARM
);
307 out_be32(&FIFO_512x(port
)->rximr
, MPC512x_PSC_FIFO_ALARM
);
310 static int mpc512x_psc_raw_rx_rdy(struct uart_port
*port
)
312 return !(in_be32(&FIFO_512x(port
)->rxsr
) & MPC512x_PSC_FIFO_EMPTY
);
315 static int mpc512x_psc_raw_tx_rdy(struct uart_port
*port
)
317 return !(in_be32(&FIFO_512x(port
)->txsr
) & MPC512x_PSC_FIFO_FULL
);
320 static int mpc512x_psc_rx_rdy(struct uart_port
*port
)
322 return in_be32(&FIFO_512x(port
)->rxsr
)
323 & in_be32(&FIFO_512x(port
)->rximr
)
324 & MPC512x_PSC_FIFO_ALARM
;
327 static int mpc512x_psc_tx_rdy(struct uart_port
*port
)
329 return in_be32(&FIFO_512x(port
)->txsr
)
330 & in_be32(&FIFO_512x(port
)->tximr
)
331 & MPC512x_PSC_FIFO_ALARM
;
334 static int mpc512x_psc_tx_empty(struct uart_port
*port
)
336 return in_be32(&FIFO_512x(port
)->txsr
)
337 & MPC512x_PSC_FIFO_EMPTY
;
340 static void mpc512x_psc_stop_rx(struct uart_port
*port
)
342 unsigned long rx_fifo_imr
;
344 rx_fifo_imr
= in_be32(&FIFO_512x(port
)->rximr
);
345 rx_fifo_imr
&= ~MPC512x_PSC_FIFO_ALARM
;
346 out_be32(&FIFO_512x(port
)->rximr
, rx_fifo_imr
);
349 static void mpc512x_psc_start_tx(struct uart_port
*port
)
351 unsigned long tx_fifo_imr
;
353 tx_fifo_imr
= in_be32(&FIFO_512x(port
)->tximr
);
354 tx_fifo_imr
|= MPC512x_PSC_FIFO_ALARM
;
355 out_be32(&FIFO_512x(port
)->tximr
, tx_fifo_imr
);
358 static void mpc512x_psc_stop_tx(struct uart_port
*port
)
360 unsigned long tx_fifo_imr
;
362 tx_fifo_imr
= in_be32(&FIFO_512x(port
)->tximr
);
363 tx_fifo_imr
&= ~MPC512x_PSC_FIFO_ALARM
;
364 out_be32(&FIFO_512x(port
)->tximr
, tx_fifo_imr
);
367 static void mpc512x_psc_rx_clr_irq(struct uart_port
*port
)
369 out_be32(&FIFO_512x(port
)->rxisr
, in_be32(&FIFO_512x(port
)->rxisr
));
372 static void mpc512x_psc_tx_clr_irq(struct uart_port
*port
)
374 out_be32(&FIFO_512x(port
)->txisr
, in_be32(&FIFO_512x(port
)->txisr
));
377 static void mpc512x_psc_write_char(struct uart_port
*port
, unsigned char c
)
379 out_8(&FIFO_512x(port
)->txdata_8
, c
);
382 static unsigned char mpc512x_psc_read_char(struct uart_port
*port
)
384 return in_8(&FIFO_512x(port
)->rxdata_8
);
387 static void mpc512x_psc_cw_disable_ints(struct uart_port
*port
)
389 port
->read_status_mask
=
390 in_be32(&FIFO_512x(port
)->tximr
) << 16 |
391 in_be32(&FIFO_512x(port
)->rximr
);
392 out_be32(&FIFO_512x(port
)->tximr
, 0);
393 out_be32(&FIFO_512x(port
)->rximr
, 0);
396 static void mpc512x_psc_cw_restore_ints(struct uart_port
*port
)
398 out_be32(&FIFO_512x(port
)->tximr
,
399 (port
->read_status_mask
>> 16) & 0x7f);
400 out_be32(&FIFO_512x(port
)->rximr
, port
->read_status_mask
& 0x7f);
403 static unsigned long mpc512x_getuartclk(void *p
)
405 return mpc512x_find_ips_freq(p
);
408 static struct psc_ops mpc512x_psc_ops
= {
409 .fifo_init
= mpc512x_psc_fifo_init
,
410 .raw_rx_rdy
= mpc512x_psc_raw_rx_rdy
,
411 .raw_tx_rdy
= mpc512x_psc_raw_tx_rdy
,
412 .rx_rdy
= mpc512x_psc_rx_rdy
,
413 .tx_rdy
= mpc512x_psc_tx_rdy
,
414 .tx_empty
= mpc512x_psc_tx_empty
,
415 .stop_rx
= mpc512x_psc_stop_rx
,
416 .start_tx
= mpc512x_psc_start_tx
,
417 .stop_tx
= mpc512x_psc_stop_tx
,
418 .rx_clr_irq
= mpc512x_psc_rx_clr_irq
,
419 .tx_clr_irq
= mpc512x_psc_tx_clr_irq
,
420 .write_char
= mpc512x_psc_write_char
,
421 .read_char
= mpc512x_psc_read_char
,
422 .cw_disable_ints
= mpc512x_psc_cw_disable_ints
,
423 .cw_restore_ints
= mpc512x_psc_cw_restore_ints
,
424 .getuartclk
= mpc512x_getuartclk
,
428 static struct psc_ops
*psc_ops
;
430 /* ======================================================================== */
431 /* UART operations */
432 /* ======================================================================== */
435 mpc52xx_uart_tx_empty(struct uart_port
*port
)
437 return psc_ops
->tx_empty(port
) ? TIOCSER_TEMT
: 0;
441 mpc52xx_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
443 /* Not implemented */
447 mpc52xx_uart_get_mctrl(struct uart_port
*port
)
449 /* Not implemented */
450 return TIOCM_CTS
| TIOCM_DSR
| TIOCM_CAR
;
454 mpc52xx_uart_stop_tx(struct uart_port
*port
)
456 /* port->lock taken by caller */
457 psc_ops
->stop_tx(port
);
461 mpc52xx_uart_start_tx(struct uart_port
*port
)
463 /* port->lock taken by caller */
464 psc_ops
->start_tx(port
);
468 mpc52xx_uart_send_xchar(struct uart_port
*port
, char ch
)
471 spin_lock_irqsave(&port
->lock
, flags
);
475 /* Make sure tx interrupts are on */
476 /* Truly necessary ??? They should be anyway */
477 psc_ops
->start_tx(port
);
480 spin_unlock_irqrestore(&port
->lock
, flags
);
484 mpc52xx_uart_stop_rx(struct uart_port
*port
)
486 /* port->lock taken by caller */
487 psc_ops
->stop_rx(port
);
491 mpc52xx_uart_enable_ms(struct uart_port
*port
)
493 /* Not implemented */
497 mpc52xx_uart_break_ctl(struct uart_port
*port
, int ctl
)
500 spin_lock_irqsave(&port
->lock
, flags
);
503 out_8(&PSC(port
)->command
, MPC52xx_PSC_START_BRK
);
505 out_8(&PSC(port
)->command
, MPC52xx_PSC_STOP_BRK
);
507 spin_unlock_irqrestore(&port
->lock
, flags
);
511 mpc52xx_uart_startup(struct uart_port
*port
)
513 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
517 ret
= request_irq(port
->irq
, mpc52xx_uart_int
,
518 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
| IRQF_SHARED
,
519 "mpc52xx_psc_uart", port
);
523 /* Reset/activate the port, clear and enable interrupts */
524 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
525 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
527 out_be32(&psc
->sicr
, 0); /* UART mode DCD ignored */
529 psc_ops
->fifo_init(port
);
531 out_8(&psc
->command
, MPC52xx_PSC_TX_ENABLE
);
532 out_8(&psc
->command
, MPC52xx_PSC_RX_ENABLE
);
538 mpc52xx_uart_shutdown(struct uart_port
*port
)
540 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
542 /* Shut down the port. Leave TX active if on a console port */
543 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
544 if (!uart_console(port
))
545 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
547 port
->read_status_mask
= 0;
548 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
550 /* Release interrupt */
551 free_irq(port
->irq
, port
);
555 mpc52xx_uart_set_termios(struct uart_port
*port
, struct ktermios
*new,
556 struct ktermios
*old
)
558 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
560 unsigned char mr1
, mr2
;
562 unsigned int j
, baud
, quot
;
564 /* Prepare what we're gonna write */
567 switch (new->c_cflag
& CSIZE
) {
568 case CS5
: mr1
|= MPC52xx_PSC_MODE_5_BITS
;
570 case CS6
: mr1
|= MPC52xx_PSC_MODE_6_BITS
;
572 case CS7
: mr1
|= MPC52xx_PSC_MODE_7_BITS
;
575 default: mr1
|= MPC52xx_PSC_MODE_8_BITS
;
578 if (new->c_cflag
& PARENB
) {
579 mr1
|= (new->c_cflag
& PARODD
) ?
580 MPC52xx_PSC_MODE_PARODD
: MPC52xx_PSC_MODE_PAREVEN
;
582 mr1
|= MPC52xx_PSC_MODE_PARNONE
;
587 if (new->c_cflag
& CSTOPB
)
588 mr2
|= MPC52xx_PSC_MODE_TWO_STOP
;
590 mr2
|= ((new->c_cflag
& CSIZE
) == CS5
) ?
591 MPC52xx_PSC_MODE_ONE_STOP_5_BITS
:
592 MPC52xx_PSC_MODE_ONE_STOP
;
595 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
596 quot
= uart_get_divisor(port
, baud
);
600 spin_lock_irqsave(&port
->lock
, flags
);
602 /* Update the per-port timeout */
603 uart_update_timeout(port
, new->c_cflag
, baud
);
605 /* Do our best to flush TX & RX, so we don't loose anything */
606 /* But we don't wait indefinitly ! */
607 j
= 5000000; /* Maximum wait */
608 /* FIXME Can't receive chars since set_termios might be called at early
609 * boot for the console, all stuff is not yet ready to receive at that
610 * time and that just makes the kernel oops */
611 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
612 while (!mpc52xx_uart_tx_empty(port
) && --j
)
616 printk(KERN_ERR
"mpc52xx_uart.c: "
617 "Unable to flush RX & TX fifos in-time in set_termios."
618 "Some chars may have been lost.\n");
620 /* Reset the TX & RX */
621 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
622 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
624 /* Send new mode settings */
625 out_8(&psc
->command
, MPC52xx_PSC_SEL_MODE_REG_1
);
626 out_8(&psc
->mode
, mr1
);
627 out_8(&psc
->mode
, mr2
);
628 out_8(&psc
->ctur
, ctr
>> 8);
629 out_8(&psc
->ctlr
, ctr
& 0xff);
631 /* Reenable TX & RX */
632 out_8(&psc
->command
, MPC52xx_PSC_TX_ENABLE
);
633 out_8(&psc
->command
, MPC52xx_PSC_RX_ENABLE
);
635 /* We're all set, release the lock */
636 spin_unlock_irqrestore(&port
->lock
, flags
);
640 mpc52xx_uart_type(struct uart_port
*port
)
642 return port
->type
== PORT_MPC52xx
? "MPC52xx PSC" : NULL
;
646 mpc52xx_uart_release_port(struct uart_port
*port
)
648 /* remapped by us ? */
649 if (port
->flags
& UPF_IOREMAP
) {
650 iounmap(port
->membase
);
651 port
->membase
= NULL
;
654 release_mem_region(port
->mapbase
, sizeof(struct mpc52xx_psc
));
658 mpc52xx_uart_request_port(struct uart_port
*port
)
662 if (port
->flags
& UPF_IOREMAP
) /* Need to remap ? */
663 port
->membase
= ioremap(port
->mapbase
,
664 sizeof(struct mpc52xx_psc
));
669 err
= request_mem_region(port
->mapbase
, sizeof(struct mpc52xx_psc
),
670 "mpc52xx_psc_uart") != NULL
? 0 : -EBUSY
;
672 if (err
&& (port
->flags
& UPF_IOREMAP
)) {
673 iounmap(port
->membase
);
674 port
->membase
= NULL
;
681 mpc52xx_uart_config_port(struct uart_port
*port
, int flags
)
683 if ((flags
& UART_CONFIG_TYPE
)
684 && (mpc52xx_uart_request_port(port
) == 0))
685 port
->type
= PORT_MPC52xx
;
689 mpc52xx_uart_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
691 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_MPC52xx
)
694 if ((ser
->irq
!= port
->irq
) ||
695 (ser
->io_type
!= SERIAL_IO_MEM
) ||
696 (ser
->baud_base
!= port
->uartclk
) ||
697 (ser
->iomem_base
!= (void *)port
->mapbase
) ||
705 static struct uart_ops mpc52xx_uart_ops
= {
706 .tx_empty
= mpc52xx_uart_tx_empty
,
707 .set_mctrl
= mpc52xx_uart_set_mctrl
,
708 .get_mctrl
= mpc52xx_uart_get_mctrl
,
709 .stop_tx
= mpc52xx_uart_stop_tx
,
710 .start_tx
= mpc52xx_uart_start_tx
,
711 .send_xchar
= mpc52xx_uart_send_xchar
,
712 .stop_rx
= mpc52xx_uart_stop_rx
,
713 .enable_ms
= mpc52xx_uart_enable_ms
,
714 .break_ctl
= mpc52xx_uart_break_ctl
,
715 .startup
= mpc52xx_uart_startup
,
716 .shutdown
= mpc52xx_uart_shutdown
,
717 .set_termios
= mpc52xx_uart_set_termios
,
718 /* .pm = mpc52xx_uart_pm, Not supported yet */
719 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
720 .type
= mpc52xx_uart_type
,
721 .release_port
= mpc52xx_uart_release_port
,
722 .request_port
= mpc52xx_uart_request_port
,
723 .config_port
= mpc52xx_uart_config_port
,
724 .verify_port
= mpc52xx_uart_verify_port
728 /* ======================================================================== */
729 /* Interrupt handling */
730 /* ======================================================================== */
733 mpc52xx_uart_int_rx_chars(struct uart_port
*port
)
735 struct tty_struct
*tty
= port
->info
->tty
;
736 unsigned char ch
, flag
;
737 unsigned short status
;
739 /* While we can read, do so ! */
740 while (psc_ops
->raw_rx_rdy(port
)) {
742 ch
= psc_ops
->read_char(port
);
744 /* Handle sysreq char */
746 if (uart_handle_sysrq_char(port
, ch
)) {
757 status
= in_be16(&PSC(port
)->mpc52xx_psc_status
);
759 if (status
& (MPC52xx_PSC_SR_PE
|
761 MPC52xx_PSC_SR_RB
)) {
763 if (status
& MPC52xx_PSC_SR_RB
) {
765 uart_handle_break(port
);
766 } else if (status
& MPC52xx_PSC_SR_PE
)
768 else if (status
& MPC52xx_PSC_SR_FE
)
771 /* Clear error condition */
772 out_8(&PSC(port
)->command
, MPC52xx_PSC_RST_ERR_STAT
);
775 tty_insert_flip_char(tty
, ch
, flag
);
776 if (status
& MPC52xx_PSC_SR_OE
) {
778 * Overrun is special, since it's
779 * reported immediately, and doesn't
780 * affect the current character
782 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
786 spin_unlock(&port
->lock
);
787 tty_flip_buffer_push(tty
);
788 spin_lock(&port
->lock
);
790 return psc_ops
->raw_rx_rdy(port
);
794 mpc52xx_uart_int_tx_chars(struct uart_port
*port
)
796 struct circ_buf
*xmit
= &port
->info
->xmit
;
798 /* Process out of band chars */
800 psc_ops
->write_char(port
, port
->x_char
);
806 /* Nothing to do ? */
807 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
808 mpc52xx_uart_stop_tx(port
);
813 while (psc_ops
->raw_tx_rdy(port
)) {
814 psc_ops
->write_char(port
, xmit
->buf
[xmit
->tail
]);
815 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
817 if (uart_circ_empty(xmit
))
822 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
823 uart_write_wakeup(port
);
825 /* Maybe we're done after all */
826 if (uart_circ_empty(xmit
)) {
827 mpc52xx_uart_stop_tx(port
);
835 mpc52xx_uart_int(int irq
, void *dev_id
)
837 struct uart_port
*port
= dev_id
;
838 unsigned long pass
= ISR_PASS_LIMIT
;
839 unsigned int keepgoing
;
841 spin_lock(&port
->lock
);
843 /* While we have stuff to do, we continue */
845 /* If we don't find anything to do, we stop */
848 psc_ops
->rx_clr_irq(port
);
849 if (psc_ops
->rx_rdy(port
))
850 keepgoing
|= mpc52xx_uart_int_rx_chars(port
);
852 psc_ops
->tx_clr_irq(port
);
853 if (psc_ops
->tx_rdy(port
))
854 keepgoing
|= mpc52xx_uart_int_tx_chars(port
);
856 /* Limit number of iteration */
862 spin_unlock(&port
->lock
);
868 /* ======================================================================== */
869 /* Console ( if applicable ) */
870 /* ======================================================================== */
872 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
875 mpc52xx_console_get_options(struct uart_port
*port
,
876 int *baud
, int *parity
, int *bits
, int *flow
)
878 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
881 pr_debug("mpc52xx_console_get_options(port=%p)\n", port
);
883 /* Read the mode registers */
884 out_8(&psc
->command
, MPC52xx_PSC_SEL_MODE_REG_1
);
885 mr1
= in_8(&psc
->mode
);
887 /* CT{U,L}R are write-only ! */
888 *baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
889 #if !defined(CONFIG_PPC_MERGE)
890 if (__res
.bi_baudrate
)
891 *baud
= __res
.bi_baudrate
;
895 switch (mr1
& MPC52xx_PSC_MODE_BITS_MASK
) {
896 case MPC52xx_PSC_MODE_5_BITS
:
899 case MPC52xx_PSC_MODE_6_BITS
:
902 case MPC52xx_PSC_MODE_7_BITS
:
905 case MPC52xx_PSC_MODE_8_BITS
:
910 if (mr1
& MPC52xx_PSC_MODE_PARNONE
)
913 *parity
= mr1
& MPC52xx_PSC_MODE_PARODD
? 'o' : 'e';
917 mpc52xx_console_write(struct console
*co
, const char *s
, unsigned int count
)
919 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
922 /* Disable interrupts */
923 psc_ops
->cw_disable_ints(port
);
925 /* Wait the TX buffer to be empty */
926 j
= 5000000; /* Maximum wait */
927 while (!mpc52xx_uart_tx_empty(port
) && --j
)
930 /* Write all the chars */
931 for (i
= 0; i
< count
; i
++, s
++) {
932 /* Line return handling */
934 psc_ops
->write_char(port
, '\r');
937 psc_ops
->write_char(port
, *s
);
939 /* Wait the TX buffer to be empty */
940 j
= 20000; /* Maximum wait */
941 while (!mpc52xx_uart_tx_empty(port
) && --j
)
945 /* Restore interrupt state */
946 psc_ops
->cw_restore_ints(port
);
949 #if !defined(CONFIG_PPC_MERGE)
951 mpc52xx_console_setup(struct console
*co
, char *options
)
953 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
955 int baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
960 if (co
->index
< 0 || co
->index
>= MPC52xx_PSC_MAXNUM
)
963 /* Basic port init. Needed since we use some uart_??? func before
964 * real init for early access */
965 spin_lock_init(&port
->lock
);
966 port
->uartclk
= __res
.bi_ipbfreq
/ 2; /* Look at CTLR doc */
967 port
->ops
= &mpc52xx_uart_ops
;
968 port
->mapbase
= MPC52xx_PA(MPC52xx_PSCx_OFFSET(co
->index
+1));
970 /* We ioremap ourself */
971 port
->membase
= ioremap(port
->mapbase
, MPC52xx_PSC_SIZE
);
972 if (port
->membase
== NULL
)
975 /* Setup the port parameters accoding to options */
977 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
979 mpc52xx_console_get_options(port
, &baud
, &parity
, &bits
, &flow
);
981 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
987 mpc52xx_console_setup(struct console
*co
, char *options
)
989 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
990 struct device_node
*np
= mpc52xx_uart_nodes
[co
->index
];
991 unsigned int uartclk
;
995 int baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
1000 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
1001 co
, co
->index
, options
);
1003 if ((co
->index
< 0) || (co
->index
> MPC52xx_PSC_MAXNUM
)) {
1004 pr_debug("PSC%x out of range\n", co
->index
);
1009 pr_debug("PSC%x not found in device tree\n", co
->index
);
1013 pr_debug("Console on ttyPSC%x is %s\n",
1014 co
->index
, mpc52xx_uart_nodes
[co
->index
]->full_name
);
1016 /* Fetch register locations */
1017 ret
= of_address_to_resource(np
, 0, &res
);
1019 pr_debug("Could not get resources for PSC%x\n", co
->index
);
1023 uartclk
= psc_ops
->getuartclk(np
);
1025 pr_debug("Could not find uart clock frequency!\n");
1029 /* Basic port init. Needed since we use some uart_??? func before
1030 * real init for early access */
1031 spin_lock_init(&port
->lock
);
1032 port
->uartclk
= uartclk
;
1033 port
->ops
= &mpc52xx_uart_ops
;
1034 port
->mapbase
= res
.start
;
1035 port
->membase
= ioremap(res
.start
, sizeof(struct mpc52xx_psc
));
1036 port
->irq
= irq_of_parse_and_map(np
, 0);
1038 if (port
->membase
== NULL
)
1041 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1042 (void *)port
->mapbase
, port
->membase
,
1043 port
->irq
, port
->uartclk
);
1045 /* Setup the port parameters accoding to options */
1047 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1049 mpc52xx_console_get_options(port
, &baud
, &parity
, &bits
, &flow
);
1051 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1052 baud
, bits
, parity
, flow
);
1054 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1056 #endif /* defined(CONFIG_PPC_MERGE) */
1059 static struct uart_driver mpc52xx_uart_driver
;
1061 static struct console mpc52xx_console
= {
1063 .write
= mpc52xx_console_write
,
1064 .device
= uart_console_device
,
1065 .setup
= mpc52xx_console_setup
,
1066 .flags
= CON_PRINTBUFFER
,
1067 .index
= -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1068 .data
= &mpc52xx_uart_driver
,
1073 mpc52xx_console_init(void)
1075 #if defined(CONFIG_PPC_MERGE)
1076 mpc52xx_uart_of_enumerate();
1078 register_console(&mpc52xx_console
);
1082 console_initcall(mpc52xx_console_init
);
1084 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1086 #define MPC52xx_PSC_CONSOLE NULL
1090 /* ======================================================================== */
1092 /* ======================================================================== */
1094 static struct uart_driver mpc52xx_uart_driver
= {
1095 .driver_name
= "mpc52xx_psc_uart",
1096 .dev_name
= "ttyPSC",
1097 .major
= SERIAL_PSC_MAJOR
,
1098 .minor
= SERIAL_PSC_MINOR
,
1099 .nr
= MPC52xx_PSC_MAXNUM
,
1100 .cons
= MPC52xx_PSC_CONSOLE
,
1104 #if !defined(CONFIG_PPC_MERGE)
1105 /* ======================================================================== */
1106 /* Platform Driver */
1107 /* ======================================================================== */
1109 static int __devinit
1110 mpc52xx_uart_probe(struct platform_device
*dev
)
1112 struct resource
*res
= dev
->resource
;
1114 struct uart_port
*port
= NULL
;
1117 /* Check validity & presence */
1119 if (idx
< 0 || idx
>= MPC52xx_PSC_MAXNUM
)
1122 if (!mpc52xx_match_psc_function(idx
, "uart"))
1125 /* Init the port structure */
1126 port
= &mpc52xx_uart_ports
[idx
];
1128 spin_lock_init(&port
->lock
);
1129 port
->uartclk
= __res
.bi_ipbfreq
/ 2; /* Look at CTLR doc */
1130 port
->fifosize
= 512;
1131 port
->iotype
= UPIO_MEM
;
1132 port
->flags
= UPF_BOOT_AUTOCONF
|
1133 (uart_console(port
) ? 0 : UPF_IOREMAP
);
1135 port
->ops
= &mpc52xx_uart_ops
;
1136 port
->dev
= &dev
->dev
;
1138 /* Search for IRQ and mapbase */
1139 for (i
= 0 ; i
< dev
->num_resources
; i
++, res
++) {
1140 if (res
->flags
& IORESOURCE_MEM
)
1141 port
->mapbase
= res
->start
;
1142 else if (res
->flags
& IORESOURCE_IRQ
)
1143 port
->irq
= res
->start
;
1145 if (!port
->irq
|| !port
->mapbase
)
1148 /* Add the port to the uart sub-system */
1149 ret
= uart_add_one_port(&mpc52xx_uart_driver
, port
);
1151 platform_set_drvdata(dev
, (void *)port
);
1157 mpc52xx_uart_remove(struct platform_device
*dev
)
1159 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
1161 platform_set_drvdata(dev
, NULL
);
1164 uart_remove_one_port(&mpc52xx_uart_driver
, port
);
1171 mpc52xx_uart_suspend(struct platform_device
*dev
, pm_message_t state
)
1173 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
1176 uart_suspend_port(&mpc52xx_uart_driver
, port
);
1182 mpc52xx_uart_resume(struct platform_device
*dev
)
1184 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
1187 uart_resume_port(&mpc52xx_uart_driver
, port
);
1193 /* work with hotplug and coldplug */
1194 MODULE_ALIAS("platform:mpc52xx-psc");
1196 static struct platform_driver mpc52xx_uart_platform_driver
= {
1197 .probe
= mpc52xx_uart_probe
,
1198 .remove
= mpc52xx_uart_remove
,
1200 .suspend
= mpc52xx_uart_suspend
,
1201 .resume
= mpc52xx_uart_resume
,
1204 .owner
= THIS_MODULE
,
1205 .name
= "mpc52xx-psc",
1208 #endif /* !defined(CONFIG_PPC_MERGE) */
1211 #if defined(CONFIG_PPC_MERGE)
1212 /* ======================================================================== */
1213 /* OF Platform Driver */
1214 /* ======================================================================== */
1216 static struct of_device_id mpc52xx_uart_of_match
[] = {
1217 #ifdef CONFIG_PPC_MPC52xx
1218 { .compatible
= "fsl,mpc5200-psc-uart", .data
= &mpc52xx_psc_ops
, },
1219 /* binding used by old lite5200 device trees: */
1220 { .compatible
= "mpc5200-psc-uart", .data
= &mpc52xx_psc_ops
, },
1221 /* binding used by efika: */
1222 { .compatible
= "mpc5200-serial", .data
= &mpc52xx_psc_ops
, },
1224 #ifdef CONFIG_PPC_MPC512x
1225 { .compatible
= "fsl,mpc5121-psc-uart", .data
= &mpc512x_psc_ops
, },
1230 static int __devinit
1231 mpc52xx_uart_of_probe(struct of_device
*op
, const struct of_device_id
*match
)
1234 unsigned int uartclk
;
1235 struct uart_port
*port
= NULL
;
1236 struct resource res
;
1239 dev_dbg(&op
->dev
, "mpc52xx_uart_probe(op=%p, match=%p)\n", op
, match
);
1241 /* Check validity & presence */
1242 for (idx
= 0; idx
< MPC52xx_PSC_MAXNUM
; idx
++)
1243 if (mpc52xx_uart_nodes
[idx
] == op
->node
)
1245 if (idx
>= MPC52xx_PSC_MAXNUM
)
1247 pr_debug("Found %s assigned to ttyPSC%x\n",
1248 mpc52xx_uart_nodes
[idx
]->full_name
, idx
);
1250 uartclk
= psc_ops
->getuartclk(op
->node
);
1252 dev_dbg(&op
->dev
, "Could not find uart clock frequency!\n");
1256 /* Init the port structure */
1257 port
= &mpc52xx_uart_ports
[idx
];
1259 spin_lock_init(&port
->lock
);
1260 port
->uartclk
= uartclk
;
1261 port
->fifosize
= 512;
1262 port
->iotype
= UPIO_MEM
;
1263 port
->flags
= UPF_BOOT_AUTOCONF
|
1264 (uart_console(port
) ? 0 : UPF_IOREMAP
);
1266 port
->ops
= &mpc52xx_uart_ops
;
1267 port
->dev
= &op
->dev
;
1269 /* Search for IRQ and mapbase */
1270 ret
= of_address_to_resource(op
->node
, 0, &res
);
1274 port
->mapbase
= res
.start
;
1275 port
->irq
= irq_of_parse_and_map(op
->node
, 0);
1277 dev_dbg(&op
->dev
, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1278 (void *)port
->mapbase
, port
->irq
, port
->uartclk
);
1280 if ((port
->irq
== NO_IRQ
) || !port
->mapbase
) {
1281 printk(KERN_ERR
"Could not allocate resources for PSC\n");
1285 /* Add the port to the uart sub-system */
1286 ret
= uart_add_one_port(&mpc52xx_uart_driver
, port
);
1288 dev_set_drvdata(&op
->dev
, (void *)port
);
1294 mpc52xx_uart_of_remove(struct of_device
*op
)
1296 struct uart_port
*port
= dev_get_drvdata(&op
->dev
);
1297 dev_set_drvdata(&op
->dev
, NULL
);
1300 uart_remove_one_port(&mpc52xx_uart_driver
, port
);
1301 irq_dispose_mapping(port
->irq
);
1309 mpc52xx_uart_of_suspend(struct of_device
*op
, pm_message_t state
)
1311 struct uart_port
*port
= (struct uart_port
*) dev_get_drvdata(&op
->dev
);
1314 uart_suspend_port(&mpc52xx_uart_driver
, port
);
1320 mpc52xx_uart_of_resume(struct of_device
*op
)
1322 struct uart_port
*port
= (struct uart_port
*) dev_get_drvdata(&op
->dev
);
1325 uart_resume_port(&mpc52xx_uart_driver
, port
);
1332 mpc52xx_uart_of_assign(struct device_node
*np
, int idx
)
1337 /* Find the first free node */
1338 for (i
= 0; i
< MPC52xx_PSC_MAXNUM
; i
++) {
1339 if (mpc52xx_uart_nodes
[i
] == NULL
) {
1345 if ((idx
< 0) || (idx
>= MPC52xx_PSC_MAXNUM
))
1349 return; /* No free slot; abort */
1352 /* If the slot is already occupied, then swap slots */
1353 if (mpc52xx_uart_nodes
[idx
] && (free_idx
!= -1))
1354 mpc52xx_uart_nodes
[free_idx
] = mpc52xx_uart_nodes
[idx
];
1355 mpc52xx_uart_nodes
[idx
] = np
;
1359 mpc52xx_uart_of_enumerate(void)
1361 static int enum_done
;
1362 struct device_node
*np
;
1363 const unsigned int *devno
;
1364 const struct of_device_id
*match
;
1370 for_each_node_by_type(np
, "serial") {
1371 match
= of_match_node(mpc52xx_uart_of_match
, np
);
1375 psc_ops
= match
->data
;
1377 /* Is a particular device number requested? */
1378 devno
= of_get_property(np
, "port-number", NULL
);
1379 mpc52xx_uart_of_assign(np
, devno
? *devno
: -1);
1384 for (i
= 0; i
< MPC52xx_PSC_MAXNUM
; i
++) {
1385 if (mpc52xx_uart_nodes
[i
])
1386 pr_debug("%s assigned to ttyPSC%x\n",
1387 mpc52xx_uart_nodes
[i
]->full_name
, i
);
1391 MODULE_DEVICE_TABLE(of
, mpc52xx_uart_of_match
);
1393 static struct of_platform_driver mpc52xx_uart_of_driver
= {
1394 .match_table
= mpc52xx_uart_of_match
,
1395 .probe
= mpc52xx_uart_of_probe
,
1396 .remove
= mpc52xx_uart_of_remove
,
1398 .suspend
= mpc52xx_uart_of_suspend
,
1399 .resume
= mpc52xx_uart_of_resume
,
1402 .name
= "mpc52xx-psc-uart",
1405 #endif /* defined(CONFIG_PPC_MERGE) */
1408 /* ======================================================================== */
1410 /* ======================================================================== */
1413 mpc52xx_uart_init(void)
1417 printk(KERN_INFO
"Serial: MPC52xx PSC UART driver\n");
1419 ret
= uart_register_driver(&mpc52xx_uart_driver
);
1421 printk(KERN_ERR
"%s: uart_register_driver failed (%i)\n",
1426 #if defined(CONFIG_PPC_MERGE)
1427 mpc52xx_uart_of_enumerate();
1429 ret
= of_register_platform_driver(&mpc52xx_uart_of_driver
);
1431 printk(KERN_ERR
"%s: of_register_platform_driver failed (%i)\n",
1433 uart_unregister_driver(&mpc52xx_uart_driver
);
1437 psc_ops
= &mpc52xx_psc_ops
;
1438 ret
= platform_driver_register(&mpc52xx_uart_platform_driver
);
1440 printk(KERN_ERR
"%s: platform_driver_register failed (%i)\n",
1442 uart_unregister_driver(&mpc52xx_uart_driver
);
1451 mpc52xx_uart_exit(void)
1453 #if defined(CONFIG_PPC_MERGE)
1454 of_unregister_platform_driver(&mpc52xx_uart_of_driver
);
1456 platform_driver_unregister(&mpc52xx_uart_platform_driver
);
1458 uart_unregister_driver(&mpc52xx_uart_driver
);
1462 module_init(mpc52xx_uart_init
);
1463 module_exit(mpc52xx_uart_exit
);
1465 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1466 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1467 MODULE_LICENSE("GPL");