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[NET]: Implement network device movement between namespaces
[linux-2.6/kmemtrace.git] / drivers / serial / serial_txx9.c
blob0930e2a855147d3deb47bc4b9e7ef78a028af667
1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 */
19
20 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
21 #define SUPPORT_SYSRQ
22 #endif
23
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/pci.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/mutex.h>
37
38 #include <asm/io.h>
39
40 static char *serial_version = "1.10";
41 static char *serial_name = "TX39/49 Serial driver";
42
43 #define PASS_LIMIT 256
44
45 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
46 /* "ttyS" is used for standard serial driver */
47 #define TXX9_TTY_NAME "ttyTX"
48 #define TXX9_TTY_MINOR_START 196
49 #define TXX9_TTY_MAJOR 204
50 #else
51 /* acts like standard serial driver */
52 #define TXX9_TTY_NAME "ttyS"
53 #define TXX9_TTY_MINOR_START 64
54 #define TXX9_TTY_MAJOR TTY_MAJOR
55 #endif
56
57 /* flag aliases */
58 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
59 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
60
61 #ifdef CONFIG_PCI
62 /* support for Toshiba TC86C001 SIO */
63 #define ENABLE_SERIAL_TXX9_PCI
64 #endif
65
66 /*
67 * Number of serial ports
68 */
69 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
70
71 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
72
73 struct uart_txx9_port {
74 struct uart_port port;
75 /* No additional info for now */
76 };
77
78 #define TXX9_REGION_SIZE 0x24
79
80 /* TXX9 Serial Registers */
81 #define TXX9_SILCR 0x00
82 #define TXX9_SIDICR 0x04
83 #define TXX9_SIDISR 0x08
84 #define TXX9_SICISR 0x0c
85 #define TXX9_SIFCR 0x10
86 #define TXX9_SIFLCR 0x14
87 #define TXX9_SIBGR 0x18
88 #define TXX9_SITFIFO 0x1c
89 #define TXX9_SIRFIFO 0x20
90
91 /* SILCR : Line Control */
92 #define TXX9_SILCR_SCS_MASK 0x00000060
93 #define TXX9_SILCR_SCS_IMCLK 0x00000000
94 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
95 #define TXX9_SILCR_SCS_SCLK 0x00000040
96 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
97 #define TXX9_SILCR_UEPS 0x00000010
98 #define TXX9_SILCR_UPEN 0x00000008
99 #define TXX9_SILCR_USBL_MASK 0x00000004
100 #define TXX9_SILCR_USBL_1BIT 0x00000000
101 #define TXX9_SILCR_USBL_2BIT 0x00000004
102 #define TXX9_SILCR_UMODE_MASK 0x00000003
103 #define TXX9_SILCR_UMODE_8BIT 0x00000000
104 #define TXX9_SILCR_UMODE_7BIT 0x00000001
105
106 /* SIDICR : DMA/Int. Control */
107 #define TXX9_SIDICR_TDE 0x00008000
108 #define TXX9_SIDICR_RDE 0x00004000
109 #define TXX9_SIDICR_TIE 0x00002000
110 #define TXX9_SIDICR_RIE 0x00001000
111 #define TXX9_SIDICR_SPIE 0x00000800
112 #define TXX9_SIDICR_CTSAC 0x00000600
113 #define TXX9_SIDICR_STIE_MASK 0x0000003f
114 #define TXX9_SIDICR_STIE_OERS 0x00000020
115 #define TXX9_SIDICR_STIE_CTSS 0x00000010
116 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
117 #define TXX9_SIDICR_STIE_TRDY 0x00000004
118 #define TXX9_SIDICR_STIE_TXALS 0x00000002
119 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
120
121 /* SIDISR : DMA/Int. Status */
122 #define TXX9_SIDISR_UBRK 0x00008000
123 #define TXX9_SIDISR_UVALID 0x00004000
124 #define TXX9_SIDISR_UFER 0x00002000
125 #define TXX9_SIDISR_UPER 0x00001000
126 #define TXX9_SIDISR_UOER 0x00000800
127 #define TXX9_SIDISR_ERI 0x00000400
128 #define TXX9_SIDISR_TOUT 0x00000200
129 #define TXX9_SIDISR_TDIS 0x00000100
130 #define TXX9_SIDISR_RDIS 0x00000080
131 #define TXX9_SIDISR_STIS 0x00000040
132 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
133
134 /* SICISR : Change Int. Status */
135 #define TXX9_SICISR_OERS 0x00000020
136 #define TXX9_SICISR_CTSS 0x00000010
137 #define TXX9_SICISR_RBRKD 0x00000008
138 #define TXX9_SICISR_TRDY 0x00000004
139 #define TXX9_SICISR_TXALS 0x00000002
140 #define TXX9_SICISR_UBRKD 0x00000001
141
142 /* SIFCR : FIFO Control */
143 #define TXX9_SIFCR_SWRST 0x00008000
144 #define TXX9_SIFCR_RDIL_MASK 0x00000180
145 #define TXX9_SIFCR_RDIL_1 0x00000000
146 #define TXX9_SIFCR_RDIL_4 0x00000080
147 #define TXX9_SIFCR_RDIL_8 0x00000100
148 #define TXX9_SIFCR_RDIL_12 0x00000180
149 #define TXX9_SIFCR_RDIL_MAX 0x00000180
150 #define TXX9_SIFCR_TDIL_MASK 0x00000018
151 #define TXX9_SIFCR_TDIL_MASK 0x00000018
152 #define TXX9_SIFCR_TDIL_1 0x00000000
153 #define TXX9_SIFCR_TDIL_4 0x00000001
154 #define TXX9_SIFCR_TDIL_8 0x00000010
155 #define TXX9_SIFCR_TDIL_MAX 0x00000010
156 #define TXX9_SIFCR_TFRST 0x00000004
157 #define TXX9_SIFCR_RFRST 0x00000002
158 #define TXX9_SIFCR_FRSTE 0x00000001
159 #define TXX9_SIO_TX_FIFO 8
160 #define TXX9_SIO_RX_FIFO 16
161
162 /* SIFLCR : Flow Control */
163 #define TXX9_SIFLCR_RCS 0x00001000
164 #define TXX9_SIFLCR_TES 0x00000800
165 #define TXX9_SIFLCR_RTSSC 0x00000200
166 #define TXX9_SIFLCR_RSDE 0x00000100
167 #define TXX9_SIFLCR_TSDE 0x00000080
168 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
169 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
170 #define TXX9_SIFLCR_TBRK 0x00000001
171
172 /* SIBGR : Baudrate Control */
173 #define TXX9_SIBGR_BCLK_MASK 0x00000300
174 #define TXX9_SIBGR_BCLK_T0 0x00000000
175 #define TXX9_SIBGR_BCLK_T2 0x00000100
176 #define TXX9_SIBGR_BCLK_T4 0x00000200
177 #define TXX9_SIBGR_BCLK_T6 0x00000300
178 #define TXX9_SIBGR_BRD_MASK 0x000000ff
179
180 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
181 {
182 switch (up->port.iotype) {
183 default:
184 return __raw_readl(up->port.membase + offset);
185 case UPIO_PORT:
186 return inl(up->port.iobase + offset);
187 }
188 }
189
190 static inline void
191 sio_out(struct uart_txx9_port *up, int offset, int value)
192 {
193 switch (up->port.iotype) {
194 default:
195 __raw_writel(value, up->port.membase + offset);
196 break;
197 case UPIO_PORT:
198 outl(value, up->port.iobase + offset);
199 break;
200 }
201 }
202
203 static inline void
204 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
205 {
206 sio_out(up, offset, sio_in(up, offset) & ~value);
207 }
208 static inline void
209 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
210 {
211 sio_out(up, offset, sio_in(up, offset) | value);
212 }
213
214 static inline void
215 sio_quot_set(struct uart_txx9_port *up, int quot)
216 {
217 quot >>= 1;
218 if (quot < 256)
219 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
220 else if (quot < (256 << 2))
221 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
222 else if (quot < (256 << 4))
223 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
224 else if (quot < (256 << 6))
225 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
226 else
227 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
228 }
229
230 static void serial_txx9_stop_tx(struct uart_port *port)
231 {
232 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
233 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
234 }
235
236 static void serial_txx9_start_tx(struct uart_port *port)
237 {
238 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
239 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
240 }
241
242 static void serial_txx9_stop_rx(struct uart_port *port)
243 {
244 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
245 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
246 }
247
248 static void serial_txx9_enable_ms(struct uart_port *port)
249 {
250 /* TXX9-SIO can not control DTR... */
251 }
252
253 static void serial_txx9_initialize(struct uart_port *port)
254 {
255 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
256 unsigned int tmout = 10000;
257
258 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
259 /* TX4925 BUG WORKAROUND. Accessing SIOC register
260 * immediately after soft reset causes bus error. */
261 mmiowb();
262 udelay(1);
263 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
264 udelay(1);
265 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
266 sio_set(up, TXX9_SIFCR,
267 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
268 /* initial settings */
269 sio_out(up, TXX9_SILCR,
270 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
271 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
272 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
273 sio_quot_set(up, uart_get_divisor(port, 9600));
274 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
275 sio_out(up, TXX9_SIDICR, 0);
276 }
277
278 static inline void
279 receive_chars(struct uart_txx9_port *up, unsigned int *status)
280 {
281 struct tty_struct *tty = up->port.info->tty;
282 unsigned char ch;
283 unsigned int disr = *status;
284 int max_count = 256;
285 char flag;
286 unsigned int next_ignore_status_mask;
287
288 do {
289 ch = sio_in(up, TXX9_SIRFIFO);
290 flag = TTY_NORMAL;
291 up->port.icount.rx++;
292
293 /* mask out RFDN_MASK bit added by previous overrun */
294 next_ignore_status_mask =
295 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
296 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
297 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
298 /*
299 * For statistics only
300 */
301 if (disr & TXX9_SIDISR_UBRK) {
302 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
303 up->port.icount.brk++;
304 /*
305 * We do the SysRQ and SAK checking
306 * here because otherwise the break
307 * may get masked by ignore_status_mask
308 * or read_status_mask.
309 */
310 if (uart_handle_break(&up->port))
311 goto ignore_char;
312 } else if (disr & TXX9_SIDISR_UPER)
313 up->port.icount.parity++;
314 else if (disr & TXX9_SIDISR_UFER)
315 up->port.icount.frame++;
316 if (disr & TXX9_SIDISR_UOER) {
317 up->port.icount.overrun++;
318 /*
319 * The receiver read buffer still hold
320 * a char which caused overrun.
321 * Ignore next char by adding RFDN_MASK
322 * to ignore_status_mask temporarily.
323 */
324 next_ignore_status_mask |=
325 TXX9_SIDISR_RFDN_MASK;
326 }
327
328 /*
329 * Mask off conditions which should be ingored.
330 */
331 disr &= up->port.read_status_mask;
332
333 if (disr & TXX9_SIDISR_UBRK) {
334 flag = TTY_BREAK;
335 } else if (disr & TXX9_SIDISR_UPER)
336 flag = TTY_PARITY;
337 else if (disr & TXX9_SIDISR_UFER)
338 flag = TTY_FRAME;
339 }
340 if (uart_handle_sysrq_char(&up->port, ch))
341 goto ignore_char;
342
343 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
344
345 ignore_char:
346 up->port.ignore_status_mask = next_ignore_status_mask;
347 disr = sio_in(up, TXX9_SIDISR);
348 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
349 spin_unlock(&up->port.lock);
350 tty_flip_buffer_push(tty);
351 spin_lock(&up->port.lock);
352 *status = disr;
353 }
354
355 static inline void transmit_chars(struct uart_txx9_port *up)
356 {
357 struct circ_buf *xmit = &up->port.info->xmit;
358 int count;
359
360 if (up->port.x_char) {
361 sio_out(up, TXX9_SITFIFO, up->port.x_char);
362 up->port.icount.tx++;
363 up->port.x_char = 0;
364 return;
365 }
366 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
367 serial_txx9_stop_tx(&up->port);
368 return;
369 }
370
371 count = TXX9_SIO_TX_FIFO;
372 do {
373 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
374 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
375 up->port.icount.tx++;
376 if (uart_circ_empty(xmit))
377 break;
378 } while (--count > 0);
379
380 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
381 uart_write_wakeup(&up->port);
382
383 if (uart_circ_empty(xmit))
384 serial_txx9_stop_tx(&up->port);
385 }
386
387 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
388 {
389 int pass_counter = 0;
390 struct uart_txx9_port *up = dev_id;
391 unsigned int status;
392
393 while (1) {
394 spin_lock(&up->port.lock);
395 status = sio_in(up, TXX9_SIDISR);
396 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
397 status &= ~TXX9_SIDISR_TDIS;
398 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
399 TXX9_SIDISR_TOUT))) {
400 spin_unlock(&up->port.lock);
401 break;
402 }
403
404 if (status & TXX9_SIDISR_RDIS)
405 receive_chars(up, &status);
406 if (status & TXX9_SIDISR_TDIS)
407 transmit_chars(up);
408 /* Clear TX/RX Int. Status */
409 sio_mask(up, TXX9_SIDISR,
410 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
411 TXX9_SIDISR_TOUT);
412 spin_unlock(&up->port.lock);
413
414 if (pass_counter++ > PASS_LIMIT)
415 break;
416 }
417
418 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
419 }
420
421 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
422 {
423 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
424 unsigned long flags;
425 unsigned int ret;
426
427 spin_lock_irqsave(&up->port.lock, flags);
428 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
429 spin_unlock_irqrestore(&up->port.lock, flags);
430
431 return ret;
432 }
433
434 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
435 {
436 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
437 unsigned int ret;
438
439 /* no modem control lines */
440 ret = TIOCM_CAR | TIOCM_DSR;
441 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
442 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
443
444 return ret;
445 }
446
447 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
448 {
449 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
450
451 if (mctrl & TIOCM_RTS)
452 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
453 else
454 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
455 }
456
457 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
458 {
459 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
460 unsigned long flags;
461
462 spin_lock_irqsave(&up->port.lock, flags);
463 if (break_state == -1)
464 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
465 else
466 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
467 spin_unlock_irqrestore(&up->port.lock, flags);
468 }
469
470 static int serial_txx9_startup(struct uart_port *port)
471 {
472 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
473 unsigned long flags;
474 int retval;
475
476 /*
477 * Clear the FIFO buffers and disable them.
478 * (they will be reenabled in set_termios())
479 */
480 sio_set(up, TXX9_SIFCR,
481 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
482 /* clear reset */
483 sio_mask(up, TXX9_SIFCR,
484 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
485 sio_out(up, TXX9_SIDICR, 0);
486
487 /*
488 * Clear the interrupt registers.
489 */
490 sio_out(up, TXX9_SIDISR, 0);
491
492 retval = request_irq(up->port.irq, serial_txx9_interrupt,
493 IRQF_SHARED, "serial_txx9", up);
494 if (retval)
495 return retval;
496
497 /*
498 * Now, initialize the UART
499 */
500 spin_lock_irqsave(&up->port.lock, flags);
501 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
502 spin_unlock_irqrestore(&up->port.lock, flags);
503
504 /* Enable RX/TX */
505 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
506
507 /*
508 * Finally, enable interrupts.
509 */
510 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
511
512 return 0;
513 }
514
515 static void serial_txx9_shutdown(struct uart_port *port)
516 {
517 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
518 unsigned long flags;
519
520 /*
521 * Disable interrupts from this port
522 */
523 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
524
525 spin_lock_irqsave(&up->port.lock, flags);
526 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
527 spin_unlock_irqrestore(&up->port.lock, flags);
528
529 /*
530 * Disable break condition
531 */
532 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
533
534 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
535 if (up->port.cons && up->port.line == up->port.cons->index) {
536 free_irq(up->port.irq, up);
537 return;
538 }
539 #endif
540 /* reset FIFOs */
541 sio_set(up, TXX9_SIFCR,
542 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
543 /* clear reset */
544 sio_mask(up, TXX9_SIFCR,
545 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
546
547 /* Disable RX/TX */
548 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
549
550 free_irq(up->port.irq, up);
551 }
552
553 static void
554 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
555 struct ktermios *old)
556 {
557 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
558 unsigned int cval, fcr = 0;
559 unsigned long flags;
560 unsigned int baud, quot;
561
562 /*
563 * We don't support modem control lines.
564 */
565 termios->c_cflag &= ~(HUPCL | CMSPAR);
566 termios->c_cflag |= CLOCAL;
567
568 cval = sio_in(up, TXX9_SILCR);
569 /* byte size and parity */
570 cval &= ~TXX9_SILCR_UMODE_MASK;
571 switch (termios->c_cflag & CSIZE) {
572 case CS7:
573 cval |= TXX9_SILCR_UMODE_7BIT;
574 break;
575 default:
576 case CS5: /* not supported */
577 case CS6: /* not supported */
578 case CS8:
579 cval |= TXX9_SILCR_UMODE_8BIT;
580 break;
581 }
582
583 cval &= ~TXX9_SILCR_USBL_MASK;
584 if (termios->c_cflag & CSTOPB)
585 cval |= TXX9_SILCR_USBL_2BIT;
586 else
587 cval |= TXX9_SILCR_USBL_1BIT;
588 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
589 if (termios->c_cflag & PARENB)
590 cval |= TXX9_SILCR_UPEN;
591 if (!(termios->c_cflag & PARODD))
592 cval |= TXX9_SILCR_UEPS;
593
594 /*
595 * Ask the core to calculate the divisor for us.
596 */
597 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
598 quot = uart_get_divisor(port, baud);
599
600 /* Set up FIFOs */
601 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
602 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
603
604 /*
605 * Ok, we're now changing the port state. Do it with
606 * interrupts disabled.
607 */
608 spin_lock_irqsave(&up->port.lock, flags);
609
610 /*
611 * Update the per-port timeout.
612 */
613 uart_update_timeout(port, termios->c_cflag, baud);
614
615 up->port.read_status_mask = TXX9_SIDISR_UOER |
616 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
617 if (termios->c_iflag & INPCK)
618 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
619 if (termios->c_iflag & (BRKINT | PARMRK))
620 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
621
622 /*
623 * Characteres to ignore
624 */
625 up->port.ignore_status_mask = 0;
626 if (termios->c_iflag & IGNPAR)
627 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
628 if (termios->c_iflag & IGNBRK) {
629 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
630 /*
631 * If we're ignoring parity and break indicators,
632 * ignore overruns too (for real raw support).
633 */
634 if (termios->c_iflag & IGNPAR)
635 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
636 }
637
638 /*
639 * ignore all characters if CREAD is not set
640 */
641 if ((termios->c_cflag & CREAD) == 0)
642 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
643
644 /* CTS flow control flag */
645 if ((termios->c_cflag & CRTSCTS) &&
646 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
647 sio_set(up, TXX9_SIFLCR,
648 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
649 } else {
650 sio_mask(up, TXX9_SIFLCR,
651 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
652 }
653
654 sio_out(up, TXX9_SILCR, cval);
655 sio_quot_set(up, quot);
656 sio_out(up, TXX9_SIFCR, fcr);
657
658 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
659 spin_unlock_irqrestore(&up->port.lock, flags);
660 }
661
662 static void
663 serial_txx9_pm(struct uart_port *port, unsigned int state,
664 unsigned int oldstate)
665 {
666 if (state == 0)
667 serial_txx9_initialize(port);
668 }
669
670 static int serial_txx9_request_resource(struct uart_txx9_port *up)
671 {
672 unsigned int size = TXX9_REGION_SIZE;
673 int ret = 0;
674
675 switch (up->port.iotype) {
676 default:
677 if (!up->port.mapbase)
678 break;
679
680 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
681 ret = -EBUSY;
682 break;
683 }
684
685 if (up->port.flags & UPF_IOREMAP) {
686 up->port.membase = ioremap(up->port.mapbase, size);
687 if (!up->port.membase) {
688 release_mem_region(up->port.mapbase, size);
689 ret = -ENOMEM;
690 }
691 }
692 break;
693
694 case UPIO_PORT:
695 if (!request_region(up->port.iobase, size, "serial_txx9"))
696 ret = -EBUSY;
697 break;
698 }
699 return ret;
700 }
701
702 static void serial_txx9_release_resource(struct uart_txx9_port *up)
703 {
704 unsigned int size = TXX9_REGION_SIZE;
705
706 switch (up->port.iotype) {
707 default:
708 if (!up->port.mapbase)
709 break;
710
711 if (up->port.flags & UPF_IOREMAP) {
712 iounmap(up->port.membase);
713 up->port.membase = NULL;
714 }
715
716 release_mem_region(up->port.mapbase, size);
717 break;
718
719 case UPIO_PORT:
720 release_region(up->port.iobase, size);
721 break;
722 }
723 }
724
725 static void serial_txx9_release_port(struct uart_port *port)
726 {
727 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
728 serial_txx9_release_resource(up);
729 }
730
731 static int serial_txx9_request_port(struct uart_port *port)
732 {
733 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
734 return serial_txx9_request_resource(up);
735 }
736
737 static void serial_txx9_config_port(struct uart_port *port, int uflags)
738 {
739 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
740 int ret;
741
742 /*
743 * Find the region that we can probe for. This in turn
744 * tells us whether we can probe for the type of port.
745 */
746 ret = serial_txx9_request_resource(up);
747 if (ret < 0)
748 return;
749 port->type = PORT_TXX9;
750 up->port.fifosize = TXX9_SIO_TX_FIFO;
751
752 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
753 if (up->port.line == up->port.cons->index)
754 return;
755 #endif
756 serial_txx9_initialize(port);
757 }
758
759 static int
760 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
761 {
762 unsigned long new_port = ser->port;
763 if (HIGH_BITS_OFFSET)
764 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
765 if (ser->type != port->type ||
766 ser->irq != port->irq ||
767 ser->io_type != port->iotype ||
768 new_port != port->iobase ||
769 (unsigned long)ser->iomem_base != port->mapbase)
770 return -EINVAL;
771 return 0;
772 }
773
774 static const char *
775 serial_txx9_type(struct uart_port *port)
776 {
777 return "txx9";
778 }
779
780 static struct uart_ops serial_txx9_pops = {
781 .tx_empty = serial_txx9_tx_empty,
782 .set_mctrl = serial_txx9_set_mctrl,
783 .get_mctrl = serial_txx9_get_mctrl,
784 .stop_tx = serial_txx9_stop_tx,
785 .start_tx = serial_txx9_start_tx,
786 .stop_rx = serial_txx9_stop_rx,
787 .enable_ms = serial_txx9_enable_ms,
788 .break_ctl = serial_txx9_break_ctl,
789 .startup = serial_txx9_startup,
790 .shutdown = serial_txx9_shutdown,
791 .set_termios = serial_txx9_set_termios,
792 .pm = serial_txx9_pm,
793 .type = serial_txx9_type,
794 .release_port = serial_txx9_release_port,
795 .request_port = serial_txx9_request_port,
796 .config_port = serial_txx9_config_port,
797 .verify_port = serial_txx9_verify_port,
798 };
799
800 static struct uart_txx9_port serial_txx9_ports[UART_NR];
801
802 static void __init serial_txx9_register_ports(struct uart_driver *drv,
803 struct device *dev)
804 {
805 int i;
806
807 for (i = 0; i < UART_NR; i++) {
808 struct uart_txx9_port *up = &serial_txx9_ports[i];
809
810 up->port.line = i;
811 up->port.ops = &serial_txx9_pops;
812 up->port.dev = dev;
813 if (up->port.iobase || up->port.mapbase)
814 uart_add_one_port(drv, &up->port);
815 }
816 }
817
818 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
819
820 /*
821 * Wait for transmitter & holding register to empty
822 */
823 static inline void wait_for_xmitr(struct uart_txx9_port *up)
824 {
825 unsigned int tmout = 10000;
826
827 /* Wait up to 10ms for the character(s) to be sent. */
828 while (--tmout &&
829 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
830 udelay(1);
831
832 /* Wait up to 1s for flow control if necessary */
833 if (up->port.flags & UPF_CONS_FLOW) {
834 tmout = 1000000;
835 while (--tmout &&
836 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
837 udelay(1);
838 }
839 }
840
841 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
842 {
843 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
844
845 wait_for_xmitr(up);
846 sio_out(up, TXX9_SITFIFO, ch);
847 }
848
849 /*
850 * Print a string to the serial port trying not to disturb
851 * any possible real use of the port...
852 *
853 * The console_lock must be held when we get here.
854 */
855 static void
856 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
857 {
858 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
859 unsigned int ier, flcr;
860
861 /*
862 * First save the UER then disable the interrupts
863 */
864 ier = sio_in(up, TXX9_SIDICR);
865 sio_out(up, TXX9_SIDICR, 0);
866 /*
867 * Disable flow-control if enabled (and unnecessary)
868 */
869 flcr = sio_in(up, TXX9_SIFLCR);
870 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
871 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
872
873 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
874
875 /*
876 * Finally, wait for transmitter to become empty
877 * and restore the IER
878 */
879 wait_for_xmitr(up);
880 sio_out(up, TXX9_SIFLCR, flcr);
881 sio_out(up, TXX9_SIDICR, ier);
882 }
883
884 static int __init serial_txx9_console_setup(struct console *co, char *options)
885 {
886 struct uart_port *port;
887 struct uart_txx9_port *up;
888 int baud = 9600;
889 int bits = 8;
890 int parity = 'n';
891 int flow = 'n';
892
893 /*
894 * Check whether an invalid uart number has been specified, and
895 * if so, search for the first available port that does have
896 * console support.
897 */
898 if (co->index >= UART_NR)
899 co->index = 0;
900 up = &serial_txx9_ports[co->index];
901 port = &up->port;
902 if (!port->ops)
903 return -ENODEV;
904
905 serial_txx9_initialize(&up->port);
906
907 if (options)
908 uart_parse_options(options, &baud, &parity, &bits, &flow);
909
910 return uart_set_options(port, co, baud, parity, bits, flow);
911 }
912
913 static struct uart_driver serial_txx9_reg;
914 static struct console serial_txx9_console = {
915 .name = TXX9_TTY_NAME,
916 .write = serial_txx9_console_write,
917 .device = uart_console_device,
918 .setup = serial_txx9_console_setup,
919 .flags = CON_PRINTBUFFER,
920 .index = -1,
921 .data = &serial_txx9_reg,
922 };
923
924 static int __init serial_txx9_console_init(void)
925 {
926 register_console(&serial_txx9_console);
927 return 0;
928 }
929 console_initcall(serial_txx9_console_init);
930
931 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
932 #else
933 #define SERIAL_TXX9_CONSOLE NULL
934 #endif
935
936 static struct uart_driver serial_txx9_reg = {
937 .owner = THIS_MODULE,
938 .driver_name = "serial_txx9",
939 .dev_name = TXX9_TTY_NAME,
940 .major = TXX9_TTY_MAJOR,
941 .minor = TXX9_TTY_MINOR_START,
942 .nr = UART_NR,
943 .cons = SERIAL_TXX9_CONSOLE,
944 };
945
946 int __init early_serial_txx9_setup(struct uart_port *port)
947 {
948 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
949 return -ENODEV;
950
951 serial_txx9_ports[port->line].port = *port;
952 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
953 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
954 return 0;
955 }
956
957 static DEFINE_MUTEX(serial_txx9_mutex);
958
959 /**
960 * serial_txx9_register_port - register a serial port
961 * @port: serial port template
962 *
963 * Configure the serial port specified by the request.
964 *
965 * The port is then probed and if necessary the IRQ is autodetected
966 * If this fails an error is returned.
967 *
968 * On success the port is ready to use and the line number is returned.
969 */
970 static int __devinit serial_txx9_register_port(struct uart_port *port)
971 {
972 int i;
973 struct uart_txx9_port *uart;
974 int ret = -ENOSPC;
975
976 mutex_lock(&serial_txx9_mutex);
977 for (i = 0; i < UART_NR; i++) {
978 uart = &serial_txx9_ports[i];
979 if (uart_match_port(&uart->port, port)) {
980 uart_remove_one_port(&serial_txx9_reg, &uart->port);
981 break;
982 }
983 }
984 if (i == UART_NR) {
985 /* Find unused port */
986 for (i = 0; i < UART_NR; i++) {
987 uart = &serial_txx9_ports[i];
988 if (!(uart->port.iobase || uart->port.mapbase))
989 break;
990 }
991 }
992 if (i < UART_NR) {
993 uart->port.iobase = port->iobase;
994 uart->port.membase = port->membase;
995 uart->port.irq = port->irq;
996 uart->port.uartclk = port->uartclk;
997 uart->port.iotype = port->iotype;
998 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
999 uart->port.mapbase = port->mapbase;
1000 if (port->dev)
1001 uart->port.dev = port->dev;
1002 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1003 if (ret == 0)
1004 ret = uart->port.line;
1005 }
1006 mutex_unlock(&serial_txx9_mutex);
1007 return ret;
1008 }
1009
1010 /**
1011 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1012 * @line: serial line number
1013 *
1014 * Remove one serial port. This may not be called from interrupt
1015 * context. We hand the port back to the our control.
1016 */
1017 static void __devexit serial_txx9_unregister_port(int line)
1018 {
1019 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1020
1021 mutex_lock(&serial_txx9_mutex);
1022 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1023 uart->port.flags = 0;
1024 uart->port.type = PORT_UNKNOWN;
1025 uart->port.iobase = 0;
1026 uart->port.mapbase = 0;
1027 uart->port.membase = NULL;
1028 uart->port.dev = NULL;
1029 mutex_unlock(&serial_txx9_mutex);
1030 }
1031
1032 /*
1033 * Register a set of serial devices attached to a platform device.
1034 */
1035 static int __devinit serial_txx9_probe(struct platform_device *dev)
1036 {
1037 struct uart_port *p = dev->dev.platform_data;
1038 struct uart_port port;
1039 int ret, i;
1040
1041 memset(&port, 0, sizeof(struct uart_port));
1042 for (i = 0; p && p->uartclk != 0; p++, i++) {
1043 port.iobase = p->iobase;
1044 port.membase = p->membase;
1045 port.irq = p->irq;
1046 port.uartclk = p->uartclk;
1047 port.iotype = p->iotype;
1048 port.flags = p->flags;
1049 port.mapbase = p->mapbase;
1050 port.dev = &dev->dev;
1051 ret = serial_txx9_register_port(&port);
1052 if (ret < 0) {
1053 dev_err(&dev->dev, "unable to register port at index %d "
1054 "(IO%x MEM%llx IRQ%d): %d\n", i,
1055 p->iobase, (unsigned long long)p->mapbase,
1056 p->irq, ret);
1057 }
1058 }
1059 return 0;
1060 }
1061
1062 /*
1063 * Remove serial ports registered against a platform device.
1064 */
1065 static int __devexit serial_txx9_remove(struct platform_device *dev)
1066 {
1067 int i;
1068
1069 for (i = 0; i < UART_NR; i++) {
1070 struct uart_txx9_port *up = &serial_txx9_ports[i];
1071
1072 if (up->port.dev == &dev->dev)
1073 serial_txx9_unregister_port(i);
1074 }
1075 return 0;
1076 }
1077
1078 #ifdef CONFIG_PM
1079 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1080 {
1081 int i;
1082
1083 for (i = 0; i < UART_NR; i++) {
1084 struct uart_txx9_port *up = &serial_txx9_ports[i];
1085
1086 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1087 uart_suspend_port(&serial_txx9_reg, &up->port);
1088 }
1089
1090 return 0;
1091 }
1092
1093 static int serial_txx9_resume(struct platform_device *dev)
1094 {
1095 int i;
1096
1097 for (i = 0; i < UART_NR; i++) {
1098 struct uart_txx9_port *up = &serial_txx9_ports[i];
1099
1100 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1101 uart_resume_port(&serial_txx9_reg, &up->port);
1102 }
1103
1104 return 0;
1105 }
1106 #endif
1107
1108 static struct platform_driver serial_txx9_plat_driver = {
1109 .probe = serial_txx9_probe,
1110 .remove = __devexit_p(serial_txx9_remove),
1111 #ifdef CONFIG_PM
1112 .suspend = serial_txx9_suspend,
1113 .resume = serial_txx9_resume,
1114 #endif
1115 .driver = {
1116 .name = "serial_txx9",
1117 .owner = THIS_MODULE,
1118 },
1119 };
1120
1121 #ifdef ENABLE_SERIAL_TXX9_PCI
1122 /*
1123 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1124 * to the arrangement of serial ports on a PCI card.
1125 */
1126 static int __devinit
1127 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1128 {
1129 struct uart_port port;
1130 int line;
1131 int rc;
1132
1133 rc = pci_enable_device(dev);
1134 if (rc)
1135 return rc;
1136
1137 memset(&port, 0, sizeof(port));
1138 port.ops = &serial_txx9_pops;
1139 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1140 port.uartclk = 66670000;
1141 port.irq = dev->irq;
1142 port.iotype = UPIO_PORT;
1143 port.iobase = pci_resource_start(dev, 1);
1144 port.dev = &dev->dev;
1145 line = serial_txx9_register_port(&port);
1146 if (line < 0) {
1147 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1148 pci_disable_device(dev);
1149 return line;
1150 }
1151 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1152
1153 return 0;
1154 }
1155
1156 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1157 {
1158 struct uart_txx9_port *up = pci_get_drvdata(dev);
1159
1160 pci_set_drvdata(dev, NULL);
1161
1162 if (up) {
1163 serial_txx9_unregister_port(up->port.line);
1164 pci_disable_device(dev);
1165 }
1166 }
1167
1168 #ifdef CONFIG_PM
1169 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1170 {
1171 struct uart_txx9_port *up = pci_get_drvdata(dev);
1172
1173 if (up)
1174 uart_suspend_port(&serial_txx9_reg, &up->port);
1175 pci_save_state(dev);
1176 pci_set_power_state(dev, pci_choose_state(dev, state));
1177 return 0;
1178 }
1179
1180 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1181 {
1182 struct uart_txx9_port *up = pci_get_drvdata(dev);
1183
1184 pci_set_power_state(dev, PCI_D0);
1185 pci_restore_state(dev);
1186 if (up)
1187 uart_resume_port(&serial_txx9_reg, &up->port);
1188 return 0;
1189 }
1190 #endif
1191
1192 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1193 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1194 { 0, }
1195 };
1196
1197 static struct pci_driver serial_txx9_pci_driver = {
1198 .name = "serial_txx9",
1199 .probe = pciserial_txx9_init_one,
1200 .remove = __devexit_p(pciserial_txx9_remove_one),
1201 #ifdef CONFIG_PM
1202 .suspend = pciserial_txx9_suspend_one,
1203 .resume = pciserial_txx9_resume_one,
1204 #endif
1205 .id_table = serial_txx9_pci_tbl,
1206 };
1207
1208 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1209 #endif /* ENABLE_SERIAL_TXX9_PCI */
1210
1211 static struct platform_device *serial_txx9_plat_devs;
1212
1213 static int __init serial_txx9_init(void)
1214 {
1215 int ret;
1216
1217 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1218
1219 ret = uart_register_driver(&serial_txx9_reg);
1220 if (ret)
1221 goto out;
1222
1223 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1224 if (!serial_txx9_plat_devs) {
1225 ret = -ENOMEM;
1226 goto unreg_uart_drv;
1227 }
1228
1229 ret = platform_device_add(serial_txx9_plat_devs);
1230 if (ret)
1231 goto put_dev;
1232
1233 serial_txx9_register_ports(&serial_txx9_reg,
1234 &serial_txx9_plat_devs->dev);
1235
1236 ret = platform_driver_register(&serial_txx9_plat_driver);
1237 if (ret)
1238 goto del_dev;
1239
1240 #ifdef ENABLE_SERIAL_TXX9_PCI
1241 ret = pci_register_driver(&serial_txx9_pci_driver);
1242 #endif
1243 if (ret == 0)
1244 goto out;
1245
1246 del_dev:
1247 platform_device_del(serial_txx9_plat_devs);
1248 put_dev:
1249 platform_device_put(serial_txx9_plat_devs);
1250 unreg_uart_drv:
1251 uart_unregister_driver(&serial_txx9_reg);
1252 out:
1253 return ret;
1254 }
1255
1256 static void __exit serial_txx9_exit(void)
1257 {
1258 int i;
1259
1260 #ifdef ENABLE_SERIAL_TXX9_PCI
1261 pci_unregister_driver(&serial_txx9_pci_driver);
1262 #endif
1263 platform_driver_unregister(&serial_txx9_plat_driver);
1264 platform_device_unregister(serial_txx9_plat_devs);
1265 for (i = 0; i < UART_NR; i++) {
1266 struct uart_txx9_port *up = &serial_txx9_ports[i];
1267 if (up->port.iobase || up->port.mapbase)
1268 uart_remove_one_port(&serial_txx9_reg, &up->port);
1269 }
1270
1271 uart_unregister_driver(&serial_txx9_reg);
1272 }
1273
1274 module_init(serial_txx9_init);
1275 module_exit(serial_txx9_exit);
1276
1277 MODULE_LICENSE("GPL");
1278 MODULE_DESCRIPTION("TX39/49 serial driver");
1279
1280 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
kmemtrace - Kernel memory tracer