2 * Copyright (C) 2001 Allan Trautman, IBM Corporation
4 * iSeries specific routines for PCI.
6 * Based on code from pci.c and iSeries_pci.c 32bit
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/kernel.h>
23 #include <linux/list.h>
24 #include <linux/string.h>
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/ide.h>
28 #include <linux/pci.h>
33 #include <asm/machdep.h>
34 #include <asm/pci-bridge.h>
35 #include <asm/iommu.h>
36 #include <asm/abs_addr.h>
38 #include <asm/iseries/hv_call_xm.h>
39 #include <asm/iseries/mf.h>
40 #include <asm/iseries/iommu.h>
42 #include <asm/ppc-pci.h>
49 * Forward declares of prototypes.
51 static struct device_node
*find_Device_Node(int bus
, int devfn
);
53 static int Pci_Retry_Max
= 3; /* Only retry 3 times */
54 static int Pci_Error_Flag
= 1; /* Set Retry Error on. */
56 static struct pci_ops iSeries_pci_ops
;
60 * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
62 #define IOMM_TABLE_MAX_ENTRIES 1024
63 #define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
64 #define BASE_IO_MEMORY 0xE000000000000000UL
66 static unsigned long max_io_memory
= BASE_IO_MEMORY
;
67 static long current_iomm_table_entry
;
72 static struct device_node
*iomm_table
[IOMM_TABLE_MAX_ENTRIES
];
73 static u8 iobar_table
[IOMM_TABLE_MAX_ENTRIES
];
75 static const char pci_io_text
[] = "iSeries PCI I/O";
76 static DEFINE_SPINLOCK(iomm_table_lock
);
79 * iomm_table_allocate_entry
81 * Adds pci_dev entry in address translation table
83 * - Allocates the number of entries required in table base on BAR
85 * - Allocates starting at BASE_IO_MEMORY and increases.
86 * - The size is round up to be a multiple of entry size.
87 * - CurrentIndex is incremented to keep track of the last entry.
88 * - Builds the resource entry for allocated BARs.
90 static void iomm_table_allocate_entry(struct pci_dev
*dev
, int bar_num
)
92 struct resource
*bar_res
= &dev
->resource
[bar_num
];
93 long bar_size
= pci_resource_len(dev
, bar_num
);
96 * No space to allocate, quick exit, skip Allocation.
101 * Set Resource values.
103 spin_lock(&iomm_table_lock
);
104 bar_res
->name
= pci_io_text
;
105 bar_res
->start
= BASE_IO_MEMORY
+
106 IOMM_TABLE_ENTRY_SIZE
* current_iomm_table_entry
;
107 bar_res
->end
= bar_res
->start
+ bar_size
- 1;
109 * Allocate the number of table entries needed for BAR.
111 while (bar_size
> 0 ) {
112 iomm_table
[current_iomm_table_entry
] = dev
->sysdata
;
113 iobar_table
[current_iomm_table_entry
] = bar_num
;
114 bar_size
-= IOMM_TABLE_ENTRY_SIZE
;
115 ++current_iomm_table_entry
;
117 max_io_memory
= BASE_IO_MEMORY
+
118 IOMM_TABLE_ENTRY_SIZE
* current_iomm_table_entry
;
119 spin_unlock(&iomm_table_lock
);
123 * allocate_device_bars
125 * - Allocates ALL pci_dev BAR's and updates the resources with the
126 * BAR value. BARS with zero length will have the resources
127 * The HvCallPci_getBarParms is used to get the size of the BAR
128 * space. It calls iomm_table_allocate_entry to allocate
130 * - Loops through The Bar resources(0 - 5) including the ROM
133 static void allocate_device_bars(struct pci_dev
*dev
)
137 for (bar_num
= 0; bar_num
<= PCI_ROM_RESOURCE
; ++bar_num
)
138 iomm_table_allocate_entry(dev
, bar_num
);
142 * Log error information to system console.
143 * Filter out the device not there errors.
144 * PCI: EADs Connect Failed 0x18.58.10 Rc: 0x00xx
145 * PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
146 * PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
148 static void pci_Log_Error(char *Error_Text
, int Bus
, int SubBus
,
149 int AgentId
, int HvRc
)
153 printk(KERN_ERR
"PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
154 Error_Text
, Bus
, SubBus
, AgentId
, HvRc
);
158 * iSeries_pcibios_init
161 * This function checks for all possible system PCI host bridges that connect
162 * PCI buses. The system hypervisor is queried as to the guest partition
163 * ownership status. A pci_controller is built for any bus which is partially
164 * owned or fully owned by this guest partition.
166 void iSeries_pcibios_init(void)
168 struct pci_controller
*phb
;
169 struct device_node
*root
= of_find_node_by_path("/");
170 struct device_node
*node
= NULL
;
173 printk(KERN_CRIT
"iSeries_pcibios_init: can't find root "
177 while ((node
= of_get_next_child(root
, node
)) != NULL
) {
181 if ((node
->type
== NULL
) || (strcmp(node
->type
, "pci") != 0))
184 busp
= get_property(node
, "bus-range", NULL
);
188 printk("bus %d appears to exist\n", bus
);
189 phb
= pcibios_alloc_controller(node
);
193 phb
->pci_mem_offset
= phb
->local_number
= bus
;
194 phb
->first_busno
= bus
;
195 phb
->last_busno
= bus
;
196 phb
->ops
= &iSeries_pci_ops
;
205 * iSeries_pci_final_fixup(void)
207 void __init
iSeries_pci_final_fixup(void)
209 struct pci_dev
*pdev
= NULL
;
210 struct device_node
*node
;
213 /* Fix up at the device node and pci_dev relationship */
214 mf_display_src(0xC9000100);
216 printk("pcibios_final_fixup\n");
217 for_each_pci_dev(pdev
) {
218 node
= find_Device_Node(pdev
->bus
->number
, pdev
->devfn
);
219 printk("pci dev %p (%x.%x), node %p\n", pdev
,
220 pdev
->bus
->number
, pdev
->devfn
, node
);
223 struct pci_dn
*pdn
= PCI_DN(node
);
226 agent
= get_property(node
, "linux,agent-id", NULL
);
227 if ((pdn
!= NULL
) && (agent
!= NULL
)) {
228 u8 irq
= iSeries_allocate_IRQ(pdn
->busno
, 0,
232 err
= HvCallXm_connectBusUnit(pdn
->busno
, pdn
->bussubno
,
235 pci_Log_Error("Connect Bus Unit",
236 pdn
->busno
, pdn
->bussubno
, *agent
, err
);
238 err
= HvCallPci_configStore8(pdn
->busno
, pdn
->bussubno
,
243 pci_Log_Error("PciCfgStore Irq Failed!",
244 pdn
->busno
, pdn
->bussubno
, *agent
, err
);
251 pdev
->sysdata
= (void *)node
;
252 PCI_DN(node
)->pcidev
= pdev
;
253 allocate_device_bars(pdev
);
254 iSeries_Device_Information(pdev
, DeviceCount
);
255 iommu_devnode_init_iSeries(node
);
257 printk("PCI: Device Tree not found for 0x%016lX\n",
258 (unsigned long)pdev
);
260 iSeries_activate_IRQs();
261 mf_display_src(0xC9000200);
264 void pcibios_fixup_bus(struct pci_bus
*PciBus
)
268 void pcibios_fixup_resources(struct pci_dev
*pdev
)
273 * I/0 Memory copy MUST use mmio commands on iSeries
274 * To do; For performance, include the hv call directly
276 void iSeries_memset_io(volatile void __iomem
*dest
, char c
, size_t Count
)
279 long NumberOfBytes
= Count
;
281 while (NumberOfBytes
> 0) {
282 iSeries_Write_Byte(ByteValue
, dest
++);
286 EXPORT_SYMBOL(iSeries_memset_io
);
288 void iSeries_memcpy_toio(volatile void __iomem
*dest
, void *source
, size_t count
)
291 long NumberOfBytes
= count
;
293 while (NumberOfBytes
> 0) {
294 iSeries_Write_Byte(*src
++, dest
++);
298 EXPORT_SYMBOL(iSeries_memcpy_toio
);
300 void iSeries_memcpy_fromio(void *dest
, const volatile void __iomem
*src
, size_t count
)
303 long NumberOfBytes
= count
;
305 while (NumberOfBytes
> 0) {
306 *dst
++ = iSeries_Read_Byte(src
++);
310 EXPORT_SYMBOL(iSeries_memcpy_fromio
);
313 * Look down the chain to find the matching Device Device
315 static struct device_node
*find_Device_Node(int bus
, int devfn
)
317 struct device_node
*node
;
319 for (node
= NULL
; (node
= of_find_all_nodes(node
)); ) {
320 struct pci_dn
*pdn
= PCI_DN(node
);
322 if (pdn
&& (bus
== pdn
->busno
) && (devfn
== pdn
->devfn
))
330 * Returns the device node for the passed pci_dev
331 * Sanity Check Node PciDev to passed pci_dev
332 * If none is found, returns a NULL which the client must handle.
334 static struct device_node
*get_Device_Node(struct pci_dev
*pdev
)
336 struct device_node
*node
;
338 node
= pdev
->sysdata
;
339 if (node
== NULL
|| PCI_DN(node
)->pcidev
!= pdev
)
340 node
= find_Device_Node(pdev
->bus
->number
, pdev
->devfn
);
346 * Config space read and write functions.
347 * For now at least, we look for the device node for the bus and devfn
348 * that we are asked to access. It may be possible to translate the devfn
349 * to a subbus and deviceid more directly.
351 static u64 hv_cfg_read_func
[4] = {
352 HvCallPciConfigLoad8
, HvCallPciConfigLoad16
,
353 HvCallPciConfigLoad32
, HvCallPciConfigLoad32
356 static u64 hv_cfg_write_func
[4] = {
357 HvCallPciConfigStore8
, HvCallPciConfigStore16
,
358 HvCallPciConfigStore32
, HvCallPciConfigStore32
362 * Read PCI config space
364 static int iSeries_pci_read_config(struct pci_bus
*bus
, unsigned int devfn
,
365 int offset
, int size
, u32
*val
)
367 struct device_node
*node
= find_Device_Node(bus
->number
, devfn
);
369 struct HvCallPci_LoadReturn ret
;
372 return PCIBIOS_DEVICE_NOT_FOUND
;
375 return PCIBIOS_BAD_REGISTER_NUMBER
;
378 fn
= hv_cfg_read_func
[(size
- 1) & 3];
379 HvCall3Ret16(fn
, &ret
, iseries_ds_addr(node
), offset
, 0);
383 return PCIBIOS_DEVICE_NOT_FOUND
; /* or something */
391 * Write PCI config space
394 static int iSeries_pci_write_config(struct pci_bus
*bus
, unsigned int devfn
,
395 int offset
, int size
, u32 val
)
397 struct device_node
*node
= find_Device_Node(bus
->number
, devfn
);
402 return PCIBIOS_DEVICE_NOT_FOUND
;
404 return PCIBIOS_BAD_REGISTER_NUMBER
;
406 fn
= hv_cfg_write_func
[(size
- 1) & 3];
407 ret
= HvCall4(fn
, iseries_ds_addr(node
), offset
, val
, 0);
410 return PCIBIOS_DEVICE_NOT_FOUND
;
415 static struct pci_ops iSeries_pci_ops
= {
416 .read
= iSeries_pci_read_config
,
417 .write
= iSeries_pci_write_config
422 * -> On Failure, print and log information.
423 * Increment Retry Count, if exceeds max, panic partition.
425 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
426 * PCI: Device 23.90 ReadL Retry( 1)
427 * PCI: Device 23.90 ReadL Retry Successful(1)
429 static int CheckReturnCode(char *TextHdr
, struct device_node
*DevNode
,
433 struct pci_dn
*pdn
= PCI_DN(DevNode
);
436 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
437 TextHdr
, pdn
->busno
, pdn
->devfn
,
440 * Bump the retry and check for retry count exceeded.
441 * If, Exceeded, panic the system.
443 if (((*retry
) > Pci_Retry_Max
) &&
444 (Pci_Error_Flag
> 0)) {
445 mf_display_src(0xB6000103);
447 panic("PCI: Hardware I/O Error, SRC B6000103, "
448 "Automatic Reboot Disabled.\n");
450 return -1; /* Retry Try */
456 * Translate the I/O Address into a device node, bar, and bar offset.
457 * Note: Make sure the passed variable end up on the stack to avoid
458 * the exposure of being device global.
460 static inline struct device_node
*xlate_iomm_address(
461 const volatile void __iomem
*IoAddress
,
462 u64
*dsaptr
, u64
*BarOffsetPtr
)
464 unsigned long OrigIoAddr
;
465 unsigned long BaseIoAddr
;
466 unsigned long TableIndex
;
467 struct device_node
*DevNode
;
469 OrigIoAddr
= (unsigned long __force
)IoAddress
;
470 if ((OrigIoAddr
< BASE_IO_MEMORY
) || (OrigIoAddr
>= max_io_memory
))
472 BaseIoAddr
= OrigIoAddr
- BASE_IO_MEMORY
;
473 TableIndex
= BaseIoAddr
/ IOMM_TABLE_ENTRY_SIZE
;
474 DevNode
= iomm_table
[TableIndex
];
476 if (DevNode
!= NULL
) {
477 int barnum
= iobar_table
[TableIndex
];
478 *dsaptr
= iseries_ds_addr(DevNode
) | (barnum
<< 24);
479 *BarOffsetPtr
= BaseIoAddr
% IOMM_TABLE_ENTRY_SIZE
;
481 panic("PCI: Invalid PCI IoAddress detected!\n");
486 * Read MM I/O Instructions for the iSeries
487 * On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
488 * else, data is returned in big Endian format.
490 * iSeries_Read_Byte = Read Byte ( 8 bit)
491 * iSeries_Read_Word = Read Word (16 bit)
492 * iSeries_Read_Long = Read Long (32 bit)
494 u8
iSeries_Read_Byte(const volatile void __iomem
*IoAddress
)
499 struct HvCallPci_LoadReturn ret
;
500 struct device_node
*DevNode
=
501 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
503 if (DevNode
== NULL
) {
504 static unsigned long last_jiffies
;
505 static int num_printed
;
507 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
508 last_jiffies
= jiffies
;
511 if (num_printed
++ < 10)
512 printk(KERN_ERR
"iSeries_Read_Byte: invalid access at IO address %p\n", IoAddress
);
516 HvCall3Ret16(HvCallPciBarLoad8
, &ret
, dsa
, BarOffset
, 0);
517 } while (CheckReturnCode("RDB", DevNode
, &retry
, ret
.rc
) != 0);
519 return (u8
)ret
.value
;
521 EXPORT_SYMBOL(iSeries_Read_Byte
);
523 u16
iSeries_Read_Word(const volatile void __iomem
*IoAddress
)
528 struct HvCallPci_LoadReturn ret
;
529 struct device_node
*DevNode
=
530 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
532 if (DevNode
== NULL
) {
533 static unsigned long last_jiffies
;
534 static int num_printed
;
536 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
537 last_jiffies
= jiffies
;
540 if (num_printed
++ < 10)
541 printk(KERN_ERR
"iSeries_Read_Word: invalid access at IO address %p\n", IoAddress
);
545 HvCall3Ret16(HvCallPciBarLoad16
, &ret
, dsa
,
547 } while (CheckReturnCode("RDW", DevNode
, &retry
, ret
.rc
) != 0);
549 return swab16((u16
)ret
.value
);
551 EXPORT_SYMBOL(iSeries_Read_Word
);
553 u32
iSeries_Read_Long(const volatile void __iomem
*IoAddress
)
558 struct HvCallPci_LoadReturn ret
;
559 struct device_node
*DevNode
=
560 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
562 if (DevNode
== NULL
) {
563 static unsigned long last_jiffies
;
564 static int num_printed
;
566 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
567 last_jiffies
= jiffies
;
570 if (num_printed
++ < 10)
571 printk(KERN_ERR
"iSeries_Read_Long: invalid access at IO address %p\n", IoAddress
);
575 HvCall3Ret16(HvCallPciBarLoad32
, &ret
, dsa
,
577 } while (CheckReturnCode("RDL", DevNode
, &retry
, ret
.rc
) != 0);
579 return swab32((u32
)ret
.value
);
581 EXPORT_SYMBOL(iSeries_Read_Long
);
584 * Write MM I/O Instructions for the iSeries
586 * iSeries_Write_Byte = Write Byte (8 bit)
587 * iSeries_Write_Word = Write Word(16 bit)
588 * iSeries_Write_Long = Write Long(32 bit)
590 void iSeries_Write_Byte(u8 data
, volatile void __iomem
*IoAddress
)
596 struct device_node
*DevNode
=
597 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
599 if (DevNode
== NULL
) {
600 static unsigned long last_jiffies
;
601 static int num_printed
;
603 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
604 last_jiffies
= jiffies
;
607 if (num_printed
++ < 10)
608 printk(KERN_ERR
"iSeries_Write_Byte: invalid access at IO address %p\n", IoAddress
);
612 rc
= HvCall4(HvCallPciBarStore8
, dsa
, BarOffset
, data
, 0);
613 } while (CheckReturnCode("WWB", DevNode
, &retry
, rc
) != 0);
615 EXPORT_SYMBOL(iSeries_Write_Byte
);
617 void iSeries_Write_Word(u16 data
, volatile void __iomem
*IoAddress
)
623 struct device_node
*DevNode
=
624 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
626 if (DevNode
== NULL
) {
627 static unsigned long last_jiffies
;
628 static int num_printed
;
630 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
631 last_jiffies
= jiffies
;
634 if (num_printed
++ < 10)
635 printk(KERN_ERR
"iSeries_Write_Word: invalid access at IO address %p\n", IoAddress
);
639 rc
= HvCall4(HvCallPciBarStore16
, dsa
, BarOffset
, swab16(data
), 0);
640 } while (CheckReturnCode("WWW", DevNode
, &retry
, rc
) != 0);
642 EXPORT_SYMBOL(iSeries_Write_Word
);
644 void iSeries_Write_Long(u32 data
, volatile void __iomem
*IoAddress
)
650 struct device_node
*DevNode
=
651 xlate_iomm_address(IoAddress
, &dsa
, &BarOffset
);
653 if (DevNode
== NULL
) {
654 static unsigned long last_jiffies
;
655 static int num_printed
;
657 if ((jiffies
- last_jiffies
) > 60 * HZ
) {
658 last_jiffies
= jiffies
;
661 if (num_printed
++ < 10)
662 printk(KERN_ERR
"iSeries_Write_Long: invalid access at IO address %p\n", IoAddress
);
666 rc
= HvCall4(HvCallPciBarStore32
, dsa
, BarOffset
, swab32(data
), 0);
667 } while (CheckReturnCode("WWL", DevNode
, &retry
, rc
) != 0);
669 EXPORT_SYMBOL(iSeries_Write_Long
);