2 * Atmel PIO2 Port Multiplexer support
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
14 #include <linux/platform_device.h>
15 #include <linux/irq.h>
20 #include <asm/arch/portmux.h>
24 #define MAX_NR_PIO_DEVICES 8
28 const struct platform_device
*pdev
;
35 static struct pio_device pio_dev
[MAX_NR_PIO_DEVICES
];
37 static struct pio_device
*gpio_to_pio(unsigned int gpio
)
39 struct pio_device
*pio
;
43 if (index
>= MAX_NR_PIO_DEVICES
)
45 pio
= &pio_dev
[index
];
52 /* Pin multiplexing API */
54 void __init
at32_select_periph(unsigned int pin
, unsigned int periph
,
57 struct pio_device
*pio
;
58 unsigned int pin_index
= pin
& 0x1f;
59 u32 mask
= 1 << pin_index
;
61 pio
= gpio_to_pio(pin
);
63 printk("pio: invalid pin %u\n", pin
);
67 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
))) {
68 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
72 pio_writel(pio
, PUER
, mask
);
74 pio_writel(pio
, BSR
, mask
);
76 pio_writel(pio
, ASR
, mask
);
78 pio_writel(pio
, PDR
, mask
);
79 if (!(flags
& AT32_GPIOF_PULLUP
))
80 pio_writel(pio
, PUDR
, mask
);
82 /* gpio_request NOT allowed */
83 set_bit(pin_index
, &pio
->gpio_mask
);
91 void __init
at32_select_gpio(unsigned int pin
, unsigned long flags
)
93 struct pio_device
*pio
;
94 unsigned int pin_index
= pin
& 0x1f;
95 u32 mask
= 1 << pin_index
;
97 pio
= gpio_to_pio(pin
);
99 printk("pio: invalid pin %u\n", pin
);
103 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
))) {
104 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
108 if (flags
& AT32_GPIOF_OUTPUT
) {
109 if (flags
& AT32_GPIOF_HIGH
)
110 pio_writel(pio
, SODR
, mask
);
112 pio_writel(pio
, CODR
, mask
);
113 if (flags
& AT32_GPIOF_MULTIDRV
)
114 pio_writel(pio
, MDER
, mask
);
116 pio_writel(pio
, MDDR
, mask
);
117 pio_writel(pio
, PUDR
, mask
);
118 pio_writel(pio
, OER
, mask
);
120 if (flags
& AT32_GPIOF_PULLUP
)
121 pio_writel(pio
, PUER
, mask
);
123 pio_writel(pio
, PUDR
, mask
);
124 if (flags
& AT32_GPIOF_DEGLITCH
)
125 pio_writel(pio
, IFER
, mask
);
127 pio_writel(pio
, IFDR
, mask
);
128 pio_writel(pio
, ODR
, mask
);
131 pio_writel(pio
, PER
, mask
);
133 /* gpio_request now allowed */
134 clear_bit(pin_index
, &pio
->gpio_mask
);
142 /* Reserve a pin, preventing anyone else from changing its configuration. */
143 void __init
at32_reserve_pin(unsigned int pin
)
145 struct pio_device
*pio
;
146 unsigned int pin_index
= pin
& 0x1f;
148 pio
= gpio_to_pio(pin
);
149 if (unlikely(!pio
)) {
150 printk("pio: invalid pin %u\n", pin
);
154 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
))) {
155 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
165 /*--------------------------------------------------------------------------*/
169 int gpio_request(unsigned int gpio
, const char *label
)
171 struct pio_device
*pio
;
174 pio
= gpio_to_pio(gpio
);
179 if (test_and_set_bit(pin
, &pio
->gpio_mask
))
184 EXPORT_SYMBOL(gpio_request
);
186 void gpio_free(unsigned int gpio
)
188 struct pio_device
*pio
;
191 pio
= gpio_to_pio(gpio
);
194 "gpio: attempted to free invalid pin %u\n", gpio
);
199 if (!test_and_clear_bit(pin
, &pio
->gpio_mask
))
200 printk(KERN_ERR
"gpio: freeing free or non-gpio pin %s-%u\n",
203 EXPORT_SYMBOL(gpio_free
);
205 int gpio_direction_input(unsigned int gpio
)
207 struct pio_device
*pio
;
210 pio
= gpio_to_pio(gpio
);
215 pio_writel(pio
, ODR
, 1 << pin
);
219 EXPORT_SYMBOL(gpio_direction_input
);
221 int gpio_direction_output(unsigned int gpio
, int value
)
223 struct pio_device
*pio
;
226 pio
= gpio_to_pio(gpio
);
230 gpio_set_value(gpio
, value
);
233 pio_writel(pio
, OER
, 1 << pin
);
237 EXPORT_SYMBOL(gpio_direction_output
);
239 int gpio_get_value(unsigned int gpio
)
241 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
243 return (pio_readl(pio
, PDSR
) >> (gpio
& 0x1f)) & 1;
245 EXPORT_SYMBOL(gpio_get_value
);
247 void gpio_set_value(unsigned int gpio
, int value
)
249 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
252 mask
= 1 << (gpio
& 0x1f);
254 pio_writel(pio
, SODR
, mask
);
256 pio_writel(pio
, CODR
, mask
);
258 EXPORT_SYMBOL(gpio_set_value
);
260 /*--------------------------------------------------------------------------*/
262 /* GPIO IRQ support */
264 static void gpio_irq_mask(unsigned irq
)
266 unsigned gpio
= irq_to_gpio(irq
);
267 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
269 pio_writel(pio
, IDR
, 1 << (gpio
& 0x1f));
272 static void gpio_irq_unmask(unsigned irq
)
274 unsigned gpio
= irq_to_gpio(irq
);
275 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
277 pio_writel(pio
, IER
, 1 << (gpio
& 0x1f));
280 static int gpio_irq_type(unsigned irq
, unsigned type
)
282 if (type
!= IRQ_TYPE_EDGE_BOTH
&& type
!= IRQ_TYPE_NONE
)
288 static struct irq_chip gpio_irqchip
= {
290 .mask
= gpio_irq_mask
,
291 .unmask
= gpio_irq_unmask
,
292 .set_type
= gpio_irq_type
,
295 static void gpio_irq_handler(unsigned irq
, struct irq_desc
*desc
)
297 struct pio_device
*pio
= get_irq_chip_data(irq
);
300 gpio_irq
= (unsigned) get_irq_data(irq
);
305 /* ack pending GPIO interrupts */
306 isr
= pio_readl(pio
, ISR
) & pio_readl(pio
, IMR
);
324 gpio_irq_setup(struct pio_device
*pio
, int irq
, int gpio_irq
)
328 set_irq_chip_data(irq
, pio
);
329 set_irq_data(irq
, (void *) gpio_irq
);
331 for (i
= 0; i
< 32; i
++, gpio_irq
++) {
332 set_irq_chip_data(gpio_irq
, pio
);
333 set_irq_chip_and_handler(gpio_irq
, &gpio_irqchip
,
337 set_irq_chained_handler(irq
, gpio_irq_handler
);
340 /*--------------------------------------------------------------------------*/
342 static int __init
pio_probe(struct platform_device
*pdev
)
344 struct pio_device
*pio
= NULL
;
345 int irq
= platform_get_irq(pdev
, 0);
346 int gpio_irq_base
= GPIO_IRQ_BASE
+ pdev
->id
* 32;
348 BUG_ON(pdev
->id
>= MAX_NR_PIO_DEVICES
);
349 pio
= &pio_dev
[pdev
->id
];
352 gpio_irq_setup(pio
, irq
, gpio_irq_base
);
354 platform_set_drvdata(pdev
, pio
);
356 printk(KERN_DEBUG
"%s: base 0x%p, irq %d chains %d..%d\n",
357 pio
->name
, pio
->regs
, irq
, gpio_irq_base
, gpio_irq_base
+ 31);
362 static struct platform_driver pio_driver
= {
369 static int __init
pio_init(void)
371 return platform_driver_register(&pio_driver
);
373 postcore_initcall(pio_init
);
375 void __init
at32_init_pio(struct platform_device
*pdev
)
377 struct resource
*regs
;
378 struct pio_device
*pio
;
380 if (pdev
->id
> MAX_NR_PIO_DEVICES
) {
381 dev_err(&pdev
->dev
, "only %d PIO devices supported\n",
386 pio
= &pio_dev
[pdev
->id
];
387 snprintf(pio
->name
, sizeof(pio
->name
), "pio%d", pdev
->id
);
389 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
391 dev_err(&pdev
->dev
, "no mmio resource defined\n");
395 pio
->clk
= clk_get(&pdev
->dev
, "mck");
396 if (IS_ERR(pio
->clk
))
398 * This is a fatal error, but if we continue we might
399 * be so lucky that we manage to initialize the
400 * console and display this message...
402 dev_err(&pdev
->dev
, "no mck clock defined\n");
404 clk_enable(pio
->clk
);
407 pio
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
410 * request_gpio() is only valid for pins that have been
411 * explicitly configured as GPIO and not previously requested
413 pio
->gpio_mask
= ~0UL;
415 /* start with irqs disabled and acked */
416 pio_writel(pio
, IDR
, ~0UL);
417 (void) pio_readl(pio
, ISR
);