5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
23 #include <asm/ptrace.h>
28 * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
32 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
33 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
34 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
35 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
36 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
37 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
38 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
39 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
42 #define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */
43 #define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */
44 #define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */
45 #define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */
46 #define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */
47 #define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */
48 #define IRQ_LEVEL 0x00400000 /* IRQ level triggered */
49 #define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */
50 #define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */
51 #ifdef CONFIG_IRQ_PER_CPU
52 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
54 # define CHECK_IRQ_PER_CPU(var) 0
57 #define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */
58 #define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */
59 #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
60 #define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
61 #define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */
62 #define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */
64 struct proc_dir_entry
;
67 * struct irq_chip - hardware interrupt chip descriptor
69 * @name: name for /proc/interrupts
70 * @startup: start up the interrupt (defaults to ->enable if NULL)
71 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
72 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
73 * @disable: disable the interrupt (defaults to chip->mask if NULL)
74 * @ack: start of a new interrupt
75 * @mask: mask an interrupt source
76 * @mask_ack: ack and mask an interrupt source
77 * @unmask: unmask an interrupt source
78 * @eoi: end of interrupt - chip level
79 * @end: end of interrupt - flow level
80 * @set_affinity: set the CPU affinity on SMP machines
81 * @retrigger: resend an IRQ to the CPU
82 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
83 * @set_wake: enable/disable power-management wake-on of an IRQ
85 * @release: release function solely used by UML
86 * @typename: obsoleted by name, kept as migration helper
90 unsigned int (*startup
)(unsigned int irq
);
91 void (*shutdown
)(unsigned int irq
);
92 void (*enable
)(unsigned int irq
);
93 void (*disable
)(unsigned int irq
);
95 void (*ack
)(unsigned int irq
);
96 void (*mask
)(unsigned int irq
);
97 void (*mask_ack
)(unsigned int irq
);
98 void (*unmask
)(unsigned int irq
);
99 void (*eoi
)(unsigned int irq
);
101 void (*end
)(unsigned int irq
);
102 void (*set_affinity
)(unsigned int irq
, cpumask_t dest
);
103 int (*retrigger
)(unsigned int irq
);
104 int (*set_type
)(unsigned int irq
, unsigned int flow_type
);
105 int (*set_wake
)(unsigned int irq
, unsigned int on
);
107 /* Currently used only by UML, might disappear one day.*/
108 #ifdef CONFIG_IRQ_RELEASE_METHOD
109 void (*release
)(unsigned int irq
, void *dev_id
);
112 * For compatibility, ->typename is copied into ->name.
115 const char *typename
;
119 * struct irq_desc - interrupt descriptor
121 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
122 * @chip: low level interrupt hardware access
123 * @handler_data: per-IRQ data for the irq_chip methods
124 * @chip_data: platform-specific per-chip private data for the chip
125 * methods, to allow shared chip implementations
126 * @action: the irq action chain
127 * @status: status information
128 * @depth: disable-depth, for nested irq_disable() calls
129 * @wake_depth: enable depth, for multiple set_irq_wake() callers
130 * @irq_count: stats field to detect stalled irqs
131 * @irqs_unhandled: stats field for spurious unhandled interrupts
132 * @lock: locking for SMP
133 * @affinity: IRQ affinity on SMP
134 * @cpu: cpu index useful for balancing
135 * @pending_mask: pending rebalanced interrupts
136 * @dir: /proc/irq/ procfs entry
137 * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
139 * Pad this out to 32 bytes for cache and indexing reasons.
142 void fastcall (*handle_irq
)(unsigned int irq
,
143 struct irq_desc
*desc
,
144 struct pt_regs
*regs
);
145 struct irq_chip
*chip
;
148 struct irqaction
*action
; /* IRQ action list */
149 unsigned int status
; /* IRQ status */
151 unsigned int depth
; /* nested irq disables */
152 unsigned int wake_depth
; /* nested wake enables */
153 unsigned int irq_count
; /* For detecting broken IRQs */
154 unsigned int irqs_unhandled
;
160 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
161 cpumask_t pending_mask
;
163 #ifdef CONFIG_PROC_FS
164 struct proc_dir_entry
*dir
;
166 } ____cacheline_aligned
;
168 extern struct irq_desc irq_desc
[NR_IRQS
];
171 * Migration helpers for obsolete names, they will go away:
173 #define hw_interrupt_type irq_chip
174 typedef struct irq_chip hw_irq_controller
;
175 #define no_irq_type no_irq_chip
176 typedef struct irq_desc irq_desc_t
;
179 * Pick up the arch-dependent methods:
181 #include <asm/hw_irq.h>
183 extern int setup_irq(unsigned int irq
, struct irqaction
*new);
185 #ifdef CONFIG_GENERIC_HARDIRQS
187 #ifndef handle_dynamic_tick
188 # define handle_dynamic_tick(a) do { } while (0)
192 static inline void set_native_irq_info(int irq
, cpumask_t mask
)
194 irq_desc
[irq
].affinity
= mask
;
197 static inline void set_native_irq_info(int irq
, cpumask_t mask
)
204 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
206 void set_pending_irq(unsigned int irq
, cpumask_t mask
);
207 void move_native_irq(int irq
);
209 #ifdef CONFIG_PCI_MSI
211 * Wonder why these are dummies?
212 * For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
213 * counter part after translating the vector to irq info. We need to perform
214 * this operation on the real irq, when we dont use vector, i.e when
215 * pci_use_vector() is false.
217 static inline void move_irq(int irq
)
221 static inline void set_irq_info(int irq
, cpumask_t mask
)
225 #else /* CONFIG_PCI_MSI */
227 static inline void move_irq(int irq
)
229 move_native_irq(irq
);
232 static inline void set_irq_info(int irq
, cpumask_t mask
)
234 set_native_irq_info(irq
, mask
);
237 #endif /* CONFIG_PCI_MSI */
239 #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
241 static inline void move_irq(int irq
)
245 static inline void move_native_irq(int irq
)
249 static inline void set_pending_irq(unsigned int irq
, cpumask_t mask
)
253 static inline void set_irq_info(int irq
, cpumask_t mask
)
255 set_native_irq_info(irq
, mask
);
258 #endif /* CONFIG_GENERIC_PENDING_IRQ */
260 #else /* CONFIG_SMP */
263 #define move_native_irq(x)
265 #endif /* CONFIG_SMP */
267 #ifdef CONFIG_IRQBALANCE
268 extern void set_balance_irq_affinity(unsigned int irq
, cpumask_t mask
);
270 static inline void set_balance_irq_affinity(unsigned int irq
, cpumask_t mask
)
275 #ifdef CONFIG_AUTO_IRQ_AFFINITY
276 extern int select_smp_affinity(unsigned int irq
);
278 static inline int select_smp_affinity(unsigned int irq
)
284 extern int no_irq_affinity
;
286 /* Handle irq action chains: */
287 extern int handle_IRQ_event(unsigned int irq
, struct pt_regs
*regs
,
288 struct irqaction
*action
);
291 * Built-in IRQ handlers for various IRQ types,
292 * callable via desc->chip->handle_irq()
295 handle_level_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
297 handle_fasteoi_irq(unsigned int irq
, struct irq_desc
*desc
,
298 struct pt_regs
*regs
);
300 handle_edge_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
302 handle_simple_irq(unsigned int irq
, struct irq_desc
*desc
,
303 struct pt_regs
*regs
);
305 handle_percpu_irq(unsigned int irq
, struct irq_desc
*desc
,
306 struct pt_regs
*regs
);
308 handle_bad_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
311 * Get a descriptive string for the highlevel handler, for
312 * /proc/interrupts output:
315 handle_irq_name(void fastcall (*handle
)(unsigned int, struct irq_desc
*,
319 * Monolithic do_IRQ implementation.
320 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
322 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
323 extern fastcall
unsigned int __do_IRQ(unsigned int irq
, struct pt_regs
*regs
);
327 * Architectures call this to let the generic IRQ layer
328 * handle an interrupt. If the descriptor is attached to an
329 * irqchip-style controller then we call the ->handle_irq() handler,
330 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
332 static inline void generic_handle_irq(unsigned int irq
, struct pt_regs
*regs
)
334 struct irq_desc
*desc
= irq_desc
+ irq
;
336 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
337 desc
->handle_irq(irq
, desc
, regs
);
339 if (likely(desc
->handle_irq
))
340 desc
->handle_irq(irq
, desc
, regs
);
346 /* Handling of unhandled and spurious interrupts: */
347 extern void note_interrupt(unsigned int irq
, struct irq_desc
*desc
,
348 int action_ret
, struct pt_regs
*regs
);
350 /* Resending of interrupts :*/
351 void check_irq_resend(struct irq_desc
*desc
, unsigned int irq
);
353 /* Initialize /proc/irq/ */
354 extern void init_irq_proc(void);
356 /* Enable/disable irq debugging output: */
357 extern int noirqdebug_setup(char *str
);
359 /* Checks whether the interrupt can be requested by request_irq(): */
360 extern int can_request_irq(unsigned int irq
, unsigned long irqflags
);
362 /* Dummy irq-chip implementations: */
363 extern struct irq_chip no_irq_chip
;
364 extern struct irq_chip dummy_irq_chip
;
367 set_irq_chip_and_handler(unsigned int irq
, struct irq_chip
*chip
,
368 void fastcall (*handle
)(unsigned int,
372 __set_irq_handler(unsigned int irq
,
373 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
378 * Set a highlevel flow handler for a given IRQ:
381 set_irq_handler(unsigned int irq
,
382 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
385 __set_irq_handler(irq
, handle
, 0);
389 * Set a highlevel chained flow handler for a given IRQ.
390 * (a chained handler is automatically enabled and set to
391 * IRQ_NOREQUEST and IRQ_NOPROBE)
394 set_irq_chained_handler(unsigned int irq
,
395 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
398 __set_irq_handler(irq
, handle
, 1);
401 /* Set/get chip/data for an IRQ: */
403 extern int set_irq_chip(unsigned int irq
, struct irq_chip
*chip
);
404 extern int set_irq_data(unsigned int irq
, void *data
);
405 extern int set_irq_chip_data(unsigned int irq
, void *data
);
406 extern int set_irq_type(unsigned int irq
, unsigned int type
);
408 #define get_irq_chip(irq) (irq_desc[irq].chip)
409 #define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
410 #define get_irq_data(irq) (irq_desc[irq].handler_data)
412 #endif /* CONFIG_GENERIC_HARDIRQS */
414 #endif /* !CONFIG_S390 */
416 #endif /* _LINUX_IRQ_H */