arch/x86/pci/irq.c

   1 /*
   2  *      Low-Level PCI Support for PC -- Routing of Interrupts
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   5  */
   6
   7 #include <linux/types.h>
   8 #include <linux/kernel.h>
   9 #include <linux/pci.h>
  10 #include <linux/init.h>
  11 #include <linux/slab.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/dmi.h>
  14 #include <asm/io.h>
  15 #include <asm/smp.h>
  16 #include <asm/io_apic.h>
  17 #include <linux/irq.h>
  18 #include <linux/acpi.h>
  19
  20 #include "pci.h"
  21
  22 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  23 #define PIRQ_VERSION 0x0100
  24
  25 static int broken_hp_bios_irq9;
  26 static int acer_tm360_irqrouting;
  27
  28 static struct irq_routing_table *pirq_table;
  29
  30 static int pirq_enable_irq(struct pci_dev *dev);
  31
  32 /*
  33  * Never use: 0, 1, 2 (timer, keyboard, and cascade)
  34  * Avoid using: 13, 14 and 15 (FP error and IDE).
  35  * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
  36  */
  37 unsigned int pcibios_irq_mask = 0xfff8;
  38
  39 static int pirq_penalty[16] = {
  40         1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
  41         0, 0, 0, 0, 1000, 100000, 100000, 100000
  42 };
  43
  44 struct irq_router {
  45         char *name;
  46         u16 vendor, device;
  47         int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
  48         int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
  49 };
  50
  51 struct irq_router_handler {
  52         u16 vendor;
  53         int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
  54 };
  55
  56 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
  57 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
  58
  59 /*
  60  *  Check passed address for the PCI IRQ Routing Table signature
  61  *  and perform checksum verification.
  62  */
  63
  64 static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
  65 {
  66         struct irq_routing_table *rt;
  67         int i;
  68         u8 sum;
  69
  70         rt = (struct irq_routing_table *) addr;
  71         if (rt->signature != PIRQ_SIGNATURE ||
  72             rt->version != PIRQ_VERSION ||
  73             rt->size % 16 ||
  74             rt->size < sizeof(struct irq_routing_table))
  75                 return NULL;
  76         sum = 0;
  77         for (i=0; i < rt->size; i++)
  78                 sum += addr[i];
  79         if (!sum) {
  80                 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
  81                 return rt;
  82         }
  83         return NULL;
  84 }
  85
  86
  87
  88 /*
  89  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
  90  */
  91
  92 static struct irq_routing_table * __init pirq_find_routing_table(void)
  93 {
  94         u8 *addr;
  95         struct irq_routing_table *rt;
  96
  97         if (pirq_table_addr) {
  98                 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
  99                 if (rt)
 100                         return rt;
 101                 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
 102         }
 103         for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
 104                 rt = pirq_check_routing_table(addr);
 105                 if (rt)
 106                         return rt;
 107         }
 108         return NULL;
 109 }
 110
 111 /*
 112  *  If we have a IRQ routing table, use it to search for peer host
 113  *  bridges.  It's a gross hack, but since there are no other known
 114  *  ways how to get a list of buses, we have to go this way.
 115  */
 116
 117 static void __init pirq_peer_trick(void)
 118 {
 119         struct irq_routing_table *rt = pirq_table;
 120         u8 busmap[256];
 121         int i;
 122         struct irq_info *e;
 123
 124         memset(busmap, 0, sizeof(busmap));
 125         for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
 126                 e = &rt->slots[i];
 127 #ifdef DEBUG
 128                 {
 129                         int j;
 130                         DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
 131                         for(j=0; j<4; j++)
 132                                 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
 133                         DBG("\n");
 134                 }
 135 #endif
 136                 busmap[e->bus] = 1;
 137         }
 138         for(i = 1; i < 256; i++) {
 139                 if (!busmap[i] || pci_find_bus(0, i))
 140                         continue;
 141                 if (pci_scan_bus_with_sysdata(i))
 142                         printk(KERN_INFO "PCI: Discovered primary peer "
 143                                "bus %02x [IRQ]\n", i);
 144         }
 145         pcibios_last_bus = -1;
 146 }
 147
 148 /*
 149  *  Code for querying and setting of IRQ routes on various interrupt routers.
 150  */
 151
 152 void eisa_set_level_irq(unsigned int irq)
 153 {
 154         unsigned char mask = 1 << (irq & 7);
 155         unsigned int port = 0x4d0 + (irq >> 3);
 156         unsigned char val;
 157         static u16 eisa_irq_mask;
 158
 159         if (irq >= 16 || (1 << irq) & eisa_irq_mask)
 160                 return;
 161
 162         eisa_irq_mask |= (1 << irq);
 163         printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
 164         val = inb(port);
 165         if (!(val & mask)) {
 166                 DBG(KERN_DEBUG " -> edge");
 167                 outb(val | mask, port);
 168         }
 169 }
 170
 171 /*
 172  * Common IRQ routing practice: nibbles in config space,
 173  * offset by some magic constant.
 174  */
 175 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
 176 {
 177         u8 x;
 178         unsigned reg = offset + (nr >> 1);
 179
 180         pci_read_config_byte(router, reg, &x);
 181         return (nr & 1) ? (x >> 4) : (x & 0xf);
 182 }
 183
 184 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
 185 {
 186         u8 x;
 187         unsigned reg = offset + (nr >> 1);
 188
 189         pci_read_config_byte(router, reg, &x);
 190         x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
 191         pci_write_config_byte(router, reg, x);
 192 }
 193
 194 /*
 195  * ALI pirq entries are damn ugly, and completely undocumented.
 196  * This has been figured out from pirq tables, and it's not a pretty
 197  * picture.
 198  */
 199 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 200 {
 201         static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
 202
 203         WARN_ON_ONCE(pirq >= 16);
 204         return irqmap[read_config_nybble(router, 0x48, pirq-1)];
 205 }
 206
 207 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 208 {
 209         static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
 210         unsigned int val = irqmap[irq];
 211
 212         WARN_ON_ONCE(pirq >= 16);
 213         if (val) {
 214                 write_config_nybble(router, 0x48, pirq-1, val);
 215                 return 1;
 216         }
 217         return 0;
 218 }
 219
 220 /*
 221  * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
 222  * just a pointer to the config space.
 223  */
 224 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 225 {
 226         u8 x;
 227
 228         pci_read_config_byte(router, pirq, &x);
 229         return (x < 16) ? x : 0;
 230 }
 231
 232 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 233 {
 234         pci_write_config_byte(router, pirq, irq);
 235         return 1;
 236 }
 237
 238 /*
 239  * The VIA pirq rules are nibble-based, like ALI,
 240  * but without the ugly irq number munging.
 241  * However, PIRQD is in the upper instead of lower 4 bits.
 242  */
 243 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 244 {
 245         return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
 246 }
 247
 248 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 249 {
 250         write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
 251         return 1;
 252 }
 253
 254 /*
 255  * The VIA pirq rules are nibble-based, like ALI,
 256  * but without the ugly irq number munging.
 257  * However, for 82C586, nibble map is different .
 258  */
 259 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 260 {
 261         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 262
 263         WARN_ON_ONCE(pirq >= 5);
 264         return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
 265 }
 266
 267 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 268 {
 269         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 270
 271         WARN_ON_ONCE(pirq >= 5);
 272         write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
 273         return 1;
 274 }
 275
 276 /*
 277  * ITE 8330G pirq rules are nibble-based
 278  * FIXME: pirqmap may be { 1, 0, 3, 2 },
 279  *        2+3 are both mapped to irq 9 on my system
 280  */
 281 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 282 {
 283         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 284
 285         WARN_ON_ONCE(pirq >= 4);
 286         return read_config_nybble(router,0x43, pirqmap[pirq-1]);
 287 }
 288
 289 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 290 {
 291         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 292
 293         WARN_ON_ONCE(pirq >= 4);
 294         write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
 295         return 1;
 296 }
 297
 298 /*
 299  * OPTI: high four bits are nibble pointer..
 300  * I wonder what the low bits do?
 301  */
 302 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 303 {
 304         return read_config_nybble(router, 0xb8, pirq >> 4);
 305 }
 306
 307 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 308 {
 309         write_config_nybble(router, 0xb8, pirq >> 4, irq);
 310         return 1;
 311 }
 312
 313 /*
 314  * Cyrix: nibble offset 0x5C
 315  * 0x5C bits 7:4 is INTB bits 3:0 is INTA
 316  * 0x5D bits 7:4 is INTD bits 3:0 is INTC
 317  */
 318 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 319 {
 320         return read_config_nybble(router, 0x5C, (pirq-1)^1);
 321 }
 322
 323 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 324 {
 325         write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
 326         return 1;
 327 }
 328
 329 /*
 330  *      PIRQ routing for SiS 85C503 router used in several SiS chipsets.
 331  *      We have to deal with the following issues here:
 332  *      - vendors have different ideas about the meaning of link values
 333  *      - some onboard devices (integrated in the chipset) have special
 334  *        links and are thus routed differently (i.e. not via PCI INTA-INTD)
 335  *      - different revision of the router have a different layout for
 336  *        the routing registers, particularly for the onchip devices
 337  *
 338  *      For all routing registers the common thing is we have one byte
 339  *      per routeable link which is defined as:
 340  *               bit 7      IRQ mapping enabled (0) or disabled (1)
 341  *               bits [6:4] reserved (sometimes used for onchip devices)
 342  *               bits [3:0] IRQ to map to
 343  *                   allowed: 3-7, 9-12, 14-15
 344  *                   reserved: 0, 1, 2, 8, 13
 345  *
 346  *      The config-space registers located at 0x41/0x42/0x43/0x44 are
 347  *      always used to route the normal PCI INT A/B/C/D respectively.
 348  *      Apparently there are systems implementing PCI routing table using
 349  *      link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
 350  *      We try our best to handle both link mappings.
 351  *
 352  *      Currently (2003-05-21) it appears most SiS chipsets follow the
 353  *      definition of routing registers from the SiS-5595 southbridge.
 354  *      According to the SiS 5595 datasheets the revision id's of the
 355  *      router (ISA-bridge) should be 0x01 or 0xb0.
 356  *
 357  *      Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
 358  *      Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
 359  *      They seem to work with the current routing code. However there is
 360  *      some concern because of the two USB-OHCI HCs (original SiS 5595
 361  *      had only one). YMMV.
 362  *
 363  *      Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
 364  *
 365  *      0x61:   IDEIRQ:
 366  *              bits [6:5] must be written 01
 367  *              bit 4 channel-select primary (0), secondary (1)
 368  *
 369  *      0x62:   USBIRQ:
 370  *              bit 6 OHCI function disabled (0), enabled (1)
 371  *
 372  *      0x6a:   ACPI/SCI IRQ: bits 4-6 reserved
 373  *
 374  *      0x7e:   Data Acq. Module IRQ - bits 4-6 reserved
 375  *
 376  *      We support USBIRQ (in addition to INTA-INTD) and keep the
 377  *      IDE, ACPI and DAQ routing untouched as set by the BIOS.
 378  *
 379  *      Currently the only reported exception is the new SiS 65x chipset
 380  *      which includes the SiS 69x southbridge. Here we have the 85C503
 381  *      router revision 0x04 and there are changes in the register layout
 382  *      mostly related to the different USB HCs with USB 2.0 support.
 383  *
 384  *      Onchip routing for router rev-id 0x04 (try-and-error observation)
 385  *
 386  *      0x60/0x61/0x62/0x63:    1xEHCI and 3xOHCI (companion) USB-HCs
 387  *                              bit 6-4 are probably unused, not like 5595
 388  */
 389
 390 #define PIRQ_SIS_IRQ_MASK       0x0f
 391 #define PIRQ_SIS_IRQ_DISABLE    0x80
 392 #define PIRQ_SIS_USB_ENABLE     0x40
 393
 394 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 395 {
 396         u8 x;
 397         int reg;
 398
 399         reg = pirq;
 400         if (reg >= 0x01 && reg <= 0x04)
 401                 reg += 0x40;
 402         pci_read_config_byte(router, reg, &x);
 403         return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
 404 }
 405
 406 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 407 {
 408         u8 x;
 409         int reg;
 410
 411         reg = pirq;
 412         if (reg >= 0x01 && reg <= 0x04)
 413                 reg += 0x40;
 414         pci_read_config_byte(router, reg, &x);
 415         x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
 416         x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
 417         pci_write_config_byte(router, reg, x);
 418         return 1;
 419 }
 420
 421
 422 /*
 423  * VLSI: nibble offset 0x74 - educated guess due to routing table and
 424  *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
 425  *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
 426  *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
 427  *       for the busbridge to the docking station.
 428  */
 429
 430 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 431 {
 432         WARN_ON_ONCE(pirq >= 9);
 433         if (pirq > 8) {
 434                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 435                 return 0;
 436         }
 437         return read_config_nybble(router, 0x74, pirq-1);
 438 }
 439
 440 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 441 {
 442         WARN_ON_ONCE(pirq >= 9);
 443         if (pirq > 8) {
 444                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 445                 return 0;
 446         }
 447         write_config_nybble(router, 0x74, pirq-1, irq);
 448         return 1;
 449 }
 450
 451 /*
 452  * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
 453  * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
 454  * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
 455  * register is a straight binary coding of desired PIC IRQ (low nibble).
 456  *
 457  * The 'link' value in the PIRQ table is already in the correct format
 458  * for the Index register.  There are some special index values:
 459  * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
 460  * and 0x03 for SMBus.
 461  */
 462 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 463 {
 464         outb(pirq, 0xc00);
 465         return inb(0xc01) & 0xf;
 466 }
 467
 468 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 469 {
 470         outb(pirq, 0xc00);
 471         outb(irq, 0xc01);
 472         return 1;
 473 }
 474
 475 /* Support for AMD756 PCI IRQ Routing
 476  * Jhon H. Caicedo <jhcaiced@osso.org.co>
 477  * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
 478  * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
 479  * The AMD756 pirq rules are nibble-based
 480  * offset 0x56 0-3 PIRQA  4-7  PIRQB
 481  * offset 0x57 0-3 PIRQC  4-7  PIRQD
 482  */
 483 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 484 {
 485         u8 irq;
 486         irq = 0;
 487         if (pirq <= 4)
 488         {
 489                 irq = read_config_nybble(router, 0x56, pirq - 1);
 490         }
 491         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
 492                 dev->vendor, dev->device, pirq, irq);
 493         return irq;
 494 }
 495
 496 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 497 {
 498         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
 499                 dev->vendor, dev->device, pirq, irq);
 500         if (pirq <= 4)
 501         {
 502                 write_config_nybble(router, 0x56, pirq - 1, irq);
 503         }
 504         return 1;
 505 }
 506
 507 /*
 508  * PicoPower PT86C523
 509  */
 510 static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 511 {
 512         outb(0x10 + ((pirq - 1) >> 1), 0x24);
 513         return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
 514 }
 515
 516 static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
 517                         int irq)
 518 {
 519         unsigned int x;
 520         outb(0x10 + ((pirq - 1) >> 1), 0x24);
 521         x = inb(0x26);
 522         x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq));
 523         outb(x, 0x26);
 524         return 1;
 525 }
 526
 527 #ifdef CONFIG_PCI_BIOS
 528
 529 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 530 {
 531         struct pci_dev *bridge;
 532         int pin = pci_get_interrupt_pin(dev, &bridge);
 533         return pcibios_set_irq_routing(bridge, pin, irq);
 534 }
 535
 536 #endif
 537
 538 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 539 {
 540         static struct pci_device_id __initdata pirq_440gx[] = {
 541                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
 542                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
 543                 { },
 544         };
 545
 546         /* 440GX has a proprietary PIRQ router -- don't use it */
 547         if (pci_dev_present(pirq_440gx))
 548                 return 0;
 549
 550         switch(device)
 551         {
 552                 case PCI_DEVICE_ID_INTEL_82371FB_0:
 553                 case PCI_DEVICE_ID_INTEL_82371SB_0:
 554                 case PCI_DEVICE_ID_INTEL_82371AB_0:
 555                 case PCI_DEVICE_ID_INTEL_82371MX:
 556                 case PCI_DEVICE_ID_INTEL_82443MX_0:
 557                 case PCI_DEVICE_ID_INTEL_82801AA_0:
 558                 case PCI_DEVICE_ID_INTEL_82801AB_0:
 559                 case PCI_DEVICE_ID_INTEL_82801BA_0:
 560                 case PCI_DEVICE_ID_INTEL_82801BA_10:
 561                 case PCI_DEVICE_ID_INTEL_82801CA_0:
 562                 case PCI_DEVICE_ID_INTEL_82801CA_12:
 563                 case PCI_DEVICE_ID_INTEL_82801DB_0:
 564                 case PCI_DEVICE_ID_INTEL_82801E_0:
 565                 case PCI_DEVICE_ID_INTEL_82801EB_0:
 566                 case PCI_DEVICE_ID_INTEL_ESB_1:
 567                 case PCI_DEVICE_ID_INTEL_ICH6_0:
 568                 case PCI_DEVICE_ID_INTEL_ICH6_1:
 569                 case PCI_DEVICE_ID_INTEL_ICH7_0:
 570                 case PCI_DEVICE_ID_INTEL_ICH7_1:
 571                 case PCI_DEVICE_ID_INTEL_ICH7_30:
 572                 case PCI_DEVICE_ID_INTEL_ICH7_31:
 573                 case PCI_DEVICE_ID_INTEL_ESB2_0:
 574                 case PCI_DEVICE_ID_INTEL_ICH8_0:
 575                 case PCI_DEVICE_ID_INTEL_ICH8_1:
 576                 case PCI_DEVICE_ID_INTEL_ICH8_2:
 577                 case PCI_DEVICE_ID_INTEL_ICH8_3:
 578                 case PCI_DEVICE_ID_INTEL_ICH8_4:
 579                 case PCI_DEVICE_ID_INTEL_ICH9_0:
 580                 case PCI_DEVICE_ID_INTEL_ICH9_1:
 581                 case PCI_DEVICE_ID_INTEL_ICH9_2:
 582                 case PCI_DEVICE_ID_INTEL_ICH9_3:
 583                 case PCI_DEVICE_ID_INTEL_ICH9_4:
 584                 case PCI_DEVICE_ID_INTEL_ICH9_5:
 585                 case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
 586                         r->name = "PIIX/ICH";
 587                         r->get = pirq_piix_get;
 588                         r->set = pirq_piix_set;
 589                         return 1;
 590         }
 591         return 0;
 592 }
 593
 594 static __init int via_router_probe(struct irq_router *r,
 595                                 struct pci_dev *router, u16 device)
 596 {
 597         /* FIXME: We should move some of the quirk fixup stuff here */
 598
 599         /*
 600          * workarounds for some buggy BIOSes
 601          */
 602         if (device == PCI_DEVICE_ID_VIA_82C586_0) {
 603                 switch(router->device) {
 604                 case PCI_DEVICE_ID_VIA_82C686:
 605                         /*
 606                          * Asus k7m bios wrongly reports 82C686A
 607                          * as 586-compatible
 608                          */
 609                         device = PCI_DEVICE_ID_VIA_82C686;
 610                         break;
 611                 case PCI_DEVICE_ID_VIA_8235:
 612                         /**
 613                          * Asus a7v-x bios wrongly reports 8235
 614                          * as 586-compatible
 615                          */
 616                         device = PCI_DEVICE_ID_VIA_8235;
 617                         break;
 618                 }
 619         }
 620
 621         switch(device) {
 622         case PCI_DEVICE_ID_VIA_82C586_0:
 623                 r->name = "VIA";
 624                 r->get = pirq_via586_get;
 625                 r->set = pirq_via586_set;
 626                 return 1;
 627         case PCI_DEVICE_ID_VIA_82C596:
 628         case PCI_DEVICE_ID_VIA_82C686:
 629         case PCI_DEVICE_ID_VIA_8231:
 630         case PCI_DEVICE_ID_VIA_8233A:
 631         case PCI_DEVICE_ID_VIA_8235:
 632         case PCI_DEVICE_ID_VIA_8237:
 633                 /* FIXME: add new ones for 8233/5 */
 634                 r->name = "VIA";
 635                 r->get = pirq_via_get;
 636                 r->set = pirq_via_set;
 637                 return 1;
 638         }
 639         return 0;
 640 }
 641
 642 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 643 {
 644         switch(device)
 645         {
 646                 case PCI_DEVICE_ID_VLSI_82C534:
 647                         r->name = "VLSI 82C534";
 648                         r->get = pirq_vlsi_get;
 649                         r->set = pirq_vlsi_set;
 650                         return 1;
 651         }
 652         return 0;
 653 }
 654
 655
 656 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 657 {
 658         switch(device)
 659         {
 660                 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
 661                 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
 662                         r->name = "ServerWorks";
 663                         r->get = pirq_serverworks_get;
 664                         r->set = pirq_serverworks_set;
 665                         return 1;
 666         }
 667         return 0;
 668 }
 669
 670 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 671 {
 672         if (device != PCI_DEVICE_ID_SI_503)
 673                 return 0;
 674
 675         r->name = "SIS";
 676         r->get = pirq_sis_get;
 677         r->set = pirq_sis_set;
 678         return 1;
 679 }
 680
 681 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 682 {
 683         switch(device)
 684         {
 685                 case PCI_DEVICE_ID_CYRIX_5520:
 686                         r->name = "NatSemi";
 687                         r->get = pirq_cyrix_get;
 688                         r->set = pirq_cyrix_set;
 689                         return 1;
 690         }
 691         return 0;
 692 }
 693
 694 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 695 {
 696         switch(device)
 697         {
 698                 case PCI_DEVICE_ID_OPTI_82C700:
 699                         r->name = "OPTI";
 700                         r->get = pirq_opti_get;
 701                         r->set = pirq_opti_set;
 702                         return 1;
 703         }
 704         return 0;
 705 }
 706
 707 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 708 {
 709         switch(device)
 710         {
 711                 case PCI_DEVICE_ID_ITE_IT8330G_0:
 712                         r->name = "ITE";
 713                         r->get = pirq_ite_get;
 714                         r->set = pirq_ite_set;
 715                         return 1;
 716         }
 717         return 0;
 718 }
 719
 720 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 721 {
 722         switch(device)
 723         {
 724         case PCI_DEVICE_ID_AL_M1533:
 725         case PCI_DEVICE_ID_AL_M1563:
 726                 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
 727                 r->name = "ALI";
 728                 r->get = pirq_ali_get;
 729                 r->set = pirq_ali_set;
 730                 return 1;
 731         }
 732         return 0;
 733 }
 734
 735 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 736 {
 737         switch(device)
 738         {
 739                 case PCI_DEVICE_ID_AMD_VIPER_740B:
 740                         r->name = "AMD756";
 741                         break;
 742                 case PCI_DEVICE_ID_AMD_VIPER_7413:
 743                         r->name = "AMD766";
 744                         break;
 745                 case PCI_DEVICE_ID_AMD_VIPER_7443:
 746                         r->name = "AMD768";
 747                         break;
 748                 default:
 749                         return 0;
 750         }
 751         r->get = pirq_amd756_get;
 752         r->set = pirq_amd756_set;
 753         return 1;
 754 }
 755
 756 static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 757 {
 758         switch (device) {
 759         case PCI_DEVICE_ID_PICOPOWER_PT86C523:
 760                 r->name = "PicoPower PT86C523";
 761                 r->get = pirq_pico_get;
 762                 r->set = pirq_pico_set;
 763                 return 1;
 764
 765         case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP:
 766                 r->name = "PicoPower PT86C523 rev. BB+";
 767                 r->get = pirq_pico_get;
 768                 r->set = pirq_pico_set;
 769                 return 1;
 770         }
 771         return 0;
 772 }
 773
 774 static __initdata struct irq_router_handler pirq_routers[] = {
 775         { PCI_VENDOR_ID_INTEL, intel_router_probe },
 776         { PCI_VENDOR_ID_AL, ali_router_probe },
 777         { PCI_VENDOR_ID_ITE, ite_router_probe },
 778         { PCI_VENDOR_ID_VIA, via_router_probe },
 779         { PCI_VENDOR_ID_OPTI, opti_router_probe },
 780         { PCI_VENDOR_ID_SI, sis_router_probe },
 781         { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
 782         { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
 783         { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
 784         { PCI_VENDOR_ID_AMD, amd_router_probe },
 785         { PCI_VENDOR_ID_PICOPOWER, pico_router_probe },
 786         /* Someone with docs needs to add the ATI Radeon IGP */
 787         { 0, NULL }
 788 };
 789 static struct irq_router pirq_router;
 790 static struct pci_dev *pirq_router_dev;
 791
 792
 793 /*
 794  *      FIXME: should we have an option to say "generic for
 795  *      chipset" ?
 796  */
 797
 798 static void __init pirq_find_router(struct irq_router *r)
 799 {
 800         struct irq_routing_table *rt = pirq_table;
 801         struct irq_router_handler *h;
 802
 803 #ifdef CONFIG_PCI_BIOS
 804         if (!rt->signature) {
 805                 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
 806                 r->set = pirq_bios_set;
 807                 r->name = "BIOS";
 808                 return;
 809         }
 810 #endif
 811
 812         /* Default unless a driver reloads it */
 813         r->name = "default";
 814         r->get = NULL;
 815         r->set = NULL;
 816
 817         DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
 818             rt->rtr_vendor, rt->rtr_device);
 819
 820         pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
 821         if (!pirq_router_dev) {
 822                 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
 823                         "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
 824                 return;
 825         }
 826
 827         for( h = pirq_routers; h->vendor; h++) {
 828                 /* First look for a router match */
 829                 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
 830                         break;
 831                 /* Fall back to a device match */
 832                 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
 833                         break;
 834         }
 835         printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
 836                 pirq_router.name,
 837                 pirq_router_dev->vendor,
 838                 pirq_router_dev->device,
 839                 pci_name(pirq_router_dev));
 840
 841         /* The device remains referenced for the kernel lifetime */
 842 }
 843
 844 static struct irq_info *pirq_get_info(struct pci_dev *dev)
 845 {
 846         struct irq_routing_table *rt = pirq_table;
 847         int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 848         struct irq_info *info;
 849
 850         for (info = rt->slots; entries--; info++)
 851                 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
 852                         return info;
 853         return NULL;
 854 }
 855
 856 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
 857 {
 858         u8 pin;
 859         struct irq_info *info;
 860         int i, pirq, newirq;
 861         int irq = 0;
 862         u32 mask;
 863         struct irq_router *r = &pirq_router;
 864         struct pci_dev *dev2 = NULL;
 865         char *msg = NULL;
 866
 867         /* Find IRQ pin */
 868         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 869         if (!pin) {
 870                 DBG(KERN_DEBUG " -> no interrupt pin\n");
 871                 return 0;
 872         }
 873         pin = pin - 1;
 874
 875         /* Find IRQ routing entry */
 876
 877         if (!pirq_table)
 878                 return 0;
 879
 880         DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
 881         info = pirq_get_info(dev);
 882         if (!info) {
 883                 DBG(" -> not found in routing table\n" KERN_DEBUG);
 884                 return 0;
 885         }
 886         pirq = info->irq[pin].link;
 887         mask = info->irq[pin].bitmap;
 888         if (!pirq) {
 889                 DBG(" -> not routed\n" KERN_DEBUG);
 890                 return 0;
 891         }
 892         DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
 893         mask &= pcibios_irq_mask;
 894
 895         /* Work around broken HP Pavilion Notebooks which assign USB to
 896            IRQ 9 even though it is actually wired to IRQ 11 */
 897
 898         if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
 899                 dev->irq = 11;
 900                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 901                 r->set(pirq_router_dev, dev, pirq, 11);
 902         }
 903
 904         /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
 905         if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
 906                 pirq = 0x68;
 907                 mask = 0x400;
 908                 dev->irq = r->get(pirq_router_dev, dev, pirq);
 909                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 910         }
 911
 912         /*
 913          * Find the best IRQ to assign: use the one
 914          * reported by the device if possible.
 915          */
 916         newirq = dev->irq;
 917         if (newirq && !((1 << newirq) & mask)) {
 918                 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
 919                 else printk("\n" KERN_WARNING
 920                         "PCI: IRQ %i for device %s doesn't match PIRQ mask "
 921                         "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
 922                         pci_name(dev));
 923         }
 924         if (!newirq && assign) {
 925                 for (i = 0; i < 16; i++) {
 926                         if (!(mask & (1 << i)))
 927                                 continue;
 928                         if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
 929                                 newirq = i;
 930                 }
 931         }
 932         DBG(" -> newirq=%d", newirq);
 933
 934         /* Check if it is hardcoded */
 935         if ((pirq & 0xf0) == 0xf0) {
 936                 irq = pirq & 0xf;
 937                 DBG(" -> hardcoded IRQ %d\n", irq);
 938                 msg = "Hardcoded";
 939         } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
 940         ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
 941                 DBG(" -> got IRQ %d\n", irq);
 942                 msg = "Found";
 943                 eisa_set_level_irq(irq);
 944         } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
 945                 DBG(" -> assigning IRQ %d", newirq);
 946                 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
 947                         eisa_set_level_irq(newirq);
 948                         DBG(" ... OK\n");
 949                         msg = "Assigned";
 950                         irq = newirq;
 951                 }
 952         }
 953
 954         if (!irq) {
 955                 DBG(" ... failed\n");
 956                 if (newirq && mask == (1 << newirq)) {
 957                         msg = "Guessed";
 958                         irq = newirq;
 959                 } else
 960                         return 0;
 961         }
 962         printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
 963
 964         /* Update IRQ for all devices with the same pirq value */
 965         while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
 966                 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
 967                 if (!pin)
 968                         continue;
 969                 pin--;
 970                 info = pirq_get_info(dev2);
 971                 if (!info)
 972                         continue;
 973                 if (info->irq[pin].link == pirq) {
 974                         /* We refuse to override the dev->irq information. Give a warning! */
 975                         if ( dev2->irq && dev2->irq != irq && \
 976                         (!(pci_probe & PCI_USE_PIRQ_MASK) || \
 977                         ((1 << dev2->irq) & mask)) ) {
 978 #ifndef CONFIG_PCI_MSI
 979                                 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
 980                                        pci_name(dev2), dev2->irq, irq);
 981 #endif
 982                                 continue;
 983                         }
 984                         dev2->irq = irq;
 985                         pirq_penalty[irq]++;
 986                         if (dev != dev2)
 987                                 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
 988                 }
 989         }
 990         return 1;
 991 }
 992
 993 static void __init pcibios_fixup_irqs(void)
 994 {
 995         struct pci_dev *dev = NULL;
 996         u8 pin;
 997
 998         DBG(KERN_DEBUG "PCI: IRQ fixup\n");
 999         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
1000                 /*
1001                  * If the BIOS has set an out of range IRQ number, just ignore it.
1002                  * Also keep track of which IRQ's are already in use.
1003                  */
1004                 if (dev->irq >= 16) {
1005                         DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
1006                         dev->irq = 0;
1007                 }
1008                 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
1009                 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
1010                         pirq_penalty[dev->irq] = 0;
1011                 pirq_penalty[dev->irq]++;
1012         }
1013
1014         dev = NULL;
1015         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
1016                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1017 #ifdef CONFIG_X86_IO_APIC
1018                 /*
1019                  * Recalculate IRQ numbers if we use the I/O APIC.
1020                  */
1021                 if (io_apic_assign_pci_irqs)
1022                 {
1023                         int irq;
1024
1025                         if (pin) {
1026                                 pin--;          /* interrupt pins are numbered starting from 1 */
1027                                 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1028         /*
1029          * Busses behind bridges are typically not listed in the MP-table.
1030          * In this case we have to look up the IRQ based on the parent bus,
1031          * parent slot, and pin number. The SMP code detects such bridged
1032          * busses itself so we should get into this branch reliably.
1033          */
1034                                 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1035                                         struct pci_dev * bridge = dev->bus->self;
1036
1037                                         pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1038                                         irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1039                                                         PCI_SLOT(bridge->devfn), pin);
1040                                         if (irq >= 0)
1041                                                 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1042                                                         pci_name(bridge), 'A' + pin, irq);
1043                                 }
1044                                 if (irq >= 0) {
1045                                         printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1046                                                 pci_name(dev), 'A' + pin, irq);
1047                                         dev->irq = irq;
1048                                 }
1049                         }
1050                 }
1051 #endif
1052                 /*
1053                  * Still no IRQ? Try to lookup one...
1054                  */
1055                 if (pin && !dev->irq)
1056                         pcibios_lookup_irq(dev, 0);
1057         }
1058 }
1059
1060 /*
1061  * Work around broken HP Pavilion Notebooks which assign USB to
1062  * IRQ 9 even though it is actually wired to IRQ 11
1063  */
1064 static int __init fix_broken_hp_bios_irq9(const struct dmi_system_id *d)
1065 {
1066         if (!broken_hp_bios_irq9) {
1067                 broken_hp_bios_irq9 = 1;
1068                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1069         }
1070         return 0;
1071 }
1072
1073 /*
1074  * Work around broken Acer TravelMate 360 Notebooks which assign
1075  * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1076  */
1077 static int __init fix_acer_tm360_irqrouting(const struct dmi_system_id *d)
1078 {
1079         if (!acer_tm360_irqrouting) {
1080                 acer_tm360_irqrouting = 1;
1081                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1082         }
1083         return 0;
1084 }
1085
1086 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1087         {
1088                 .callback = fix_broken_hp_bios_irq9,
1089                 .ident = "HP Pavilion N5400 Series Laptop",
1090                 .matches = {
1091                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1092                         DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1093                         DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1094                         DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1095                 },
1096         },
1097         {
1098                 .callback = fix_acer_tm360_irqrouting,
1099                 .ident = "Acer TravelMate 36x Laptop",
1100                 .matches = {
1101                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1102                         DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1103                 },
1104         },
1105         { }
1106 };
1107
1108 static int __init pcibios_irq_init(void)
1109 {
1110         DBG(KERN_DEBUG "PCI: IRQ init\n");
1111
1112         if (pcibios_enable_irq || raw_pci_ops == NULL)
1113                 return 0;
1114
1115         dmi_check_system(pciirq_dmi_table);
1116
1117         pirq_table = pirq_find_routing_table();
1118
1119 #ifdef CONFIG_PCI_BIOS
1120         if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1121                 pirq_table = pcibios_get_irq_routing_table();
1122 #endif
1123         if (pirq_table) {
1124                 pirq_peer_trick();
1125                 pirq_find_router(&pirq_router);
1126                 if (pirq_table->exclusive_irqs) {
1127                         int i;
1128                         for (i=0; i<16; i++)
1129                                 if (!(pirq_table->exclusive_irqs & (1 << i)))
1130                                         pirq_penalty[i] += 100;
1131                 }
1132                 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1133                 if (io_apic_assign_pci_irqs)
1134                         pirq_table = NULL;
1135         }
1136
1137         pcibios_enable_irq = pirq_enable_irq;
1138
1139         pcibios_fixup_irqs();
1140         return 0;
1141 }
1142
1143 subsys_initcall(pcibios_irq_init);
1144
1145
1146 static void pirq_penalize_isa_irq(int irq, int active)
1147 {
1148         /*
1149          *  If any ISAPnP device reports an IRQ in its list of possible
1150          *  IRQ's, we try to avoid assigning it to PCI devices.
1151          */
1152         if (irq < 16) {
1153                 if (active)
1154                         pirq_penalty[irq] += 1000;
1155                 else
1156                         pirq_penalty[irq] += 100;
1157         }
1158 }
1159
1160 void pcibios_penalize_isa_irq(int irq, int active)
1161 {
1162 #ifdef CONFIG_ACPI
1163         if (!acpi_noirq)
1164                 acpi_penalize_isa_irq(irq, active);
1165         else
1166 #endif
1167                 pirq_penalize_isa_irq(irq, active);
1168 }
1169
1170 static int pirq_enable_irq(struct pci_dev *dev)
1171 {
1172         u8 pin;
1173         struct pci_dev *temp_dev;
1174
1175         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1176         if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1177                 char *msg = "";
1178
1179                 pin--;          /* interrupt pins are numbered starting from 1 */
1180
1181                 if (io_apic_assign_pci_irqs) {
1182                         int irq;
1183
1184                         irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1185                         /*
1186                          * Busses behind bridges are typically not listed in the MP-table.
1187                          * In this case we have to look up the IRQ based on the parent bus,
1188                          * parent slot, and pin number. The SMP code detects such bridged
1189                          * busses itself so we should get into this branch reliably.
1190                          */
1191                         temp_dev = dev;
1192                         while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1193                                 struct pci_dev * bridge = dev->bus->self;
1194
1195                                 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1196                                 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1197                                                 PCI_SLOT(bridge->devfn), pin);
1198                                 if (irq >= 0)
1199                                         printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1200                                                 pci_name(bridge), 'A' + pin, irq);
1201                                 dev = bridge;
1202                         }
1203                         dev = temp_dev;
1204                         if (irq >= 0) {
1205                                 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1206                                         pci_name(dev), 'A' + pin, irq);
1207                                 dev->irq = irq;
1208                                 return 0;
1209                         } else
1210                                 msg = " Probably buggy MP table.";
1211                 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1212                         msg = "";
1213                 else
1214                         msg = " Please try using pci=biosirq.";
1215
1216                 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1217                 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1218                         return 0;
1219
1220                 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1221                        'A' + pin, pci_name(dev), msg);
1222         }
1223         return 0;
1224 }