1 /* system.h: FR-V CPU control definitions
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
15 #include <linux/config.h> /* get configuration macros */
16 #include <linux/linkage.h>
17 #include <asm/atomic.h>
22 * switch_to(prev, next) should switch from task `prev' to `next'
23 * `prev' will never be the same as `next'.
24 * The `mb' is to tell GCC not to cache `current' across this call.
27 struct task_struct
*__switch_to(struct thread_struct
*prev_thread
,
28 struct thread_struct
*next_thread
,
29 struct task_struct
*prev
);
31 #define switch_to(prev, next, last) \
33 (prev)->thread.sched_lr = \
34 (unsigned long) __builtin_return_address(0); \
35 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
40 * interrupt flag manipulation
41 * - use virtual interrupt management since touching the PSR is slow
42 * - ICC2.Z: T if interrupts virtually disabled
43 * - ICC2.C: F if interrupts really disabled
44 * - if Z==1 upon interrupt:
46 * - interrupts are really disabled
47 * - entry.S returns immediately
48 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
49 * - if taken, the trap:
51 * - enables interrupts
53 #define local_irq_disable() \
55 /* set Z flag, but don't change the C flag */ \
56 asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \
63 #define local_irq_enable() \
65 /* clear Z flag and then test the C flag */ \
66 asm volatile(" oricc gr0,#1,gr0,icc2 \n" \
67 " tihi icc2,gr0,#2 \n" \
74 #define local_save_flags(flags) \
76 typecheck(unsigned long, flags); \
77 asm volatile("movsg ccr,%0" \
82 /* shift ICC2.Z to bit 0 */ \
85 /* make flags 1 if interrupts disabled, 0 otherwise */ \
89 #define irqs_disabled() \
90 ({unsigned long flags; local_save_flags(flags); flags; })
92 #define local_irq_save(flags) \
94 typecheck(unsigned long, flags); \
95 local_save_flags(flags); \
96 local_irq_disable(); \
99 #define local_irq_restore(flags) \
101 typecheck(unsigned long, flags); \
103 /* load the Z flag by turning 1 if disabled into 0 if disabled \
104 * and thus setting the Z flag but not the C flag */ \
105 asm volatile(" xoricc %0,#1,gr0,icc2 \n" \
106 /* then test Z=0 and C=0 */ \
107 " tihi icc2,gr0,#2 \n" \
116 * real interrupt flag manipulation
118 #define __local_irq_disable() \
121 asm volatile(" movsg psr,%0 \n" \
122 " andi %0,%2,%0 \n" \
126 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
130 #define __local_irq_enable() \
133 asm volatile(" movsg psr,%0 \n" \
134 " andi %0,%1,%0 \n" \
141 #define __local_save_flags(flags) \
143 typecheck(unsigned long, flags); \
150 #define __local_irq_save(flags) \
152 unsigned long npsr; \
153 typecheck(unsigned long, flags); \
154 asm volatile(" movsg psr,%0 \n" \
155 " andi %0,%3,%1 \n" \
158 : "=r"(flags), "=r"(npsr) \
159 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
163 #define __local_irq_restore(flags) \
165 typecheck(unsigned long, flags); \
166 asm volatile(" movgs %0,psr \n" \
172 #define __irqs_disabled() \
173 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
176 * Force strict CPU ordering.
178 #define nop() asm volatile ("nop"::)
179 #define mb() asm volatile ("membar" : : :"memory")
180 #define rmb() asm volatile ("membar" : : :"memory")
181 #define wmb() asm volatile ("membar" : : :"memory")
182 #define set_mb(var, value) do { var = value; mb(); } while (0)
183 #define set_wmb(var, value) do { var = value; wmb(); } while (0)
185 #define smp_mb() mb()
186 #define smp_rmb() rmb()
187 #define smp_wmb() wmb()
189 #define read_barrier_depends() do {} while(0)
190 #define smp_read_barrier_depends() read_barrier_depends()
192 #define HARD_RESET_NOW() \
197 extern void die_if_kernel(const char *, ...) __attribute__((format(printf
, 1, 2)));
198 extern void free_initmem(void);
200 #define arch_align_stack(x) (x)
202 #endif /* _ASM_SYSTEM_H */