2 * Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
3 * Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
4 * Takashi Iwai <tiwai@suse.de>
6 * Most of the driver code comes from Zach Brown(zab@redhat.com)
8 * Rewritted from card-es1938.c source.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * Notes from Zach Brown about the driver code
30 * Hardware Description
32 * A working Maestro setup contains the Maestro chip wired to a
33 * codec or 2. In the Maestro we have the APUs, the ASSP, and the
34 * Wavecache. The APUs can be though of as virtual audio routing
35 * channels. They can take data from a number of sources and perform
36 * basic encodings of the data. The wavecache is a storehouse for
37 * PCM data. Typically it deals with PCI and interracts with the
38 * APUs. The ASSP is a wacky DSP like device that ESS is loth
39 * to release docs on. Thankfully it isn't required on the Maestro
40 * until you start doing insane things like FM emulation and surround
41 * encoding. The codecs are almost always AC-97 compliant codecs,
42 * but it appears that early Maestros may have had PT101 (an ESS
43 * part?) wired to them. The only real difference in the Maestro
44 * families is external goop like docking capability, memory for
45 * the ASSP, and initialization differences.
49 * We only drive the APU/Wavecache as typical DACs and drive the
50 * mixers in the codecs. There are 64 APUs. We assign 6 to each
51 * /dev/dsp? device. 2 channels for output, and 4 channels for
54 * Each APU can do a number of things, but we only really use
55 * 3 basic functions. For playback we use them to convert PCM
56 * data fetched over PCI by the wavecahche into analog data that
57 * is handed to the codec. One APU for mono, and a pair for stereo.
58 * When in stereo, the combination of smarts in the APU and Wavecache
59 * decide which wavecache gets the left or right channel.
61 * For record we still use the old overly mono system. For each in
62 * coming channel the data comes in from the codec, through a 'input'
63 * APU, through another rate converter APU, and then into memory via
64 * the wavecache and PCI. If its stereo, we mash it back into LRLR in
65 * software. The pass between the 2 APUs is supposedly what requires us
66 * to have a 512 byte buffer sitting around in wavecache/memory.
68 * The wavecache makes our life even more fun. First off, it can
69 * only address the first 28 bits of PCI address space, making it
70 * useless on quite a few architectures. Secondly, its insane.
71 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
72 * But that doesn't really work. You can only use 1 region. So all our
73 * allocations have to be in 4meg of each other. Booo. Hiss.
74 * So we have a module parameter, dsps_order, that is the order of
75 * the number of dsps to provide. All their buffer space is allocated
76 * on open time. The sonicvibes OSS routines we inherited really want
77 * power of 2 buffers, so we have all those next to each other, then
78 * 512 byte regions for the recording wavecaches. This ends up
79 * wasting quite a bit of memory. The only fixes I can see would be
80 * getting a kernel allocator that could work in zones, or figuring out
81 * just how to coerce the WP into doing what we want.
83 * The indirection of the various registers means we have to spinlock
84 * nearly all register accesses. We have the main register indirection
85 * like the wave cache, maestro registers, etc. Then we have beasts
86 * like the APU interface that is indirect registers gotten at through
87 * the main maestro indirection. Ouch. We spinlock around the actual
88 * ports on a per card basis. This means spinlock activity at each IO
89 * operation, but the only IO operation clusters are in non critical
90 * paths and it makes the code far easier to follow. Interrupts are
91 * blocked while holding the locks because the int handler has to
92 * get at some of them :(. The mixer interface doesn't, however.
93 * We also have an OSS state lock that is thrown around in a few
97 #include <sound/driver.h>
99 #include <linux/delay.h>
100 #include <linux/interrupt.h>
101 #include <linux/init.h>
102 #include <linux/pci.h>
103 #include <linux/slab.h>
104 #include <linux/gameport.h>
105 #include <linux/moduleparam.h>
106 #include <sound/core.h>
107 #include <sound/pcm.h>
108 #include <sound/mpu401.h>
109 #include <sound/ac97_codec.h>
110 #include <sound/initval.h>
112 #define CARD_NAME "ESS Maestro1/2"
113 #define DRIVER_NAME "ES1968"
115 MODULE_DESCRIPTION("ESS Maestro");
116 MODULE_LICENSE("GPL");
117 MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
122 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
123 #define SUPPORT_JOYSTICK 1
126 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 1-MAX */
127 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
128 static int enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
129 static int total_bufsize
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 1024 };
130 static int pcm_substreams_p
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 4 };
131 static int pcm_substreams_c
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 1 };
132 static int clock
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 0};
133 static int use_pm
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 2};
134 static int enable_mpu
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 2};
135 #ifdef SUPPORT_JOYSTICK
136 static int joystick
[SNDRV_CARDS
];
139 module_param_array(index
, int, NULL
, 0444);
140 MODULE_PARM_DESC(index
, "Index value for " CARD_NAME
" soundcard.");
141 module_param_array(id
, charp
, NULL
, 0444);
142 MODULE_PARM_DESC(id
, "ID string for " CARD_NAME
" soundcard.");
143 module_param_array(enable
, bool, NULL
, 0444);
144 MODULE_PARM_DESC(enable
, "Enable " CARD_NAME
" soundcard.");
145 module_param_array(total_bufsize
, int, NULL
, 0444);
146 MODULE_PARM_DESC(total_bufsize
, "Total buffer size in kB.");
147 module_param_array(pcm_substreams_p
, int, NULL
, 0444);
148 MODULE_PARM_DESC(pcm_substreams_p
, "PCM Playback substreams for " CARD_NAME
" soundcard.");
149 module_param_array(pcm_substreams_c
, int, NULL
, 0444);
150 MODULE_PARM_DESC(pcm_substreams_c
, "PCM Capture substreams for " CARD_NAME
" soundcard.");
151 module_param_array(clock
, int, NULL
, 0444);
152 MODULE_PARM_DESC(clock
, "Clock on " CARD_NAME
" soundcard. (0 = auto-detect)");
153 module_param_array(use_pm
, int, NULL
, 0444);
154 MODULE_PARM_DESC(use_pm
, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
155 module_param_array(enable_mpu
, int, NULL
, 0444);
156 MODULE_PARM_DESC(enable_mpu
, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
157 #ifdef SUPPORT_JOYSTICK
158 module_param_array(joystick
, bool, NULL
, 0444);
159 MODULE_PARM_DESC(joystick
, "Enable joystick.");
164 #define NR_APU_REGS 16
167 #define NEC_VERSA_SUBID1 0x80581033
168 #define NEC_VERSA_SUBID2 0x803c1033
171 #define ESS_FMT_STEREO 0x01
172 #define ESS_FMT_16BIT 0x02
174 #define DAC_RUNNING 1
175 #define ADC_RUNNING 2
177 /* Values for the ESM_LEGACY_AUDIO_CONTROL */
179 #define ESS_ENABLE_AUDIO 0x8000
180 #define ESS_ENABLE_SERIAL_IRQ 0x4000
181 #define IO_ADRESS_ALIAS 0x0020
182 #define MPU401_IRQ_ENABLE 0x0010
183 #define MPU401_IO_ENABLE 0x0008
184 #define GAME_IO_ENABLE 0x0004
185 #define FM_IO_ENABLE 0x0002
186 #define SB_IO_ENABLE 0x0001
188 /* Values for the ESM_CONFIG_A */
190 #define PIC_SNOOP1 0x4000
191 #define PIC_SNOOP2 0x2000
192 #define SAFEGUARD 0x0800
193 #define DMA_CLEAR 0x0700
194 #define DMA_DDMA 0x0000
195 #define DMA_TDMA 0x0100
196 #define DMA_PCPCI 0x0200
197 #define POST_WRITE 0x0080
198 #define ISA_TIMING 0x0040
199 #define SWAP_LR 0x0020
200 #define SUBTR_DECODE 0x0002
202 /* Values for the ESM_CONFIG_B */
204 #define SPDIF_CONFB 0x0100
205 #define HWV_CONFB 0x0080
206 #define DEBOUNCE 0x0040
207 #define GPIO_CONFB 0x0020
208 #define CHI_CONFB 0x0010
209 #define IDMA_CONFB 0x0008 /*undoc */
210 #define MIDI_FIX 0x0004 /*undoc */
211 #define IRQ_TO_ISA 0x0001 /*undoc */
213 /* Values for Ring Bus Control B */
214 #define RINGB_2CODEC_ID_MASK 0x0003
215 #define RINGB_DIS_VALIDATION 0x0008
216 #define RINGB_EN_SPDIF 0x0010
217 #define RINGB_EN_2CODEC 0x0020
218 #define RINGB_SING_BIT_DUAL 0x0040
220 /* ****Port Adresses**** */
223 #define ESM_INDEX 0x02
224 #define ESM_DATA 0x00
227 #define ESM_AC97_INDEX 0x30
228 #define ESM_AC97_DATA 0x32
229 #define ESM_RING_BUS_DEST 0x34
230 #define ESM_RING_BUS_CONTR_A 0x36
231 #define ESM_RING_BUS_CONTR_B 0x38
232 #define ESM_RING_BUS_SDO 0x3A
235 #define WC_INDEX 0x10
237 #define WC_CONTROL 0x14
240 #define ASSP_INDEX 0x80
241 #define ASSP_MEMORY 0x82
242 #define ASSP_DATA 0x84
243 #define ASSP_CONTROL_A 0xA2
244 #define ASSP_CONTROL_B 0xA4
245 #define ASSP_CONTROL_C 0xA6
246 #define ASSP_HOSTW_INDEX 0xA8
247 #define ASSP_HOSTW_DATA 0xAA
248 #define ASSP_HOSTW_IRQ 0xAC
250 #define ESM_MPU401_PORT 0x98
252 #define ESM_PORT_HOST_IRQ 0x18
254 #define IDR0_DATA_PORT 0x00
255 #define IDR1_CRAM_POINTER 0x01
256 #define IDR2_CRAM_DATA 0x02
257 #define IDR3_WAVE_DATA 0x03
258 #define IDR4_WAVE_PTR_LOW 0x04
259 #define IDR5_WAVE_PTR_HI 0x05
260 #define IDR6_TIMER_CTRL 0x06
261 #define IDR7_WAVE_ROMRAM 0x07
263 #define WRITEABLE_MAP 0xEFFFFF
264 #define READABLE_MAP 0x64003F
268 #define ESM_LEGACY_AUDIO_CONTROL 0x40
269 #define ESM_ACPI_COMMAND 0x54
270 #define ESM_CONFIG_A 0x50
271 #define ESM_CONFIG_B 0x52
272 #define ESM_DDMA 0x60
275 #define ESM_BOB_ENABLE 0x0001
276 #define ESM_BOB_START 0x0001
278 /* Host IRQ Control Bits */
279 #define ESM_RESET_MAESTRO 0x8000
280 #define ESM_RESET_DIRECTSOUND 0x4000
281 #define ESM_HIRQ_ClkRun 0x0100
282 #define ESM_HIRQ_HW_VOLUME 0x0040
283 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */
284 #define ESM_HIRQ_ASSP 0x0010
285 #define ESM_HIRQ_DSIE 0x0004
286 #define ESM_HIRQ_MPU401 0x0002
287 #define ESM_HIRQ_SB 0x0001
289 /* Host IRQ Status Bits */
290 #define ESM_MPU401_IRQ 0x02
291 #define ESM_SB_IRQ 0x01
292 #define ESM_SOUND_IRQ 0x04
293 #define ESM_ASSP_IRQ 0x10
294 #define ESM_HWVOL_IRQ 0x40
296 #define ESS_SYSCLK 50000000
297 #define ESM_BOB_FREQ 200
298 #define ESM_BOB_FREQ_MAX 800
300 #define ESM_FREQ_ESM1 (49152000L / 1024L) /* default rate 48000 */
301 #define ESM_FREQ_ESM2 (50000000L / 1024L)
303 /* APU Modes: reg 0x00, bit 4-7 */
304 #define ESM_APU_MODE_SHIFT 4
305 #define ESM_APU_MODE_MASK (0xf << 4)
306 #define ESM_APU_OFF 0x00
307 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */
308 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */
309 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */
310 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */
311 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */
312 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */
313 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */
314 #define ESM_APU_CORRELATOR 0x08 /* Correlator */
315 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */
316 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */
317 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */
318 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */
319 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */
320 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */
321 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */
324 #define ESM_APU_FILTER_Q_SHIFT 0
325 #define ESM_APU_FILTER_Q_MASK (3 << 0)
326 /* APU Filtey Q Control */
327 #define ESM_APU_FILTER_LESSQ 0x00
328 #define ESM_APU_FILTER_MOREQ 0x03
330 #define ESM_APU_FILTER_TYPE_SHIFT 2
331 #define ESM_APU_FILTER_TYPE_MASK (3 << 2)
332 #define ESM_APU_ENV_TYPE_SHIFT 8
333 #define ESM_APU_ENV_TYPE_MASK (3 << 8)
334 #define ESM_APU_ENV_STATE_SHIFT 10
335 #define ESM_APU_ENV_STATE_MASK (3 << 10)
336 #define ESM_APU_END_CURVE (1 << 12)
337 #define ESM_APU_INT_ON_LOOP (1 << 13)
338 #define ESM_APU_DMA_ENABLE (1 << 14)
341 #define ESM_APU_SUBMIX_GROUP_SHIRT 0
342 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)
343 #define ESM_APU_SUBMIX_MODE (1 << 3)
344 #define ESM_APU_6dB (1 << 4)
345 #define ESM_APU_DUAL_EFFECT (1 << 5)
346 #define ESM_APU_EFFECT_CHANNELS_SHIFT 6
347 #define ESM_APU_EFFECT_CHANNELS_MASK (3 << 6)
350 #define ESM_APU_STEP_SIZE_MASK 0x0fff
353 #define ESM_APU_PHASE_SHIFT 0
354 #define ESM_APU_PHASE_MASK (0xff << 0)
355 #define ESM_APU_WAVE64K_PAGE_SHIFT 8 /* most 8bit of wave start offset */
356 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)
358 /* reg 0x05 - wave start offset */
359 /* reg 0x06 - wave end offset */
360 /* reg 0x07 - wave loop length */
363 #define ESM_APU_EFFECT_GAIN_SHIFT 0
364 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)
365 #define ESM_APU_TREMOLO_DEPTH_SHIFT 8
366 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)
367 #define ESM_APU_TREMOLO_RATE_SHIFT 12
368 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)
371 /* bit 0-7 amplitude dest? */
372 #define ESM_APU_AMPLITUDE_NOW_SHIFT 8
373 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)
376 #define ESM_APU_POLAR_PAN_SHIFT 0
377 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0)
378 /* Polar Pan Control */
379 #define ESM_APU_PAN_CENTER_CIRCLE 0x00
380 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01
381 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02
383 #define ESM_APU_FILTER_TUNING_SHIFT 8
384 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8)
387 #define ESM_APU_DATA_SRC_A_SHIFT 0
388 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)
389 #define ESM_APU_INV_POL_A (1 << 7)
390 #define ESM_APU_DATA_SRC_B_SHIFT 8
391 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)
392 #define ESM_APU_INV_POL_B (1 << 15)
394 #define ESM_APU_VIBRATO_RATE_SHIFT 0
395 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)
396 #define ESM_APU_VIBRATO_DEPTH_SHIFT 4
397 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)
398 #define ESM_APU_VIBRATO_PHASE_SHIFT 8
399 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)
402 #define ESM_APU_RADIUS_SELECT (1 << 6)
404 /* APU Filter Control */
405 #define ESM_APU_FILTER_2POLE_LOPASS 0x00
406 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01
407 #define ESM_APU_FILTER_2POLE_HIPASS 0x02
408 #define ESM_APU_FILTER_1POLE_LOPASS 0x03
409 #define ESM_APU_FILTER_1POLE_HIPASS 0x04
410 #define ESM_APU_FILTER_OFF 0x05
413 #define ESM_APU_ATFP_AMPLITUDE 0x00
414 #define ESM_APU_ATFP_TREMELO 0x01
415 #define ESM_APU_ATFP_FILTER 0x02
416 #define ESM_APU_ATFP_PAN 0x03
419 #define ESM_APU_ATFP_FLG_OFF 0x00
420 #define ESM_APU_ATFP_FLG_WAIT 0x01
421 #define ESM_APU_ATFP_FLG_DONE 0x02
422 #define ESM_APU_ATFP_FLG_INPROCESS 0x03
425 /* capture mixing buffer size */
426 #define ESM_MEM_ALIGN 0x1000
427 #define ESM_MIXBUF_SIZE 0x400
429 #define ESM_MODE_PLAY 0
430 #define ESM_MODE_CAPTURE 1
440 /* bits in the acpi masks */
441 #define ACPI_12MHZ ( 1 << 15)
442 #define ACPI_24MHZ ( 1 << 14)
443 #define ACPI_978 ( 1 << 13)
444 #define ACPI_SPDIF ( 1 << 12)
445 #define ACPI_GLUE ( 1 << 11)
446 #define ACPI__10 ( 1 << 10) /* reserved */
447 #define ACPI_PCIINT ( 1 << 9)
448 #define ACPI_HV ( 1 << 8) /* hardware volume */
449 #define ACPI_GPIO ( 1 << 7)
450 #define ACPI_ASSP ( 1 << 6)
451 #define ACPI_SB ( 1 << 5) /* sb emul */
452 #define ACPI_FM ( 1 << 4) /* fm emul */
453 #define ACPI_RB ( 1 << 3) /* ringbus / aclink */
454 #define ACPI_MIDI ( 1 << 2)
455 #define ACPI_GP ( 1 << 1) /* game port */
456 #define ACPI_WP ( 1 << 0) /* wave processor */
458 #define ACPI_ALL (0xffff)
459 #define ACPI_SLEEP (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \
460 ACPI_MIDI|ACPI_GP|ACPI_WP))
461 #define ACPI_NONE (ACPI__10)
463 /* these masks indicate which units we care about at
465 static u16 acpi_state_mask
[] = {
466 [ACPI_D0
] = ACPI_ALL
,
467 [ACPI_D1
] = ACPI_SLEEP
,
468 [ACPI_D2
] = ACPI_SLEEP
,
469 [ACPI_D3
] = ACPI_NONE
473 typedef struct snd_es1968 es1968_t
;
474 typedef struct snd_esschan esschan_t
;
475 typedef struct snd_esm_memory esm_memory_t
;
477 /* APU use in the driver */
478 enum snd_enum_apu_type
{
481 ESM_APU_PCM_RATECONV
,
487 TYPE_MAESTRO
, TYPE_MAESTRO2
, TYPE_MAESTRO2E
491 struct snd_esm_memory
{
492 struct snd_dma_buffer buf
;
493 int empty
; /* status */
494 struct list_head list
;
497 /* Playback Channel */
504 /* playback/capture pcm buffer */
505 esm_memory_t
*memory
;
506 /* capture mixer buffer */
507 esm_memory_t
*mixbuf
;
509 unsigned int hwptr
; /* current hw pointer in bytes */
510 unsigned int count
; /* sample counter in bytes */
511 unsigned int dma_size
; /* total buffer size in bytes */
512 unsigned int frag_size
; /* period size in bytes */
513 unsigned int wav_shift
;
514 u16 base
[4]; /* offset for ptr */
516 /* stereo/16bit flag */
518 int mode
; /* playback / capture */
520 int bob_freq
; /* required timer frequency */
522 snd_pcm_substream_t
*substream
;
525 struct list_head list
;
534 int total_bufsize
; /* in bytes */
536 int playback_streams
, capture_streams
;
538 unsigned int clock
; /* clock */
539 /* for clock measurement */
540 unsigned int in_measurement
: 1;
541 unsigned int measure_apu
;
542 unsigned int measure_lastpos
;
543 unsigned int measure_count
;
546 struct snd_dma_buffer dma
;
550 unsigned long io_port
;
555 int do_pm
; /* power-management enabled */
557 /* DMA memory block */
558 struct list_head buf_list
;
562 snd_kcontrol_t
*master_switch
; /* for h/w volume control */
563 snd_kcontrol_t
*master_volume
;
565 snd_rawmidi_t
*rmidi
;
568 spinlock_t ac97_lock
;
569 struct tasklet_struct hwvol_tq
;
570 unsigned int in_suspend
;
574 int bobclient
; /* active timer instancs */
575 int bob_freq
; /* timer frequency */
576 struct semaphore memory_mutex
; /* memory lock */
579 unsigned char apu
[NR_APUS
];
581 /* active substreams */
582 struct list_head substream_list
;
583 spinlock_t substream_lock
;
586 u16 apu_map
[NR_APUS
][NR_APU_REGS
];
589 #ifdef SUPPORT_JOYSTICK
590 struct gameport
*gameport
;
594 static irqreturn_t
snd_es1968_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
);
596 static struct pci_device_id snd_es1968_ids
[] = {
598 { 0x1285, 0x0100, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO
},
600 { 0x125d, 0x1968, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO2
},
602 { 0x125d, 0x1978, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO2E
},
606 MODULE_DEVICE_TABLE(pci
, snd_es1968_ids
);
608 /* *********************
610 *********************/
613 static void __maestro_write(es1968_t
*chip
, u16 reg
, u16 data
)
615 outw(reg
, chip
->io_port
+ ESM_INDEX
);
616 outw(data
, chip
->io_port
+ ESM_DATA
);
617 chip
->maestro_map
[reg
] = data
;
620 static inline void maestro_write(es1968_t
*chip
, u16 reg
, u16 data
)
623 spin_lock_irqsave(&chip
->reg_lock
, flags
);
624 __maestro_write(chip
, reg
, data
);
625 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
629 static u16
__maestro_read(es1968_t
*chip
, u16 reg
)
631 if (READABLE_MAP
& (1 << reg
)) {
632 outw(reg
, chip
->io_port
+ ESM_INDEX
);
633 chip
->maestro_map
[reg
] = inw(chip
->io_port
+ ESM_DATA
);
635 return chip
->maestro_map
[reg
];
638 static inline u16
maestro_read(es1968_t
*chip
, u16 reg
)
642 spin_lock_irqsave(&chip
->reg_lock
, flags
);
643 result
= __maestro_read(chip
, reg
);
644 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
648 /* Wait for the codec bus to be free */
649 static int snd_es1968_ac97_wait(es1968_t
*chip
)
651 int timeout
= 100000;
653 while (timeout
-- > 0) {
654 if (!(inb(chip
->io_port
+ ESM_AC97_INDEX
) & 1))
658 snd_printd("es1968: ac97 timeout\n");
659 return 1; /* timeout */
662 static void snd_es1968_ac97_write(ac97_t
*ac97
, unsigned short reg
, unsigned short val
)
664 es1968_t
*chip
= ac97
->private_data
;
667 snd_es1968_ac97_wait(chip
);
670 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
671 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
673 outb(reg
, chip
->io_port
+ ESM_AC97_INDEX
);
675 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
678 static unsigned short snd_es1968_ac97_read(ac97_t
*ac97
, unsigned short reg
)
681 es1968_t
*chip
= ac97
->private_data
;
684 snd_es1968_ac97_wait(chip
);
686 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
687 outb(reg
| 0x80, chip
->io_port
+ ESM_AC97_INDEX
);
690 if (! snd_es1968_ac97_wait(chip
)) {
691 data
= inw(chip
->io_port
+ ESM_AC97_DATA
);
694 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
700 static void apu_index_set(es1968_t
*chip
, u16 index
)
703 __maestro_write(chip
, IDR1_CRAM_POINTER
, index
);
704 for (i
= 0; i
< 1000; i
++)
705 if (__maestro_read(chip
, IDR1_CRAM_POINTER
) == index
)
707 snd_printd("es1968: APU register select failed. (Timeout)\n");
711 static void apu_data_set(es1968_t
*chip
, u16 data
)
714 for (i
= 0; i
< 1000; i
++) {
715 if (__maestro_read(chip
, IDR0_DATA_PORT
) == data
)
717 __maestro_write(chip
, IDR0_DATA_PORT
, data
);
719 snd_printd("es1968: APU register set probably failed (Timeout)!\n");
723 static void __apu_set_register(es1968_t
*chip
, u16 channel
, u8 reg
, u16 data
)
725 snd_assert(channel
< NR_APUS
, return);
727 chip
->apu_map
[channel
][reg
] = data
;
729 reg
|= (channel
<< 4);
730 apu_index_set(chip
, reg
);
731 apu_data_set(chip
, data
);
734 static inline void apu_set_register(es1968_t
*chip
, u16 channel
, u8 reg
, u16 data
)
737 spin_lock_irqsave(&chip
->reg_lock
, flags
);
738 __apu_set_register(chip
, channel
, reg
, data
);
739 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
742 static u16
__apu_get_register(es1968_t
*chip
, u16 channel
, u8 reg
)
744 snd_assert(channel
< NR_APUS
, return 0);
745 reg
|= (channel
<< 4);
746 apu_index_set(chip
, reg
);
747 return __maestro_read(chip
, IDR0_DATA_PORT
);
750 static inline u16
apu_get_register(es1968_t
*chip
, u16 channel
, u8 reg
)
754 spin_lock_irqsave(&chip
->reg_lock
, flags
);
755 v
= __apu_get_register(chip
, channel
, reg
);
756 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
760 #if 0 /* ASSP is not supported */
762 static void assp_set_register(es1968_t
*chip
, u32 reg
, u32 value
)
766 spin_lock_irqsave(&chip
->reg_lock
, flags
);
767 outl(reg
, chip
->io_port
+ ASSP_INDEX
);
768 outl(value
, chip
->io_port
+ ASSP_DATA
);
769 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
772 static u32
assp_get_register(es1968_t
*chip
, u32 reg
)
777 spin_lock_irqsave(&chip
->reg_lock
, flags
);
778 outl(reg
, chip
->io_port
+ ASSP_INDEX
);
779 value
= inl(chip
->io_port
+ ASSP_DATA
);
780 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
787 static void wave_set_register(es1968_t
*chip
, u16 reg
, u16 value
)
791 spin_lock_irqsave(&chip
->reg_lock
, flags
);
792 outw(reg
, chip
->io_port
+ WC_INDEX
);
793 outw(value
, chip
->io_port
+ WC_DATA
);
794 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
797 static u16
wave_get_register(es1968_t
*chip
, u16 reg
)
802 spin_lock_irqsave(&chip
->reg_lock
, flags
);
803 outw(reg
, chip
->io_port
+ WC_INDEX
);
804 value
= inw(chip
->io_port
+ WC_DATA
);
805 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
810 /* *******************
814 static void snd_es1968_bob_stop(es1968_t
*chip
)
818 reg
= __maestro_read(chip
, 0x11);
819 reg
&= ~ESM_BOB_ENABLE
;
820 __maestro_write(chip
, 0x11, reg
);
821 reg
= __maestro_read(chip
, 0x17);
822 reg
&= ~ESM_BOB_START
;
823 __maestro_write(chip
, 0x17, reg
);
826 static void snd_es1968_bob_start(es1968_t
*chip
)
831 /* compute ideal interrupt frequency for buffer size & play rate */
832 /* first, find best prescaler value to match freq */
833 for (prescale
= 5; prescale
< 12; prescale
++)
834 if (chip
->bob_freq
> (ESS_SYSCLK
>> (prescale
+ 9)))
837 /* next, back off prescaler whilst getting divider into optimum range */
839 while ((prescale
> 5) && (divide
< 32)) {
845 /* now fine-tune the divider for best match */
846 for (; divide
< 31; divide
++)
848 ((ESS_SYSCLK
>> (prescale
+ 9)) / (divide
+ 1))) break;
850 /* divide = 0 is illegal, but don't let prescale = 4! */
855 } else if (divide
> 1)
858 __maestro_write(chip
, 6, 0x9000 | (prescale
<< 5) | divide
); /* set reg */
860 /* Now set IDR 11/17 */
861 __maestro_write(chip
, 0x11, __maestro_read(chip
, 0x11) | 1);
862 __maestro_write(chip
, 0x17, __maestro_read(chip
, 0x17) | 1);
865 /* call with substream spinlock */
866 static void snd_es1968_bob_inc(es1968_t
*chip
, int freq
)
869 if (chip
->bobclient
== 1) {
870 chip
->bob_freq
= freq
;
871 snd_es1968_bob_start(chip
);
872 } else if (chip
->bob_freq
< freq
) {
873 snd_es1968_bob_stop(chip
);
874 chip
->bob_freq
= freq
;
875 snd_es1968_bob_start(chip
);
879 /* call with substream spinlock */
880 static void snd_es1968_bob_dec(es1968_t
*chip
)
883 if (chip
->bobclient
<= 0)
884 snd_es1968_bob_stop(chip
);
885 else if (chip
->bob_freq
> ESM_BOB_FREQ
) {
886 /* check reduction of timer frequency */
888 int max_freq
= ESM_BOB_FREQ
;
889 list_for_each(p
, &chip
->substream_list
) {
890 esschan_t
*es
= list_entry(p
, esschan_t
, list
);
891 if (max_freq
< es
->bob_freq
)
892 max_freq
= es
->bob_freq
;
894 if (max_freq
!= chip
->bob_freq
) {
895 snd_es1968_bob_stop(chip
);
896 chip
->bob_freq
= max_freq
;
897 snd_es1968_bob_start(chip
);
903 snd_es1968_calc_bob_rate(es1968_t
*chip
, esschan_t
*es
,
904 snd_pcm_runtime_t
*runtime
)
906 /* we acquire 4 interrupts per period for precise control.. */
907 int freq
= runtime
->rate
* 4;
908 if (es
->fmt
& ESS_FMT_STEREO
)
910 if (es
->fmt
& ESS_FMT_16BIT
)
912 freq
/= es
->frag_size
;
913 if (freq
< ESM_BOB_FREQ
)
915 else if (freq
> ESM_BOB_FREQ_MAX
)
916 freq
= ESM_BOB_FREQ_MAX
;
925 static u32
snd_es1968_compute_rate(es1968_t
*chip
, u32 freq
)
927 u32 rate
= (freq
<< 16) / chip
->clock
;
928 #if 0 /* XXX: do we need this? */
935 /* get current pointer */
936 static inline unsigned int
937 snd_es1968_get_dma_ptr(es1968_t
*chip
, esschan_t
*es
)
941 offset
= apu_get_register(chip
, es
->apu
[0], 5);
943 offset
-= es
->base
[0];
945 return (offset
& 0xFFFE); /* hardware is in words */
948 static void snd_es1968_apu_set_freq(es1968_t
*chip
, int apu
, int freq
)
950 apu_set_register(chip
, apu
, 2,
951 (apu_get_register(chip
, apu
, 2) & 0x00FF) |
952 ((freq
& 0xff) << 8) | 0x10);
953 apu_set_register(chip
, apu
, 3, freq
>> 8);
957 static inline void snd_es1968_trigger_apu(es1968_t
*esm
, int apu
, int mode
)
959 /* set the APU mode */
960 __apu_set_register(esm
, apu
, 0,
961 (__apu_get_register(esm
, apu
, 0) & 0xff0f) |
965 static void snd_es1968_pcm_start(es1968_t
*chip
, esschan_t
*es
)
967 spin_lock(&chip
->reg_lock
);
968 __apu_set_register(chip
, es
->apu
[0], 5, es
->base
[0]);
969 snd_es1968_trigger_apu(chip
, es
->apu
[0], es
->apu_mode
[0]);
970 if (es
->mode
== ESM_MODE_CAPTURE
) {
971 __apu_set_register(chip
, es
->apu
[2], 5, es
->base
[2]);
972 snd_es1968_trigger_apu(chip
, es
->apu
[2], es
->apu_mode
[2]);
974 if (es
->fmt
& ESS_FMT_STEREO
) {
975 __apu_set_register(chip
, es
->apu
[1], 5, es
->base
[1]);
976 snd_es1968_trigger_apu(chip
, es
->apu
[1], es
->apu_mode
[1]);
977 if (es
->mode
== ESM_MODE_CAPTURE
) {
978 __apu_set_register(chip
, es
->apu
[3], 5, es
->base
[3]);
979 snd_es1968_trigger_apu(chip
, es
->apu
[3], es
->apu_mode
[3]);
982 spin_unlock(&chip
->reg_lock
);
985 static void snd_es1968_pcm_stop(es1968_t
*chip
, esschan_t
*es
)
987 spin_lock(&chip
->reg_lock
);
988 snd_es1968_trigger_apu(chip
, es
->apu
[0], 0);
989 snd_es1968_trigger_apu(chip
, es
->apu
[1], 0);
990 if (es
->mode
== ESM_MODE_CAPTURE
) {
991 snd_es1968_trigger_apu(chip
, es
->apu
[2], 0);
992 snd_es1968_trigger_apu(chip
, es
->apu
[3], 0);
994 spin_unlock(&chip
->reg_lock
);
997 /* set the wavecache control reg */
998 static void snd_es1968_program_wavecache(es1968_t
*chip
, esschan_t
*es
,
999 int channel
, u32 addr
, int capture
)
1001 u32 tmpval
= (addr
- 0x10) & 0xFFF8;
1004 if (!(es
->fmt
& ESS_FMT_16BIT
))
1005 tmpval
|= 4; /* 8bit */
1006 if (es
->fmt
& ESS_FMT_STEREO
)
1007 tmpval
|= 2; /* stereo */
1010 /* set the wavecache control reg */
1011 wave_set_register(chip
, es
->apu
[channel
] << 3, tmpval
);
1014 es
->wc_map
[channel
] = tmpval
;
1019 static void snd_es1968_playback_setup(es1968_t
*chip
, esschan_t
*es
,
1020 snd_pcm_runtime_t
*runtime
)
1026 unsigned long flags
;
1029 size
= es
->dma_size
>> es
->wav_shift
;
1031 if (es
->fmt
& ESS_FMT_STEREO
)
1034 for (channel
= 0; channel
<= high_apu
; channel
++) {
1035 apu
= es
->apu
[channel
];
1037 snd_es1968_program_wavecache(chip
, es
, channel
, es
->memory
->buf
.addr
, 0);
1039 /* Offset to PCMBAR */
1040 pa
= es
->memory
->buf
.addr
;
1041 pa
-= chip
->dma
.addr
;
1042 pa
>>= 1; /* words */
1044 pa
|= 0x00400000; /* System RAM (Bit 22) */
1046 if (es
->fmt
& ESS_FMT_STEREO
) {
1049 pa
|= 0x00800000; /* (Bit 23) */
1050 if (es
->fmt
& ESS_FMT_16BIT
)
1054 /* base offset of dma calcs when reading the pointer
1056 es
->base
[channel
] = pa
& 0xFFFF;
1058 for (i
= 0; i
< 16; i
++)
1059 apu_set_register(chip
, apu
, i
, 0x0000);
1061 /* Load the buffer into the wave engine */
1062 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xFF) << 8);
1063 apu_set_register(chip
, apu
, 5, pa
& 0xFFFF);
1064 apu_set_register(chip
, apu
, 6, (pa
+ size
) & 0xFFFF);
1065 /* setting loop == sample len */
1066 apu_set_register(chip
, apu
, 7, size
);
1068 /* clear effects/env.. */
1069 apu_set_register(chip
, apu
, 8, 0x0000);
1070 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1071 apu_set_register(chip
, apu
, 9, 0xD000);
1073 /* clear routing stuff */
1074 apu_set_register(chip
, apu
, 11, 0x0000);
1075 /* dma on, no envelopes, filter to all 1s) */
1076 apu_set_register(chip
, apu
, 0, 0x400F);
1078 if (es
->fmt
& ESS_FMT_16BIT
)
1079 es
->apu_mode
[channel
] = ESM_APU_16BITLINEAR
;
1081 es
->apu_mode
[channel
] = ESM_APU_8BITLINEAR
;
1083 if (es
->fmt
& ESS_FMT_STEREO
) {
1084 /* set panning: left or right */
1085 /* Check: different panning. On my Canyon 3D Chipset the
1086 Channels are swapped. I don't know, about the output
1087 to the SPDif Link. Perhaps you have to change this
1088 and not the APU Regs 4-5. */
1089 apu_set_register(chip
, apu
, 10,
1090 0x8F00 | (channel
? 0 : 0x10));
1091 es
->apu_mode
[channel
] += 1; /* stereo */
1093 apu_set_register(chip
, apu
, 10, 0x8F08);
1096 spin_lock_irqsave(&chip
->reg_lock
, flags
);
1097 /* clear WP interrupts */
1098 outw(1, chip
->io_port
+ 0x04);
1099 /* enable WP ints */
1100 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
1101 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
1103 freq
= runtime
->rate
;
1111 if (!(es
->fmt
& ESS_FMT_16BIT
) && !(es
->fmt
& ESS_FMT_STEREO
))
1114 freq
= snd_es1968_compute_rate(chip
, freq
);
1116 /* Load the frequency, turn on 6dB */
1117 snd_es1968_apu_set_freq(chip
, es
->apu
[0], freq
);
1118 snd_es1968_apu_set_freq(chip
, es
->apu
[1], freq
);
1122 static void init_capture_apu(es1968_t
*chip
, esschan_t
*es
, int channel
,
1123 unsigned int pa
, unsigned int bsize
,
1124 int mode
, int route
)
1126 int i
, apu
= es
->apu
[channel
];
1128 es
->apu_mode
[channel
] = mode
;
1130 /* set the wavecache control reg */
1131 snd_es1968_program_wavecache(chip
, es
, channel
, pa
, 1);
1133 /* Offset to PCMBAR */
1134 pa
-= chip
->dma
.addr
;
1135 pa
>>= 1; /* words */
1137 /* base offset of dma calcs when reading the pointer
1139 es
->base
[channel
] = pa
& 0xFFFF;
1140 pa
|= 0x00400000; /* bit 22 -> System RAM */
1142 /* Begin loading the APU */
1143 for (i
= 0; i
< 16; i
++)
1144 apu_set_register(chip
, apu
, i
, 0x0000);
1146 /* need to enable subgroups.. and we should probably
1147 have different groups for different /dev/dsps.. */
1148 apu_set_register(chip
, apu
, 2, 0x8);
1150 /* Load the buffer into the wave engine */
1151 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xFF) << 8);
1152 apu_set_register(chip
, apu
, 5, pa
& 0xFFFF);
1153 apu_set_register(chip
, apu
, 6, (pa
+ bsize
) & 0xFFFF);
1154 apu_set_register(chip
, apu
, 7, bsize
);
1155 /* clear effects/env.. */
1156 apu_set_register(chip
, apu
, 8, 0x00F0);
1157 /* amplitude now? sure. why not. */
1158 apu_set_register(chip
, apu
, 9, 0x0000);
1159 /* set filter tune, radius, polar pan */
1160 apu_set_register(chip
, apu
, 10, 0x8F08);
1162 apu_set_register(chip
, apu
, 11, route
);
1163 /* dma on, no envelopes, filter to all 1s) */
1164 apu_set_register(chip
, apu
, 0, 0x400F);
1167 static void snd_es1968_capture_setup(es1968_t
*chip
, esschan_t
*es
,
1168 snd_pcm_runtime_t
*runtime
)
1172 unsigned long flags
;
1174 size
= es
->dma_size
>> es
->wav_shift
;
1179 2 = mono/left Input Mixer
1180 3 = right Input Mixer
1182 /* data seems to flow from the codec, through an apu into
1183 the 'mixbuf' bit of page, then through the SRC apu
1184 and out to the real 'buffer'. ok. sure. */
1186 /* input mixer (left/mono) */
1187 /* parallel in crap, see maestro reg 0xC [8-11] */
1188 init_capture_apu(chip
, es
, 2,
1189 es
->mixbuf
->buf
.addr
, ESM_MIXBUF_SIZE
/4, /* in words */
1190 ESM_APU_INPUTMIXER
, 0x14);
1191 /* SRC (left/mono); get input from inputing apu */
1192 init_capture_apu(chip
, es
, 0, es
->memory
->buf
.addr
, size
,
1193 ESM_APU_SRCONVERTOR
, es
->apu
[2]);
1194 if (es
->fmt
& ESS_FMT_STEREO
) {
1195 /* input mixer (right) */
1196 init_capture_apu(chip
, es
, 3,
1197 es
->mixbuf
->buf
.addr
+ ESM_MIXBUF_SIZE
/2,
1198 ESM_MIXBUF_SIZE
/4, /* in words */
1199 ESM_APU_INPUTMIXER
, 0x15);
1201 init_capture_apu(chip
, es
, 1,
1202 es
->memory
->buf
.addr
+ size
*2, size
,
1203 ESM_APU_SRCONVERTOR
, es
->apu
[3]);
1206 freq
= runtime
->rate
;
1207 /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1213 freq
= snd_es1968_compute_rate(chip
, freq
);
1215 /* Load the frequency, turn on 6dB */
1216 snd_es1968_apu_set_freq(chip
, es
->apu
[0], freq
);
1217 snd_es1968_apu_set_freq(chip
, es
->apu
[1], freq
);
1219 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1221 snd_es1968_apu_set_freq(chip
, es
->apu
[2], freq
);
1222 snd_es1968_apu_set_freq(chip
, es
->apu
[3], freq
);
1224 spin_lock_irqsave(&chip
->reg_lock
, flags
);
1225 /* clear WP interrupts */
1226 outw(1, chip
->io_port
+ 0x04);
1227 /* enable WP ints */
1228 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
1229 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
1232 /*******************
1234 *******************/
1236 static int snd_es1968_pcm_prepare(snd_pcm_substream_t
*substream
)
1238 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1239 snd_pcm_runtime_t
*runtime
= substream
->runtime
;
1240 esschan_t
*es
= runtime
->private_data
;
1242 es
->dma_size
= snd_pcm_lib_buffer_bytes(substream
);
1243 es
->frag_size
= snd_pcm_lib_period_bytes(substream
);
1245 es
->wav_shift
= 1; /* maestro handles always 16bit */
1247 if (snd_pcm_format_width(runtime
->format
) == 16)
1248 es
->fmt
|= ESS_FMT_16BIT
;
1249 if (runtime
->channels
> 1) {
1250 es
->fmt
|= ESS_FMT_STEREO
;
1251 if (es
->fmt
& ESS_FMT_16BIT
) /* 8bit is already word shifted */
1254 es
->bob_freq
= snd_es1968_calc_bob_rate(chip
, es
, runtime
);
1258 snd_es1968_playback_setup(chip
, es
, runtime
);
1260 case ESM_MODE_CAPTURE
:
1261 snd_es1968_capture_setup(chip
, es
, runtime
);
1268 static int snd_es1968_pcm_trigger(snd_pcm_substream_t
*substream
, int cmd
)
1270 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1271 esschan_t
*es
= substream
->runtime
->private_data
;
1273 spin_lock(&chip
->substream_lock
);
1275 case SNDRV_PCM_TRIGGER_START
:
1276 case SNDRV_PCM_TRIGGER_RESUME
:
1279 snd_es1968_bob_inc(chip
, es
->bob_freq
);
1282 snd_es1968_pcm_start(chip
, es
);
1285 case SNDRV_PCM_TRIGGER_STOP
:
1286 case SNDRV_PCM_TRIGGER_SUSPEND
:
1289 snd_es1968_pcm_stop(chip
, es
);
1291 snd_es1968_bob_dec(chip
);
1294 spin_unlock(&chip
->substream_lock
);
1298 static snd_pcm_uframes_t
snd_es1968_pcm_pointer(snd_pcm_substream_t
*substream
)
1300 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1301 esschan_t
*es
= substream
->runtime
->private_data
;
1304 ptr
= snd_es1968_get_dma_ptr(chip
, es
) << es
->wav_shift
;
1306 return bytes_to_frames(substream
->runtime
, ptr
% es
->dma_size
);
1309 static snd_pcm_hardware_t snd_es1968_playback
= {
1310 .info
= (SNDRV_PCM_INFO_MMAP
|
1311 SNDRV_PCM_INFO_MMAP_VALID
|
1312 SNDRV_PCM_INFO_INTERLEAVED
|
1313 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
1314 /*SNDRV_PCM_INFO_PAUSE |*/
1315 SNDRV_PCM_INFO_RESUME
),
1316 .formats
= SNDRV_PCM_FMTBIT_U8
| SNDRV_PCM_FMTBIT_S16_LE
,
1317 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
1322 .buffer_bytes_max
= 65536,
1323 .period_bytes_min
= 256,
1324 .period_bytes_max
= 65536,
1326 .periods_max
= 1024,
1330 static snd_pcm_hardware_t snd_es1968_capture
= {
1331 .info
= (SNDRV_PCM_INFO_NONINTERLEAVED
|
1332 SNDRV_PCM_INFO_MMAP
|
1333 SNDRV_PCM_INFO_MMAP_VALID
|
1334 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
1335 /*SNDRV_PCM_INFO_PAUSE |*/
1336 SNDRV_PCM_INFO_RESUME
),
1337 .formats
= /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE
,
1338 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
1343 .buffer_bytes_max
= 65536,
1344 .period_bytes_min
= 256,
1345 .period_bytes_max
= 65536,
1347 .periods_max
= 1024,
1351 /* *************************
1352 * DMA memory management *
1353 *************************/
1355 /* Because the Maestro can only take addresses relative to the PCM base address
1358 static int calc_available_memory_size(es1968_t
*chip
)
1360 struct list_head
*p
;
1363 down(&chip
->memory_mutex
);
1364 list_for_each(p
, &chip
->buf_list
) {
1365 esm_memory_t
*buf
= list_entry(p
, esm_memory_t
, list
);
1366 if (buf
->empty
&& buf
->buf
.bytes
> max_size
)
1367 max_size
= buf
->buf
.bytes
;
1369 up(&chip
->memory_mutex
);
1370 if (max_size
>= 128*1024)
1371 max_size
= 127*1024;
1375 /* allocate a new memory chunk with the specified size */
1376 static esm_memory_t
*snd_es1968_new_memory(es1968_t
*chip
, int size
)
1379 struct list_head
*p
;
1381 size
= ((size
+ ESM_MEM_ALIGN
- 1) / ESM_MEM_ALIGN
) * ESM_MEM_ALIGN
;
1382 down(&chip
->memory_mutex
);
1383 list_for_each(p
, &chip
->buf_list
) {
1384 buf
= list_entry(p
, esm_memory_t
, list
);
1385 if (buf
->empty
&& buf
->buf
.bytes
>= size
)
1388 up(&chip
->memory_mutex
);
1392 if (buf
->buf
.bytes
> size
) {
1393 esm_memory_t
*chunk
= kmalloc(sizeof(*chunk
), GFP_KERNEL
);
1394 if (chunk
== NULL
) {
1395 up(&chip
->memory_mutex
);
1398 chunk
->buf
= buf
->buf
;
1399 chunk
->buf
.bytes
-= size
;
1400 chunk
->buf
.area
+= size
;
1401 chunk
->buf
.addr
+= size
;
1403 buf
->buf
.bytes
= size
;
1404 list_add(&chunk
->list
, &buf
->list
);
1407 up(&chip
->memory_mutex
);
1411 /* free a memory chunk */
1412 static void snd_es1968_free_memory(es1968_t
*chip
, esm_memory_t
*buf
)
1414 esm_memory_t
*chunk
;
1416 down(&chip
->memory_mutex
);
1418 if (buf
->list
.prev
!= &chip
->buf_list
) {
1419 chunk
= list_entry(buf
->list
.prev
, esm_memory_t
, list
);
1421 chunk
->buf
.bytes
+= buf
->buf
.bytes
;
1422 list_del(&buf
->list
);
1427 if (buf
->list
.next
!= &chip
->buf_list
) {
1428 chunk
= list_entry(buf
->list
.next
, esm_memory_t
, list
);
1430 buf
->buf
.bytes
+= chunk
->buf
.bytes
;
1431 list_del(&chunk
->list
);
1435 up(&chip
->memory_mutex
);
1438 static void snd_es1968_free_dmabuf(es1968_t
*chip
)
1440 struct list_head
*p
;
1442 if (! chip
->dma
.area
)
1444 snd_dma_reserve_buf(&chip
->dma
, snd_dma_pci_buf_id(chip
->pci
));
1445 while ((p
= chip
->buf_list
.next
) != &chip
->buf_list
) {
1446 esm_memory_t
*chunk
= list_entry(p
, esm_memory_t
, list
);
1452 static int __devinit
1453 snd_es1968_init_dmabuf(es1968_t
*chip
)
1456 esm_memory_t
*chunk
;
1458 chip
->dma
.dev
.type
= SNDRV_DMA_TYPE_DEV
;
1459 chip
->dma
.dev
.dev
= snd_dma_pci_data(chip
->pci
);
1460 if (! snd_dma_get_reserved_buf(&chip
->dma
, snd_dma_pci_buf_id(chip
->pci
))) {
1461 err
= snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV
,
1462 snd_dma_pci_data(chip
->pci
),
1463 chip
->total_bufsize
, &chip
->dma
);
1464 if (err
< 0 || ! chip
->dma
.area
) {
1465 snd_printk(KERN_ERR
"es1968: can't allocate dma pages for size %d\n",
1466 chip
->total_bufsize
);
1469 if ((chip
->dma
.addr
+ chip
->dma
.bytes
- 1) & ~((1 << 28) - 1)) {
1470 snd_dma_free_pages(&chip
->dma
);
1471 snd_printk(KERN_ERR
"es1968: DMA buffer beyond 256MB.\n");
1476 INIT_LIST_HEAD(&chip
->buf_list
);
1477 /* allocate an empty chunk */
1478 chunk
= kmalloc(sizeof(*chunk
), GFP_KERNEL
);
1479 if (chunk
== NULL
) {
1480 snd_es1968_free_dmabuf(chip
);
1483 memset(chip
->dma
.area
, 0, ESM_MEM_ALIGN
);
1484 chunk
->buf
= chip
->dma
;
1485 chunk
->buf
.area
+= ESM_MEM_ALIGN
;
1486 chunk
->buf
.addr
+= ESM_MEM_ALIGN
;
1487 chunk
->buf
.bytes
-= ESM_MEM_ALIGN
;
1489 list_add(&chunk
->list
, &chip
->buf_list
);
1494 /* setup the dma_areas */
1495 /* buffer is extracted from the pre-allocated memory chunk */
1496 static int snd_es1968_hw_params(snd_pcm_substream_t
*substream
,
1497 snd_pcm_hw_params_t
*hw_params
)
1499 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1500 snd_pcm_runtime_t
*runtime
= substream
->runtime
;
1501 esschan_t
*chan
= runtime
->private_data
;
1502 int size
= params_buffer_bytes(hw_params
);
1505 if (chan
->memory
->buf
.bytes
>= size
) {
1506 runtime
->dma_bytes
= size
;
1509 snd_es1968_free_memory(chip
, chan
->memory
);
1511 chan
->memory
= snd_es1968_new_memory(chip
, size
);
1512 if (chan
->memory
== NULL
) {
1513 // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1516 snd_pcm_set_runtime_buffer(substream
, &chan
->memory
->buf
);
1517 return 1; /* area was changed */
1520 /* remove dma areas if allocated */
1521 static int snd_es1968_hw_free(snd_pcm_substream_t
* substream
)
1523 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1524 snd_pcm_runtime_t
*runtime
= substream
->runtime
;
1527 if (runtime
->private_data
== NULL
)
1529 chan
= runtime
->private_data
;
1531 snd_es1968_free_memory(chip
, chan
->memory
);
1532 chan
->memory
= NULL
;
1541 static int snd_es1968_alloc_apu_pair(es1968_t
*chip
, int type
)
1545 for (apu
= 0; apu
< NR_APUS
; apu
+= 2) {
1546 if (chip
->apu
[apu
] == ESM_APU_FREE
&&
1547 chip
->apu
[apu
+ 1] == ESM_APU_FREE
) {
1548 chip
->apu
[apu
] = chip
->apu
[apu
+ 1] = type
;
1558 static void snd_es1968_free_apu_pair(es1968_t
*chip
, int apu
)
1560 chip
->apu
[apu
] = chip
->apu
[apu
+ 1] = ESM_APU_FREE
;
1568 static int snd_es1968_playback_open(snd_pcm_substream_t
*substream
)
1570 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1571 snd_pcm_runtime_t
*runtime
= substream
->runtime
;
1576 apu1
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_PLAY
);
1580 es
= kzalloc(sizeof(*es
), GFP_KERNEL
);
1582 snd_es1968_free_apu_pair(chip
, apu1
);
1587 es
->apu
[1] = apu1
+ 1;
1588 es
->apu_mode
[0] = 0;
1589 es
->apu_mode
[1] = 0;
1591 es
->substream
= substream
;
1592 es
->mode
= ESM_MODE_PLAY
;
1594 runtime
->private_data
= es
;
1595 runtime
->hw
= snd_es1968_playback
;
1596 runtime
->hw
.buffer_bytes_max
= runtime
->hw
.period_bytes_max
=
1597 calc_available_memory_size(chip
);
1599 snd_pcm_hw_constraint_step(runtime
, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES
,
1602 spin_lock_irq(&chip
->substream_lock
);
1603 list_add(&es
->list
, &chip
->substream_list
);
1604 spin_unlock_irq(&chip
->substream_lock
);
1609 static int snd_es1968_capture_open(snd_pcm_substream_t
*substream
)
1611 snd_pcm_runtime_t
*runtime
= substream
->runtime
;
1612 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1616 apu1
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_CAPTURE
);
1619 apu2
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_RATECONV
);
1621 snd_es1968_free_apu_pair(chip
, apu1
);
1625 es
= kzalloc(sizeof(*es
), GFP_KERNEL
);
1627 snd_es1968_free_apu_pair(chip
, apu1
);
1628 snd_es1968_free_apu_pair(chip
, apu2
);
1633 es
->apu
[1] = apu1
+ 1;
1635 es
->apu
[3] = apu2
+ 1;
1636 es
->apu_mode
[0] = 0;
1637 es
->apu_mode
[1] = 0;
1638 es
->apu_mode
[2] = 0;
1639 es
->apu_mode
[3] = 0;
1641 es
->substream
= substream
;
1642 es
->mode
= ESM_MODE_CAPTURE
;
1645 if ((es
->mixbuf
= snd_es1968_new_memory(chip
, ESM_MIXBUF_SIZE
)) == NULL
) {
1646 snd_es1968_free_apu_pair(chip
, apu1
);
1647 snd_es1968_free_apu_pair(chip
, apu2
);
1651 memset(es
->mixbuf
->buf
.area
, 0, ESM_MIXBUF_SIZE
);
1653 runtime
->private_data
= es
;
1654 runtime
->hw
= snd_es1968_capture
;
1655 runtime
->hw
.buffer_bytes_max
= runtime
->hw
.period_bytes_max
=
1656 calc_available_memory_size(chip
) - 1024; /* keep MIXBUF size */
1658 snd_pcm_hw_constraint_step(runtime
, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES
,
1661 spin_lock_irq(&chip
->substream_lock
);
1662 list_add(&es
->list
, &chip
->substream_list
);
1663 spin_unlock_irq(&chip
->substream_lock
);
1668 static int snd_es1968_playback_close(snd_pcm_substream_t
* substream
)
1670 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1673 if (substream
->runtime
->private_data
== NULL
)
1675 es
= substream
->runtime
->private_data
;
1676 spin_lock_irq(&chip
->substream_lock
);
1677 list_del(&es
->list
);
1678 spin_unlock_irq(&chip
->substream_lock
);
1679 snd_es1968_free_apu_pair(chip
, es
->apu
[0]);
1685 static int snd_es1968_capture_close(snd_pcm_substream_t
* substream
)
1687 es1968_t
*chip
= snd_pcm_substream_chip(substream
);
1690 if (substream
->runtime
->private_data
== NULL
)
1692 es
= substream
->runtime
->private_data
;
1693 spin_lock_irq(&chip
->substream_lock
);
1694 list_del(&es
->list
);
1695 spin_unlock_irq(&chip
->substream_lock
);
1696 snd_es1968_free_memory(chip
, es
->mixbuf
);
1697 snd_es1968_free_apu_pair(chip
, es
->apu
[0]);
1698 snd_es1968_free_apu_pair(chip
, es
->apu
[2]);
1704 static snd_pcm_ops_t snd_es1968_playback_ops
= {
1705 .open
= snd_es1968_playback_open
,
1706 .close
= snd_es1968_playback_close
,
1707 .ioctl
= snd_pcm_lib_ioctl
,
1708 .hw_params
= snd_es1968_hw_params
,
1709 .hw_free
= snd_es1968_hw_free
,
1710 .prepare
= snd_es1968_pcm_prepare
,
1711 .trigger
= snd_es1968_pcm_trigger
,
1712 .pointer
= snd_es1968_pcm_pointer
,
1715 static snd_pcm_ops_t snd_es1968_capture_ops
= {
1716 .open
= snd_es1968_capture_open
,
1717 .close
= snd_es1968_capture_close
,
1718 .ioctl
= snd_pcm_lib_ioctl
,
1719 .hw_params
= snd_es1968_hw_params
,
1720 .hw_free
= snd_es1968_hw_free
,
1721 .prepare
= snd_es1968_pcm_prepare
,
1722 .trigger
= snd_es1968_pcm_trigger
,
1723 .pointer
= snd_es1968_pcm_pointer
,
1730 #define CLOCK_MEASURE_BUFSIZE 16768 /* enough large for a single shot */
1732 static void __devinit
es1968_measure_clock(es1968_t
*chip
)
1735 unsigned int pa
, offset
, t
;
1736 esm_memory_t
*memory
;
1737 struct timeval start_time
, stop_time
;
1739 if (chip
->clock
== 0)
1740 chip
->clock
= 48000; /* default clock value */
1742 /* search 2 APUs (although one apu is enough) */
1743 if ((apu
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_PLAY
)) < 0) {
1744 snd_printk(KERN_ERR
"Hmm, cannot find empty APU pair!?\n");
1747 if ((memory
= snd_es1968_new_memory(chip
, CLOCK_MEASURE_BUFSIZE
)) == NULL
) {
1748 snd_printk(KERN_ERR
"cannot allocate dma buffer - using default clock %d\n", chip
->clock
);
1749 snd_es1968_free_apu_pair(chip
, apu
);
1753 memset(memory
->buf
.area
, 0, CLOCK_MEASURE_BUFSIZE
);
1755 wave_set_register(chip
, apu
<< 3, (memory
->buf
.addr
- 0x10) & 0xfff8);
1757 pa
= (unsigned int)((memory
->buf
.addr
- chip
->dma
.addr
) >> 1);
1758 pa
|= 0x00400000; /* System RAM (Bit 22) */
1760 /* initialize apu */
1761 for (i
= 0; i
< 16; i
++)
1762 apu_set_register(chip
, apu
, i
, 0x0000);
1764 apu_set_register(chip
, apu
, 0, 0x400f);
1765 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xff) << 8);
1766 apu_set_register(chip
, apu
, 5, pa
& 0xffff);
1767 apu_set_register(chip
, apu
, 6, (pa
+ CLOCK_MEASURE_BUFSIZE
/2) & 0xffff);
1768 apu_set_register(chip
, apu
, 7, CLOCK_MEASURE_BUFSIZE
/2);
1769 apu_set_register(chip
, apu
, 8, 0x0000);
1770 apu_set_register(chip
, apu
, 9, 0xD000);
1771 apu_set_register(chip
, apu
, 10, 0x8F08);
1772 apu_set_register(chip
, apu
, 11, 0x0000);
1773 spin_lock_irq(&chip
->reg_lock
);
1774 outw(1, chip
->io_port
+ 0x04); /* clear WP interrupts */
1775 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
); /* enable WP ints */
1776 spin_unlock_irq(&chip
->reg_lock
);
1778 snd_es1968_apu_set_freq(chip
, apu
, ((unsigned int)48000 << 16) / chip
->clock
); /* 48000 Hz */
1780 chip
->in_measurement
= 1;
1781 chip
->measure_apu
= apu
;
1782 spin_lock_irq(&chip
->reg_lock
);
1783 snd_es1968_bob_inc(chip
, ESM_BOB_FREQ
);
1784 __apu_set_register(chip
, apu
, 5, pa
& 0xffff);
1785 snd_es1968_trigger_apu(chip
, apu
, ESM_APU_16BITLINEAR
);
1786 do_gettimeofday(&start_time
);
1787 spin_unlock_irq(&chip
->reg_lock
);
1789 spin_lock_irq(&chip
->reg_lock
);
1790 offset
= __apu_get_register(chip
, apu
, 5);
1791 do_gettimeofday(&stop_time
);
1792 snd_es1968_trigger_apu(chip
, apu
, 0); /* stop */
1793 snd_es1968_bob_dec(chip
);
1794 chip
->in_measurement
= 0;
1795 spin_unlock_irq(&chip
->reg_lock
);
1797 /* check the current position */
1798 offset
-= (pa
& 0xffff);
1800 offset
+= chip
->measure_count
* (CLOCK_MEASURE_BUFSIZE
/2);
1802 t
= stop_time
.tv_sec
- start_time
.tv_sec
;
1804 if (stop_time
.tv_usec
< start_time
.tv_usec
)
1805 t
-= start_time
.tv_usec
- stop_time
.tv_usec
;
1807 t
+= stop_time
.tv_usec
- start_time
.tv_usec
;
1809 snd_printk(KERN_ERR
"?? calculation error..\n");
1812 offset
= (offset
/ t
) * 1000 + ((offset
% t
) * 1000) / t
;
1813 if (offset
< 47500 || offset
> 48500) {
1814 if (offset
>= 40000 && offset
<= 50000)
1815 chip
->clock
= (chip
->clock
* offset
) / 48000;
1817 printk(KERN_INFO
"es1968: clocking to %d\n", chip
->clock
);
1819 snd_es1968_free_memory(chip
, memory
);
1820 snd_es1968_free_apu_pair(chip
, apu
);
1827 static void snd_es1968_pcm_free(snd_pcm_t
*pcm
)
1829 es1968_t
*esm
= pcm
->private_data
;
1830 snd_es1968_free_dmabuf(esm
);
1834 static int __devinit
1835 snd_es1968_pcm(es1968_t
*chip
, int device
)
1840 /* get DMA buffer */
1841 if ((err
= snd_es1968_init_dmabuf(chip
)) < 0)
1845 wave_set_register(chip
, 0x01FC, chip
->dma
.addr
>> 12);
1846 wave_set_register(chip
, 0x01FD, chip
->dma
.addr
>> 12);
1847 wave_set_register(chip
, 0x01FE, chip
->dma
.addr
>> 12);
1848 wave_set_register(chip
, 0x01FF, chip
->dma
.addr
>> 12);
1850 if ((err
= snd_pcm_new(chip
->card
, "ESS Maestro", device
,
1851 chip
->playback_streams
,
1852 chip
->capture_streams
, &pcm
)) < 0)
1855 pcm
->private_data
= chip
;
1856 pcm
->private_free
= snd_es1968_pcm_free
;
1858 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &snd_es1968_playback_ops
);
1859 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &snd_es1968_capture_ops
);
1861 pcm
->info_flags
= 0;
1863 strcpy(pcm
->name
, "ESS Maestro");
1873 static void snd_es1968_update_pcm(es1968_t
*chip
, esschan_t
*es
)
1877 snd_pcm_substream_t
*subs
= es
->substream
;
1879 if (subs
== NULL
|| !es
->running
)
1882 hwptr
= snd_es1968_get_dma_ptr(chip
, es
) << es
->wav_shift
;
1883 hwptr
%= es
->dma_size
;
1885 diff
= (es
->dma_size
+ hwptr
- es
->hwptr
) % es
->dma_size
;
1890 if (es
->count
> es
->frag_size
) {
1891 spin_unlock(&chip
->substream_lock
);
1892 snd_pcm_period_elapsed(subs
);
1893 spin_lock(&chip
->substream_lock
);
1894 es
->count
%= es
->frag_size
;
1900 static void es1968_update_hw_volume(unsigned long private_data
)
1902 es1968_t
*chip
= (es1968_t
*) private_data
;
1904 unsigned long flags
;
1906 /* Figure out which volume control button was pushed,
1907 based on differences from the default register
1909 x
= inb(chip
->io_port
+ 0x1c);
1910 /* Reset the volume control registers. */
1911 outb(0x88, chip
->io_port
+ 0x1c);
1912 outb(0x88, chip
->io_port
+ 0x1d);
1913 outb(0x88, chip
->io_port
+ 0x1e);
1914 outb(0x88, chip
->io_port
+ 0x1f);
1916 if (chip
->in_suspend
)
1919 if (! chip
->master_switch
|| ! chip
->master_volume
)
1922 /* FIXME: we can't call snd_ac97_* functions since here is in tasklet. */
1923 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
1924 val
= chip
->ac97
->regs
[AC97_MASTER
];
1928 chip
->ac97
->regs
[AC97_MASTER
] = val
;
1929 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
1930 outb(AC97_MASTER
, chip
->io_port
+ ESM_AC97_INDEX
);
1931 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
1932 &chip
->master_switch
->id
);
1935 if (((x
>>1) & 7) > 4) {
1937 if ((val
& 0xff) > 0)
1939 if ((val
& 0xff00) > 0)
1943 if ((val
& 0xff) < 0x1f)
1945 if ((val
& 0xff00) < 0x1f00)
1948 chip
->ac97
->regs
[AC97_MASTER
] = val
;
1949 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
1950 outb(AC97_MASTER
, chip
->io_port
+ ESM_AC97_INDEX
);
1951 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
1952 &chip
->master_volume
->id
);
1954 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
1960 static irqreturn_t
snd_es1968_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1962 es1968_t
*chip
= dev_id
;
1965 if (!(event
= inb(chip
->io_port
+ 0x1A)))
1968 outw(inw(chip
->io_port
+ 4) & 1, chip
->io_port
+ 4);
1970 if (event
& ESM_HWVOL_IRQ
)
1971 tasklet_hi_schedule(&chip
->hwvol_tq
); /* we'll do this later */
1973 /* else ack 'em all, i imagine */
1974 outb(0xFF, chip
->io_port
+ 0x1A);
1976 if ((event
& ESM_MPU401_IRQ
) && chip
->rmidi
) {
1977 snd_mpu401_uart_interrupt(irq
, chip
->rmidi
->private_data
, regs
);
1980 if (event
& ESM_SOUND_IRQ
) {
1981 struct list_head
*p
;
1982 spin_lock(&chip
->substream_lock
);
1983 list_for_each(p
, &chip
->substream_list
) {
1984 esschan_t
*es
= list_entry(p
, esschan_t
, list
);
1986 snd_es1968_update_pcm(chip
, es
);
1988 spin_unlock(&chip
->substream_lock
);
1989 if (chip
->in_measurement
) {
1990 unsigned int curp
= __apu_get_register(chip
, chip
->measure_apu
, 5);
1991 if (curp
< chip
->measure_lastpos
)
1992 chip
->measure_count
++;
1993 chip
->measure_lastpos
= curp
;
2004 static int __devinit
2005 snd_es1968_mixer(es1968_t
*chip
)
2008 ac97_template_t ac97
;
2009 snd_ctl_elem_id_t id
;
2011 static ac97_bus_ops_t ops
= {
2012 .write
= snd_es1968_ac97_write
,
2013 .read
= snd_es1968_ac97_read
,
2016 if ((err
= snd_ac97_bus(chip
->card
, 0, &ops
, NULL
, &pbus
)) < 0)
2018 pbus
->no_vra
= 1; /* ES1968 doesn't need VRA */
2020 memset(&ac97
, 0, sizeof(ac97
));
2021 ac97
.private_data
= chip
;
2022 if ((err
= snd_ac97_mixer(pbus
, &ac97
, &chip
->ac97
)) < 0)
2025 /* attach master switch / volumes for h/w volume control */
2026 memset(&id
, 0, sizeof(id
));
2027 id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
2028 strcpy(id
.name
, "Master Playback Switch");
2029 chip
->master_switch
= snd_ctl_find_id(chip
->card
, &id
);
2030 memset(&id
, 0, sizeof(id
));
2031 id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
2032 strcpy(id
.name
, "Master Playback Volume");
2033 chip
->master_volume
= snd_ctl_find_id(chip
->card
, &id
);
2042 static void snd_es1968_ac97_reset(es1968_t
*chip
)
2044 unsigned long ioaddr
= chip
->io_port
;
2046 unsigned short save_ringbus_a
;
2047 unsigned short save_68
;
2051 /* save configuration */
2052 save_ringbus_a
= inw(ioaddr
+ 0x36);
2054 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2055 /* set command/status address i/o to 1st codec */
2056 outw(inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
2057 outw(inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
2059 /* disable ac link */
2060 outw(0x0000, ioaddr
+ 0x36);
2061 save_68
= inw(ioaddr
+ 0x68);
2062 pci_read_config_word(chip
->pci
, 0x58, &w
); /* something magical with gpio and bus arb. */
2063 pci_read_config_dword(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2066 outw(0xfffe, ioaddr
+ 0x64); /* unmask gpio 0 */
2067 outw(0x0001, ioaddr
+ 0x68); /* gpio write */
2068 outw(0x0000, ioaddr
+ 0x60); /* write 0 to gpio 0 */
2070 outw(0x0001, ioaddr
+ 0x60); /* write 1 to gpio 1 */
2073 outw(save_68
| 0x1, ioaddr
+ 0x68); /* now restore .. */
2074 outw((inw(ioaddr
+ 0x38) & 0xfffc) | 0x1, ioaddr
+ 0x38);
2075 outw((inw(ioaddr
+ 0x3a) & 0xfffc) | 0x1, ioaddr
+ 0x3a);
2076 outw((inw(ioaddr
+ 0x3c) & 0xfffc) | 0x1, ioaddr
+ 0x3c);
2078 /* now the second codec */
2079 /* disable ac link */
2080 outw(0x0000, ioaddr
+ 0x36);
2081 outw(0xfff7, ioaddr
+ 0x64); /* unmask gpio 3 */
2082 save_68
= inw(ioaddr
+ 0x68);
2083 outw(0x0009, ioaddr
+ 0x68); /* gpio write 0 & 3 ?? */
2084 outw(0x0001, ioaddr
+ 0x60); /* write 1 to gpio */
2086 outw(0x0009, ioaddr
+ 0x60); /* write 9 to gpio */
2088 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2089 outw(inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
2090 outw(inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
2092 #if 0 /* the loop here needs to be much better if we want it.. */
2093 snd_printk(KERN_INFO
"trying software reset\n");
2094 /* try and do a software reset */
2095 outb(0x80 | 0x7c, ioaddr
+ 0x30);
2097 if ((inw(ioaddr
+ 0x30) & 1) == 0) {
2098 if (inb(ioaddr
+ 0x32) != 0)
2101 outb(0x80 | 0x7d, ioaddr
+ 0x30);
2102 if (((inw(ioaddr
+ 0x30) & 1) == 0)
2103 && (inb(ioaddr
+ 0x32) != 0))
2105 outb(0x80 | 0x7f, ioaddr
+ 0x30);
2106 if (((inw(ioaddr
+ 0x30) & 1) == 0)
2107 && (inb(ioaddr
+ 0x32) != 0))
2112 outb(inb(ioaddr
+ 0x37) | 0x08, ioaddr
+ 0x37); /* do a software reset */
2113 msleep(500); /* oh my.. */
2114 outb(inb(ioaddr
+ 0x37) & ~0x08,
2117 outw(0x80, ioaddr
+ 0x30);
2118 for (w
= 0; w
< 10000; w
++) {
2119 if ((inw(ioaddr
+ 0x30) & 1) == 0)
2125 if (vend
== NEC_VERSA_SUBID1
|| vend
== NEC_VERSA_SUBID2
) {
2126 /* turn on external amp? */
2127 outw(0xf9ff, ioaddr
+ 0x64);
2128 outw(inw(ioaddr
+ 0x68) | 0x600, ioaddr
+ 0x68);
2129 outw(0x0209, ioaddr
+ 0x60);
2133 outw(save_ringbus_a
, ioaddr
+ 0x36);
2135 /* Turn on the 978 docking chip.
2136 First frob the "master output enable" bit,
2137 then set most of the playback volume control registers to max. */
2138 outb(inb(ioaddr
+0xc0)|(1<<5), ioaddr
+0xc0);
2139 outb(0xff, ioaddr
+0xc3);
2140 outb(0xff, ioaddr
+0xc4);
2141 outb(0xff, ioaddr
+0xc6);
2142 outb(0xff, ioaddr
+0xc8);
2143 outb(0x3f, ioaddr
+0xcf);
2144 outb(0x3f, ioaddr
+0xd0);
2147 static void snd_es1968_reset(es1968_t
*chip
)
2150 outw(ESM_RESET_MAESTRO
| ESM_RESET_DIRECTSOUND
,
2151 chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2153 outw(0x0000, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2160 static void snd_es1968_set_acpi(es1968_t
*chip
, int state
)
2162 u16 active_mask
= acpi_state_mask
[state
];
2164 pci_set_power_state(chip
->pci
, state
);
2165 /* make sure the units we care about are on
2166 XXX we might want to do this before state flipping? */
2167 pci_write_config_word(chip
->pci
, 0x54, ~ active_mask
);
2168 pci_write_config_word(chip
->pci
, 0x56, ~ active_mask
);
2173 * initialize maestro chip
2175 static void snd_es1968_chip_init(es1968_t
*chip
)
2177 struct pci_dev
*pci
= chip
->pci
;
2179 unsigned long iobase
= chip
->io_port
;
2183 /* We used to muck around with pci config space that
2184 * we had no business messing with. We don't know enough
2185 * about the machine to know which DMA mode is appropriate,
2186 * etc. We were guessing wrong on some machines and making
2187 * them unhappy. We now trust in the BIOS to do things right,
2188 * which almost certainly means a new host of problems will
2189 * arise with broken BIOS implementations. screw 'em.
2190 * We're already intolerant of machines that don't assign
2194 /* do config work at full power */
2195 snd_es1968_set_acpi(chip
, ACPI_D0
);
2198 pci_read_config_word(pci
, ESM_CONFIG_A
, &w
);
2200 /* Use TDMA for now. TDMA works on all boards, so while its
2201 * not the most efficient its the simplest. */
2202 w
&= ~DMA_CLEAR
; /* Clear DMA bits */
2203 w
|= DMA_TDMA
; /* TDMA on */
2204 w
&= ~(PIC_SNOOP1
| PIC_SNOOP2
); /* Clear Pic Snoop Mode Bits */
2205 w
&= ~SAFEGUARD
; /* Safeguard off */
2206 w
|= POST_WRITE
; /* Posted write */
2207 w
|= ISA_TIMING
; /* ISA timing on */
2208 /* XXX huh? claims to be reserved.. */
2209 w
&= ~SWAP_LR
; /* swap left/right
2210 seems to only have effect on SB
2212 w
&= ~SUBTR_DECODE
; /* Subtractive decode off */
2214 pci_write_config_word(pci
, ESM_CONFIG_A
, w
);
2218 pci_read_config_word(pci
, ESM_CONFIG_B
, &w
);
2220 w
&= ~(1 << 15); /* Turn off internal clock multiplier */
2221 /* XXX how do we know which to use? */
2222 w
&= ~(1 << 14); /* External clock */
2224 w
&= ~SPDIF_CONFB
; /* disable S/PDIF output */
2225 w
|= HWV_CONFB
; /* HWV on */
2226 w
|= DEBOUNCE
; /* Debounce off: easier to push the HW buttons */
2227 w
&= ~GPIO_CONFB
; /* GPIO 4:5 */
2228 w
|= CHI_CONFB
; /* Disconnect from the CHI. Enabling this made a dell 7500 work. */
2229 w
&= ~IDMA_CONFB
; /* IDMA off (undocumented) */
2230 w
&= ~MIDI_FIX
; /* MIDI fix off (undoc) */
2231 w
&= ~(1 << 1); /* reserved, always write 0 */
2232 w
&= ~IRQ_TO_ISA
; /* IRQ to ISA off (undoc) */
2234 pci_write_config_word(pci
, ESM_CONFIG_B
, w
);
2238 pci_read_config_word(pci
, ESM_DDMA
, &w
);
2240 pci_write_config_word(pci
, ESM_DDMA
, w
);
2246 pci_read_config_word(pci
, ESM_LEGACY_AUDIO_CONTROL
, &w
);
2248 w
&= ~ESS_ENABLE_AUDIO
; /* Disable Legacy Audio */
2249 w
&= ~ESS_ENABLE_SERIAL_IRQ
; /* Disable SIRQ */
2250 w
&= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */
2252 pci_write_config_word(pci
, ESM_LEGACY_AUDIO_CONTROL
, w
);
2254 /* Set up 978 docking control chip. */
2255 pci_read_config_word(pci
, 0x58, &w
);
2256 w
|=1<<2; /* Enable 978. */
2257 w
|=1<<3; /* Turn on 978 hardware volume control. */
2258 w
&=~(1<<11); /* Turn on 978 mixer volume control. */
2259 pci_write_config_word(pci
, 0x58, w
);
2263 snd_es1968_reset(chip
);
2269 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2270 outw(0xC090, iobase
+ ESM_RING_BUS_DEST
); /* direct sound, stereo */
2272 outw(0x3000, iobase
+ ESM_RING_BUS_CONTR_A
); /* enable ringbus/serial */
2279 snd_es1968_ac97_reset(chip
);
2281 /* Ring Bus Control B */
2283 n
= inl(iobase
+ ESM_RING_BUS_CONTR_B
);
2284 n
&= ~RINGB_EN_SPDIF
; /* SPDIF off */
2285 //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2286 outl(n
, iobase
+ ESM_RING_BUS_CONTR_B
);
2288 /* Set hardware volume control registers to midpoints.
2289 We can tell which button was pushed based on how they change. */
2290 outb(0x88, iobase
+0x1c);
2291 outb(0x88, iobase
+0x1d);
2292 outb(0x88, iobase
+0x1e);
2293 outb(0x88, iobase
+0x1f);
2295 /* it appears some maestros (dell 7500) only work if these are set,
2296 regardless of wether we use the assp or not. */
2298 outb(0, iobase
+ ASSP_CONTROL_B
);
2299 outb(3, iobase
+ ASSP_CONTROL_A
); /* M: Reserved bits... */
2300 outb(0, iobase
+ ASSP_CONTROL_C
); /* M: Disable ASSP, ASSP IRQ's and FM Port */
2305 for (i
= 0; i
< 16; i
++) {
2306 /* Write 0 into the buffer area 0x1E0->1EF */
2307 outw(0x01E0 + i
, iobase
+ WC_INDEX
);
2308 outw(0x0000, iobase
+ WC_DATA
);
2310 /* The 1.10 test program seem to write 0 into the buffer area
2311 * 0x1D0-0x1DF too.*/
2312 outw(0x01D0 + i
, iobase
+ WC_INDEX
);
2313 outw(0x0000, iobase
+ WC_DATA
);
2315 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2316 (wave_get_register(chip
, IDR7_WAVE_ROMRAM
) & 0xFF00));
2317 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2318 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) | 0x100);
2319 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2320 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) & ~0x200);
2321 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2322 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) | ~0x400);
2325 maestro_write(chip
, IDR2_CRAM_DATA
, 0x0000);
2326 /* Now back to the DirectSound stuff */
2327 /* audio serial configuration.. ? */
2328 maestro_write(chip
, 0x08, 0xB004);
2329 maestro_write(chip
, 0x09, 0x001B);
2330 maestro_write(chip
, 0x0A, 0x8000);
2331 maestro_write(chip
, 0x0B, 0x3F37);
2332 maestro_write(chip
, 0x0C, 0x0098);
2334 /* parallel in, has something to do with recording :) */
2335 maestro_write(chip
, 0x0C,
2336 (maestro_read(chip
, 0x0C) & ~0xF000) | 0x8000);
2338 maestro_write(chip
, 0x0C,
2339 (maestro_read(chip
, 0x0C) & ~0x0F00) | 0x0500);
2341 maestro_write(chip
, 0x0D, 0x7632);
2343 /* Wave cache control on - test off, sg off,
2344 enable, enable extra chans 1Mb */
2346 w
= inw(iobase
+ WC_CONTROL
);
2348 w
&= ~0xFA00; /* Seems to be reserved? I don't know */
2349 w
|= 0xA000; /* reserved... I don't know */
2350 w
&= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2351 Seems to crash the Computer if enabled... */
2352 w
|= 0x0100; /* Wave Cache Operation Enabled */
2353 w
|= 0x0080; /* Channels 60/61 as Placback/Record enabled */
2354 w
&= ~0x0060; /* Clear Wavtable Size */
2355 w
|= 0x0020; /* Wavetable Size : 1MB */
2356 /* Bit 4 is reserved */
2357 w
&= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */
2358 /* Bit 1 is reserved */
2359 w
&= ~0x0001; /* Test Mode off */
2361 outw(w
, iobase
+ WC_CONTROL
);
2363 /* Now clear the APU control ram */
2364 for (i
= 0; i
< NR_APUS
; i
++) {
2365 for (w
= 0; w
< NR_APU_REGS
; w
++)
2366 apu_set_register(chip
, i
, w
, 0);
2372 static void snd_es1968_start_irq(es1968_t
*chip
)
2375 w
= ESM_HIRQ_DSIE
| ESM_HIRQ_HW_VOLUME
;
2377 w
|= ESM_HIRQ_MPU401
;
2378 outw(w
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2385 static int es1968_suspend(snd_card_t
*card
, pm_message_t state
)
2387 es1968_t
*chip
= card
->pm_private_data
;
2392 chip
->in_suspend
= 1;
2393 snd_pcm_suspend_all(chip
->pcm
);
2394 snd_ac97_suspend(chip
->ac97
);
2395 snd_es1968_bob_stop(chip
);
2396 snd_es1968_set_acpi(chip
, ACPI_D3
);
2397 pci_disable_device(chip
->pci
);
2401 static int es1968_resume(snd_card_t
*card
)
2403 es1968_t
*chip
= card
->pm_private_data
;
2404 struct list_head
*p
;
2409 /* restore all our config */
2410 pci_enable_device(chip
->pci
);
2411 pci_set_master(chip
->pci
);
2412 snd_es1968_chip_init(chip
);
2414 /* need to restore the base pointers.. */
2415 if (chip
->dma
.addr
) {
2417 wave_set_register(chip
, 0x01FC, chip
->dma
.addr
>> 12);
2420 snd_es1968_start_irq(chip
);
2422 /* restore ac97 state */
2423 snd_ac97_resume(chip
->ac97
);
2425 list_for_each(p
, &chip
->substream_list
) {
2426 esschan_t
*es
= list_entry(p
, esschan_t
, list
);
2429 snd_es1968_playback_setup(chip
, es
, es
->substream
->runtime
);
2431 case ESM_MODE_CAPTURE
:
2432 snd_es1968_capture_setup(chip
, es
, es
->substream
->runtime
);
2437 /* start timer again */
2438 if (chip
->bobclient
)
2439 snd_es1968_bob_start(chip
);
2441 chip
->in_suspend
= 0;
2444 #endif /* CONFIG_PM */
2446 #ifdef SUPPORT_JOYSTICK
2447 #define JOYSTICK_ADDR 0x200
2448 static int __devinit
snd_es1968_create_gameport(es1968_t
*chip
, int dev
)
2450 struct gameport
*gp
;
2457 r
= request_region(JOYSTICK_ADDR
, 8, "ES1968 gameport");
2461 chip
->gameport
= gp
= gameport_allocate_port();
2463 printk(KERN_ERR
"es1968: cannot allocate memory for gameport\n");
2464 release_and_free_resource(r
);
2468 pci_read_config_word(chip
->pci
, ESM_LEGACY_AUDIO_CONTROL
, &val
);
2469 pci_write_config_word(chip
->pci
, ESM_LEGACY_AUDIO_CONTROL
, val
| 0x04);
2471 gameport_set_name(gp
, "ES1968 Gameport");
2472 gameport_set_phys(gp
, "pci%s/gameport0", pci_name(chip
->pci
));
2473 gameport_set_dev_parent(gp
, &chip
->pci
->dev
);
2474 gp
->io
= JOYSTICK_ADDR
;
2475 gameport_set_port_data(gp
, r
);
2477 gameport_register_port(gp
);
2482 static void snd_es1968_free_gameport(es1968_t
*chip
)
2484 if (chip
->gameport
) {
2485 struct resource
*r
= gameport_get_port_data(chip
->gameport
);
2487 gameport_unregister_port(chip
->gameport
);
2488 chip
->gameport
= NULL
;
2490 release_and_free_resource(r
);
2494 static inline int snd_es1968_create_gameport(es1968_t
*chip
, int dev
) { return -ENOSYS
; }
2495 static inline void snd_es1968_free_gameport(es1968_t
*chip
) { }
2498 static int snd_es1968_free(es1968_t
*chip
)
2500 if (chip
->io_port
) {
2501 synchronize_irq(chip
->irq
);
2502 outw(1, chip
->io_port
+ 0x04); /* clear WP interrupts */
2503 outw(0, chip
->io_port
+ ESM_PORT_HOST_IRQ
); /* disable IRQ */
2507 free_irq(chip
->irq
, (void *)chip
);
2508 snd_es1968_free_gameport(chip
);
2509 snd_es1968_set_acpi(chip
, ACPI_D3
);
2510 chip
->master_switch
= NULL
;
2511 chip
->master_volume
= NULL
;
2512 pci_release_regions(chip
->pci
);
2513 pci_disable_device(chip
->pci
);
2518 static int snd_es1968_dev_free(snd_device_t
*device
)
2520 es1968_t
*chip
= device
->device_data
;
2521 return snd_es1968_free(chip
);
2524 struct ess_device_list
{
2525 unsigned short type
; /* chip type */
2526 unsigned short vendor
; /* subsystem vendor id */
2529 static struct ess_device_list pm_whitelist
[] __devinitdata
= {
2530 { TYPE_MAESTRO2E
, 0x0e11 }, /* Compaq Armada */
2531 { TYPE_MAESTRO2E
, 0x1028 },
2532 { TYPE_MAESTRO2E
, 0x103c },
2533 { TYPE_MAESTRO2E
, 0x1179 },
2534 { TYPE_MAESTRO2E
, 0x14c0 }, /* HP omnibook 4150 */
2535 { TYPE_MAESTRO2E
, 0x1558 },
2538 static struct ess_device_list mpu_blacklist
[] __devinitdata
= {
2539 { TYPE_MAESTRO2
, 0x125d },
2542 static int __devinit
snd_es1968_create(snd_card_t
* card
,
2543 struct pci_dev
*pci
,
2549 es1968_t
**chip_ret
)
2551 static snd_device_ops_t ops
= {
2552 .dev_free
= snd_es1968_dev_free
,
2559 /* enable PCI device */
2560 if ((err
= pci_enable_device(pci
)) < 0)
2562 /* check, if we can restrict PCI DMA transfers to 28 bits */
2563 if (pci_set_dma_mask(pci
, 0x0fffffff) < 0 ||
2564 pci_set_consistent_dma_mask(pci
, 0x0fffffff) < 0) {
2565 snd_printk(KERN_ERR
"architecture does not support 28bit PCI busmaster DMA\n");
2566 pci_disable_device(pci
);
2570 chip
= kzalloc(sizeof(*chip
), GFP_KERNEL
);
2572 pci_disable_device(pci
);
2577 chip
->type
= chip_type
;
2578 spin_lock_init(&chip
->reg_lock
);
2579 spin_lock_init(&chip
->substream_lock
);
2580 INIT_LIST_HEAD(&chip
->buf_list
);
2581 INIT_LIST_HEAD(&chip
->substream_list
);
2582 spin_lock_init(&chip
->ac97_lock
);
2583 init_MUTEX(&chip
->memory_mutex
);
2584 tasklet_init(&chip
->hwvol_tq
, es1968_update_hw_volume
, (unsigned long)chip
);
2588 chip
->total_bufsize
= total_bufsize
; /* in bytes */
2589 chip
->playback_streams
= play_streams
;
2590 chip
->capture_streams
= capt_streams
;
2592 if ((err
= pci_request_regions(pci
, "ESS Maestro")) < 0) {
2594 pci_disable_device(pci
);
2597 chip
->io_port
= pci_resource_start(pci
, 0);
2598 if (request_irq(pci
->irq
, snd_es1968_interrupt
, SA_INTERRUPT
|SA_SHIRQ
,
2599 "ESS Maestro", (void*)chip
)) {
2600 snd_printk(KERN_ERR
"unable to grab IRQ %d\n", pci
->irq
);
2601 snd_es1968_free(chip
);
2604 chip
->irq
= pci
->irq
;
2606 /* Clear Maestro_map */
2607 for (i
= 0; i
< 32; i
++)
2608 chip
->maestro_map
[i
] = 0;
2611 for (i
= 0; i
< NR_APUS
; i
++)
2612 chip
->apu
[i
] = ESM_APU_FREE
;
2614 /* just to be sure */
2615 pci_set_master(pci
);
2618 /* disable power-management if not on the whitelist */
2619 unsigned short vend
;
2620 pci_read_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2621 for (i
= 0; i
< (int)ARRAY_SIZE(pm_whitelist
); i
++) {
2622 if (chip
->type
== pm_whitelist
[i
].type
&&
2623 vend
== pm_whitelist
[i
].vendor
) {
2629 /* not matched; disabling pm */
2630 printk(KERN_INFO
"es1968: not attempting power management.\n");
2634 chip
->do_pm
= do_pm
;
2636 snd_es1968_chip_init(chip
);
2639 snd_card_set_pm_callback(card
, es1968_suspend
, es1968_resume
, chip
);
2641 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, chip
, &ops
)) < 0) {
2642 snd_es1968_free(chip
);
2646 snd_card_set_dev(card
, &pci
->dev
);
2656 static int __devinit
snd_es1968_probe(struct pci_dev
*pci
,
2657 const struct pci_device_id
*pci_id
)
2665 if (dev
>= SNDRV_CARDS
)
2672 card
= snd_card_new(index
[dev
], id
[dev
], THIS_MODULE
, 0);
2676 if (total_bufsize
[dev
] < 128)
2677 total_bufsize
[dev
] = 128;
2678 if (total_bufsize
[dev
] > 4096)
2679 total_bufsize
[dev
] = 4096;
2680 if ((err
= snd_es1968_create(card
, pci
,
2681 total_bufsize
[dev
] * 1024, /* in bytes */
2682 pcm_substreams_p
[dev
],
2683 pcm_substreams_c
[dev
],
2684 pci_id
->driver_data
,
2687 snd_card_free(card
);
2691 switch (chip
->type
) {
2692 case TYPE_MAESTRO2E
:
2693 strcpy(card
->driver
, "ES1978");
2694 strcpy(card
->shortname
, "ESS ES1978 (Maestro 2E)");
2697 strcpy(card
->driver
, "ES1968");
2698 strcpy(card
->shortname
, "ESS ES1968 (Maestro 2)");
2701 strcpy(card
->driver
, "ESM1");
2702 strcpy(card
->shortname
, "ESS Maestro 1");
2706 if ((err
= snd_es1968_pcm(chip
, 0)) < 0) {
2707 snd_card_free(card
);
2711 if ((err
= snd_es1968_mixer(chip
)) < 0) {
2712 snd_card_free(card
);
2716 if (enable_mpu
[dev
] == 2) {
2717 /* check the black list */
2718 unsigned short vend
;
2719 pci_read_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2720 for (i
= 0; i
< ARRAY_SIZE(mpu_blacklist
); i
++) {
2721 if (chip
->type
== mpu_blacklist
[i
].type
&&
2722 vend
== mpu_blacklist
[i
].vendor
) {
2723 enable_mpu
[dev
] = 0;
2728 if (enable_mpu
[dev
]) {
2729 if ((err
= snd_mpu401_uart_new(card
, 0, MPU401_HW_MPU401
,
2730 chip
->io_port
+ ESM_MPU401_PORT
, 1,
2731 chip
->irq
, 0, &chip
->rmidi
)) < 0) {
2732 printk(KERN_WARNING
"es1968: skipping MPU-401 MIDI support..\n");
2736 snd_es1968_create_gameport(chip
, dev
);
2738 snd_es1968_start_irq(chip
);
2740 chip
->clock
= clock
[dev
];
2742 es1968_measure_clock(chip
);
2744 sprintf(card
->longname
, "%s at 0x%lx, irq %i",
2745 card
->shortname
, chip
->io_port
, chip
->irq
);
2747 if ((err
= snd_card_register(card
)) < 0) {
2748 snd_card_free(card
);
2751 pci_set_drvdata(pci
, card
);
2756 static void __devexit
snd_es1968_remove(struct pci_dev
*pci
)
2758 snd_card_free(pci_get_drvdata(pci
));
2759 pci_set_drvdata(pci
, NULL
);
2762 static struct pci_driver driver
= {
2763 .name
= "ES1968 (ESS Maestro)",
2764 .id_table
= snd_es1968_ids
,
2765 .probe
= snd_es1968_probe
,
2766 .remove
= __devexit_p(snd_es1968_remove
),
2767 SND_PCI_PM_CALLBACKS
2770 static int __init
alsa_card_es1968_init(void)
2772 return pci_register_driver(&driver
);
2775 static void __exit
alsa_card_es1968_exit(void)
2777 pci_unregister_driver(&driver
);
2780 module_init(alsa_card_es1968_init
)
2781 module_exit(alsa_card_es1968_exit
)